[mirror_ubuntu-hirsute-kernel.git] / drivers / spi / spi-bitbang.c

/*
 * polling/bitbanging SPI master controller driver utilities
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/platform_device.h>
#include <linux/slab.h>

#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>

#define SPI_BITBANG_CS_DELAY	100


/*----------------------------------------------------------------------*/

/*
 * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
 * Use this for GPIO or shift-register level hardware APIs.
 *
 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
 * to glue code.  These bitbang setup() and cleanup() routines are always
 * used, though maybe they're called from controller-aware code.
 *
 * chipselect() and friends may use spi_device->controller_data and
 * controller registers as appropriate.
 *
 *
 * NOTE:  SPI controller pins can often be used as GPIO pins instead,
 * which means you could use a bitbang driver either to get hardware
 * working quickly, or testing for differences that aren't speed related.
 */

struct spi_bitbang_cs {
	unsigned	nsecs;	/* (clock cycle time)/2 */
	u32		(*txrx_word)(struct spi_device *spi, unsigned nsecs,
					u32 word, u8 bits, unsigned flags);
	unsigned	(*txrx_bufs)(struct spi_device *,
					u32 (*txrx_word)(
						struct spi_device *spi,
						unsigned nsecs,
						u32 word, u8 bits,
						unsigned flags),
					unsigned, struct spi_transfer *,
					unsigned);
};

static unsigned bitbang_txrx_8(
	struct spi_device	*spi,
	u32			(*txrx_word)(struct spi_device *spi,
					unsigned nsecs,
					u32 word, u8 bits,
					unsigned flags),
	unsigned		ns,
	struct spi_transfer	*t,
	unsigned flags
) {
	unsigned		bits = t->bits_per_word;
	unsigned		count = t->len;
	const u8		*tx = t->tx_buf;
	u8			*rx = t->rx_buf;

	while (likely(count > 0)) {
		u8		word = 0;

		if (tx)
			word = *tx++;
		word = txrx_word(spi, ns, word, bits, flags);
		if (rx)
			*rx++ = word;
		count -= 1;
	}
	return t->len - count;
}

static unsigned bitbang_txrx_16(
	struct spi_device	*spi,
	u32			(*txrx_word)(struct spi_device *spi,
					unsigned nsecs,
					u32 word, u8 bits,
					unsigned flags),
	unsigned		ns,
	struct spi_transfer	*t,
	unsigned flags
) {
	unsigned		bits = t->bits_per_word;
	unsigned		count = t->len;
	const u16		*tx = t->tx_buf;
	u16			*rx = t->rx_buf;

	while (likely(count > 1)) {
		u16		word = 0;

		if (tx)
			word = *tx++;
		word = txrx_word(spi, ns, word, bits, flags);
		if (rx)
			*rx++ = word;
		count -= 2;
	}
	return t->len - count;
}

static unsigned bitbang_txrx_32(
	struct spi_device	*spi,
	u32			(*txrx_word)(struct spi_device *spi,
					unsigned nsecs,
					u32 word, u8 bits,
					unsigned flags),
	unsigned		ns,
	struct spi_transfer	*t,
	unsigned flags
) {
	unsigned		bits = t->bits_per_word;
	unsigned		count = t->len;
	const u32		*tx = t->tx_buf;
	u32			*rx = t->rx_buf;

	while (likely(count > 3)) {
		u32		word = 0;

		if (tx)
			word = *tx++;
		word = txrx_word(spi, ns, word, bits, flags);
		if (rx)
			*rx++ = word;
		count -= 4;
	}
	return t->len - count;
}

int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
{
	struct spi_bitbang_cs	*cs = spi->controller_state;
	u8			bits_per_word;
	u32			hz;

	if (t) {
		bits_per_word = t->bits_per_word;
		hz = t->speed_hz;
	} else {
		bits_per_word = 0;
		hz = 0;
	}

	/* spi_transfer level calls that work per-word */
	if (!bits_per_word)
		bits_per_word = spi->bits_per_word;
	if (bits_per_word <= 8)
		cs->txrx_bufs = bitbang_txrx_8;
	else if (bits_per_word <= 16)
		cs->txrx_bufs = bitbang_txrx_16;
	else if (bits_per_word <= 32)
		cs->txrx_bufs = bitbang_txrx_32;
	else
		return -EINVAL;

	/* nsecs = (clock period)/2 */
	if (!hz)
		hz = spi->max_speed_hz;
	if (hz) {
		cs->nsecs = (1000000000/2) / hz;
		if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
			return -EINVAL;
	}

	return 0;
}
EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);

/**
 * spi_bitbang_setup - default setup for per-word I/O loops
 */
int spi_bitbang_setup(struct spi_device *spi)
{
	struct spi_bitbang_cs	*cs = spi->controller_state;
	struct spi_bitbang	*bitbang;

	bitbang = spi_master_get_devdata(spi->master);

	if (!cs) {
		cs = kzalloc(sizeof(*cs), GFP_KERNEL);
		if (!cs)
			return -ENOMEM;
		spi->controller_state = cs;
	}

	/* per-word shift register access, in hardware or bitbanging */
	cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
	if (!cs->txrx_word)
		return -EINVAL;

	if (bitbang->setup_transfer) {
		int retval = bitbang->setup_transfer(spi, NULL);
		if (retval < 0)
			return retval;
	}

	dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);

	/* NOTE we _need_ to call chipselect() early, ideally with adapter
	 * setup, unless the hardware defaults cooperate to avoid confusion
	 * between normal (active low) and inverted chipselects.
	 */

	/* deselect chip (low or high) */
	mutex_lock(&bitbang->lock);
	if (!bitbang->busy) {
		bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
		ndelay(cs->nsecs);
	}
	mutex_unlock(&bitbang->lock);

	return 0;
}
EXPORT_SYMBOL_GPL(spi_bitbang_setup);

/**
 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
 */
void spi_bitbang_cleanup(struct spi_device *spi)
{
	kfree(spi->controller_state);
}
EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);

static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
{
	struct spi_bitbang_cs	*cs = spi->controller_state;
	unsigned		nsecs = cs->nsecs;

	return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
}

/*----------------------------------------------------------------------*/

/*
 * SECOND PART ... simple transfer queue runner.
 *
 * This costs a task context per controller, running the queue by
 * performing each transfer in sequence.  Smarter hardware can queue
 * several DMA transfers at once, and process several controller queues
 * in parallel; this driver doesn't match such hardware very well.
 *
 * Drivers can provide word-at-a-time i/o primitives, or provide
 * transfer-at-a-time ones to leverage dma or fifo hardware.
 */

static int spi_bitbang_prepare_hardware(struct spi_master *spi)
{
	struct spi_bitbang	*bitbang;

	bitbang = spi_master_get_devdata(spi);

	mutex_lock(&bitbang->lock);
	bitbang->busy = 1;
	mutex_unlock(&bitbang->lock);

	return 0;
}

static int spi_bitbang_transfer_one(struct spi_master *master,
				    struct spi_device *spi,
				    struct spi_transfer *transfer)
{
	struct spi_bitbang *bitbang = spi_master_get_devdata(master);
	int status = 0;

	if (bitbang->setup_transfer) {
		status = bitbang->setup_transfer(spi, transfer);
		if (status < 0)
			goto out;
	}

	if (transfer->len)
		status = bitbang->txrx_bufs(spi, transfer);

	if (status == transfer->len)
		status = 0;
	else if (status >= 0)
		status = -EREMOTEIO;

out:
	spi_finalize_current_transfer(master);

	return status;
}

static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
{
	struct spi_bitbang	*bitbang;

	bitbang = spi_master_get_devdata(spi);

	mutex_lock(&bitbang->lock);
	bitbang->busy = 0;
	mutex_unlock(&bitbang->lock);

	return 0;
}

static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
{
	struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);

	/* SPI core provides CS high / low, but bitbang driver
	 * expects CS active
	 * spi device driver takes care of handling SPI_CS_HIGH
	 */
	enable = (!!(spi->mode & SPI_CS_HIGH) == enable);

	ndelay(SPI_BITBANG_CS_DELAY);
	bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
			    BITBANG_CS_INACTIVE);
	ndelay(SPI_BITBANG_CS_DELAY);
}

/*----------------------------------------------------------------------*/

/**
 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
 * @bitbang: driver handle
 *
 * Caller should have zero-initialized all parts of the structure, and then
 * provided callbacks for chip selection and I/O loops.  If the master has
 * a transfer method, its final step should call spi_bitbang_transfer; or,
 * that's the default if the transfer routine is not initialized.  It should
 * also set up the bus number and number of chipselects.
 *
 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
 * hardware that basically exposes a shift register) or per-spi_transfer
 * (which takes better advantage of hardware like fifos or DMA engines).
 *
 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
 * master methods.  Those methods are the defaults if the bitbang->txrx_bufs
 * routine isn't initialized.
 *
 * This routine registers the spi_master, which will process requests in a
 * dedicated task, keeping IRQs unblocked most of the time.  To stop
 * processing those requests, call spi_bitbang_stop().
 *
 * On success, this routine will take a reference to master. The caller is
 * responsible for calling spi_bitbang_stop() to decrement the reference and
 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
 * leak.
 */
int spi_bitbang_start(struct spi_bitbang *bitbang)
{
	struct spi_master *master = bitbang->master;
	int ret;

	if (!master || !bitbang->chipselect)
		return -EINVAL;

	mutex_init(&bitbang->lock);

	if (!master->mode_bits)
		master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;

	if (master->transfer || master->transfer_one_message)
		return -EINVAL;

	master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
	master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
	master->transfer_one = spi_bitbang_transfer_one;
	master->set_cs = spi_bitbang_set_cs;

	if (!bitbang->txrx_bufs) {
		bitbang->use_dma = 0;
		bitbang->txrx_bufs = spi_bitbang_bufs;
		if (!master->setup) {
			if (!bitbang->setup_transfer)
				bitbang->setup_transfer =
					 spi_bitbang_setup_transfer;
			master->setup = spi_bitbang_setup;
			master->cleanup = spi_bitbang_cleanup;
		}
	}

	/* driver may get busy before register() returns, especially
	 * if someone registered boardinfo for devices
	 */
	ret = spi_register_master(spi_master_get(master));
	if (ret)
		spi_master_put(master);

	return 0;
}
EXPORT_SYMBOL_GPL(spi_bitbang_start);

/**
 * spi_bitbang_stop - stops the task providing spi communication
 */
void spi_bitbang_stop(struct spi_bitbang *bitbang)
{
	spi_unregister_master(bitbang->master);
}
EXPORT_SYMBOL_GPL(spi_bitbang_stop);

MODULE_LICENSE("GPL");
Commit	Line	Data
9904f22a	1	/*
ca632f55	2	* polling/bitbanging SPI master controller driver utilities
9904f22a DB	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
9904f22a DB	13	*/
9904f22a DB	14
9904f22a DB	15	#include <linux/spinlock.h>
	16	#include <linux/workqueue.h>
	17	#include <linux/interrupt.h>
d7614de4	18	#include <linux/module.h>
9904f22a DB	19	#include <linux/delay.h>
	20	#include <linux/errno.h>
	21	#include <linux/platform_device.h>
5a0e3ad6	22	#include <linux/slab.h>
9904f22a DB	23
	24	#include <linux/spi/spi.h>
	25	#include <linux/spi/spi_bitbang.h>
	26
00376865 HK	27	#define SPI_BITBANG_CS_DELAY 100
00376865 HK	28
9904f22a DB	29
	30	/----------------------------------------------------------------------/
	31
	32	/*
	33	* FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
	34	* Use this for GPIO or shift-register level hardware APIs.
	35	*
	36	* spi_bitbang_cs is in spi_device->controller_state, which is unavailable
	37	* to glue code. These bitbang setup() and cleanup() routines are always
	38	* used, though maybe they're called from controller-aware code.
	39	*
03ddcbc5	40	* chipselect() and friends may use spi_device->controller_data and
9904f22a DB	41	* controller registers as appropriate.
	42	*
	43	*
	44	* NOTE: SPI controller pins can often be used as GPIO pins instead,
	45	* which means you could use a bitbang driver either to get hardware
	46	* working quickly, or testing for differences that aren't speed related.
	47	*/
	48
	49	struct spi_bitbang_cs {
	50	unsigned nsecs; /* (clock cycle time)/2 */
	51	u32 (txrx_word)(struct spi_device spi, unsigned nsecs,
304d3436	52	u32 word, u8 bits, unsigned flags);
9904f22a DB	53	unsigned (txrx_bufs)(struct spi_device ,
	54	u32 (*txrx_word)(
	55	struct spi_device *spi,
	56	unsigned nsecs,
304d3436 LB	57	u32 word, u8 bits,
	58	unsigned flags),
	59	unsigned, struct spi_transfer *,
	60	unsigned);
9904f22a DB	61	};
	62
	63	static unsigned bitbang_txrx_8(
	64	struct spi_device *spi,
	65	u32 (txrx_word)(struct spi_device spi,
	66	unsigned nsecs,
304d3436 LB	67	u32 word, u8 bits,
304d3436 LB	68	unsigned flags),
9904f22a	69	unsigned ns,
304d3436 LB	70	struct spi_transfer *t,
304d3436 LB	71	unsigned flags
9904f22a	72	) {
766ed704	73	unsigned bits = t->bits_per_word;
9904f22a DB	74	unsigned count = t->len;
	75	const u8 *tx = t->tx_buf;
	76	u8 *rx = t->rx_buf;
	77
	78	while (likely(count > 0)) {
	79	u8 word = 0;
	80
	81	if (tx)
	82	word = *tx++;
304d3436	83	word = txrx_word(spi, ns, word, bits, flags);
9904f22a DB	84	if (rx)
	85	*rx++ = word;
	86	count -= 1;
	87	}
	88	return t->len - count;
	89	}
	90
	91	static unsigned bitbang_txrx_16(
	92	struct spi_device *spi,
	93	u32 (txrx_word)(struct spi_device spi,
	94	unsigned nsecs,
304d3436 LB	95	u32 word, u8 bits,
304d3436 LB	96	unsigned flags),
9904f22a	97	unsigned ns,
304d3436 LB	98	struct spi_transfer *t,
304d3436 LB	99	unsigned flags
9904f22a	100	) {
766ed704	101	unsigned bits = t->bits_per_word;
9904f22a DB	102	unsigned count = t->len;
	103	const u16 *tx = t->tx_buf;
	104	u16 *rx = t->rx_buf;
	105
	106	while (likely(count > 1)) {
	107	u16 word = 0;
	108
	109	if (tx)
	110	word = *tx++;
304d3436	111	word = txrx_word(spi, ns, word, bits, flags);
9904f22a DB	112	if (rx)
	113	*rx++ = word;
	114	count -= 2;
	115	}
	116	return t->len - count;
	117	}
	118
	119	static unsigned bitbang_txrx_32(
	120	struct spi_device *spi,
	121	u32 (txrx_word)(struct spi_device spi,
	122	unsigned nsecs,
304d3436 LB	123	u32 word, u8 bits,
304d3436 LB	124	unsigned flags),
9904f22a	125	unsigned ns,
304d3436 LB	126	struct spi_transfer *t,
304d3436 LB	127	unsigned flags
9904f22a	128	) {
766ed704	129	unsigned bits = t->bits_per_word;
9904f22a DB	130	unsigned count = t->len;
	131	const u32 *tx = t->tx_buf;
	132	u32 *rx = t->rx_buf;
	133
	134	while (likely(count > 3)) {
	135	u32 word = 0;
	136
	137	if (tx)
	138	word = *tx++;
304d3436	139	word = txrx_word(spi, ns, word, bits, flags);
9904f22a DB	140	if (rx)
	141	*rx++ = word;
	142	count -= 4;
	143	}
	144	return t->len - count;
	145	}
	146
ff9f4771	147	int spi_bitbang_setup_transfer(struct spi_device spi, struct spi_transfer t)
4cff33f9 ID	148	{
	149	struct spi_bitbang_cs *cs = spi->controller_state;
	150	u8 bits_per_word;
	151	u32 hz;
	152
	153	if (t) {
	154	bits_per_word = t->bits_per_word;
	155	hz = t->speed_hz;
	156	} else {
	157	bits_per_word = 0;
	158	hz = 0;
	159	}
	160
	161	/* spi_transfer level calls that work per-word */
	162	if (!bits_per_word)
	163	bits_per_word = spi->bits_per_word;
	164	if (bits_per_word <= 8)
	165	cs->txrx_bufs = bitbang_txrx_8;
	166	else if (bits_per_word <= 16)
	167	cs->txrx_bufs = bitbang_txrx_16;
	168	else if (bits_per_word <= 32)
	169	cs->txrx_bufs = bitbang_txrx_32;
	170	else
	171	return -EINVAL;
	172
	173	/* nsecs = (clock period)/2 */
	174	if (!hz)
	175	hz = spi->max_speed_hz;
1e316d75 DB	176	if (hz) {
	177	cs->nsecs = (1000000000/2) / hz;
	178	if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
	179	return -EINVAL;
	180	}
4cff33f9 ID	181
	182	return 0;
	183	}
ff9f4771	184	EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
4cff33f9	185
9904f22a DB	186	/**
	187	* spi_bitbang_setup - default setup for per-word I/O loops
	188	*/
	189	int spi_bitbang_setup(struct spi_device *spi)
	190	{
	191	struct spi_bitbang_cs *cs = spi->controller_state;
	192	struct spi_bitbang *bitbang;
	193
ccf77cc4 DB	194	bitbang = spi_master_get_devdata(spi->master);
ccf77cc4 DB	195
9904f22a	196	if (!cs) {
cff93c58	197	cs = kzalloc(sizeof(*cs), GFP_KERNEL);
9904f22a DB	198	if (!cs)
	199	return -ENOMEM;
	200	spi->controller_state = cs;
	201	}
9904f22a	202
9904f22a DB	203	/* per-word shift register access, in hardware or bitbanging */
	204	cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL\|SPI_CPHA)];
	205	if (!cs->txrx_word)
	206	return -EINVAL;
	207
7d0ec8b6 PN	208	if (bitbang->setup_transfer) {
	209	int retval = bitbang->setup_transfer(spi, NULL);
	210	if (retval < 0)
	211	return retval;
	212	}
9904f22a	213
7d077197	214	dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
9904f22a DB	215
	216	/* NOTE we _need_ to call chipselect() early, ideally with adapter
	217	* setup, unless the hardware defaults cooperate to avoid confusion
	218	* between normal (active low) and inverted chipselects.
	219	*/
	220
	221	/* deselect chip (low or high) */
c15f6ed3	222	mutex_lock(&bitbang->lock);
9904f22a	223	if (!bitbang->busy) {
8275c642	224	bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
9904f22a DB	225	ndelay(cs->nsecs);
9904f22a DB	226	}
c15f6ed3	227	mutex_unlock(&bitbang->lock);
9904f22a DB	228
	229	return 0;
	230	}
	231	EXPORT_SYMBOL_GPL(spi_bitbang_setup);
	232
	233	/**
	234	* spi_bitbang_cleanup - default cleanup for per-word I/O loops
	235	*/
0ffa0285	236	void spi_bitbang_cleanup(struct spi_device *spi)
9904f22a DB	237	{
	238	kfree(spi->controller_state);
	239	}
	240	EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
	241
	242	static int spi_bitbang_bufs(struct spi_device spi, struct spi_transfer t)
	243	{
	244	struct spi_bitbang_cs *cs = spi->controller_state;
	245	unsigned nsecs = cs->nsecs;
	246
304d3436	247	return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
9904f22a DB	248	}
	249
	250	/----------------------------------------------------------------------/
	251
	252	/*
	253	* SECOND PART ... simple transfer queue runner.
	254	*
	255	* This costs a task context per controller, running the queue by
	256	* performing each transfer in sequence. Smarter hardware can queue
	257	* several DMA transfers at once, and process several controller queues
	258	* in parallel; this driver doesn't match such hardware very well.
	259	*
	260	* Drivers can provide word-at-a-time i/o primitives, or provide
	261	* transfer-at-a-time ones to leverage dma or fifo hardware.
	262	*/
2025172e MB	263
	264	static int spi_bitbang_prepare_hardware(struct spi_master *spi)
	265	{
cff93c58	266	struct spi_bitbang *bitbang;
2025172e MB	267
	268	bitbang = spi_master_get_devdata(spi);
	269
c15f6ed3	270	mutex_lock(&bitbang->lock);
2025172e	271	bitbang->busy = 1;
c15f6ed3	272	mutex_unlock(&bitbang->lock);
2025172e MB	273
	274	return 0;
	275	}
	276
d60990d5	277	static int spi_bitbang_transfer_one(struct spi_master *master,
00376865 HK	278	struct spi_device *spi,
00376865 HK	279	struct spi_transfer *transfer)
9904f22a	280	{
00376865 HK	281	struct spi_bitbang *bitbang = spi_master_get_devdata(master);
00376865 HK	282	int status = 0;
91b30858	283
00376865 HK	284	if (bitbang->setup_transfer) {
	285	status = bitbang->setup_transfer(spi, transfer);
	286	if (status < 0)
	287	goto out;
91b30858 MB	288	}
91b30858 MB	289
00376865 HK	290	if (transfer->len)
00376865 HK	291	status = bitbang->txrx_bufs(spi, transfer);
91b30858	292
00376865 HK	293	if (status == transfer->len)
	294	status = 0;
	295	else if (status >= 0)
	296	status = -EREMOTEIO;
91b30858	297
00376865 HK	298	out:
00376865 HK	299	spi_finalize_current_transfer(master);
9904f22a	300
2025172e	301	return status;
9904f22a DB	302	}
9904f22a DB	303
2025172e	304	static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
9904f22a	305	{
cff93c58	306	struct spi_bitbang *bitbang;
9904f22a	307
2025172e	308	bitbang = spi_master_get_devdata(spi);
9904f22a	309
c15f6ed3	310	mutex_lock(&bitbang->lock);
2025172e	311	bitbang->busy = 0;
c15f6ed3	312	mutex_unlock(&bitbang->lock);
9904f22a	313
2025172e	314	return 0;
9904f22a	315	}
9904f22a	316
00376865 HK	317	static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
	318	{
	319	struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
	320
	321	/* SPI core provides CS high / low, but bitbang driver
	322	* expects CS active
	323	* spi device driver takes care of handling SPI_CS_HIGH
	324	*/
	325	enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
	326
	327	ndelay(SPI_BITBANG_CS_DELAY);
	328	bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
	329	BITBANG_CS_INACTIVE);
	330	ndelay(SPI_BITBANG_CS_DELAY);
	331	}
	332
9904f22a DB	333	/----------------------------------------------------------------------/
	334
	335	/**
	336	* spi_bitbang_start - start up a polled/bitbanging SPI master driver
	337	* @bitbang: driver handle
	338	*
	339	* Caller should have zero-initialized all parts of the structure, and then
	340	* provided callbacks for chip selection and I/O loops. If the master has
	341	* a transfer method, its final step should call spi_bitbang_transfer; or,
	342	* that's the default if the transfer routine is not initialized. It should
	343	* also set up the bus number and number of chipselects.
	344	*
	345	* For i/o loops, provide callbacks either per-word (for bitbanging, or for
	346	* hardware that basically exposes a shift register) or per-spi_transfer
	347	* (which takes better advantage of hardware like fifos or DMA engines).
	348	*
7f8c7619 HPN	349	* Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
	350	* spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
	351	* master methods. Those methods are the defaults if the bitbang->txrx_bufs
	352	* routine isn't initialized.
9904f22a DB	353	*
	354	* This routine registers the spi_master, which will process requests in a
	355	* dedicated task, keeping IRQs unblocked most of the time. To stop
	356	* processing those requests, call spi_bitbang_stop().
702a4879 AL	357	*
	358	* On success, this routine will take a reference to master. The caller is
	359	* responsible for calling spi_bitbang_stop() to decrement the reference and
	360	* spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
	361	* leak.
9904f22a DB	362	*/
	363	int spi_bitbang_start(struct spi_bitbang *bitbang)
	364	{
7a5d8ca1	365	struct spi_master *master = bitbang->master;
702a4879	366	int ret;
9904f22a	367
7a5d8ca1	368	if (!master \|\| !bitbang->chipselect)
9904f22a DB	369	return -EINVAL;
9904f22a DB	370
c15f6ed3	371	mutex_init(&bitbang->lock);
9904f22a	372
7a5d8ca1 GL	373	if (!master->mode_bits)
7a5d8ca1 GL	374	master->mode_bits = SPI_CPOL \| SPI_CPHA \| bitbang->flags;
e7db06b5	375
2025172e MB	376	if (master->transfer \|\| master->transfer_one_message)
	377	return -EINVAL;
	378
	379	master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
	380	master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
00376865 HK	381	master->transfer_one = spi_bitbang_transfer_one;
00376865 HK	382	master->set_cs = spi_bitbang_set_cs;
2025172e	383
9904f22a DB	384	if (!bitbang->txrx_bufs) {
	385	bitbang->use_dma = 0;
	386	bitbang->txrx_bufs = spi_bitbang_bufs;
7a5d8ca1	387	if (!master->setup) {
ff9f4771 KG	388	if (!bitbang->setup_transfer)
	389	bitbang->setup_transfer =
	390	spi_bitbang_setup_transfer;
7a5d8ca1 GL	391	master->setup = spi_bitbang_setup;
7a5d8ca1 GL	392	master->cleanup = spi_bitbang_cleanup;
9904f22a	393	}
52ade736	394	}
9904f22a DB	395
	396	/* driver may get busy before register() returns, especially
	397	* if someone registered boardinfo for devices
	398	*/
702a4879 AL	399	ret = spi_register_master(spi_master_get(master));
	400	if (ret)
	401	spi_master_put(master);
	402
	403	return 0;
9904f22a DB	404	}
	405	EXPORT_SYMBOL_GPL(spi_bitbang_start);
	406
	407	/**
	408	* spi_bitbang_stop - stops the task providing spi communication
	409	*/
d9721ae1	410	void spi_bitbang_stop(struct spi_bitbang *bitbang)
9904f22a	411	{
a836f585	412	spi_unregister_master(bitbang->master);
9904f22a DB	413	}
	414	EXPORT_SYMBOL_GPL(spi_bitbang_stop);
	415
	416	MODULE_LICENSE("GPL");
	417