]>
Commit | Line | Data |
---|---|---|
b36ece83 MH |
1 | /* |
2 | * Freescale SPI/eSPI controller driver library. | |
3 | * | |
4 | * Maintainer: Kumar Gala | |
5 | * | |
6 | * Copyright (C) 2006 Polycom, Inc. | |
7 | * | |
8 | * CPM SPI and QE buffer descriptors mode support: | |
9 | * Copyright (c) 2009 MontaVista Software, Inc. | |
10 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
11 | * | |
12 | * Copyright 2010 Freescale Semiconductor, Inc. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify it | |
15 | * under the terms of the GNU General Public License as published by the | |
16 | * Free Software Foundation; either version 2 of the License, or (at your | |
17 | * option) any later version. | |
18 | */ | |
b36ece83 | 19 | #include <linux/dma-mapping.h> |
a3108360 XL |
20 | #include <linux/fsl_devices.h> |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/kernel.h> | |
b36ece83 MH |
23 | #include <linux/mm.h> |
24 | #include <linux/of_platform.h> | |
d57a4282 | 25 | #include <linux/spi/spi.h> |
e8beacbb | 26 | #ifdef CONFIG_FSL_SOC |
b36ece83 | 27 | #include <sysdev/fsl_soc.h> |
e8beacbb | 28 | #endif |
b36ece83 | 29 | |
ca632f55 | 30 | #include "spi-fsl-lib.h" |
b36ece83 MH |
31 | |
32 | #define MPC8XXX_SPI_RX_BUF(type) \ | |
33 | void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \ | |
34 | { \ | |
35 | type *rx = mpc8xxx_spi->rx; \ | |
36 | *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \ | |
37 | mpc8xxx_spi->rx = rx; \ | |
38 | } | |
39 | ||
40 | #define MPC8XXX_SPI_TX_BUF(type) \ | |
41 | u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \ | |
42 | { \ | |
43 | u32 data; \ | |
44 | const type *tx = mpc8xxx_spi->tx; \ | |
45 | if (!tx) \ | |
46 | return 0; \ | |
47 | data = *tx++ << mpc8xxx_spi->tx_shift; \ | |
48 | mpc8xxx_spi->tx = tx; \ | |
49 | return data; \ | |
50 | } | |
51 | ||
52 | MPC8XXX_SPI_RX_BUF(u8) | |
53 | MPC8XXX_SPI_RX_BUF(u16) | |
54 | MPC8XXX_SPI_RX_BUF(u32) | |
55 | MPC8XXX_SPI_TX_BUF(u8) | |
56 | MPC8XXX_SPI_TX_BUF(u16) | |
57 | MPC8XXX_SPI_TX_BUF(u32) | |
58 | ||
59 | struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata) | |
60 | { | |
61 | return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata); | |
62 | } | |
63 | ||
b36ece83 MH |
64 | const char *mpc8xxx_spi_strmode(unsigned int flags) |
65 | { | |
66 | if (flags & SPI_QE_CPU_MODE) { | |
67 | return "QE CPU"; | |
68 | } else if (flags & SPI_CPM_MODE) { | |
69 | if (flags & SPI_QE) | |
70 | return "QE"; | |
71 | else if (flags & SPI_CPM2) | |
72 | return "CPM2"; | |
73 | else | |
74 | return "CPM1"; | |
75 | } | |
76 | return "CPU"; | |
77 | } | |
78 | ||
c592becb | 79 | void mpc8xxx_spi_probe(struct device *dev, struct resource *mem, |
b36ece83 MH |
80 | unsigned int irq) |
81 | { | |
8074cf06 | 82 | struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); |
b36ece83 MH |
83 | struct spi_master *master; |
84 | struct mpc8xxx_spi *mpc8xxx_spi; | |
b36ece83 MH |
85 | |
86 | master = dev_get_drvdata(dev); | |
87 | ||
88 | /* the spi->mode bits understood by this driver: */ | |
89 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | |
90 | | SPI_LSB_FIRST | SPI_LOOP; | |
91 | ||
b36ece83 MH |
92 | master->dev.of_node = dev->of_node; |
93 | ||
94 | mpc8xxx_spi = spi_master_get_devdata(master); | |
95 | mpc8xxx_spi->dev = dev; | |
96 | mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8; | |
97 | mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8; | |
98 | mpc8xxx_spi->flags = pdata->flags; | |
99 | mpc8xxx_spi->spibrg = pdata->sysclk; | |
100 | mpc8xxx_spi->irq = irq; | |
101 | ||
102 | mpc8xxx_spi->rx_shift = 0; | |
103 | mpc8xxx_spi->tx_shift = 0; | |
104 | ||
105 | init_completion(&mpc8xxx_spi->done); | |
106 | ||
107 | master->bus_num = pdata->bus_num; | |
108 | master->num_chipselect = pdata->max_chipselect; | |
109 | ||
b36ece83 | 110 | init_completion(&mpc8xxx_spi->done); |
b36ece83 MH |
111 | } |
112 | ||
fd4a319b | 113 | int mpc8xxx_spi_remove(struct device *dev) |
b36ece83 MH |
114 | { |
115 | struct mpc8xxx_spi *mpc8xxx_spi; | |
116 | struct spi_master *master; | |
117 | ||
118 | master = dev_get_drvdata(dev); | |
119 | mpc8xxx_spi = spi_master_get_devdata(master); | |
120 | ||
b36ece83 MH |
121 | spi_unregister_master(master); |
122 | ||
123 | free_irq(mpc8xxx_spi->irq, mpc8xxx_spi); | |
124 | ||
125 | if (mpc8xxx_spi->spi_remove) | |
126 | mpc8xxx_spi->spi_remove(mpc8xxx_spi); | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
fd4a319b | 131 | int of_mpc8xxx_spi_probe(struct platform_device *ofdev) |
b36ece83 MH |
132 | { |
133 | struct device *dev = &ofdev->dev; | |
134 | struct device_node *np = ofdev->dev.of_node; | |
135 | struct mpc8xxx_spi_probe_info *pinfo; | |
136 | struct fsl_spi_platform_data *pdata; | |
137 | const void *prop; | |
138 | int ret = -ENOMEM; | |
139 | ||
7282326b | 140 | pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL); |
b36ece83 | 141 | if (!pinfo) |
ef4bbdec | 142 | return ret; |
b36ece83 MH |
143 | |
144 | pdata = &pinfo->pdata; | |
145 | dev->platform_data = pdata; | |
146 | ||
147 | /* Allocate bus num dynamically. */ | |
148 | pdata->bus_num = -1; | |
149 | ||
e8beacbb | 150 | #ifdef CONFIG_FSL_SOC |
b36ece83 MH |
151 | /* SPI controller is either clocked from QE or SoC clock. */ |
152 | pdata->sysclk = get_brgfreq(); | |
153 | if (pdata->sysclk == -1) { | |
154 | pdata->sysclk = fsl_get_sys_freq(); | |
7282326b AL |
155 | if (pdata->sysclk == -1) |
156 | return -ENODEV; | |
b36ece83 | 157 | } |
e8beacbb AL |
158 | #else |
159 | ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk); | |
160 | if (ret) | |
7282326b | 161 | return ret; |
e8beacbb | 162 | #endif |
b36ece83 MH |
163 | |
164 | prop = of_get_property(np, "mode", NULL); | |
165 | if (prop && !strcmp(prop, "cpu-qe")) | |
166 | pdata->flags = SPI_QE_CPU_MODE; | |
167 | else if (prop && !strcmp(prop, "qe")) | |
168 | pdata->flags = SPI_CPM_MODE | SPI_QE; | |
169 | else if (of_device_is_compatible(np, "fsl,cpm2-spi")) | |
170 | pdata->flags = SPI_CPM_MODE | SPI_CPM2; | |
171 | else if (of_device_is_compatible(np, "fsl,cpm1-spi")) | |
172 | pdata->flags = SPI_CPM_MODE | SPI_CPM1; | |
173 | ||
174 | return 0; | |
b36ece83 | 175 | } |