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d29389de | 1 | /* |
ca632f55 | 2 | * SPI master driver using generic bitbanged GPIO |
d29389de DB |
3 | * |
4 | * Copyright (C) 2006,2008 David Brownell | |
9b00bc7b | 5 | * Copyright (C) 2017 Linus Walleij |
d29389de DB |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
d29389de DB |
16 | */ |
17 | #include <linux/kernel.h> | |
d7614de4 | 18 | #include <linux/module.h> |
d29389de | 19 | #include <linux/platform_device.h> |
9b00bc7b | 20 | #include <linux/gpio/consumer.h> |
ecc77773 | 21 | #include <linux/of.h> |
38ab18ca | 22 | #include <linux/of_device.h> |
d29389de DB |
23 | |
24 | #include <linux/spi/spi.h> | |
25 | #include <linux/spi/spi_bitbang.h> | |
26 | #include <linux/spi/spi_gpio.h> | |
27 | ||
28 | ||
29 | /* | |
30 | * This bitbanging SPI master driver should help make systems usable | |
31 | * when a native hardware SPI engine is not available, perhaps because | |
32 | * its driver isn't yet working or because the I/O pins it requires | |
33 | * are used for other purposes. | |
34 | * | |
35 | * platform_device->driver_data ... points to spi_gpio | |
36 | * | |
37 | * spi->controller_state ... reserved for bitbang framework code | |
d29389de DB |
38 | * |
39 | * spi->master->dev.driver_data ... points to spi_gpio->bitbang | |
40 | */ | |
41 | ||
42 | struct spi_gpio { | |
43 | struct spi_bitbang bitbang; | |
d29389de | 44 | struct platform_device *pdev; |
9b00bc7b LW |
45 | struct gpio_desc *sck; |
46 | struct gpio_desc *miso; | |
47 | struct gpio_desc *mosi; | |
48 | struct gpio_desc **cs_gpios; | |
d29389de DB |
49 | }; |
50 | ||
51 | /*----------------------------------------------------------------------*/ | |
52 | ||
53 | /* | |
54 | * Because the overhead of going through four GPIO procedure calls | |
55 | * per transferred bit can make performance a problem, this code | |
56 | * is set up so that you can use it in either of two ways: | |
57 | * | |
58 | * - The slow generic way: set up platform_data to hold the GPIO | |
59 | * numbers used for MISO/MOSI/SCK, and issue procedure calls for | |
60 | * each of them. This driver can handle several such busses. | |
61 | * | |
62 | * - The quicker inlined way: only helps with platform GPIO code | |
63 | * that inlines operations for constant GPIOs. This can give | |
64 | * you tight (fast!) inner loops, but each such bus needs a | |
65 | * new driver. You'll define a new C file, with Makefile and | |
66 | * Kconfig support; the C code can be a total of six lines: | |
67 | * | |
68 | * #define DRIVER_NAME "myboard_spi2" | |
69 | * #define SPI_MISO_GPIO 119 | |
70 | * #define SPI_MOSI_GPIO 120 | |
71 | * #define SPI_SCK_GPIO 121 | |
72 | * #define SPI_N_CHIPSEL 4 | |
ca632f55 | 73 | * #include "spi-gpio.c" |
d29389de DB |
74 | */ |
75 | ||
76 | #ifndef DRIVER_NAME | |
77 | #define DRIVER_NAME "spi_gpio" | |
78 | ||
79 | #define GENERIC_BITBANG /* vs tight inlines */ | |
80 | ||
d29389de DB |
81 | #endif |
82 | ||
83 | /*----------------------------------------------------------------------*/ | |
84 | ||
650705cf | 85 | static inline struct spi_gpio *__pure |
161c2dd3 | 86 | spi_to_spi_gpio(const struct spi_device *spi) |
d29389de DB |
87 | { |
88 | const struct spi_bitbang *bang; | |
161c2dd3 | 89 | struct spi_gpio *spi_gpio; |
d29389de DB |
90 | |
91 | bang = spi_master_get_devdata(spi->master); | |
92 | spi_gpio = container_of(bang, struct spi_gpio, bitbang); | |
161c2dd3 DM |
93 | return spi_gpio; |
94 | } | |
95 | ||
9b00bc7b | 96 | /* These helpers are in turn called by the bitbang inlines */ |
d29389de DB |
97 | static inline void setsck(const struct spi_device *spi, int is_on) |
98 | { | |
9b00bc7b LW |
99 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
100 | ||
101 | gpiod_set_value_cansleep(spi_gpio->sck, is_on); | |
d29389de DB |
102 | } |
103 | ||
104 | static inline void setmosi(const struct spi_device *spi, int is_on) | |
105 | { | |
9b00bc7b LW |
106 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
107 | ||
108 | gpiod_set_value_cansleep(spi_gpio->mosi, is_on); | |
d29389de DB |
109 | } |
110 | ||
111 | static inline int getmiso(const struct spi_device *spi) | |
112 | { | |
9b00bc7b | 113 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 114 | |
4b859db2 LB |
115 | if (spi->mode & SPI_3WIRE) |
116 | return !!gpiod_get_value_cansleep(spi_gpio->mosi); | |
117 | else | |
118 | return !!gpiod_get_value_cansleep(spi_gpio->miso); | |
9b00bc7b | 119 | } |
d29389de DB |
120 | |
121 | /* | |
122 | * NOTE: this clocks "as fast as we can". It "should" be a function of the | |
123 | * requested device clock. Software overhead means we usually have trouble | |
124 | * reaching even one Mbit/sec (except when we can inline bitops), so for now | |
125 | * we'll just assume we never need additional per-bit slowdowns. | |
126 | */ | |
127 | #define spidelay(nsecs) do {} while (0) | |
128 | ||
ca632f55 | 129 | #include "spi-bitbang-txrx.h" |
d29389de DB |
130 | |
131 | /* | |
132 | * These functions can leverage inline expansion of GPIO calls to shrink | |
133 | * costs for a txrx bit, often by factors of around ten (by instruction | |
134 | * count). That is particularly visible for larger word sizes, but helps | |
135 | * even with default 8-bit words. | |
136 | * | |
137 | * REVISIT overheads calling these functions for each word also have | |
138 | * significant performance costs. Having txrx_bufs() calls that inline | |
139 | * the txrx_word() logic would help performance, e.g. on larger blocks | |
140 | * used with flash storage or MMC/SD. There should also be ways to make | |
141 | * GCC be less stupid about reloading registers inside the I/O loops, | |
142 | * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? | |
143 | */ | |
144 | ||
145 | static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 146 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 147 | { |
304d3436 | 148 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); |
d29389de DB |
149 | } |
150 | ||
151 | static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 152 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 153 | { |
304d3436 | 154 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); |
d29389de DB |
155 | } |
156 | ||
157 | static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 158 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 159 | { |
304d3436 | 160 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); |
d29389de DB |
161 | } |
162 | ||
163 | static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 164 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 165 | { |
304d3436 | 166 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); |
d29389de DB |
167 | } |
168 | ||
3c8e1a84 MS |
169 | /* |
170 | * These functions do not call setmosi or getmiso if respective flag | |
171 | * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to | |
172 | * call when such pin is not present or defined in the controller. | |
173 | * A separate set of callbacks is defined to get highest possible | |
174 | * speed in the generic case (when both MISO and MOSI lines are | |
175 | * available), as optimiser will remove the checks when argument is | |
176 | * constant. | |
177 | */ | |
178 | ||
179 | static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 180 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 181 | { |
304d3436 | 182 | flags = spi->master->flags; |
3c8e1a84 MS |
183 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); |
184 | } | |
185 | ||
186 | static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 187 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 188 | { |
304d3436 | 189 | flags = spi->master->flags; |
3c8e1a84 MS |
190 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); |
191 | } | |
192 | ||
193 | static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 194 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 195 | { |
304d3436 | 196 | flags = spi->master->flags; |
3c8e1a84 MS |
197 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); |
198 | } | |
199 | ||
200 | static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 201 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 202 | { |
304d3436 | 203 | flags = spi->master->flags; |
3c8e1a84 MS |
204 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); |
205 | } | |
206 | ||
d29389de DB |
207 | /*----------------------------------------------------------------------*/ |
208 | ||
209 | static void spi_gpio_chipselect(struct spi_device *spi, int is_active) | |
210 | { | |
161c2dd3 | 211 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 212 | |
9b00bc7b | 213 | /* set initial clock line level */ |
d29389de | 214 | if (is_active) |
9b00bc7b LW |
215 | gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); |
216 | ||
217 | /* Drive chip select line, if we have one */ | |
249e2632 | 218 | if (spi_gpio->cs_gpios) { |
9b00bc7b | 219 | struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select]; |
d29389de | 220 | |
9b00bc7b LW |
221 | /* SPI chip selects are normally active-low */ |
222 | gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); | |
bfb9bcdb | 223 | } |
d29389de DB |
224 | } |
225 | ||
226 | static int spi_gpio_setup(struct spi_device *spi) | |
227 | { | |
9b00bc7b | 228 | struct gpio_desc *cs; |
161c2dd3 DM |
229 | int status = 0; |
230 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
38ab18ca | 231 | |
9b00bc7b LW |
232 | /* |
233 | * The CS GPIOs have already been | |
234 | * initialized from the descriptor lookup. | |
235 | */ | |
249e2632 AS |
236 | if (spi_gpio->cs_gpios) { |
237 | cs = spi_gpio->cs_gpios[spi->chip_select]; | |
238 | if (!spi->controller_state && cs) | |
239 | status = gpiod_direction_output(cs, | |
240 | !(spi->mode & SPI_CS_HIGH)); | |
241 | } | |
9b00bc7b LW |
242 | |
243 | if (!status) | |
6b8cc330 | 244 | status = spi_bitbang_setup(spi); |
161c2dd3 | 245 | |
d29389de DB |
246 | return status; |
247 | } | |
248 | ||
4b859db2 LB |
249 | static int spi_gpio_set_direction(struct spi_device *spi, bool output) |
250 | { | |
251 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
5132b3d2 | 252 | int ret; |
4b859db2 LB |
253 | |
254 | if (output) | |
255 | return gpiod_direction_output(spi_gpio->mosi, 1); | |
5132b3d2 LW |
256 | |
257 | ret = gpiod_direction_input(spi_gpio->mosi); | |
258 | if (ret) | |
259 | return ret; | |
260 | /* | |
261 | * Send a turnaround high impedance cycle when switching | |
262 | * from output to input. Theoretically there should be | |
263 | * a clock delay here, but as has been noted above, the | |
264 | * nsec delay function for bit-banged GPIO is simply | |
265 | * {} because bit-banging just doesn't get fast enough | |
266 | * anyway. | |
267 | */ | |
268 | if (spi->mode & SPI_3WIRE_HIZ) { | |
269 | gpiod_set_value_cansleep(spi_gpio->sck, | |
270 | !(spi->mode & SPI_CPOL)); | |
271 | gpiod_set_value_cansleep(spi_gpio->sck, | |
272 | !!(spi->mode & SPI_CPOL)); | |
273 | } | |
274 | return 0; | |
4b859db2 LB |
275 | } |
276 | ||
d29389de DB |
277 | static void spi_gpio_cleanup(struct spi_device *spi) |
278 | { | |
d29389de DB |
279 | spi_bitbang_cleanup(spi); |
280 | } | |
281 | ||
9b00bc7b LW |
282 | /* |
283 | * It can be convenient to use this driver with pins that have alternate | |
284 | * functions associated with a "native" SPI controller if a driver for that | |
285 | * controller is not available, or is missing important functionality. | |
286 | * | |
287 | * On platforms which can do so, configure MISO with a weak pullup unless | |
288 | * there's an external pullup on that signal. That saves power by avoiding | |
289 | * floating signals. (A weak pulldown would save power too, but many | |
290 | * drivers expect to see all-ones data as the no slave "response".) | |
291 | */ | |
5c8283c1 | 292 | static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) |
d29389de | 293 | { |
9b00bc7b LW |
294 | spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); |
295 | if (IS_ERR(spi_gpio->mosi)) | |
296 | return PTR_ERR(spi_gpio->mosi); | |
d29389de | 297 | |
9b00bc7b LW |
298 | spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); |
299 | if (IS_ERR(spi_gpio->miso)) | |
300 | return PTR_ERR(spi_gpio->miso); | |
d29389de | 301 | |
9b00bc7b | 302 | spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); |
1723c315 LW |
303 | if (IS_ERR(spi_gpio->sck)) |
304 | return PTR_ERR(spi_gpio->sck); | |
d29389de | 305 | |
9b00bc7b | 306 | return 0; |
d29389de DB |
307 | } |
308 | ||
38ab18ca | 309 | #ifdef CONFIG_OF |
d9e15281 | 310 | static const struct of_device_id spi_gpio_dt_ids[] = { |
38ab18ca DM |
311 | { .compatible = "spi-gpio" }, |
312 | {} | |
313 | }; | |
314 | MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); | |
315 | ||
249e2632 AS |
316 | static int spi_gpio_probe_dt(struct platform_device *pdev, |
317 | struct spi_master *master) | |
38ab18ca | 318 | { |
249e2632 AS |
319 | master->dev.of_node = pdev->dev.of_node; |
320 | master->use_gpio_descriptors = true; | |
38ab18ca | 321 | |
249e2632 AS |
322 | return 0; |
323 | } | |
324 | #else | |
325 | static inline int spi_gpio_probe_dt(struct platform_device *pdev, | |
326 | struct spi_master *master) | |
327 | { | |
328 | return 0; | |
329 | } | |
330 | #endif | |
38ab18ca | 331 | |
249e2632 AS |
332 | static int spi_gpio_probe_pdata(struct platform_device *pdev, |
333 | struct spi_master *master) | |
334 | { | |
335 | struct device *dev = &pdev->dev; | |
336 | struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); | |
337 | struct spi_gpio *spi_gpio = spi_master_get_devdata(master); | |
338 | int i; | |
38ab18ca | 339 | |
249e2632 AS |
340 | #ifdef GENERIC_BITBANG |
341 | if (!pdata || !pdata->num_chipselect) | |
342 | return -ENODEV; | |
343 | #endif | |
344 | /* | |
345 | * The master needs to think there is a chipselect even if not | |
346 | * connected | |
347 | */ | |
348 | master->num_chipselect = pdata->num_chipselect ?: 1; | |
38ab18ca | 349 | |
249e2632 AS |
350 | spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect, |
351 | sizeof(*spi_gpio->cs_gpios), | |
352 | GFP_KERNEL); | |
353 | if (!spi_gpio->cs_gpios) | |
354 | return -ENOMEM; | |
38ab18ca | 355 | |
249e2632 AS |
356 | for (i = 0; i < master->num_chipselect; i++) { |
357 | spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, | |
358 | GPIOD_OUT_HIGH); | |
359 | if (IS_ERR(spi_gpio->cs_gpios[i])) | |
360 | return PTR_ERR(spi_gpio->cs_gpios[i]); | |
361 | } | |
38ab18ca | 362 | |
38ab18ca DM |
363 | return 0; |
364 | } | |
38ab18ca | 365 | |
fd4a319b | 366 | static int spi_gpio_probe(struct platform_device *pdev) |
d29389de DB |
367 | { |
368 | int status; | |
369 | struct spi_master *master; | |
370 | struct spi_gpio *spi_gpio; | |
96cad6d7 | 371 | struct device *dev = &pdev->dev; |
15dd0e9e | 372 | struct spi_bitbang *bb; |
249e2632 | 373 | const struct of_device_id *of_id; |
d29389de | 374 | |
249e2632 | 375 | of_id = of_match_device(spi_gpio_dt_ids, &pdev->dev); |
d29389de | 376 | |
96cad6d7 | 377 | master = spi_alloc_master(dev, sizeof(*spi_gpio)); |
9b00bc7b LW |
378 | if (!master) |
379 | return -ENOMEM; | |
d29389de | 380 | |
249e2632 AS |
381 | if (of_id) |
382 | status = spi_gpio_probe_dt(pdev, master); | |
383 | else | |
384 | status = spi_gpio_probe_pdata(pdev, master); | |
9b00bc7b | 385 | |
249e2632 AS |
386 | if (status) |
387 | return status; | |
9b00bc7b | 388 | |
249e2632 | 389 | spi_gpio = spi_master_get_devdata(master); |
d29389de | 390 | |
249e2632 | 391 | platform_set_drvdata(pdev, spi_gpio); |
9b00bc7b | 392 | |
d29389de | 393 | spi_gpio->pdev = pdev; |
d29389de | 394 | |
5c8283c1 | 395 | status = spi_gpio_request(dev, spi_gpio); |
9b00bc7b LW |
396 | if (status) |
397 | return status; | |
398 | ||
24778be2 | 399 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); |
b89fefda RK |
400 | master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | |
401 | SPI_CS_HIGH; | |
5c8283c1 AS |
402 | if (!spi_gpio->mosi) { |
403 | /* HW configuration without MOSI pin | |
404 | * | |
405 | * No setting SPI_MASTER_NO_RX here - if there is only | |
406 | * a MOSI pin connected the host can still do RX by | |
407 | * changing the direction of the line. | |
408 | */ | |
409 | master->flags = SPI_MASTER_NO_TX; | |
410 | } | |
411 | ||
d29389de | 412 | master->bus_num = pdev->id; |
d29389de DB |
413 | master->setup = spi_gpio_setup; |
414 | master->cleanup = spi_gpio_cleanup; | |
249e2632 | 415 | |
15dd0e9e AS |
416 | bb = &spi_gpio->bitbang; |
417 | bb->master = master; | |
418 | bb->chipselect = spi_gpio_chipselect; | |
419 | bb->set_line_direction = spi_gpio_set_direction; | |
3c8e1a84 | 420 | |
5c8283c1 | 421 | if (master->flags & SPI_MASTER_NO_TX) { |
15dd0e9e AS |
422 | bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; |
423 | bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; | |
424 | bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; | |
425 | bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; | |
68cd9dc2 AS |
426 | } else { |
427 | bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; | |
428 | bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; | |
429 | bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; | |
430 | bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; | |
3c8e1a84 | 431 | } |
15dd0e9e | 432 | bb->setup_transfer = spi_bitbang_setup_transfer; |
d29389de DB |
433 | |
434 | status = spi_bitbang_start(&spi_gpio->bitbang); | |
9b00bc7b | 435 | if (status) |
d29389de | 436 | spi_master_put(master); |
d29389de DB |
437 | |
438 | return status; | |
439 | } | |
440 | ||
fd4a319b | 441 | static int spi_gpio_remove(struct platform_device *pdev) |
d29389de DB |
442 | { |
443 | struct spi_gpio *spi_gpio; | |
d29389de DB |
444 | |
445 | spi_gpio = platform_get_drvdata(pdev); | |
d29389de DB |
446 | |
447 | /* stop() unregisters child devices too */ | |
d9721ae1 | 448 | spi_bitbang_stop(&spi_gpio->bitbang); |
d29389de | 449 | |
94c69f76 | 450 | spi_master_put(spi_gpio->bitbang.master); |
d29389de | 451 | |
d9721ae1 | 452 | return 0; |
d29389de DB |
453 | } |
454 | ||
455 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
456 | ||
457 | static struct platform_driver spi_gpio_driver = { | |
38ab18ca DM |
458 | .driver = { |
459 | .name = DRIVER_NAME, | |
38ab18ca DM |
460 | .of_match_table = of_match_ptr(spi_gpio_dt_ids), |
461 | }, | |
940ab889 | 462 | .probe = spi_gpio_probe, |
fd4a319b | 463 | .remove = spi_gpio_remove, |
d29389de | 464 | }; |
940ab889 | 465 | module_platform_driver(spi_gpio_driver); |
d29389de DB |
466 | |
467 | MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO "); | |
468 | MODULE_AUTHOR("David Brownell"); | |
469 | MODULE_LICENSE("GPL"); |