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d29389de 1/*
ca632f55 2 * SPI master driver using generic bitbanged GPIO
d29389de
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3 *
4 * Copyright (C) 2006,2008 David Brownell
9b00bc7b 5 * Copyright (C) 2017 Linus Walleij
d29389de
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6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
d29389de
DB
16 */
17#include <linux/kernel.h>
d7614de4 18#include <linux/module.h>
d29389de 19#include <linux/platform_device.h>
9b00bc7b 20#include <linux/gpio/consumer.h>
ecc77773 21#include <linux/of.h>
38ab18ca 22#include <linux/of_device.h>
d29389de
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23
24#include <linux/spi/spi.h>
25#include <linux/spi/spi_bitbang.h>
26#include <linux/spi/spi_gpio.h>
27
28
29/*
30 * This bitbanging SPI master driver should help make systems usable
31 * when a native hardware SPI engine is not available, perhaps because
32 * its driver isn't yet working or because the I/O pins it requires
33 * are used for other purposes.
34 *
35 * platform_device->driver_data ... points to spi_gpio
36 *
37 * spi->controller_state ... reserved for bitbang framework code
38 * spi->controller_data ... holds chipselect GPIO
39 *
40 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
41 */
42
43struct spi_gpio {
44 struct spi_bitbang bitbang;
45 struct spi_gpio_platform_data pdata;
46 struct platform_device *pdev;
9b00bc7b
LW
47 struct gpio_desc *sck;
48 struct gpio_desc *miso;
49 struct gpio_desc *mosi;
50 struct gpio_desc **cs_gpios;
51 bool has_cs;
d29389de
DB
52};
53
54/*----------------------------------------------------------------------*/
55
56/*
57 * Because the overhead of going through four GPIO procedure calls
58 * per transferred bit can make performance a problem, this code
59 * is set up so that you can use it in either of two ways:
60 *
61 * - The slow generic way: set up platform_data to hold the GPIO
62 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
63 * each of them. This driver can handle several such busses.
64 *
65 * - The quicker inlined way: only helps with platform GPIO code
66 * that inlines operations for constant GPIOs. This can give
67 * you tight (fast!) inner loops, but each such bus needs a
68 * new driver. You'll define a new C file, with Makefile and
69 * Kconfig support; the C code can be a total of six lines:
70 *
71 * #define DRIVER_NAME "myboard_spi2"
72 * #define SPI_MISO_GPIO 119
73 * #define SPI_MOSI_GPIO 120
74 * #define SPI_SCK_GPIO 121
75 * #define SPI_N_CHIPSEL 4
ca632f55 76 * #include "spi-gpio.c"
d29389de
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77 */
78
79#ifndef DRIVER_NAME
80#define DRIVER_NAME "spi_gpio"
81
82#define GENERIC_BITBANG /* vs tight inlines */
83
d29389de
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84#endif
85
86/*----------------------------------------------------------------------*/
87
650705cf 88static inline struct spi_gpio *__pure
161c2dd3 89spi_to_spi_gpio(const struct spi_device *spi)
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90{
91 const struct spi_bitbang *bang;
161c2dd3 92 struct spi_gpio *spi_gpio;
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93
94 bang = spi_master_get_devdata(spi->master);
95 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
161c2dd3
DM
96 return spi_gpio;
97}
98
650705cf 99static inline struct spi_gpio_platform_data *__pure
161c2dd3
DM
100spi_to_pdata(const struct spi_device *spi)
101{
102 return &spi_to_spi_gpio(spi)->pdata;
d29389de
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103}
104
9b00bc7b 105/* These helpers are in turn called by the bitbang inlines */
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106static inline void setsck(const struct spi_device *spi, int is_on)
107{
9b00bc7b
LW
108 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
109
110 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
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111}
112
113static inline void setmosi(const struct spi_device *spi, int is_on)
114{
9b00bc7b
LW
115 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
116
117 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
d29389de
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118}
119
120static inline int getmiso(const struct spi_device *spi)
121{
9b00bc7b 122 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
d29389de 123
9b00bc7b
LW
124 return !!gpiod_get_value_cansleep(spi_gpio->miso);
125}
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126
127/*
128 * NOTE: this clocks "as fast as we can". It "should" be a function of the
129 * requested device clock. Software overhead means we usually have trouble
130 * reaching even one Mbit/sec (except when we can inline bitops), so for now
131 * we'll just assume we never need additional per-bit slowdowns.
132 */
133#define spidelay(nsecs) do {} while (0)
134
ca632f55 135#include "spi-bitbang-txrx.h"
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136
137/*
138 * These functions can leverage inline expansion of GPIO calls to shrink
139 * costs for a txrx bit, often by factors of around ten (by instruction
140 * count). That is particularly visible for larger word sizes, but helps
141 * even with default 8-bit words.
142 *
143 * REVISIT overheads calling these functions for each word also have
144 * significant performance costs. Having txrx_bufs() calls that inline
145 * the txrx_word() logic would help performance, e.g. on larger blocks
146 * used with flash storage or MMC/SD. There should also be ways to make
147 * GCC be less stupid about reloading registers inside the I/O loops,
148 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
149 */
150
151static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
152 unsigned nsecs, u32 word, u8 bits)
153{
04bb2a03 154 return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
d29389de
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155}
156
157static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
158 unsigned nsecs, u32 word, u8 bits)
159{
04bb2a03 160 return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
d29389de
DB
161}
162
163static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
164 unsigned nsecs, u32 word, u8 bits)
165{
04bb2a03 166 return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
d29389de
DB
167}
168
169static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
170 unsigned nsecs, u32 word, u8 bits)
171{
04bb2a03 172 return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
d29389de
DB
173}
174
3c8e1a84
MS
175/*
176 * These functions do not call setmosi or getmiso if respective flag
177 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
178 * call when such pin is not present or defined in the controller.
179 * A separate set of callbacks is defined to get highest possible
180 * speed in the generic case (when both MISO and MOSI lines are
181 * available), as optimiser will remove the checks when argument is
182 * constant.
183 */
184
185static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
186 unsigned nsecs, u32 word, u8 bits)
187{
188 unsigned flags = spi->master->flags;
189 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
190}
191
192static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
193 unsigned nsecs, u32 word, u8 bits)
194{
195 unsigned flags = spi->master->flags;
196 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
197}
198
199static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
200 unsigned nsecs, u32 word, u8 bits)
201{
202 unsigned flags = spi->master->flags;
203 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
204}
205
206static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
207 unsigned nsecs, u32 word, u8 bits)
208{
209 unsigned flags = spi->master->flags;
210 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
211}
212
d29389de
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213/*----------------------------------------------------------------------*/
214
215static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
216{
161c2dd3 217 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
d29389de 218
9b00bc7b 219 /* set initial clock line level */
d29389de 220 if (is_active)
9b00bc7b
LW
221 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
222
223 /* Drive chip select line, if we have one */
224 if (spi_gpio->has_cs) {
225 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
d29389de 226
9b00bc7b
LW
227 /* SPI chip selects are normally active-low */
228 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
bfb9bcdb 229 }
d29389de
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230}
231
232static int spi_gpio_setup(struct spi_device *spi)
233{
9b00bc7b 234 struct gpio_desc *cs;
161c2dd3
DM
235 int status = 0;
236 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
38ab18ca 237
9b00bc7b
LW
238 /*
239 * The CS GPIOs have already been
240 * initialized from the descriptor lookup.
241 */
242 cs = spi_gpio->cs_gpios[spi->chip_select];
243 if (!spi->controller_state && cs)
244 status = gpiod_direction_output(cs,
245 !(spi->mode & SPI_CS_HIGH));
246
247 if (!status)
6b8cc330 248 status = spi_bitbang_setup(spi);
161c2dd3 249
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250 return status;
251}
252
253static void spi_gpio_cleanup(struct spi_device *spi)
254{
d29389de
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255 spi_bitbang_cleanup(spi);
256}
257
9b00bc7b
LW
258/*
259 * It can be convenient to use this driver with pins that have alternate
260 * functions associated with a "native" SPI controller if a driver for that
261 * controller is not available, or is missing important functionality.
262 *
263 * On platforms which can do so, configure MISO with a weak pullup unless
264 * there's an external pullup on that signal. That saves power by avoiding
265 * floating signals. (A weak pulldown would save power too, but many
266 * drivers expect to see all-ones data as the no slave "response".)
267 */
268static int spi_gpio_request(struct device *dev,
269 struct spi_gpio *spi_gpio,
270 unsigned int num_chipselects,
271 u16 *mflags)
d29389de 272{
9b00bc7b 273 int i;
d29389de 274
9b00bc7b
LW
275 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
276 if (IS_ERR(spi_gpio->mosi))
277 return PTR_ERR(spi_gpio->mosi);
278 if (!spi_gpio->mosi)
3c8e1a84 279 /* HW configuration without MOSI pin */
9b00bc7b 280 *mflags |= SPI_MASTER_NO_TX;
d29389de 281
9b00bc7b
LW
282 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
283 if (IS_ERR(spi_gpio->miso))
284 return PTR_ERR(spi_gpio->miso);
285 if (!spi_gpio->miso)
3c8e1a84 286 /* HW configuration without MISO pin */
9b00bc7b 287 *mflags |= SPI_MASTER_NO_RX;
d29389de 288
9b00bc7b
LW
289 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
290 if (IS_ERR(spi_gpio->mosi))
291 return PTR_ERR(spi_gpio->mosi);
d29389de 292
9b00bc7b
LW
293 for (i = 0; i < num_chipselects; i++) {
294 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",
295 i, GPIOD_OUT_HIGH);
296 if (IS_ERR(spi_gpio->cs_gpios[i]))
297 return PTR_ERR(spi_gpio->cs_gpios[i]);
298 }
d29389de 299
9b00bc7b 300 return 0;
d29389de
DB
301}
302
38ab18ca 303#ifdef CONFIG_OF
d9e15281 304static const struct of_device_id spi_gpio_dt_ids[] = {
38ab18ca
DM
305 { .compatible = "spi-gpio" },
306 {}
307};
308MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
309
310static int spi_gpio_probe_dt(struct platform_device *pdev)
311{
312 int ret;
313 u32 tmp;
314 struct spi_gpio_platform_data *pdata;
315 struct device_node *np = pdev->dev.of_node;
316 const struct of_device_id *of_id =
317 of_match_device(spi_gpio_dt_ids, &pdev->dev);
318
319 if (!of_id)
320 return 0;
321
322 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
323 if (!pdata)
324 return -ENOMEM;
325
38ab18ca
DM
326
327 ret = of_property_read_u32(np, "num-chipselects", &tmp);
328 if (ret < 0) {
329 dev_err(&pdev->dev, "num-chipselects property not found\n");
330 goto error_free;
331 }
332
333 pdata->num_chipselect = tmp;
334 pdev->dev.platform_data = pdata;
335
336 return 1;
337
338error_free:
339 devm_kfree(&pdev->dev, pdata);
340 return ret;
341}
342#else
ac2cb30b 343static inline int spi_gpio_probe_dt(struct platform_device *pdev)
38ab18ca
DM
344{
345 return 0;
346}
347#endif
348
fd4a319b 349static int spi_gpio_probe(struct platform_device *pdev)
d29389de
DB
350{
351 int status;
352 struct spi_master *master;
353 struct spi_gpio *spi_gpio;
354 struct spi_gpio_platform_data *pdata;
3c8e1a84 355 u16 master_flags = 0;
38ab18ca
DM
356 bool use_of = 0;
357
358 status = spi_gpio_probe_dt(pdev);
359 if (status < 0)
360 return status;
361 if (status > 0)
362 use_of = 1;
d29389de 363
8074cf06 364 pdata = dev_get_platdata(&pdev->dev);
d29389de 365#ifdef GENERIC_BITBANG
d1d81802 366 if (!pdata || (!use_of && !pdata->num_chipselect))
d29389de
DB
367 return -ENODEV;
368#endif
369
9b00bc7b
LW
370 master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio));
371 if (!master)
372 return -ENOMEM;
d29389de 373
d29389de 374 spi_gpio = spi_master_get_devdata(master);
9b00bc7b 375
a86854d0
KC
376 spi_gpio->cs_gpios = devm_kcalloc(&pdev->dev,
377 pdata->num_chipselect,
378 sizeof(*spi_gpio->cs_gpios),
9b00bc7b
LW
379 GFP_KERNEL);
380 if (!spi_gpio->cs_gpios)
381 return -ENOMEM;
382
d29389de
DB
383 platform_set_drvdata(pdev, spi_gpio);
384
9b00bc7b
LW
385 /* Determine if we have chip selects connected */
386 spi_gpio->has_cs = !!pdata->num_chipselect;
387
d29389de
DB
388 spi_gpio->pdev = pdev;
389 if (pdata)
390 spi_gpio->pdata = *pdata;
391
9b00bc7b
LW
392 status = spi_gpio_request(&pdev->dev, spi_gpio,
393 pdata->num_chipselect, &master_flags);
394 if (status)
395 return status;
396
24778be2 397 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
3c8e1a84 398 master->flags = master_flags;
d29389de 399 master->bus_num = pdev->id;
9b00bc7b
LW
400 /* The master needs to think there is a chipselect even if not connected */
401 master->num_chipselect = spi_gpio->has_cs ? pdata->num_chipselect : 1;
d29389de
DB
402 master->setup = spi_gpio_setup;
403 master->cleanup = spi_gpio_cleanup;
38ab18ca
DM
404#ifdef CONFIG_OF
405 master->dev.of_node = pdev->dev.of_node;
38ab18ca 406#endif
d29389de 407
94c69f76 408 spi_gpio->bitbang.master = master;
d29389de 409 spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
3c8e1a84 410
23699f98 411 if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
3c8e1a84
MS
412 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
413 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
414 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
415 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
416 } else {
417 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
418 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
419 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
420 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
421 }
d29389de
DB
422 spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
423 spi_gpio->bitbang.flags = SPI_CS_HIGH;
424
425 status = spi_bitbang_start(&spi_gpio->bitbang);
9b00bc7b 426 if (status)
d29389de 427 spi_master_put(master);
d29389de
DB
428
429 return status;
430}
431
fd4a319b 432static int spi_gpio_remove(struct platform_device *pdev)
d29389de
DB
433{
434 struct spi_gpio *spi_gpio;
435 struct spi_gpio_platform_data *pdata;
d29389de
DB
436
437 spi_gpio = platform_get_drvdata(pdev);
8074cf06 438 pdata = dev_get_platdata(&pdev->dev);
d29389de
DB
439
440 /* stop() unregisters child devices too */
d9721ae1 441 spi_bitbang_stop(&spi_gpio->bitbang);
d29389de 442
94c69f76 443 spi_master_put(spi_gpio->bitbang.master);
d29389de 444
d9721ae1 445 return 0;
d29389de
DB
446}
447
448MODULE_ALIAS("platform:" DRIVER_NAME);
449
450static struct platform_driver spi_gpio_driver = {
38ab18ca
DM
451 .driver = {
452 .name = DRIVER_NAME,
38ab18ca
DM
453 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
454 },
940ab889 455 .probe = spi_gpio_probe,
fd4a319b 456 .remove = spi_gpio_remove,
d29389de 457};
940ab889 458module_platform_driver(spi_gpio_driver);
d29389de
DB
459
460MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
461MODULE_AUTHOR("David Brownell");
462MODULE_LICENSE("GPL");