[mirror_ubuntu-artful-kernel.git] / drivers / spi / spi-pxa2xx-pci.c

/*
 * CE4100's SPI device is more or less the same one as found on PXA
 *
 */
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/of_device.h>
#include <linux/module.h>
#include <linux/spi/pxa2xx_spi.h>
#include <linux/clk-provider.h>

#include <linux/dmaengine.h>
#include <linux/platform_data/dma-dw.h>

enum {
	PORT_CE4100,
	PORT_BYT,
	PORT_BSW0,
	PORT_BSW1,
	PORT_BSW2,
	PORT_QUARK_X1000,
	PORT_LPT,
};

struct pxa_spi_info {
	enum pxa_ssp_type type;
	int port_id;
	int num_chipselect;
	unsigned long max_clk_rate;

	/* DMA channel request parameters */
	bool (*dma_filter)(struct dma_chan *chan, void *param);
	void *tx_param;
	void *rx_param;

	int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
};

static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
static struct dw_dma_slave byt_rx_param = { .src_id = 1 };

static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };

static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };

static bool lpss_dma_filter(struct dma_chan *chan, void *param)
{
	struct dw_dma_slave *dws = param;

	if (dws->dma_dev != chan->device->dev)
		return false;

	chan->private = dws;
	return true;
}

static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
{
	struct pci_dev *dma_dev;

	c->num_chipselect = 1;
	c->max_clk_rate = 50000000;

	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));

	if (c->tx_param) {
		struct dw_dma_slave *slave = c->tx_param;

		slave->dma_dev = &dma_dev->dev;
		slave->m_master = 0;
		slave->p_master = 1;
	}

	if (c->rx_param) {
		struct dw_dma_slave *slave = c->rx_param;

		slave->dma_dev = &dma_dev->dev;
		slave->m_master = 0;
		slave->p_master = 1;
	}

	c->dma_filter = lpss_dma_filter;
	return 0;
}

static struct pxa_spi_info spi_info_configs[] = {
	[PORT_CE4100] = {
		.type = PXA25x_SSP,
		.port_id =  -1,
		.num_chipselect = -1,
		.max_clk_rate = 3686400,
	},
	[PORT_BYT] = {
		.type = LPSS_BYT_SSP,
		.port_id = 0,
		.setup = lpss_spi_setup,
		.tx_param = &byt_tx_param,
		.rx_param = &byt_rx_param,
	},
	[PORT_BSW0] = {
		.type = LPSS_BYT_SSP,
		.port_id = 0,
		.setup = lpss_spi_setup,
		.tx_param = &bsw0_tx_param,
		.rx_param = &bsw0_rx_param,
	},
	[PORT_BSW1] = {
		.type = LPSS_BYT_SSP,
		.port_id = 1,
		.setup = lpss_spi_setup,
		.tx_param = &bsw1_tx_param,
		.rx_param = &bsw1_rx_param,
	},
	[PORT_BSW2] = {
		.type = LPSS_BYT_SSP,
		.port_id = 2,
		.setup = lpss_spi_setup,
		.tx_param = &bsw2_tx_param,
		.rx_param = &bsw2_rx_param,
	},
	[PORT_QUARK_X1000] = {
		.type = QUARK_X1000_SSP,
		.port_id = -1,
		.num_chipselect = 1,
		.max_clk_rate = 50000000,
	},
	[PORT_LPT] = {
		.type = LPSS_LPT_SSP,
		.port_id = 0,
		.setup = lpss_spi_setup,
		.tx_param = &lpt_tx_param,
		.rx_param = &lpt_rx_param,
	},
};

static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
		const struct pci_device_id *ent)
{
	struct platform_device_info pi;
	int ret;
	struct platform_device *pdev;
	struct pxa2xx_spi_master spi_pdata;
	struct ssp_device *ssp;
	struct pxa_spi_info *c;
	char buf[40];

	ret = pcim_enable_device(dev);
	if (ret)
		return ret;

	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
	if (ret)
		return ret;

	c = &spi_info_configs[ent->driver_data];
	if (c->setup) {
		ret = c->setup(dev, c);
		if (ret)
			return ret;
	}

	memset(&spi_pdata, 0, sizeof(spi_pdata));
	spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
	spi_pdata.dma_filter = c->dma_filter;
	spi_pdata.tx_param = c->tx_param;
	spi_pdata.rx_param = c->rx_param;
	spi_pdata.enable_dma = c->rx_param && c->tx_param;

	ssp = &spi_pdata.ssp;
	ssp->phys_base = pci_resource_start(dev, 0);
	ssp->mmio_base = pcim_iomap_table(dev)[0];
	if (!ssp->mmio_base) {
		dev_err(&dev->dev, "failed to ioremap() registers\n");
		return -EIO;
	}
	ssp->irq = dev->irq;
	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
	ssp->type = c->type;

	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
	ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
					   c->max_clk_rate);
	 if (IS_ERR(ssp->clk))
		return PTR_ERR(ssp->clk);

	memset(&pi, 0, sizeof(pi));
	pi.parent = &dev->dev;
	pi.name = "pxa2xx-spi";
	pi.id = ssp->port_id;
	pi.data = &spi_pdata;
	pi.size_data = sizeof(spi_pdata);

	pdev = platform_device_register_full(&pi);
	if (IS_ERR(pdev)) {
		clk_unregister(ssp->clk);
		return PTR_ERR(pdev);
	}

	pci_set_drvdata(dev, pdev);

	return 0;
}

static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
{
	struct platform_device *pdev = pci_get_drvdata(dev);
	struct pxa2xx_spi_master *spi_pdata;

	spi_pdata = dev_get_platdata(&pdev->dev);

	platform_device_unregister(pdev);
	clk_unregister(spi_pdata->ssp.clk);
}

static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
	{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
	{ PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
	{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
	{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
	{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
	{ PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
	{ PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
	{ },
};
MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);

static struct pci_driver pxa2xx_spi_pci_driver = {
	.name           = "pxa2xx_spi_pci",
	.id_table       = pxa2xx_spi_pci_devices,
	.probe          = pxa2xx_spi_pci_probe,
	.remove         = pxa2xx_spi_pci_remove,
};

module_pci_driver(pxa2xx_spi_pci_driver);

MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
Commit	Line	Data
d6ea3df0 SAS	1	/*
	2	* CE4100's SPI device is more or less the same one as found on PXA
	3	*
	4	*/
	5	#include <linux/pci.h>
	6	#include <linux/platform_device.h>
	7	#include <linux/of_device.h>
d7614de4	8	#include <linux/module.h>
d6ea3df0	9	#include <linux/spi/pxa2xx_spi.h>
afa93c90	10	#include <linux/clk-provider.h>
d6ea3df0	11
b729bf34 MW	12	#include <linux/dmaengine.h>
	13	#include <linux/platform_data/dma-dw.h>
	14
d6ba32d5 CCE	15	enum {
	16	PORT_CE4100,
	17	PORT_BYT,
39d36536 MW	18	PORT_BSW0,
	19	PORT_BSW1,
	20	PORT_BSW2,
e5262d05	21	PORT_QUARK_X1000,
caba248d	22	PORT_LPT,
d6ba32d5 CCE	23	};
	24
	25	struct pxa_spi_info {
	26	enum pxa_ssp_type type;
	27	int port_id;
	28	int num_chipselect;
afa93c90	29	unsigned long max_clk_rate;
b729bf34 MW	30
b729bf34 MW	31	/* DMA channel request parameters */
743485ea	32	bool (dma_filter)(struct dma_chan chan, void *param);
b729bf34 MW	33	void *tx_param;
b729bf34 MW	34	void *rx_param;
743485ea AS	35
743485ea AS	36	int (setup)(struct pci_dev pdev, struct pxa_spi_info *c);
d6ba32d5 CCE	37	};
d6ba32d5 CCE	38
b729bf34 MW	39	static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
	40	static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
	41
39d36536 MW	42	static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
	43	static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
	44	static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
	45	static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
	46	static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
	47	static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
	48
caba248d LL	49	static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
	50	static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };
	51
b729bf34 MW	52	static bool lpss_dma_filter(struct dma_chan chan, void param)
	53	{
	54	struct dw_dma_slave *dws = param;
	55
	56	if (dws->dma_dev != chan->device->dev)
	57	return false;
	58
	59	chan->private = dws;
	60	return true;
	61	}
	62
743485ea AS	63	static int lpss_spi_setup(struct pci_dev dev, struct pxa_spi_info c)
	64	{
	65	struct pci_dev *dma_dev;
	66
	67	c->num_chipselect = 1;
	68	c->max_clk_rate = 50000000;
	69
	70	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
	71
	72	if (c->tx_param) {
	73	struct dw_dma_slave *slave = c->tx_param;
	74
	75	slave->dma_dev = &dma_dev->dev;
	76	slave->m_master = 0;
	77	slave->p_master = 1;
	78	}
	79
	80	if (c->rx_param) {
	81	struct dw_dma_slave *slave = c->rx_param;
	82
	83	slave->dma_dev = &dma_dev->dev;
	84	slave->m_master = 0;
	85	slave->p_master = 1;
	86	}
	87
	88	c->dma_filter = lpss_dma_filter;
	89	return 0;
	90	}
	91
d6ba32d5 CCE	92	static struct pxa_spi_info spi_info_configs[] = {
	93	[PORT_CE4100] = {
	94	.type = PXA25x_SSP,
	95	.port_id = -1,
	96	.num_chipselect = -1,
afa93c90	97	.max_clk_rate = 3686400,
d6ba32d5 CCE	98	},
d6ba32d5 CCE	99	[PORT_BYT] = {
03fbf488	100	.type = LPSS_BYT_SSP,
d6ba32d5	101	.port_id = 0,
743485ea	102	.setup = lpss_spi_setup,
b729bf34 MW	103	.tx_param = &byt_tx_param,
b729bf34 MW	104	.rx_param = &byt_rx_param,
d6ba32d5	105	},
39d36536	106	[PORT_BSW0] = {
03fbf488	107	.type = LPSS_BYT_SSP,
39d36536	108	.port_id = 0,
743485ea	109	.setup = lpss_spi_setup,
39d36536 MW	110	.tx_param = &bsw0_tx_param,
	111	.rx_param = &bsw0_rx_param,
	112	},
	113	[PORT_BSW1] = {
03fbf488	114	.type = LPSS_BYT_SSP,
39d36536	115	.port_id = 1,
743485ea	116	.setup = lpss_spi_setup,
39d36536 MW	117	.tx_param = &bsw1_tx_param,
	118	.rx_param = &bsw1_rx_param,
	119	},
	120	[PORT_BSW2] = {
03fbf488	121	.type = LPSS_BYT_SSP,
39d36536	122	.port_id = 2,
743485ea	123	.setup = lpss_spi_setup,
39d36536 MW	124	.tx_param = &bsw2_tx_param,
39d36536 MW	125	.rx_param = &bsw2_rx_param,
d6ba32d5	126	},
e5262d05 WC	127	[PORT_QUARK_X1000] = {
	128	.type = QUARK_X1000_SSP,
	129	.port_id = -1,
	130	.num_chipselect = 1,
	131	.max_clk_rate = 50000000,
	132	},
caba248d LL	133	[PORT_LPT] = {
	134	.type = LPSS_LPT_SSP,
	135	.port_id = 0,
743485ea	136	.setup = lpss_spi_setup,
caba248d LL	137	.tx_param = &lpt_tx_param,
	138	.rx_param = &lpt_rx_param,
	139	},
d6ba32d5 CCE	140	};
	141
	142	static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
d6ea3df0 SAS	143	const struct pci_device_id *ent)
d6ea3df0 SAS	144	{
0202775b	145	struct platform_device_info pi;
d6ea3df0	146	int ret;
d6ea3df0	147	struct platform_device *pdev;
0f3e1d27	148	struct pxa2xx_spi_master spi_pdata;
d6ea3df0	149	struct ssp_device *ssp;
d6ba32d5	150	struct pxa_spi_info *c;
afa93c90	151	char buf[40];
d6ea3df0	152
0202775b	153	ret = pcim_enable_device(dev);
d6ea3df0 SAS	154	if (ret)
	155	return ret;
	156
0202775b	157	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
c1346340	158	if (ret)
d6ea3df0	159	return ret;
d6ea3df0	160
d6ba32d5	161	c = &spi_info_configs[ent->driver_data];
743485ea AS	162	if (c->setup) {
	163	ret = c->setup(dev, c);
	164	if (ret)
	165	return ret;
b729bf34 MW	166	}
b729bf34 MW	167
743485ea AS	168	memset(&spi_pdata, 0, sizeof(spi_pdata));
	169	spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
	170	spi_pdata.dma_filter = c->dma_filter;
b729bf34 MW	171	spi_pdata.tx_param = c->tx_param;
	172	spi_pdata.rx_param = c->rx_param;
	173	spi_pdata.enable_dma = c->rx_param && c->tx_param;
d6ea3df0	174
851bacf5	175	ssp = &spi_pdata.ssp;
d6ea3df0	176	ssp->phys_base = pci_resource_start(dev, 0);
0202775b	177	ssp->mmio_base = pcim_iomap_table(dev)[0];
d6ea3df0	178	if (!ssp->mmio_base) {
0202775b MW	179	dev_err(&dev->dev, "failed to ioremap() registers\n");
0202775b MW	180	return -EIO;
d6ea3df0 SAS	181	}
d6ea3df0 SAS	182	ssp->irq = dev->irq;
d6ba32d5 CCE	183	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
d6ba32d5 CCE	184	ssp->type = c->type;
d6ea3df0	185
afa93c90	186	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
280af2b8 SB	187	ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
280af2b8 SB	188	c->max_clk_rate);
afa93c90 CCE	189	if (IS_ERR(ssp->clk))
	190	return PTR_ERR(ssp->clk);
	191
0202775b MW	192	memset(&pi, 0, sizeof(pi));
	193	pi.parent = &dev->dev;
	194	pi.name = "pxa2xx-spi";
	195	pi.id = ssp->port_id;
	196	pi.data = &spi_pdata;
	197	pi.size_data = sizeof(spi_pdata);
d6ea3df0	198
0202775b	199	pdev = platform_device_register_full(&pi);
afa93c90 CCE	200	if (IS_ERR(pdev)) {
afa93c90 CCE	201	clk_unregister(ssp->clk);
d77b5382	202	return PTR_ERR(pdev);
afa93c90	203	}
d6ea3df0	204
851bacf5	205	pci_set_drvdata(dev, pdev);
d6ea3df0	206
0202775b	207	return 0;
d6ea3df0 SAS	208	}
d6ea3df0 SAS	209
d6ba32d5	210	static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
d6ea3df0	211	{
851bacf5	212	struct platform_device *pdev = pci_get_drvdata(dev);
afa93c90 CCE	213	struct pxa2xx_spi_master *spi_pdata;
	214
	215	spi_pdata = dev_get_platdata(&pdev->dev);
d6ea3df0	216
851bacf5	217	platform_device_unregister(pdev);
afa93c90	218	clk_unregister(spi_pdata->ssp.clk);
d6ea3df0 SAS	219	}
d6ea3df0 SAS	220
d6ba32d5 CCE	221	static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
d6ba32d5 CCE	222	{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
e5262d05	223	{ PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
d6ba32d5	224	{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
39d36536 MW	225	{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
	226	{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
	227	{ PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
caba248d	228	{ PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
d6ea3df0 SAS	229	{ },
d6ea3df0 SAS	230	};
d6ba32d5	231	MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
d6ea3df0	232
d6ba32d5 CCE	233	static struct pci_driver pxa2xx_spi_pci_driver = {
	234	.name = "pxa2xx_spi_pci",
	235	.id_table = pxa2xx_spi_pci_devices,
	236	.probe = pxa2xx_spi_pci_probe,
	237	.remove = pxa2xx_spi_pci_remove,
d6ea3df0 SAS	238	};
d6ea3df0 SAS	239
d6ba32d5	240	module_pci_driver(pxa2xx_spi_pci_driver);
d6ea3df0	241
d6ba32d5	242	MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
d6ea3df0 SAS	243	MODULE_LICENSE("GPL v2");
d6ea3df0 SAS	244	MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");