[mirror_ubuntu-jammy-kernel.git] / drivers / spi / spi-sc18is602.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * NXP SC18IS602/603 SPI driver
 *
 * Copyright (C) Guenter Roeck <linux@roeck-us.net>
 */

#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/spi/spi.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/platform_data/sc18is602.h>
#include <linux/gpio/consumer.h>

enum chips { sc18is602, sc18is602b, sc18is603 };

#define SC18IS602_BUFSIZ		200
#define SC18IS602_CLOCK			7372000

#define SC18IS602_MODE_CPHA		BIT(2)
#define SC18IS602_MODE_CPOL		BIT(3)
#define SC18IS602_MODE_LSB_FIRST	BIT(5)
#define SC18IS602_MODE_CLOCK_DIV_4	0x0
#define SC18IS602_MODE_CLOCK_DIV_16	0x1
#define SC18IS602_MODE_CLOCK_DIV_64	0x2
#define SC18IS602_MODE_CLOCK_DIV_128	0x3

struct sc18is602 {
	struct spi_master	*master;
	struct device		*dev;
	u8			ctrl;
	u32			freq;
	u32			speed;

	/* I2C data */
	struct i2c_client	*client;
	enum chips		id;
	u8			buffer[SC18IS602_BUFSIZ + 1];
	int			tlen;	/* Data queued for tx in buffer */
	int			rindex;	/* Receive data index in buffer */

	struct gpio_desc	*reset;
};

static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
{
	int i, err;
	int usecs = 1000000 * len / hw->speed + 1;
	u8 dummy[1];

	for (i = 0; i < 10; i++) {
		err = i2c_master_recv(hw->client, dummy, 1);
		if (err >= 0)
			return 0;
		usleep_range(usecs, usecs * 2);
	}
	return -ETIMEDOUT;
}

static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
			  struct spi_transfer *t, bool do_transfer)
{
	unsigned int len = t->len;
	int ret;

	if (hw->tlen == 0) {
		/* First byte (I2C command) is chip select */
		hw->buffer[0] = 1 << msg->spi->chip_select;
		hw->tlen = 1;
		hw->rindex = 0;
	}
	/*
	 * We can not immediately send data to the chip, since each I2C message
	 * resembles a full SPI message (from CS active to CS inactive).
	 * Enqueue messages up to the first read or until do_transfer is true.
	 */
	if (t->tx_buf) {
		memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
		hw->tlen += len;
		if (t->rx_buf)
			do_transfer = true;
		else
			hw->rindex = hw->tlen - 1;
	} else if (t->rx_buf) {
		/*
		 * For receive-only transfers we still need to perform a dummy
		 * write to receive data from the SPI chip.
		 * Read data starts at the end of transmit data (minus 1 to
		 * account for CS).
		 */
		hw->rindex = hw->tlen - 1;
		memset(&hw->buffer[hw->tlen], 0, len);
		hw->tlen += len;
		do_transfer = true;
	}

	if (do_transfer && hw->tlen > 1) {
		ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
		if (ret < 0)
			return ret;
		ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
		if (ret < 0)
			return ret;
		if (ret != hw->tlen)
			return -EIO;

		if (t->rx_buf) {
			int rlen = hw->rindex + len;

			ret = sc18is602_wait_ready(hw, hw->tlen);
			if (ret < 0)
				return ret;
			ret = i2c_master_recv(hw->client, hw->buffer, rlen);
			if (ret < 0)
				return ret;
			if (ret != rlen)
				return -EIO;
			memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
		}
		hw->tlen = 0;
	}
	return len;
}

static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
{
	u8 ctrl = 0;
	int ret;

	if (mode & SPI_CPHA)
		ctrl |= SC18IS602_MODE_CPHA;
	if (mode & SPI_CPOL)
		ctrl |= SC18IS602_MODE_CPOL;
	if (mode & SPI_LSB_FIRST)
		ctrl |= SC18IS602_MODE_LSB_FIRST;

	/* Find the closest clock speed */
	if (hz >= hw->freq / 4) {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
		hw->speed = hw->freq / 4;
	} else if (hz >= hw->freq / 16) {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
		hw->speed = hw->freq / 16;
	} else if (hz >= hw->freq / 64) {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
		hw->speed = hw->freq / 64;
	} else {
		ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
		hw->speed = hw->freq / 128;
	}

	/*
	 * Don't do anything if the control value did not change. The initial
	 * value of 0xff for hw->ctrl ensures that the correct mode will be set
	 * with the first call to this function.
	 */
	if (ctrl == hw->ctrl)
		return 0;

	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
	if (ret < 0)
		return ret;

	hw->ctrl = ctrl;

	return 0;
}

static int sc18is602_check_transfer(struct spi_device *spi,
				    struct spi_transfer *t, int tlen)
{
	if (t && t->len + tlen > SC18IS602_BUFSIZ + 1)
		return -EINVAL;

	return 0;
}

static int sc18is602_transfer_one(struct spi_master *master,
				  struct spi_message *m)
{
	struct sc18is602 *hw = spi_master_get_devdata(master);
	struct spi_device *spi = m->spi;
	struct spi_transfer *t;
	int status = 0;

	hw->tlen = 0;
	list_for_each_entry(t, &m->transfers, transfer_list) {
		bool do_transfer;

		status = sc18is602_check_transfer(spi, t, hw->tlen);
		if (status < 0)
			break;

		status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
		if (status < 0)
			break;

		do_transfer = t->cs_change || list_is_last(&t->transfer_list,
							   &m->transfers);

		if (t->len) {
			status = sc18is602_txrx(hw, m, t, do_transfer);
			if (status < 0)
				break;
			m->actual_length += status;
		}
		status = 0;

		spi_transfer_delay_exec(t);
	}
	m->status = status;
	spi_finalize_current_message(master);

	return status;
}

static size_t sc18is602_max_transfer_size(struct spi_device *spi)
{
	return SC18IS602_BUFSIZ;
}

static int sc18is602_setup(struct spi_device *spi)
{
	struct sc18is602 *hw = spi_master_get_devdata(spi->master);

	/* SC18IS602 does not support CS2 */
	if (hw->id == sc18is602 && spi->chip_select == 2)
		return -ENXIO;

	return 0;
}

static int sc18is602_probe(struct i2c_client *client,
			   const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct device_node *np = dev->of_node;
	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
	struct sc18is602 *hw;
	struct spi_master *master;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
		return -EINVAL;

	master = devm_spi_alloc_master(dev, sizeof(struct sc18is602));
	if (!master)
		return -ENOMEM;

	hw = spi_master_get_devdata(master);
	i2c_set_clientdata(client, hw);

	/* assert reset and then release */
	hw->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
	if (IS_ERR(hw->reset))
		return PTR_ERR(hw->reset);
	gpiod_set_value_cansleep(hw->reset, 0);

	hw->master = master;
	hw->client = client;
	hw->dev = dev;
	hw->ctrl = 0xff;

	if (client->dev.of_node)
		hw->id = (enum chips)of_device_get_match_data(&client->dev);
	else
		hw->id = id->driver_data;

	switch (hw->id) {
	case sc18is602:
	case sc18is602b:
		master->num_chipselect = 4;
		hw->freq = SC18IS602_CLOCK;
		break;
	case sc18is603:
		master->num_chipselect = 2;
		if (pdata) {
			hw->freq = pdata->clock_frequency;
		} else {
			const __be32 *val;
			int len;

			val = of_get_property(np, "clock-frequency", &len);
			if (val && len >= sizeof(__be32))
				hw->freq = be32_to_cpup(val);
		}
		if (!hw->freq)
			hw->freq = SC18IS602_CLOCK;
		break;
	}
	master->bus_num = np ? -1 : client->adapter->nr;
	master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
	master->bits_per_word_mask = SPI_BPW_MASK(8);
	master->setup = sc18is602_setup;
	master->transfer_one_message = sc18is602_transfer_one;
	master->max_transfer_size = sc18is602_max_transfer_size;
	master->max_message_size = sc18is602_max_transfer_size;
	master->dev.of_node = np;
	master->min_speed_hz = hw->freq / 128;
	master->max_speed_hz = hw->freq / 4;

	return devm_spi_register_master(dev, master);
}

static const struct i2c_device_id sc18is602_id[] = {
	{ "sc18is602", sc18is602 },
	{ "sc18is602b", sc18is602b },
	{ "sc18is603", sc18is603 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, sc18is602_id);

static const struct of_device_id sc18is602_of_match[] = {
	{
		.compatible = "nxp,sc18is602",
		.data = (void *)sc18is602
	},
	{
		.compatible = "nxp,sc18is602b",
		.data = (void *)sc18is602b
	},
	{
		.compatible = "nxp,sc18is603",
		.data = (void *)sc18is603
	},
	{ },
};
MODULE_DEVICE_TABLE(of, sc18is602_of_match);

static struct i2c_driver sc18is602_driver = {
	.driver = {
		.name = "sc18is602",
		.of_match_table = of_match_ptr(sc18is602_of_match),
	},
	.probe = sc18is602_probe,
	.id_table = sc18is602_id,
};

module_i2c_driver(sc18is602_driver);

MODULE_DESCRIPTION("SC18IS602/603 SPI Master Driver");
MODULE_AUTHOR("Guenter Roeck");
MODULE_LICENSE("GPL");
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
3ce8859e GR	2	/*
	3	* NXP SC18IS602/603 SPI driver
	4	*
	5	* Copyright (C) Guenter Roeck <linux@roeck-us.net>
3ce8859e GR	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/err.h>
	10	#include <linux/module.h>
	11	#include <linux/spi/spi.h>
	12	#include <linux/i2c.h>
	13	#include <linux/delay.h>
	14	#include <linux/pm_runtime.h>
68c97b92	15	#include <linux/of_device.h>
3ce8859e GR	16	#include <linux/of.h>
3ce8859e GR	17	#include <linux/platform_data/sc18is602.h>
f9900801	18	#include <linux/gpio/consumer.h>
3ce8859e GR	19
	20	enum chips { sc18is602, sc18is602b, sc18is603 };
	21
	22	#define SC18IS602_BUFSIZ 200
	23	#define SC18IS602_CLOCK 7372000
	24
	25	#define SC18IS602_MODE_CPHA BIT(2)
	26	#define SC18IS602_MODE_CPOL BIT(3)
	27	#define SC18IS602_MODE_LSB_FIRST BIT(5)
	28	#define SC18IS602_MODE_CLOCK_DIV_4 0x0
	29	#define SC18IS602_MODE_CLOCK_DIV_16 0x1
	30	#define SC18IS602_MODE_CLOCK_DIV_64 0x2
	31	#define SC18IS602_MODE_CLOCK_DIV_128 0x3
	32
	33	struct sc18is602 {
	34	struct spi_master *master;
	35	struct device *dev;
	36	u8 ctrl;
	37	u32 freq;
	38	u32 speed;
	39
	40	/* I2C data */
	41	struct i2c_client *client;
	42	enum chips id;
	43	u8 buffer[SC18IS602_BUFSIZ + 1];
	44	int tlen; /* Data queued for tx in buffer */
	45	int rindex; /* Receive data index in buffer */
f9900801 PR	46
f9900801 PR	47	struct gpio_desc *reset;
3ce8859e GR	48	};
	49
	50	static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
	51	{
	52	int i, err;
	53	int usecs = 1000000 * len / hw->speed + 1;
	54	u8 dummy[1];
	55
	56	for (i = 0; i < 10; i++) {
	57	err = i2c_master_recv(hw->client, dummy, 1);
	58	if (err >= 0)
	59	return 0;
	60	usleep_range(usecs, usecs * 2);
	61	}
	62	return -ETIMEDOUT;
	63	}
	64
	65	static int sc18is602_txrx(struct sc18is602 hw, struct spi_message msg,
	66	struct spi_transfer *t, bool do_transfer)
	67	{
	68	unsigned int len = t->len;
	69	int ret;
	70
	71	if (hw->tlen == 0) {
	72	/* First byte (I2C command) is chip select */
	73	hw->buffer[0] = 1 << msg->spi->chip_select;
	74	hw->tlen = 1;
	75	hw->rindex = 0;
	76	}
	77	/*
	78	* We can not immediately send data to the chip, since each I2C message
	79	* resembles a full SPI message (from CS active to CS inactive).
	80	* Enqueue messages up to the first read or until do_transfer is true.
	81	*/
	82	if (t->tx_buf) {
	83	memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
	84	hw->tlen += len;
	85	if (t->rx_buf)
	86	do_transfer = true;
	87	else
	88	hw->rindex = hw->tlen - 1;
	89	} else if (t->rx_buf) {
	90	/*
	91	* For receive-only transfers we still need to perform a dummy
	92	* write to receive data from the SPI chip.
	93	* Read data starts at the end of transmit data (minus 1 to
	94	* account for CS).
	95	*/
	96	hw->rindex = hw->tlen - 1;
	97	memset(&hw->buffer[hw->tlen], 0, len);
	98	hw->tlen += len;
	99	do_transfer = true;
	100	}
	101
	102	if (do_transfer && hw->tlen > 1) {
	103	ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
	104	if (ret < 0)
	105	return ret;
	106	ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
	107	if (ret < 0)
	108	return ret;
	109	if (ret != hw->tlen)
	110	return -EIO;
	111
112	if (t->rx_buf) {
113	int rlen = hw->rindex + len;
114
115	ret = sc18is602_wait_ready(hw, hw->tlen);
116	if (ret < 0)
117	return ret;
118	ret = i2c_master_recv(hw->client, hw->buffer, rlen);
119	if (ret < 0)
120	return ret;
121	if (ret != rlen)
122	return -EIO;
123	memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
124	}
125	hw->tlen = 0;
126	}
127	return len;
128	}
129
130	static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
131	{
132	u8 ctrl = 0;
133	int ret;
134
135	if (mode & SPI_CPHA)
136	ctrl \|= SC18IS602_MODE_CPHA;
137	if (mode & SPI_CPOL)
138	ctrl \|= SC18IS602_MODE_CPOL;
139	if (mode & SPI_LSB_FIRST)
140	ctrl \|= SC18IS602_MODE_LSB_FIRST;
141
142	/* Find the closest clock speed */
143	if (hz >= hw->freq / 4) {
144	ctrl \|= SC18IS602_MODE_CLOCK_DIV_4;
145	hw->speed = hw->freq / 4;
146	} else if (hz >= hw->freq / 16) {
147	ctrl \|= SC18IS602_MODE_CLOCK_DIV_16;
148	hw->speed = hw->freq / 16;
149	} else if (hz >= hw->freq / 64) {
150	ctrl \|= SC18IS602_MODE_CLOCK_DIV_64;
151	hw->speed = hw->freq / 64;
152	} else {
153	ctrl \|= SC18IS602_MODE_CLOCK_DIV_128;
154	hw->speed = hw->freq / 128;
155	}
156
157	/*
158	* Don't do anything if the control value did not change. The initial
159	* value of 0xff for hw->ctrl ensures that the correct mode will be set
160	* with the first call to this function.
161	*/
162	if (ctrl == hw->ctrl)
163	return 0;
164
165	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
166	if (ret < 0)
167	return ret;
168
169	hw->ctrl = ctrl;
170
171	return 0;
172	}
173
174	static int sc18is602_check_transfer(struct spi_device *spi,
175	struct spi_transfer *t, int tlen)
176	{
bda7db1d	177	if (t && t->len + tlen > SC18IS602_BUFSIZ + 1)
3ce8859e GR	178	return -EINVAL;
3ce8859e GR	179
3ce8859e GR	180	return 0;
	181	}
	182
	183	static int sc18is602_transfer_one(struct spi_master *master,
	184	struct spi_message *m)
	185	{
	186	struct sc18is602 *hw = spi_master_get_devdata(master);
	187	struct spi_device *spi = m->spi;
	188	struct spi_transfer *t;
	189	int status = 0;
	190
3ce8859e GR	191	hw->tlen = 0;
3ce8859e GR	192	list_for_each_entry(t, &m->transfers, transfer_list) {
3ce8859e GR	193	bool do_transfer;
	194
	195	status = sc18is602_check_transfer(spi, t, hw->tlen);
	196	if (status < 0)
	197	break;
	198
09e99bca	199	status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
3ce8859e GR	200	if (status < 0)
	201	break;
	202
	203	do_transfer = t->cs_change \|\| list_is_last(&t->transfer_list,
	204	&m->transfers);
	205
	206	if (t->len) {
	207	status = sc18is602_txrx(hw, m, t, do_transfer);
	208	if (status < 0)
	209	break;
	210	m->actual_length += status;
	211	}
	212	status = 0;
	213
e74dc5c7	214	spi_transfer_delay_exec(t);
3ce8859e	215	}
3ce8859e GR	216	m->status = status;
	217	spi_finalize_current_message(master);
	218
	219	return status;
	220	}
	221
b4e46c99 VO	222	static size_t sc18is602_max_transfer_size(struct spi_device *spi)
	223	{
	224	return SC18IS602_BUFSIZ;
	225	}
	226
c5c67e31 AL	227	static int sc18is602_setup(struct spi_device *spi)
	228	{
	229	struct sc18is602 *hw = spi_master_get_devdata(spi->master);
	230
	231	/* SC18IS602 does not support CS2 */
	232	if (hw->id == sc18is602 && spi->chip_select == 2)
	233	return -ENXIO;
	234
	235	return 0;
	236	}
	237
3ce8859e GR	238	static int sc18is602_probe(struct i2c_client *client,
	239	const struct i2c_device_id *id)
	240	{
	241	struct device *dev = &client->dev;
	242	struct device_node *np = dev->of_node;
	243	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
	244	struct sc18is602 *hw;
	245	struct spi_master *master;
3ce8859e GR	246
	247	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C \|
	248	I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
58ed90de	249	return -EINVAL;
3ce8859e	250
5b8c8846	251	master = devm_spi_alloc_master(dev, sizeof(struct sc18is602));
3ce8859e GR	252	if (!master)
	253	return -ENOMEM;
	254
	255	hw = spi_master_get_devdata(master);
	256	i2c_set_clientdata(client, hw);
	257
f9900801 PR	258	/* assert reset and then release */
	259	hw->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
	260	if (IS_ERR(hw->reset))
	261	return PTR_ERR(hw->reset);
76cce7e3	262	gpiod_set_value_cansleep(hw->reset, 0);
f9900801	263
3ce8859e GR	264	hw->master = master;
	265	hw->client = client;
	266	hw->dev = dev;
	267	hw->ctrl = 0xff;
	268
68c97b92 JMC	269	if (client->dev.of_node)
	270	hw->id = (enum chips)of_device_get_match_data(&client->dev);
	271	else
	272	hw->id = id->driver_data;
3ce8859e GR	273
	274	switch (hw->id) {
	275	case sc18is602:
	276	case sc18is602b:
	277	master->num_chipselect = 4;
	278	hw->freq = SC18IS602_CLOCK;
	279	break;
	280	case sc18is603:
	281	master->num_chipselect = 2;
	282	if (pdata) {
	283	hw->freq = pdata->clock_frequency;
	284	} else {
	285	const __be32 *val;
	286	int len;
	287
	288	val = of_get_property(np, "clock-frequency", &len);
	289	if (val && len >= sizeof(__be32))
	290	hw->freq = be32_to_cpup(val);
	291	}
	292	if (!hw->freq)
	293	hw->freq = SC18IS602_CLOCK;
	294	break;
	295	}
b4e27545	296	master->bus_num = np ? -1 : client->adapter->nr;
3ce8859e	297	master->mode_bits = SPI_CPHA \| SPI_CPOL \| SPI_LSB_FIRST;
463654ce	298	master->bits_per_word_mask = SPI_BPW_MASK(8);
c5c67e31	299	master->setup = sc18is602_setup;
3ce8859e	300	master->transfer_one_message = sc18is602_transfer_one;
b4e46c99 VO	301	master->max_transfer_size = sc18is602_max_transfer_size;
b4e46c99 VO	302	master->max_message_size = sc18is602_max_transfer_size;
3ce8859e	303	master->dev.of_node = np;
09e99bca AL	304	master->min_speed_hz = hw->freq / 128;
09e99bca AL	305	master->max_speed_hz = hw->freq / 4;
3ce8859e	306
5b8c8846	307	return devm_spi_register_master(dev, master);
3ce8859e GR	308	}
3ce8859e GR	309
3ce8859e GR	310	static const struct i2c_device_id sc18is602_id[] = {
	311	{ "sc18is602", sc18is602 },
	312	{ "sc18is602b", sc18is602b },
	313	{ "sc18is603", sc18is603 },
	314	{ }
	315	};
	316	MODULE_DEVICE_TABLE(i2c, sc18is602_id);
	317
68c97b92 JMC	318	static const struct of_device_id sc18is602_of_match[] = {
	319	{
	320	.compatible = "nxp,sc18is602",
	321	.data = (void *)sc18is602
	322	},
	323	{
	324	.compatible = "nxp,sc18is602b",
	325	.data = (void *)sc18is602b
	326	},
	327	{
	328	.compatible = "nxp,sc18is603",
	329	.data = (void *)sc18is603
	330	},
	331	{ },
	332	};
	333	MODULE_DEVICE_TABLE(of, sc18is602_of_match);
	334
3ce8859e GR	335	static struct i2c_driver sc18is602_driver = {
	336	.driver = {
	337	.name = "sc18is602",
68c97b92	338	.of_match_table = of_match_ptr(sc18is602_of_match),
3ce8859e GR	339	},
3ce8859e GR	340	.probe = sc18is602_probe,
3ce8859e GR	341	.id_table = sc18is602_id,
	342	};
	343
	344	module_i2c_driver(sc18is602_driver);
	345
6d75145b	346	MODULE_DESCRIPTION("SC18IS602/603 SPI Master Driver");
3ce8859e GR	347	MODULE_AUTHOR("Guenter Roeck");
3ce8859e GR	348	MODULE_LICENSE("GPL");