]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/spi/spi-sh-sci.c
ipv4: convert dst_metrics.refcnt from atomic_t to refcount_t
[mirror_ubuntu-artful-kernel.git] / drivers / spi / spi-sh-sci.c
CommitLineData
37e46640
MD
1/*
2 * SH SCI SPI interface
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * Based on S3C24XX GPIO based SPI driver, which is:
7 * Copyright (c) 2006 Ben Dooks
8 * Copyright (c) 2006 Simtec Electronics
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <linux/kernel.h>
37e46640
MD
17#include <linux/delay.h>
18#include <linux/spinlock.h>
37e46640
MD
19#include <linux/platform_device.h>
20
21#include <linux/spi/spi.h>
22#include <linux/spi/spi_bitbang.h>
d7614de4 23#include <linux/module.h>
37e46640
MD
24
25#include <asm/spi.h>
26#include <asm/io.h>
27
28struct sh_sci_spi {
29 struct spi_bitbang bitbang;
30
31 void __iomem *membase;
32 unsigned char val;
33 struct sh_spi_info *info;
34 struct platform_device *dev;
35};
36
37#define SCSPTR(sp) (sp->membase + 0x1c)
38#define PIN_SCK (1 << 2)
39#define PIN_TXD (1 << 0)
40#define PIN_RXD PIN_TXD
41#define PIN_INIT ((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD)
42
43static inline void setbits(struct sh_sci_spi *sp, int bits, int on)
44{
45 /*
46 * We are the only user of SCSPTR so no locking is required.
47 * Reading bit 2 and 0 in SCSPTR gives pin state as input.
48 * Writing the same bits sets the output value.
49 * This makes regular read-modify-write difficult so we
50 * use sp->val to keep track of the latest register value.
51 */
52
53 if (on)
54 sp->val |= bits;
55 else
56 sp->val &= ~bits;
57
58 iowrite8(sp->val, SCSPTR(sp));
59}
60
61static inline void setsck(struct spi_device *dev, int on)
62{
63 setbits(spi_master_get_devdata(dev->master), PIN_SCK, on);
64}
65
66static inline void setmosi(struct spi_device *dev, int on)
67{
68 setbits(spi_master_get_devdata(dev->master), PIN_TXD, on);
69}
70
71static inline u32 getmiso(struct spi_device *dev)
72{
73 struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
74
75 return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0;
76}
77
78#define spidelay(x) ndelay(x)
79
ca632f55 80#include "spi-bitbang-txrx.h"
37e46640
MD
81
82static u32 sh_sci_spi_txrx_mode0(struct spi_device *spi,
83 unsigned nsecs, u32 word, u8 bits)
84{
04bb2a03 85 return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
37e46640
MD
86}
87
88static u32 sh_sci_spi_txrx_mode1(struct spi_device *spi,
89 unsigned nsecs, u32 word, u8 bits)
90{
04bb2a03 91 return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
37e46640
MD
92}
93
94static u32 sh_sci_spi_txrx_mode2(struct spi_device *spi,
95 unsigned nsecs, u32 word, u8 bits)
96{
04bb2a03 97 return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
37e46640
MD
98}
99
100static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi,
101 unsigned nsecs, u32 word, u8 bits)
102{
04bb2a03 103 return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
37e46640
MD
104}
105
106static void sh_sci_spi_chipselect(struct spi_device *dev, int value)
107{
108 struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
109
ed8eb250 110 if (sp->info->chip_select)
37e46640
MD
111 (sp->info->chip_select)(sp->info, dev->chip_select, value);
112}
113
114static int sh_sci_spi_probe(struct platform_device *dev)
115{
116 struct resource *r;
117 struct spi_master *master;
118 struct sh_sci_spi *sp;
119 int ret;
120
121 master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi));
122 if (master == NULL) {
123 dev_err(&dev->dev, "failed to allocate spi master\n");
124 ret = -ENOMEM;
125 goto err0;
126 }
127
128 sp = spi_master_get_devdata(master);
129
130 platform_set_drvdata(dev, sp);
8074cf06 131 sp->info = dev_get_platdata(&dev->dev);
ed8eb250
AL
132 if (!sp->info) {
133 dev_err(&dev->dev, "platform data is missing\n");
134 ret = -ENOENT;
135 goto err1;
136 }
37e46640
MD
137
138 /* setup spi bitbang adaptor */
94c69f76 139 sp->bitbang.master = master;
37e46640
MD
140 sp->bitbang.master->bus_num = sp->info->bus_num;
141 sp->bitbang.master->num_chipselect = sp->info->num_chipselect;
142 sp->bitbang.chipselect = sh_sci_spi_chipselect;
143
144 sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0;
145 sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1;
146 sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2;
147 sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3;
148
149 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
150 if (r == NULL) {
151 ret = -ENOENT;
152 goto err1;
153 }
76b6fdd3 154 sp->membase = ioremap(r->start, resource_size(r));
37e46640
MD
155 if (!sp->membase) {
156 ret = -ENXIO;
157 goto err1;
158 }
159 sp->val = ioread8(SCSPTR(sp));
160 setbits(sp, PIN_INIT, 1);
161
162 ret = spi_bitbang_start(&sp->bitbang);
163 if (!ret)
164 return 0;
165
166 setbits(sp, PIN_INIT, 0);
167 iounmap(sp->membase);
168 err1:
169 spi_master_put(sp->bitbang.master);
170 err0:
171 return ret;
172}
173
174static int sh_sci_spi_remove(struct platform_device *dev)
175{
176 struct sh_sci_spi *sp = platform_get_drvdata(dev);
177
37e46640 178 spi_bitbang_stop(&sp->bitbang);
25f8a7cc
JB
179 setbits(sp, PIN_INIT, 0);
180 iounmap(sp->membase);
37e46640
MD
181 spi_master_put(sp->bitbang.master);
182 return 0;
183}
184
185static struct platform_driver sh_sci_spi_drv = {
186 .probe = sh_sci_spi_probe,
187 .remove = sh_sci_spi_remove,
188 .driver = {
189 .name = "spi_sh_sci",
37e46640
MD
190 },
191};
940ab889 192module_platform_driver(sh_sci_spi_drv);
37e46640
MD
193
194MODULE_DESCRIPTION("SH SCI SPI Driver");
195MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
196MODULE_LICENSE("GPL");
7e38c3c4 197MODULE_ALIAS("platform:spi_sh_sci");