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8ae12a0d 1/*
ca632f55 2 * SPI init/core code
8ae12a0d
DB
3 *
4 * Copyright (C) 2005 David Brownell
d57a4282 5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d
DB
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
8ae12a0d
DB
16 */
17
8ae12a0d
DB
18#include <linux/kernel.h>
19#include <linux/device.h>
20#include <linux/init.h>
21#include <linux/cache.h>
99adef31
MB
22#include <linux/dma-mapping.h>
23#include <linux/dmaengine.h>
94040828 24#include <linux/mutex.h>
2b7a32f7 25#include <linux/of_device.h>
d57a4282 26#include <linux/of_irq.h>
86be408b 27#include <linux/clk/clk-conf.h>
5a0e3ad6 28#include <linux/slab.h>
e0626e38 29#include <linux/mod_devicetable.h>
8ae12a0d 30#include <linux/spi/spi.h>
74317984 31#include <linux/of_gpio.h>
3ae22e8c 32#include <linux/pm_runtime.h>
f48c767c 33#include <linux/pm_domain.h>
826cf175 34#include <linux/property.h>
025ed130 35#include <linux/export.h>
8bd75c77 36#include <linux/sched/rt.h>
ae7e81c0 37#include <uapi/linux/sched/types.h>
ffbbdd21
LW
38#include <linux/delay.h>
39#include <linux/kthread.h>
64bee4d2
MW
40#include <linux/ioport.h>
41#include <linux/acpi.h>
b1b8153c 42#include <linux/highmem.h>
9b61e302 43#include <linux/idr.h>
8a2e487e 44#include <linux/platform_data/x86/apple.h>
8ae12a0d 45
56ec1978
MB
46#define CREATE_TRACE_POINTS
47#include <trace/events/spi.h>
9b61e302
SM
48
49static DEFINE_IDR(spi_master_idr);
56ec1978 50
8ae12a0d
DB
51static void spidev_release(struct device *dev)
52{
0ffa0285 53 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 54
8caab75f
GU
55 /* spi controllers may cleanup for released devices */
56 if (spi->controller->cleanup)
57 spi->controller->cleanup(spi);
8ae12a0d 58
8caab75f 59 spi_controller_put(spi->controller);
07a389fe 60 kfree(spi);
8ae12a0d
DB
61}
62
63static ssize_t
64modalias_show(struct device *dev, struct device_attribute *a, char *buf)
65{
66 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
67 int len;
68
69 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
70 if (len != -ENODEV)
71 return len;
8ae12a0d 72
d8e328b3 73 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 74}
aa7da564 75static DEVICE_ATTR_RO(modalias);
8ae12a0d 76
eca2ebc7 77#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
78static ssize_t spi_controller_##field##_show(struct device *dev, \
79 struct device_attribute *attr, \
80 char *buf) \
eca2ebc7 81{ \
8caab75f
GU
82 struct spi_controller *ctlr = container_of(dev, \
83 struct spi_controller, dev); \
84 return spi_statistics_##field##_show(&ctlr->statistics, buf); \
eca2ebc7 85} \
8caab75f 86static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 87 .attr = { .name = file, .mode = 0444 }, \
8caab75f 88 .show = spi_controller_##field##_show, \
eca2ebc7
MS
89}; \
90static ssize_t spi_device_##field##_show(struct device *dev, \
91 struct device_attribute *attr, \
92 char *buf) \
93{ \
d1eba93b 94 struct spi_device *spi = to_spi_device(dev); \
eca2ebc7
MS
95 return spi_statistics_##field##_show(&spi->statistics, buf); \
96} \
97static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 98 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
99 .show = spi_device_##field##_show, \
100}
101
102#define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \
103static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
104 char *buf) \
105{ \
106 unsigned long flags; \
107 ssize_t len; \
108 spin_lock_irqsave(&stat->lock, flags); \
109 len = sprintf(buf, format_string, stat->field); \
110 spin_unlock_irqrestore(&stat->lock, flags); \
111 return len; \
112} \
113SPI_STATISTICS_ATTRS(name, file)
114
115#define SPI_STATISTICS_SHOW(field, format_string) \
116 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
117 field, format_string)
118
119SPI_STATISTICS_SHOW(messages, "%lu");
120SPI_STATISTICS_SHOW(transfers, "%lu");
121SPI_STATISTICS_SHOW(errors, "%lu");
122SPI_STATISTICS_SHOW(timedout, "%lu");
123
124SPI_STATISTICS_SHOW(spi_sync, "%lu");
125SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu");
126SPI_STATISTICS_SHOW(spi_async, "%lu");
127
128SPI_STATISTICS_SHOW(bytes, "%llu");
129SPI_STATISTICS_SHOW(bytes_rx, "%llu");
130SPI_STATISTICS_SHOW(bytes_tx, "%llu");
131
6b7bc061
MS
132#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
133 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
134 "transfer_bytes_histo_" number, \
135 transfer_bytes_histo[index], "%lu")
136SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
137SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
138SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
139SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
140SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
141SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
142SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
143SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
144SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
145SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
146SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
147SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
148SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
149SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
150SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
151SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
152SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
153
d9f12122
MS
154SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu");
155
aa7da564
GKH
156static struct attribute *spi_dev_attrs[] = {
157 &dev_attr_modalias.attr,
158 NULL,
8ae12a0d 159};
eca2ebc7
MS
160
161static const struct attribute_group spi_dev_group = {
162 .attrs = spi_dev_attrs,
163};
164
165static struct attribute *spi_device_statistics_attrs[] = {
166 &dev_attr_spi_device_messages.attr,
167 &dev_attr_spi_device_transfers.attr,
168 &dev_attr_spi_device_errors.attr,
169 &dev_attr_spi_device_timedout.attr,
170 &dev_attr_spi_device_spi_sync.attr,
171 &dev_attr_spi_device_spi_sync_immediate.attr,
172 &dev_attr_spi_device_spi_async.attr,
173 &dev_attr_spi_device_bytes.attr,
174 &dev_attr_spi_device_bytes_rx.attr,
175 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
176 &dev_attr_spi_device_transfer_bytes_histo0.attr,
177 &dev_attr_spi_device_transfer_bytes_histo1.attr,
178 &dev_attr_spi_device_transfer_bytes_histo2.attr,
179 &dev_attr_spi_device_transfer_bytes_histo3.attr,
180 &dev_attr_spi_device_transfer_bytes_histo4.attr,
181 &dev_attr_spi_device_transfer_bytes_histo5.attr,
182 &dev_attr_spi_device_transfer_bytes_histo6.attr,
183 &dev_attr_spi_device_transfer_bytes_histo7.attr,
184 &dev_attr_spi_device_transfer_bytes_histo8.attr,
185 &dev_attr_spi_device_transfer_bytes_histo9.attr,
186 &dev_attr_spi_device_transfer_bytes_histo10.attr,
187 &dev_attr_spi_device_transfer_bytes_histo11.attr,
188 &dev_attr_spi_device_transfer_bytes_histo12.attr,
189 &dev_attr_spi_device_transfer_bytes_histo13.attr,
190 &dev_attr_spi_device_transfer_bytes_histo14.attr,
191 &dev_attr_spi_device_transfer_bytes_histo15.attr,
192 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 193 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
194 NULL,
195};
196
197static const struct attribute_group spi_device_statistics_group = {
198 .name = "statistics",
199 .attrs = spi_device_statistics_attrs,
200};
201
202static const struct attribute_group *spi_dev_groups[] = {
203 &spi_dev_group,
204 &spi_device_statistics_group,
205 NULL,
206};
207
8caab75f
GU
208static struct attribute *spi_controller_statistics_attrs[] = {
209 &dev_attr_spi_controller_messages.attr,
210 &dev_attr_spi_controller_transfers.attr,
211 &dev_attr_spi_controller_errors.attr,
212 &dev_attr_spi_controller_timedout.attr,
213 &dev_attr_spi_controller_spi_sync.attr,
214 &dev_attr_spi_controller_spi_sync_immediate.attr,
215 &dev_attr_spi_controller_spi_async.attr,
216 &dev_attr_spi_controller_bytes.attr,
217 &dev_attr_spi_controller_bytes_rx.attr,
218 &dev_attr_spi_controller_bytes_tx.attr,
219 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
220 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
221 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
222 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
223 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
224 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
225 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
226 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
227 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
228 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
229 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
230 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
231 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
232 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
233 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
234 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
235 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
236 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
237 NULL,
238};
239
8caab75f 240static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 241 .name = "statistics",
8caab75f 242 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
243};
244
245static const struct attribute_group *spi_master_groups[] = {
8caab75f 246 &spi_controller_statistics_group,
eca2ebc7
MS
247 NULL,
248};
249
250void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
251 struct spi_transfer *xfer,
8caab75f 252 struct spi_controller *ctlr)
eca2ebc7
MS
253{
254 unsigned long flags;
6b7bc061
MS
255 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
256
257 if (l2len < 0)
258 l2len = 0;
eca2ebc7
MS
259
260 spin_lock_irqsave(&stats->lock, flags);
261
262 stats->transfers++;
6b7bc061 263 stats->transfer_bytes_histo[l2len]++;
eca2ebc7
MS
264
265 stats->bytes += xfer->len;
266 if ((xfer->tx_buf) &&
8caab75f 267 (xfer->tx_buf != ctlr->dummy_tx))
eca2ebc7
MS
268 stats->bytes_tx += xfer->len;
269 if ((xfer->rx_buf) &&
8caab75f 270 (xfer->rx_buf != ctlr->dummy_rx))
eca2ebc7
MS
271 stats->bytes_rx += xfer->len;
272
273 spin_unlock_irqrestore(&stats->lock, flags);
274}
275EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats);
8ae12a0d
DB
276
277/* modalias support makes "modprobe $MODALIAS" new-style hotplug work,
278 * and the sysfs version makes coldplug work too.
279 */
280
75368bf6
AV
281static const struct spi_device_id *spi_match_id(const struct spi_device_id *id,
282 const struct spi_device *sdev)
283{
284 while (id->name[0]) {
285 if (!strcmp(sdev->modalias, id->name))
286 return id;
287 id++;
288 }
289 return NULL;
290}
291
292const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
293{
294 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
295
296 return spi_match_id(sdrv->id_table, sdev);
297}
298EXPORT_SYMBOL_GPL(spi_get_device_id);
299
8ae12a0d
DB
300static int spi_match_device(struct device *dev, struct device_driver *drv)
301{
302 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
303 const struct spi_driver *sdrv = to_spi_driver(drv);
304
2b7a32f7
SA
305 /* Attempt an OF style match */
306 if (of_driver_match_device(dev, drv))
307 return 1;
308
64bee4d2
MW
309 /* Then try ACPI */
310 if (acpi_driver_match_device(dev, drv))
311 return 1;
312
75368bf6
AV
313 if (sdrv->id_table)
314 return !!spi_match_id(sdrv->id_table, spi);
8ae12a0d 315
35f74fca 316 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
317}
318
7eff2e7a 319static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
320{
321 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
322 int rc;
323
324 rc = acpi_device_uevent_modalias(dev, env);
325 if (rc != -ENODEV)
326 return rc;
8ae12a0d 327
2856670f 328 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
329}
330
8ae12a0d
DB
331struct bus_type spi_bus_type = {
332 .name = "spi",
aa7da564 333 .dev_groups = spi_dev_groups,
8ae12a0d
DB
334 .match = spi_match_device,
335 .uevent = spi_uevent,
8ae12a0d
DB
336};
337EXPORT_SYMBOL_GPL(spi_bus_type);
338
b885244e
DB
339
340static int spi_drv_probe(struct device *dev)
341{
342 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 343 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
344 int ret;
345
86be408b
SN
346 ret = of_clk_set_defaults(dev->of_node, false);
347 if (ret)
348 return ret;
349
44af7927
JH
350 if (dev->of_node) {
351 spi->irq = of_irq_get(dev->of_node, 0);
352 if (spi->irq == -EPROBE_DEFER)
353 return -EPROBE_DEFER;
354 if (spi->irq < 0)
355 spi->irq = 0;
356 }
357
676e7c25
UH
358 ret = dev_pm_domain_attach(dev, true);
359 if (ret != -EPROBE_DEFER) {
44af7927 360 ret = sdrv->probe(spi);
676e7c25
UH
361 if (ret)
362 dev_pm_domain_detach(dev, true);
363 }
b885244e 364
33cf00e5 365 return ret;
b885244e
DB
366}
367
368static int spi_drv_remove(struct device *dev)
369{
370 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5
MW
371 int ret;
372
aec35f4e 373 ret = sdrv->remove(to_spi_device(dev));
676e7c25 374 dev_pm_domain_detach(dev, true);
b885244e 375
33cf00e5 376 return ret;
b885244e
DB
377}
378
379static void spi_drv_shutdown(struct device *dev)
380{
381 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
382
383 sdrv->shutdown(to_spi_device(dev));
384}
385
33e34dc6 386/**
ca5d2485 387 * __spi_register_driver - register a SPI driver
88c9321d 388 * @owner: owner module of the driver to register
33e34dc6
DB
389 * @sdrv: the driver to register
390 * Context: can sleep
97d56dc6
JMC
391 *
392 * Return: zero on success, else a negative error code.
33e34dc6 393 */
ca5d2485 394int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 395{
ca5d2485 396 sdrv->driver.owner = owner;
b885244e
DB
397 sdrv->driver.bus = &spi_bus_type;
398 if (sdrv->probe)
399 sdrv->driver.probe = spi_drv_probe;
400 if (sdrv->remove)
401 sdrv->driver.remove = spi_drv_remove;
402 if (sdrv->shutdown)
403 sdrv->driver.shutdown = spi_drv_shutdown;
404 return driver_register(&sdrv->driver);
405}
ca5d2485 406EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 407
8ae12a0d
DB
408/*-------------------------------------------------------------------------*/
409
410/* SPI devices should normally not be created by SPI device drivers; that
8caab75f 411 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
412 * Device registration normally goes into like arch/.../mach.../board-YYY.c
413 * with other readonly (flashable) information about mainboard devices.
414 */
415
416struct boardinfo {
417 struct list_head list;
2b9603a0 418 struct spi_board_info board_info;
8ae12a0d
DB
419};
420
421static LIST_HEAD(board_list);
8caab75f 422static LIST_HEAD(spi_controller_list);
2b9603a0
FT
423
424/*
425 * Used to protect add/del opertion for board_info list and
8caab75f 426 * spi_controller list, and their matching process
9a9a047a 427 * also used to protect object of type struct idr
2b9603a0 428 */
94040828 429static DEFINE_MUTEX(board_lock);
8ae12a0d 430
dc87c98e
GL
431/**
432 * spi_alloc_device - Allocate a new SPI device
8caab75f 433 * @ctlr: Controller to which device is connected
dc87c98e
GL
434 * Context: can sleep
435 *
436 * Allows a driver to allocate and initialize a spi_device without
437 * registering it immediately. This allows a driver to directly
438 * fill the spi_device with device parameters before calling
439 * spi_add_device() on it.
440 *
441 * Caller is responsible to call spi_add_device() on the returned
8caab75f 442 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
443 * needs to discard the spi_device without adding it, then it should
444 * call spi_dev_put() on it.
445 *
97d56dc6 446 * Return: a pointer to the new device, or NULL.
dc87c98e 447 */
8caab75f 448struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
449{
450 struct spi_device *spi;
dc87c98e 451
8caab75f 452 if (!spi_controller_get(ctlr))
dc87c98e
GL
453 return NULL;
454
5fe5f05e 455 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 456 if (!spi) {
8caab75f 457 spi_controller_put(ctlr);
dc87c98e
GL
458 return NULL;
459 }
460
8caab75f
GU
461 spi->master = spi->controller = ctlr;
462 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
463 spi->dev.bus = &spi_bus_type;
464 spi->dev.release = spidev_release;
446411e1 465 spi->cs_gpio = -ENOENT;
eca2ebc7
MS
466
467 spin_lock_init(&spi->statistics.lock);
468
dc87c98e
GL
469 device_initialize(&spi->dev);
470 return spi;
471}
472EXPORT_SYMBOL_GPL(spi_alloc_device);
473
e13ac47b
JN
474static void spi_dev_set_name(struct spi_device *spi)
475{
476 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
477
478 if (adev) {
479 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
480 return;
481 }
482
8caab75f 483 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN
484 spi->chip_select);
485}
486
b6fb8d3a
MW
487static int spi_dev_check(struct device *dev, void *data)
488{
489 struct spi_device *spi = to_spi_device(dev);
490 struct spi_device *new_spi = data;
491
8caab75f 492 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW
493 spi->chip_select == new_spi->chip_select)
494 return -EBUSY;
495 return 0;
496}
497
dc87c98e
GL
498/**
499 * spi_add_device - Add spi_device allocated with spi_alloc_device
500 * @spi: spi_device to register
501 *
502 * Companion function to spi_alloc_device. Devices allocated with
503 * spi_alloc_device can be added onto the spi bus with this function.
504 *
97d56dc6 505 * Return: 0 on success; negative errno on failure
dc87c98e
GL
506 */
507int spi_add_device(struct spi_device *spi)
508{
e48880e0 509 static DEFINE_MUTEX(spi_add_lock);
8caab75f
GU
510 struct spi_controller *ctlr = spi->controller;
511 struct device *dev = ctlr->dev.parent;
dc87c98e
GL
512 int status;
513
514 /* Chipselects are numbered 0..max; validate. */
8caab75f
GU
515 if (spi->chip_select >= ctlr->num_chipselect) {
516 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
517 ctlr->num_chipselect);
dc87c98e
GL
518 return -EINVAL;
519 }
520
521 /* Set the bus ID string */
e13ac47b 522 spi_dev_set_name(spi);
e48880e0
DB
523
524 /* We need to make sure there's no other device with this
525 * chipselect **BEFORE** we call setup(), else we'll trash
526 * its configuration. Lock against concurrent add() calls.
527 */
528 mutex_lock(&spi_add_lock);
529
b6fb8d3a
MW
530 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
531 if (status) {
e48880e0
DB
532 dev_err(dev, "chipselect %d already in use\n",
533 spi->chip_select);
e48880e0
DB
534 goto done;
535 }
536
8caab75f
GU
537 if (ctlr->cs_gpios)
538 spi->cs_gpio = ctlr->cs_gpios[spi->chip_select];
74317984 539
e48880e0
DB
540 /* Drivers may modify this initial i/o setup, but will
541 * normally rely on the device being setup. Devices
542 * using SPI_CS_HIGH can't coexist well otherwise...
543 */
7d077197 544 status = spi_setup(spi);
dc87c98e 545 if (status < 0) {
eb288a1f
LW
546 dev_err(dev, "can't setup %s, status %d\n",
547 dev_name(&spi->dev), status);
e48880e0 548 goto done;
dc87c98e
GL
549 }
550
e48880e0 551 /* Device may be bound to an active driver when this returns */
dc87c98e 552 status = device_add(&spi->dev);
e48880e0 553 if (status < 0)
eb288a1f
LW
554 dev_err(dev, "can't add %s, status %d\n",
555 dev_name(&spi->dev), status);
e48880e0 556 else
35f74fca 557 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
dc87c98e 558
e48880e0
DB
559done:
560 mutex_unlock(&spi_add_lock);
561 return status;
dc87c98e
GL
562}
563EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 564
33e34dc6
DB
565/**
566 * spi_new_device - instantiate one new SPI device
8caab75f 567 * @ctlr: Controller to which device is connected
33e34dc6
DB
568 * @chip: Describes the SPI device
569 * Context: can sleep
570 *
571 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
572 * after board init creates the hard-wired devices. Some development
573 * platforms may not be able to use spi_register_board_info though, and
574 * this is exported so that for example a USB or parport based adapter
575 * driver could add devices (which it would learn about out-of-band).
082c8cb4 576 *
97d56dc6 577 * Return: the new device, or NULL.
8ae12a0d 578 */
8caab75f 579struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 580 struct spi_board_info *chip)
8ae12a0d
DB
581{
582 struct spi_device *proxy;
8ae12a0d
DB
583 int status;
584
082c8cb4
DB
585 /* NOTE: caller did any chip->bus_num checks necessary.
586 *
587 * Also, unless we change the return value convention to use
588 * error-or-pointer (not NULL-or-pointer), troubleshootability
589 * suggests syslogged diagnostics are best here (ugh).
590 */
591
8caab75f 592 proxy = spi_alloc_device(ctlr);
dc87c98e 593 if (!proxy)
8ae12a0d
DB
594 return NULL;
595
102eb975
GL
596 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
597
8ae12a0d
DB
598 proxy->chip_select = chip->chip_select;
599 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 600 proxy->mode = chip->mode;
8ae12a0d 601 proxy->irq = chip->irq;
102eb975 602 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
603 proxy->dev.platform_data = (void *) chip->platform_data;
604 proxy->controller_data = chip->controller_data;
605 proxy->controller_state = NULL;
8ae12a0d 606
826cf175
DT
607 if (chip->properties) {
608 status = device_add_properties(&proxy->dev, chip->properties);
609 if (status) {
8caab75f 610 dev_err(&ctlr->dev,
826cf175
DT
611 "failed to add properties to '%s': %d\n",
612 chip->modalias, status);
613 goto err_dev_put;
614 }
8ae12a0d
DB
615 }
616
826cf175
DT
617 status = spi_add_device(proxy);
618 if (status < 0)
619 goto err_remove_props;
620
8ae12a0d 621 return proxy;
826cf175
DT
622
623err_remove_props:
624 if (chip->properties)
625 device_remove_properties(&proxy->dev);
626err_dev_put:
627 spi_dev_put(proxy);
628 return NULL;
8ae12a0d
DB
629}
630EXPORT_SYMBOL_GPL(spi_new_device);
631
3b1884c2
GU
632/**
633 * spi_unregister_device - unregister a single SPI device
634 * @spi: spi_device to unregister
635 *
636 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 637 * by spi_unregister_controller().
3b1884c2
GU
638 */
639void spi_unregister_device(struct spi_device *spi)
640{
bd6c1644
GU
641 if (!spi)
642 return;
643
8324147f 644 if (spi->dev.of_node) {
bd6c1644 645 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
646 of_node_put(spi->dev.of_node);
647 }
7f24467f
OP
648 if (ACPI_COMPANION(&spi->dev))
649 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
bd6c1644 650 device_unregister(&spi->dev);
3b1884c2
GU
651}
652EXPORT_SYMBOL_GPL(spi_unregister_device);
653
8caab75f
GU
654static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
655 struct spi_board_info *bi)
2b9603a0
FT
656{
657 struct spi_device *dev;
658
8caab75f 659 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
660 return;
661
8caab75f 662 dev = spi_new_device(ctlr, bi);
2b9603a0 663 if (!dev)
8caab75f 664 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
665 bi->modalias);
666}
667
33e34dc6
DB
668/**
669 * spi_register_board_info - register SPI devices for a given board
670 * @info: array of chip descriptors
671 * @n: how many descriptors are provided
672 * Context: can sleep
673 *
8ae12a0d
DB
674 * Board-specific early init code calls this (probably during arch_initcall)
675 * with segments of the SPI device table. Any device nodes are created later,
676 * after the relevant parent SPI controller (bus_num) is defined. We keep
677 * this table of devices forever, so that reloading a controller driver will
678 * not make Linux forget about these hard-wired devices.
679 *
680 * Other code can also call this, e.g. a particular add-on board might provide
681 * SPI devices through its expansion connector, so code initializing that board
682 * would naturally declare its SPI devices.
683 *
684 * The board info passed can safely be __initdata ... but be careful of
685 * any embedded pointers (platform_data, etc), they're copied as-is.
826cf175 686 * Device properties are deep-copied though.
97d56dc6
JMC
687 *
688 * Return: zero on success, else a negative error code.
8ae12a0d 689 */
fd4a319b 690int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 691{
2b9603a0
FT
692 struct boardinfo *bi;
693 int i;
8ae12a0d 694
c7908a37 695 if (!n)
f974cf57 696 return 0;
c7908a37 697
f9bdb7fd 698 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
699 if (!bi)
700 return -ENOMEM;
8ae12a0d 701
2b9603a0 702 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 703 struct spi_controller *ctlr;
8ae12a0d 704
2b9603a0 705 memcpy(&bi->board_info, info, sizeof(*info));
826cf175
DT
706 if (info->properties) {
707 bi->board_info.properties =
708 property_entries_dup(info->properties);
709 if (IS_ERR(bi->board_info.properties))
710 return PTR_ERR(bi->board_info.properties);
711 }
712
2b9603a0
FT
713 mutex_lock(&board_lock);
714 list_add_tail(&bi->list, &board_list);
8caab75f
GU
715 list_for_each_entry(ctlr, &spi_controller_list, list)
716 spi_match_controller_to_boardinfo(ctlr,
717 &bi->board_info);
2b9603a0 718 mutex_unlock(&board_lock);
8ae12a0d 719 }
2b9603a0
FT
720
721 return 0;
8ae12a0d
DB
722}
723
724/*-------------------------------------------------------------------------*/
725
b158935f
MB
726static void spi_set_cs(struct spi_device *spi, bool enable)
727{
728 if (spi->mode & SPI_CS_HIGH)
729 enable = !enable;
730
8eee6b9d 731 if (gpio_is_valid(spi->cs_gpio)) {
b158935f 732 gpio_set_value(spi->cs_gpio, !enable);
8eee6b9d 733 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU
734 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
735 spi->controller->set_cs)
736 spi->controller->set_cs(spi, !enable);
737 } else if (spi->controller->set_cs) {
738 spi->controller->set_cs(spi, !enable);
8eee6b9d 739 }
b158935f
MB
740}
741
2de440f5 742#ifdef CONFIG_HAS_DMA
8caab75f 743static int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
6ad45a27
MB
744 struct sg_table *sgt, void *buf, size_t len,
745 enum dma_data_direction dir)
746{
747 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 748 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
749#ifdef CONFIG_HIGHMEM
750 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
751 (unsigned long)buf < (PKMAP_BASE +
752 (LAST_PKMAP * PAGE_SIZE)));
753#else
754 const bool kmap_buf = false;
755#endif
65598c13
AG
756 int desc_len;
757 int sgs;
6ad45a27 758 struct page *vm_page;
8dd4a016 759 struct scatterlist *sg;
6ad45a27
MB
760 void *sg_buf;
761 size_t min;
762 int i, ret;
763
b1b8153c 764 if (vmalloced_buf || kmap_buf) {
df88e91b 765 desc_len = min_t(int, max_seg_size, PAGE_SIZE);
65598c13 766 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 767 } else if (virt_addr_valid(buf)) {
8caab75f 768 desc_len = min_t(int, max_seg_size, ctlr->max_dma_len);
65598c13 769 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
770 } else {
771 return -EINVAL;
65598c13
AG
772 }
773
6ad45a27
MB
774 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
775 if (ret != 0)
776 return ret;
777
8dd4a016 778 sg = &sgt->sgl[0];
6ad45a27 779 for (i = 0; i < sgs; i++) {
6ad45a27 780
b1b8153c 781 if (vmalloced_buf || kmap_buf) {
4a29f38c
MC
782 /*
783 * Next scatterlist entry size is the minimum between
784 * the desc_len and the remaining buffer length that
785 * fits in a page.
786 */
787 min = min_t(size_t, desc_len,
788 min_t(size_t, len,
789 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
790 if (vmalloced_buf)
791 vm_page = vmalloc_to_page(buf);
792 else
793 vm_page = kmap_to_page(buf);
6ad45a27
MB
794 if (!vm_page) {
795 sg_free_table(sgt);
796 return -ENOMEM;
797 }
8dd4a016 798 sg_set_page(sg, vm_page,
c1aefbdd 799 min, offset_in_page(buf));
6ad45a27 800 } else {
65598c13 801 min = min_t(size_t, len, desc_len);
6ad45a27 802 sg_buf = buf;
8dd4a016 803 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
804 }
805
6ad45a27
MB
806 buf += min;
807 len -= min;
8dd4a016 808 sg = sg_next(sg);
6ad45a27
MB
809 }
810
811 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU
812 if (!ret)
813 ret = -ENOMEM;
6ad45a27
MB
814 if (ret < 0) {
815 sg_free_table(sgt);
816 return ret;
817 }
818
819 sgt->nents = ret;
820
821 return 0;
822}
823
8caab75f 824static void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
6ad45a27
MB
825 struct sg_table *sgt, enum dma_data_direction dir)
826{
827 if (sgt->orig_nents) {
828 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
829 sg_free_table(sgt);
830 }
831}
832
8caab75f 833static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 834{
99adef31
MB
835 struct device *tx_dev, *rx_dev;
836 struct spi_transfer *xfer;
6ad45a27 837 int ret;
3a2eba9b 838
8caab75f 839 if (!ctlr->can_dma)
99adef31
MB
840 return 0;
841
8caab75f
GU
842 if (ctlr->dma_tx)
843 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 844 else
8caab75f 845 tx_dev = ctlr->dev.parent;
c37f45b5 846
8caab75f
GU
847 if (ctlr->dma_rx)
848 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 849 else
8caab75f 850 rx_dev = ctlr->dev.parent;
99adef31
MB
851
852 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 853 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
854 continue;
855
856 if (xfer->tx_buf != NULL) {
8caab75f 857 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
858 (void *)xfer->tx_buf, xfer->len,
859 DMA_TO_DEVICE);
860 if (ret != 0)
861 return ret;
99adef31
MB
862 }
863
864 if (xfer->rx_buf != NULL) {
8caab75f 865 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB
866 xfer->rx_buf, xfer->len,
867 DMA_FROM_DEVICE);
868 if (ret != 0) {
8caab75f 869 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
870 DMA_TO_DEVICE);
871 return ret;
99adef31
MB
872 }
873 }
874 }
875
8caab75f 876 ctlr->cur_msg_mapped = true;
99adef31
MB
877
878 return 0;
879}
880
8caab75f 881static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB
882{
883 struct spi_transfer *xfer;
884 struct device *tx_dev, *rx_dev;
885
8caab75f 886 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
887 return 0;
888
8caab75f
GU
889 if (ctlr->dma_tx)
890 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 891 else
8caab75f 892 tx_dev = ctlr->dev.parent;
c37f45b5 893
8caab75f
GU
894 if (ctlr->dma_rx)
895 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 896 else
8caab75f 897 rx_dev = ctlr->dev.parent;
99adef31
MB
898
899 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 900 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
901 continue;
902
8caab75f
GU
903 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
904 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB
905 }
906
907 return 0;
908}
2de440f5 909#else /* !CONFIG_HAS_DMA */
8caab75f
GU
910static inline int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
911 struct sg_table *sgt, void *buf, size_t len,
f4502dd1
V
912 enum dma_data_direction dir)
913{
914 return -EINVAL;
915}
916
8caab75f 917static inline void spi_unmap_buf(struct spi_controller *ctlr,
f4502dd1
V
918 struct device *dev, struct sg_table *sgt,
919 enum dma_data_direction dir)
920{
921}
922
8caab75f 923static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
924 struct spi_message *msg)
925{
926 return 0;
927}
928
8caab75f 929static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 930 struct spi_message *msg)
2de440f5
GU
931{
932 return 0;
933}
934#endif /* !CONFIG_HAS_DMA */
935
8caab75f 936static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
937 struct spi_message *msg)
938{
939 struct spi_transfer *xfer;
940
941 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
942 /*
943 * Restore the original value of tx_buf or rx_buf if they are
944 * NULL.
945 */
8caab75f 946 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 947 xfer->tx_buf = NULL;
8caab75f 948 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
949 xfer->rx_buf = NULL;
950 }
951
8caab75f 952 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
953}
954
8caab75f 955static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
956{
957 struct spi_transfer *xfer;
958 void *tmp;
959 unsigned int max_tx, max_rx;
960
8caab75f 961 if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
2de440f5
GU
962 max_tx = 0;
963 max_rx = 0;
964
965 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 966 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
967 !xfer->tx_buf)
968 max_tx = max(xfer->len, max_tx);
8caab75f 969 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
970 !xfer->rx_buf)
971 max_rx = max(xfer->len, max_rx);
972 }
973
974 if (max_tx) {
8caab75f 975 tmp = krealloc(ctlr->dummy_tx, max_tx,
2de440f5
GU
976 GFP_KERNEL | GFP_DMA);
977 if (!tmp)
978 return -ENOMEM;
8caab75f 979 ctlr->dummy_tx = tmp;
2de440f5
GU
980 memset(tmp, 0, max_tx);
981 }
982
983 if (max_rx) {
8caab75f 984 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
985 GFP_KERNEL | GFP_DMA);
986 if (!tmp)
987 return -ENOMEM;
8caab75f 988 ctlr->dummy_rx = tmp;
2de440f5
GU
989 }
990
991 if (max_tx || max_rx) {
992 list_for_each_entry(xfer, &msg->transfers,
993 transfer_list) {
994 if (!xfer->tx_buf)
8caab75f 995 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 996 if (!xfer->rx_buf)
8caab75f 997 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
998 }
999 }
1000 }
1001
8caab75f 1002 return __spi_map_msg(ctlr, msg);
2de440f5 1003}
99adef31 1004
b158935f
MB
1005/*
1006 * spi_transfer_one_message - Default implementation of transfer_one_message()
1007 *
1008 * This is a standard implementation of transfer_one_message() for
8ba811a7 1009 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1010 * standard handling of delays and chip select management.
1011 */
8caab75f 1012static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1013 struct spi_message *msg)
1014{
1015 struct spi_transfer *xfer;
b158935f
MB
1016 bool keep_cs = false;
1017 int ret = 0;
d0716dde 1018 unsigned long long ms = 1;
8caab75f 1019 struct spi_statistics *statm = &ctlr->statistics;
eca2ebc7 1020 struct spi_statistics *stats = &msg->spi->statistics;
b158935f
MB
1021
1022 spi_set_cs(msg->spi, true);
1023
eca2ebc7
MS
1024 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1025 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1026
b158935f
MB
1027 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1028 trace_spi_transfer_start(msg, xfer);
1029
8caab75f
GU
1030 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1031 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1032
38ec10f6 1033 if (xfer->tx_buf || xfer->rx_buf) {
8caab75f 1034 reinit_completion(&ctlr->xfer_completion);
b158935f 1035
8caab75f 1036 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1037 if (ret < 0) {
eca2ebc7
MS
1038 SPI_STATISTICS_INCREMENT_FIELD(statm,
1039 errors);
1040 SPI_STATISTICS_INCREMENT_FIELD(stats,
1041 errors);
38ec10f6
MB
1042 dev_err(&msg->spi->dev,
1043 "SPI transfer failed: %d\n", ret);
1044 goto out;
1045 }
b158935f 1046
38ec10f6
MB
1047 if (ret > 0) {
1048 ret = 0;
d0716dde
SW
1049 ms = 8LL * 1000LL * xfer->len;
1050 do_div(ms, xfer->speed_hz);
833bfade 1051 ms += ms + 200; /* some tolerance */
16a0ce4e 1052
d0716dde
SW
1053 if (ms > UINT_MAX)
1054 ms = UINT_MAX;
1055
8caab75f 1056 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
38ec10f6
MB
1057 msecs_to_jiffies(ms));
1058 }
16a0ce4e 1059
38ec10f6 1060 if (ms == 0) {
eca2ebc7
MS
1061 SPI_STATISTICS_INCREMENT_FIELD(statm,
1062 timedout);
1063 SPI_STATISTICS_INCREMENT_FIELD(stats,
1064 timedout);
38ec10f6
MB
1065 dev_err(&msg->spi->dev,
1066 "SPI transfer timed out\n");
1067 msg->status = -ETIMEDOUT;
1068 }
1069 } else {
1070 if (xfer->len)
1071 dev_err(&msg->spi->dev,
1072 "Bufferless transfer has length %u\n",
1073 xfer->len);
13a42798 1074 }
b158935f
MB
1075
1076 trace_spi_transfer_stop(msg, xfer);
1077
1078 if (msg->status != -EINPROGRESS)
1079 goto out;
1080
8244bd3a
DK
1081 if (xfer->delay_usecs) {
1082 u16 us = xfer->delay_usecs;
1083
1084 if (us <= 10)
1085 udelay(us);
1086 else
1087 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1088 }
b158935f
MB
1089
1090 if (xfer->cs_change) {
1091 if (list_is_last(&xfer->transfer_list,
1092 &msg->transfers)) {
1093 keep_cs = true;
1094 } else {
0b73aa63
MB
1095 spi_set_cs(msg->spi, false);
1096 udelay(10);
1097 spi_set_cs(msg->spi, true);
b158935f
MB
1098 }
1099 }
1100
1101 msg->actual_length += xfer->len;
1102 }
1103
1104out:
1105 if (ret != 0 || !keep_cs)
1106 spi_set_cs(msg->spi, false);
1107
1108 if (msg->status == -EINPROGRESS)
1109 msg->status = ret;
1110
8caab75f
GU
1111 if (msg->status && ctlr->handle_err)
1112 ctlr->handle_err(ctlr, msg);
b716c4ff 1113
8caab75f 1114 spi_res_release(ctlr, msg);
d780c371 1115
8caab75f 1116 spi_finalize_current_message(ctlr);
b158935f
MB
1117
1118 return ret;
1119}
1120
1121/**
1122 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1123 * @ctlr: the controller reporting completion
b158935f
MB
1124 *
1125 * Called by SPI drivers using the core transfer_one_message()
1126 * implementation to notify it that the current interrupt driven
9e8f4882 1127 * transfer has finished and the next one may be scheduled.
b158935f 1128 */
8caab75f 1129void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1130{
8caab75f 1131 complete(&ctlr->xfer_completion);
b158935f
MB
1132}
1133EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1134
ffbbdd21 1135/**
fc9e0f71 1136 * __spi_pump_messages - function which processes spi message queue
8caab75f 1137 * @ctlr: controller to process queue for
fc9e0f71 1138 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW
1139 *
1140 * This function checks if there is any spi message in the queue that
1141 * needs processing and if so call out to the driver to initialize hardware
1142 * and transfer each message.
1143 *
0461a414
MB
1144 * Note that it is called both from the kthread itself and also from
1145 * inside spi_sync(); the queue extraction handling at the top of the
1146 * function should deal with this safely.
ffbbdd21 1147 */
8caab75f 1148static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1149{
ffbbdd21
LW
1150 unsigned long flags;
1151 bool was_busy = false;
1152 int ret;
1153
983aee5d 1154 /* Lock queue */
8caab75f 1155 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1156
1157 /* Make sure we are not already running a message */
8caab75f
GU
1158 if (ctlr->cur_msg) {
1159 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
983aee5d
MB
1160 return;
1161 }
1162
0461a414 1163 /* If another context is idling the device then defer */
8caab75f
GU
1164 if (ctlr->idling) {
1165 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
1166 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
0461a414
MB
1167 return;
1168 }
1169
983aee5d 1170 /* Check if the queue is idle */
8caab75f
GU
1171 if (list_empty(&ctlr->queue) || !ctlr->running) {
1172 if (!ctlr->busy) {
1173 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
b0b36b86 1174 return;
ffbbdd21 1175 }
fc9e0f71
MB
1176
1177 /* Only do teardown in the thread */
1178 if (!in_kthread) {
8caab75f
GU
1179 kthread_queue_work(&ctlr->kworker,
1180 &ctlr->pump_messages);
1181 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
fc9e0f71
MB
1182 return;
1183 }
1184
8caab75f
GU
1185 ctlr->busy = false;
1186 ctlr->idling = true;
1187 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1188
1189 kfree(ctlr->dummy_rx);
1190 ctlr->dummy_rx = NULL;
1191 kfree(ctlr->dummy_tx);
1192 ctlr->dummy_tx = NULL;
1193 if (ctlr->unprepare_transfer_hardware &&
1194 ctlr->unprepare_transfer_hardware(ctlr))
1195 dev_err(&ctlr->dev,
b0b36b86 1196 "failed to unprepare transfer hardware\n");
8caab75f
GU
1197 if (ctlr->auto_runtime_pm) {
1198 pm_runtime_mark_last_busy(ctlr->dev.parent);
1199 pm_runtime_put_autosuspend(ctlr->dev.parent);
49834de2 1200 }
8caab75f 1201 trace_spi_controller_idle(ctlr);
ffbbdd21 1202
8caab75f
GU
1203 spin_lock_irqsave(&ctlr->queue_lock, flags);
1204 ctlr->idling = false;
1205 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1206 return;
1207 }
ffbbdd21 1208
ffbbdd21 1209 /* Extract head of queue */
8caab75f
GU
1210 ctlr->cur_msg =
1211 list_first_entry(&ctlr->queue, struct spi_message, queue);
ffbbdd21 1212
8caab75f
GU
1213 list_del_init(&ctlr->cur_msg->queue);
1214 if (ctlr->busy)
ffbbdd21
LW
1215 was_busy = true;
1216 else
8caab75f
GU
1217 ctlr->busy = true;
1218 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1219
8caab75f 1220 mutex_lock(&ctlr->io_mutex);
ef4d96ec 1221
8caab75f
GU
1222 if (!was_busy && ctlr->auto_runtime_pm) {
1223 ret = pm_runtime_get_sync(ctlr->dev.parent);
49834de2 1224 if (ret < 0) {
c1f9c2ad 1225 pm_runtime_put_noidle(ctlr->dev.parent);
8caab75f 1226 dev_err(&ctlr->dev, "Failed to power device: %d\n",
49834de2 1227 ret);
8caab75f 1228 mutex_unlock(&ctlr->io_mutex);
49834de2
MB
1229 return;
1230 }
1231 }
1232
56ec1978 1233 if (!was_busy)
8caab75f 1234 trace_spi_controller_busy(ctlr);
56ec1978 1235
8caab75f
GU
1236 if (!was_busy && ctlr->prepare_transfer_hardware) {
1237 ret = ctlr->prepare_transfer_hardware(ctlr);
ffbbdd21 1238 if (ret) {
8caab75f 1239 dev_err(&ctlr->dev,
ffbbdd21 1240 "failed to prepare transfer hardware\n");
49834de2 1241
8caab75f
GU
1242 if (ctlr->auto_runtime_pm)
1243 pm_runtime_put(ctlr->dev.parent);
1244 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1245 return;
1246 }
1247 }
1248
8caab75f 1249 trace_spi_message_start(ctlr->cur_msg);
56ec1978 1250
8caab75f
GU
1251 if (ctlr->prepare_message) {
1252 ret = ctlr->prepare_message(ctlr, ctlr->cur_msg);
2841a5fc 1253 if (ret) {
8caab75f
GU
1254 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1255 ret);
1256 ctlr->cur_msg->status = ret;
1257 spi_finalize_current_message(ctlr);
49023d2e 1258 goto out;
2841a5fc 1259 }
8caab75f 1260 ctlr->cur_msg_prepared = true;
2841a5fc
MB
1261 }
1262
8caab75f 1263 ret = spi_map_msg(ctlr, ctlr->cur_msg);
99adef31 1264 if (ret) {
8caab75f
GU
1265 ctlr->cur_msg->status = ret;
1266 spi_finalize_current_message(ctlr);
49023d2e 1267 goto out;
99adef31
MB
1268 }
1269
8caab75f 1270 ret = ctlr->transfer_one_message(ctlr, ctlr->cur_msg);
ffbbdd21 1271 if (ret) {
8caab75f 1272 dev_err(&ctlr->dev,
1f802f82 1273 "failed to transfer one message from queue\n");
49023d2e 1274 goto out;
ffbbdd21 1275 }
49023d2e
JH
1276
1277out:
8caab75f 1278 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1279
1280 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1281 if (!ret)
1282 cond_resched();
ffbbdd21
LW
1283}
1284
fc9e0f71
MB
1285/**
1286 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1287 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1288 */
1289static void spi_pump_messages(struct kthread_work *work)
1290{
8caab75f
GU
1291 struct spi_controller *ctlr =
1292 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1293
8caab75f 1294 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1295}
1296
8caab75f 1297static int spi_init_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1298{
1299 struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 };
1300
8caab75f
GU
1301 ctlr->running = false;
1302 ctlr->busy = false;
ffbbdd21 1303
8caab75f
GU
1304 kthread_init_worker(&ctlr->kworker);
1305 ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker,
1306 "%s", dev_name(&ctlr->dev));
1307 if (IS_ERR(ctlr->kworker_task)) {
1308 dev_err(&ctlr->dev, "failed to create message pump task\n");
1309 return PTR_ERR(ctlr->kworker_task);
ffbbdd21 1310 }
8caab75f 1311 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
ffbbdd21
LW
1312
1313 /*
8caab75f 1314 * Controller config will indicate if this controller should run the
ffbbdd21
LW
1315 * message pump with high (realtime) priority to reduce the transfer
1316 * latency on the bus by minimising the delay between a transfer
1317 * request and the scheduling of the message pump thread. Without this
1318 * setting the message pump thread will remain at default priority.
1319 */
8caab75f
GU
1320 if (ctlr->rt) {
1321 dev_info(&ctlr->dev,
ffbbdd21 1322 "will run message pump with realtime priority\n");
8caab75f 1323 sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, &param);
ffbbdd21
LW
1324 }
1325
1326 return 0;
1327}
1328
1329/**
1330 * spi_get_next_queued_message() - called by driver to check for queued
1331 * messages
8caab75f 1332 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
1333 *
1334 * If there are more messages in the queue, the next message is returned from
1335 * this call.
97d56dc6
JMC
1336 *
1337 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1338 */
8caab75f 1339struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
1340{
1341 struct spi_message *next;
1342 unsigned long flags;
1343
1344 /* get a pointer to the next message, if any */
8caab75f
GU
1345 spin_lock_irqsave(&ctlr->queue_lock, flags);
1346 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1347 queue);
8caab75f 1348 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1349
1350 return next;
1351}
1352EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1353
1354/**
1355 * spi_finalize_current_message() - the current message is complete
8caab75f 1356 * @ctlr: the controller to return the message to
ffbbdd21
LW
1357 *
1358 * Called by the driver to notify the core that the message in the front of the
1359 * queue is complete and can be removed from the queue.
1360 */
8caab75f 1361void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21
LW
1362{
1363 struct spi_message *mesg;
1364 unsigned long flags;
2841a5fc 1365 int ret;
ffbbdd21 1366
8caab75f
GU
1367 spin_lock_irqsave(&ctlr->queue_lock, flags);
1368 mesg = ctlr->cur_msg;
1369 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1370
8caab75f 1371 spi_unmap_msg(ctlr, mesg);
99adef31 1372
8caab75f
GU
1373 if (ctlr->cur_msg_prepared && ctlr->unprepare_message) {
1374 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1375 if (ret) {
8caab75f
GU
1376 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1377 ret);
2841a5fc
MB
1378 }
1379 }
391949b6 1380
8caab75f
GU
1381 spin_lock_irqsave(&ctlr->queue_lock, flags);
1382 ctlr->cur_msg = NULL;
1383 ctlr->cur_msg_prepared = false;
1384 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
1385 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
8e76ef88
MS
1386
1387 trace_spi_message_done(mesg);
2841a5fc 1388
ffbbdd21
LW
1389 mesg->state = NULL;
1390 if (mesg->complete)
1391 mesg->complete(mesg->context);
1392}
1393EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1394
8caab75f 1395static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1396{
1397 unsigned long flags;
1398
8caab75f 1399 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1400
8caab75f
GU
1401 if (ctlr->running || ctlr->busy) {
1402 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1403 return -EBUSY;
1404 }
1405
8caab75f
GU
1406 ctlr->running = true;
1407 ctlr->cur_msg = NULL;
1408 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1409
8caab75f 1410 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
1411
1412 return 0;
1413}
1414
8caab75f 1415static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1416{
1417 unsigned long flags;
1418 unsigned limit = 500;
1419 int ret = 0;
1420
8caab75f 1421 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1422
1423 /*
1424 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1425 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
1426 * execution path (pump_messages) would be required to call wake_up or
1427 * friends on every SPI message. Do this instead.
1428 */
8caab75f
GU
1429 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1430 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1431 usleep_range(10000, 11000);
8caab75f 1432 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1433 }
1434
8caab75f 1435 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
1436 ret = -EBUSY;
1437 else
8caab75f 1438 ctlr->running = false;
ffbbdd21 1439
8caab75f 1440 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1441
1442 if (ret) {
8caab75f 1443 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW
1444 return ret;
1445 }
1446 return ret;
1447}
1448
8caab75f 1449static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1450{
1451 int ret;
1452
8caab75f 1453 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
1454
1455 /*
3989144f 1456 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
1457 * If the reason that stop_queue timed out is that the work will never
1458 * finish, then it does no good to call flush/stop thread, so
1459 * return anyway.
1460 */
1461 if (ret) {
8caab75f 1462 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
1463 return ret;
1464 }
1465
8caab75f
GU
1466 kthread_flush_worker(&ctlr->kworker);
1467 kthread_stop(ctlr->kworker_task);
ffbbdd21
LW
1468
1469 return 0;
1470}
1471
0461a414
MB
1472static int __spi_queued_transfer(struct spi_device *spi,
1473 struct spi_message *msg,
1474 bool need_pump)
ffbbdd21 1475{
8caab75f 1476 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
1477 unsigned long flags;
1478
8caab75f 1479 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1480
8caab75f
GU
1481 if (!ctlr->running) {
1482 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1483 return -ESHUTDOWN;
1484 }
1485 msg->actual_length = 0;
1486 msg->status = -EINPROGRESS;
1487
8caab75f
GU
1488 list_add_tail(&msg->queue, &ctlr->queue);
1489 if (!ctlr->busy && need_pump)
1490 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 1491
8caab75f 1492 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1493 return 0;
1494}
1495
0461a414
MB
1496/**
1497 * spi_queued_transfer - transfer function for queued transfers
1498 * @spi: spi device which is requesting transfer
1499 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC
1500 *
1501 * Return: zero on success, else a negative error code.
0461a414
MB
1502 */
1503static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
1504{
1505 return __spi_queued_transfer(spi, msg, true);
1506}
1507
8caab75f 1508static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1509{
1510 int ret;
1511
8caab75f
GU
1512 ctlr->transfer = spi_queued_transfer;
1513 if (!ctlr->transfer_one_message)
1514 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
1515
1516 /* Initialize and start queue */
8caab75f 1517 ret = spi_init_queue(ctlr);
ffbbdd21 1518 if (ret) {
8caab75f 1519 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
1520 goto err_init_queue;
1521 }
8caab75f
GU
1522 ctlr->queued = true;
1523 ret = spi_start_queue(ctlr);
ffbbdd21 1524 if (ret) {
8caab75f 1525 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
1526 goto err_start_queue;
1527 }
1528
1529 return 0;
1530
1531err_start_queue:
8caab75f 1532 spi_destroy_queue(ctlr);
c3676d5c 1533err_init_queue:
ffbbdd21
LW
1534 return ret;
1535}
1536
1537/*-------------------------------------------------------------------------*/
1538
7cb94361 1539#if defined(CONFIG_OF)
8caab75f 1540static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 1541 struct device_node *nc)
aff5e3f8 1542{
aff5e3f8 1543 u32 value;
c2e51ac3 1544 int rc;
aff5e3f8 1545
aff5e3f8 1546 /* Mode (clock phase/polarity/etc.) */
e0bcb680 1547 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 1548 spi->mode |= SPI_CPHA;
e0bcb680 1549 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 1550 spi->mode |= SPI_CPOL;
e0bcb680 1551 if (of_property_read_bool(nc, "spi-cs-high"))
aff5e3f8 1552 spi->mode |= SPI_CS_HIGH;
e0bcb680 1553 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 1554 spi->mode |= SPI_3WIRE;
e0bcb680 1555 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8
PA
1556 spi->mode |= SPI_LSB_FIRST;
1557
1558 /* Device DUAL/QUAD mode */
1559 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
1560 switch (value) {
1561 case 1:
1562 break;
1563 case 2:
1564 spi->mode |= SPI_TX_DUAL;
1565 break;
1566 case 4:
1567 spi->mode |= SPI_TX_QUAD;
1568 break;
1569 default:
8caab75f 1570 dev_warn(&ctlr->dev,
aff5e3f8
PA
1571 "spi-tx-bus-width %d not supported\n",
1572 value);
1573 break;
1574 }
1575 }
1576
1577 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
1578 switch (value) {
1579 case 1:
1580 break;
1581 case 2:
1582 spi->mode |= SPI_RX_DUAL;
1583 break;
1584 case 4:
1585 spi->mode |= SPI_RX_QUAD;
1586 break;
1587 default:
8caab75f 1588 dev_warn(&ctlr->dev,
aff5e3f8
PA
1589 "spi-rx-bus-width %d not supported\n",
1590 value);
1591 break;
1592 }
1593 }
1594
8caab75f 1595 if (spi_controller_is_slave(ctlr)) {
6c364062 1596 if (strcmp(nc->name, "slave")) {
25c56c88
RH
1597 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
1598 nc);
6c364062
GU
1599 return -EINVAL;
1600 }
1601 return 0;
1602 }
1603
1604 /* Device address */
1605 rc = of_property_read_u32(nc, "reg", &value);
1606 if (rc) {
25c56c88
RH
1607 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
1608 nc, rc);
6c364062
GU
1609 return rc;
1610 }
1611 spi->chip_select = value;
1612
aff5e3f8
PA
1613 /* Device speed */
1614 rc = of_property_read_u32(nc, "spi-max-frequency", &value);
1615 if (rc) {
8caab75f 1616 dev_err(&ctlr->dev,
25c56c88 1617 "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc);
c2e51ac3 1618 return rc;
aff5e3f8
PA
1619 }
1620 spi->max_speed_hz = value;
1621
c2e51ac3
GU
1622 return 0;
1623}
1624
1625static struct spi_device *
8caab75f 1626of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
1627{
1628 struct spi_device *spi;
1629 int rc;
1630
1631 /* Alloc an spi_device */
8caab75f 1632 spi = spi_alloc_device(ctlr);
c2e51ac3 1633 if (!spi) {
25c56c88 1634 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
1635 rc = -ENOMEM;
1636 goto err_out;
1637 }
1638
1639 /* Select device driver */
1640 rc = of_modalias_node(nc, spi->modalias,
1641 sizeof(spi->modalias));
1642 if (rc < 0) {
25c56c88 1643 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
1644 goto err_out;
1645 }
1646
8caab75f 1647 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
1648 if (rc)
1649 goto err_out;
1650
aff5e3f8
PA
1651 /* Store a pointer to the node in the device structure */
1652 of_node_get(nc);
1653 spi->dev.of_node = nc;
1654
1655 /* Register the new device */
aff5e3f8
PA
1656 rc = spi_add_device(spi);
1657 if (rc) {
25c56c88 1658 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 1659 goto err_of_node_put;
aff5e3f8
PA
1660 }
1661
1662 return spi;
1663
8324147f
JH
1664err_of_node_put:
1665 of_node_put(nc);
aff5e3f8
PA
1666err_out:
1667 spi_dev_put(spi);
1668 return ERR_PTR(rc);
1669}
1670
d57a4282
GL
1671/**
1672 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 1673 * @ctlr: Pointer to spi_controller device
d57a4282 1674 *
6c364062
GU
1675 * Registers an spi_device for each child node of controller node which
1676 * represents a valid SPI slave.
d57a4282 1677 */
8caab75f 1678static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
1679{
1680 struct spi_device *spi;
1681 struct device_node *nc;
d57a4282 1682
8caab75f 1683 if (!ctlr->dev.of_node)
d57a4282
GL
1684 return;
1685
8caab75f 1686 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
1687 if (of_node_test_and_set_flag(nc, OF_POPULATED))
1688 continue;
8caab75f 1689 spi = of_register_spi_device(ctlr, nc);
e0af98a7 1690 if (IS_ERR(spi)) {
8caab75f 1691 dev_warn(&ctlr->dev,
25c56c88 1692 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
1693 of_node_clear_flag(nc, OF_POPULATED);
1694 }
d57a4282
GL
1695 }
1696}
1697#else
8caab75f 1698static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
1699#endif
1700
64bee4d2 1701#ifdef CONFIG_ACPI
8a2e487e
LW
1702static void acpi_spi_parse_apple_properties(struct spi_device *spi)
1703{
1704 struct acpi_device *dev = ACPI_COMPANION(&spi->dev);
1705 const union acpi_object *obj;
1706
1707 if (!x86_apple_machine)
1708 return;
1709
1710 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
1711 && obj->buffer.length >= 4)
1712 spi->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
1713
1714 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
1715 && obj->buffer.length == 8)
1716 spi->bits_per_word = *(u64 *)obj->buffer.pointer;
1717
1718 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
1719 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
1720 spi->mode |= SPI_LSB_FIRST;
1721
1722 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
1723 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
1724 spi->mode |= SPI_CPOL;
1725
1726 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
1727 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
1728 spi->mode |= SPI_CPHA;
1729}
1730
64bee4d2
MW
1731static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
1732{
1733 struct spi_device *spi = data;
8caab75f 1734 struct spi_controller *ctlr = spi->controller;
64bee4d2
MW
1735
1736 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
1737 struct acpi_resource_spi_serialbus *sb;
1738
1739 sb = &ares->data.spi_serial_bus;
1740 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
a0a90718
MW
1741 /*
1742 * ACPI DeviceSelection numbering is handled by the
1743 * host controller driver in Windows and can vary
1744 * from driver to driver. In Linux we always expect
1745 * 0 .. max - 1 so we need to ask the driver to
1746 * translate between the two schemes.
1747 */
8caab75f
GU
1748 if (ctlr->fw_translate_cs) {
1749 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
1750 sb->device_selection);
1751 if (cs < 0)
1752 return cs;
1753 spi->chip_select = cs;
1754 } else {
1755 spi->chip_select = sb->device_selection;
1756 }
1757
64bee4d2
MW
1758 spi->max_speed_hz = sb->connection_speed;
1759
1760 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
1761 spi->mode |= SPI_CPHA;
1762 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
1763 spi->mode |= SPI_CPOL;
1764 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
1765 spi->mode |= SPI_CS_HIGH;
1766 }
1767 } else if (spi->irq < 0) {
1768 struct resource r;
1769
1770 if (acpi_dev_resource_interrupt(ares, 0, &r))
1771 spi->irq = r.start;
1772 }
1773
1774 /* Always tell the ACPI core to skip this resource */
1775 return 1;
1776}
1777
8caab75f 1778static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
7f24467f 1779 struct acpi_device *adev)
64bee4d2 1780{
64bee4d2 1781 struct list_head resource_list;
64bee4d2
MW
1782 struct spi_device *spi;
1783 int ret;
1784
7f24467f
OP
1785 if (acpi_bus_get_status(adev) || !adev->status.present ||
1786 acpi_device_enumerated(adev))
64bee4d2
MW
1787 return AE_OK;
1788
8caab75f 1789 spi = spi_alloc_device(ctlr);
64bee4d2 1790 if (!spi) {
8caab75f 1791 dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n",
64bee4d2
MW
1792 dev_name(&adev->dev));
1793 return AE_NO_MEMORY;
1794 }
1795
7b199811 1796 ACPI_COMPANION_SET(&spi->dev, adev);
64bee4d2
MW
1797 spi->irq = -1;
1798
1799 INIT_LIST_HEAD(&resource_list);
1800 ret = acpi_dev_get_resources(adev, &resource_list,
1801 acpi_spi_add_resource, spi);
1802 acpi_dev_free_resource_list(&resource_list);
1803
8a2e487e
LW
1804 acpi_spi_parse_apple_properties(spi);
1805
64bee4d2
MW
1806 if (ret < 0 || !spi->max_speed_hz) {
1807 spi_dev_put(spi);
1808 return AE_OK;
1809 }
1810
0c6543f6
DD
1811 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
1812 sizeof(spi->modalias));
1813
33ada67d
CR
1814 if (spi->irq < 0)
1815 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
1816
7f24467f
OP
1817 acpi_device_set_enumerated(adev);
1818
33cf00e5 1819 adev->power.flags.ignore_parent = true;
64bee4d2 1820 if (spi_add_device(spi)) {
33cf00e5 1821 adev->power.flags.ignore_parent = false;
8caab75f 1822 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
1823 dev_name(&adev->dev));
1824 spi_dev_put(spi);
1825 }
1826
1827 return AE_OK;
1828}
1829
7f24467f
OP
1830static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
1831 void *data, void **return_value)
1832{
8caab75f 1833 struct spi_controller *ctlr = data;
7f24467f
OP
1834 struct acpi_device *adev;
1835
1836 if (acpi_bus_get_device(handle, &adev))
1837 return AE_OK;
1838
8caab75f 1839 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
1840}
1841
8caab75f 1842static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
1843{
1844 acpi_status status;
1845 acpi_handle handle;
1846
8caab75f 1847 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
1848 if (!handle)
1849 return;
1850
1851 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
8caab75f 1852 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 1853 if (ACPI_FAILURE(status))
8caab75f 1854 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
1855}
1856#else
8caab75f 1857static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
1858#endif /* CONFIG_ACPI */
1859
8caab75f 1860static void spi_controller_release(struct device *dev)
8ae12a0d 1861{
8caab75f 1862 struct spi_controller *ctlr;
8ae12a0d 1863
8caab75f
GU
1864 ctlr = container_of(dev, struct spi_controller, dev);
1865 kfree(ctlr);
8ae12a0d
DB
1866}
1867
1868static struct class spi_master_class = {
1869 .name = "spi_master",
1870 .owner = THIS_MODULE,
8caab75f 1871 .dev_release = spi_controller_release,
eca2ebc7 1872 .dev_groups = spi_master_groups,
8ae12a0d
DB
1873};
1874
6c364062
GU
1875#ifdef CONFIG_SPI_SLAVE
1876/**
1877 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
1878 * controller
1879 * @spi: device used for the current transfer
1880 */
1881int spi_slave_abort(struct spi_device *spi)
1882{
8caab75f 1883 struct spi_controller *ctlr = spi->controller;
6c364062 1884
8caab75f
GU
1885 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
1886 return ctlr->slave_abort(ctlr);
6c364062
GU
1887
1888 return -ENOTSUPP;
1889}
1890EXPORT_SYMBOL_GPL(spi_slave_abort);
1891
1892static int match_true(struct device *dev, void *data)
1893{
1894 return 1;
1895}
1896
1897static ssize_t spi_slave_show(struct device *dev,
1898 struct device_attribute *attr, char *buf)
1899{
8caab75f
GU
1900 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
1901 dev);
6c364062
GU
1902 struct device *child;
1903
1904 child = device_find_child(&ctlr->dev, NULL, match_true);
1905 return sprintf(buf, "%s\n",
1906 child ? to_spi_device(child)->modalias : NULL);
1907}
1908
1909static ssize_t spi_slave_store(struct device *dev,
1910 struct device_attribute *attr, const char *buf,
1911 size_t count)
1912{
8caab75f
GU
1913 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
1914 dev);
6c364062
GU
1915 struct spi_device *spi;
1916 struct device *child;
1917 char name[32];
1918 int rc;
1919
1920 rc = sscanf(buf, "%31s", name);
1921 if (rc != 1 || !name[0])
1922 return -EINVAL;
1923
1924 child = device_find_child(&ctlr->dev, NULL, match_true);
1925 if (child) {
1926 /* Remove registered slave */
1927 device_unregister(child);
1928 put_device(child);
1929 }
1930
1931 if (strcmp(name, "(null)")) {
1932 /* Register new slave */
1933 spi = spi_alloc_device(ctlr);
1934 if (!spi)
1935 return -ENOMEM;
1936
1937 strlcpy(spi->modalias, name, sizeof(spi->modalias));
1938
1939 rc = spi_add_device(spi);
1940 if (rc) {
1941 spi_dev_put(spi);
1942 return rc;
1943 }
1944 }
1945
1946 return count;
1947}
1948
1949static DEVICE_ATTR(slave, 0644, spi_slave_show, spi_slave_store);
1950
1951static struct attribute *spi_slave_attrs[] = {
1952 &dev_attr_slave.attr,
1953 NULL,
1954};
1955
1956static const struct attribute_group spi_slave_group = {
1957 .attrs = spi_slave_attrs,
1958};
1959
1960static const struct attribute_group *spi_slave_groups[] = {
8caab75f 1961 &spi_controller_statistics_group,
6c364062
GU
1962 &spi_slave_group,
1963 NULL,
1964};
1965
1966static struct class spi_slave_class = {
1967 .name = "spi_slave",
1968 .owner = THIS_MODULE,
8caab75f 1969 .dev_release = spi_controller_release,
6c364062
GU
1970 .dev_groups = spi_slave_groups,
1971};
1972#else
1973extern struct class spi_slave_class; /* dummy */
1974#endif
8ae12a0d
DB
1975
1976/**
6c364062 1977 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 1978 * @dev: the controller, possibly using the platform_bus
33e34dc6 1979 * @size: how much zeroed driver-private data to allocate; the pointer to this
49dce689 1980 * memory is in the driver_data field of the returned device,
8caab75f 1981 * accessible with spi_controller_get_devdata().
6c364062
GU
1982 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
1983 * slave (true) controller
33e34dc6 1984 * Context: can sleep
8ae12a0d 1985 *
6c364062 1986 * This call is used only by SPI controller drivers, which are the
8ae12a0d 1987 * only ones directly touching chip registers. It's how they allocate
8caab75f 1988 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 1989 *
97d56dc6 1990 * This must be called from context that can sleep.
8ae12a0d 1991 *
6c364062 1992 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
1993 * controller's methods before calling spi_register_controller(); and (after
1994 * errors adding the device) calling spi_controller_put() to prevent a memory
1995 * leak.
97d56dc6 1996 *
6c364062 1997 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 1998 */
8caab75f
GU
1999struct spi_controller *__spi_alloc_controller(struct device *dev,
2000 unsigned int size, bool slave)
8ae12a0d 2001{
8caab75f 2002 struct spi_controller *ctlr;
8ae12a0d 2003
0c868461
DB
2004 if (!dev)
2005 return NULL;
2006
8caab75f
GU
2007 ctlr = kzalloc(size + sizeof(*ctlr), GFP_KERNEL);
2008 if (!ctlr)
8ae12a0d
DB
2009 return NULL;
2010
8caab75f
GU
2011 device_initialize(&ctlr->dev);
2012 ctlr->bus_num = -1;
2013 ctlr->num_chipselect = 1;
2014 ctlr->slave = slave;
6c364062 2015 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2016 ctlr->dev.class = &spi_slave_class;
6c364062 2017 else
8caab75f
GU
2018 ctlr->dev.class = &spi_master_class;
2019 ctlr->dev.parent = dev;
2020 pm_suspend_ignore_children(&ctlr->dev, true);
2021 spi_controller_set_devdata(ctlr, &ctlr[1]);
8ae12a0d 2022
8caab75f 2023 return ctlr;
8ae12a0d 2024}
6c364062 2025EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2026
74317984 2027#ifdef CONFIG_OF
8caab75f 2028static int of_spi_register_master(struct spi_controller *ctlr)
74317984 2029{
e80beb27 2030 int nb, i, *cs;
8caab75f 2031 struct device_node *np = ctlr->dev.of_node;
74317984
JCPV
2032
2033 if (!np)
2034 return 0;
2035
2036 nb = of_gpio_named_count(np, "cs-gpios");
8caab75f 2037 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
74317984 2038
8ec5d84e
AL
2039 /* Return error only for an incorrectly formed cs-gpios property */
2040 if (nb == 0 || nb == -ENOENT)
74317984 2041 return 0;
8ec5d84e
AL
2042 else if (nb < 0)
2043 return nb;
74317984 2044
8caab75f 2045 cs = devm_kzalloc(&ctlr->dev, sizeof(int) * ctlr->num_chipselect,
74317984 2046 GFP_KERNEL);
8caab75f 2047 ctlr->cs_gpios = cs;
74317984 2048
8caab75f 2049 if (!ctlr->cs_gpios)
74317984
JCPV
2050 return -ENOMEM;
2051
8caab75f 2052 for (i = 0; i < ctlr->num_chipselect; i++)
446411e1 2053 cs[i] = -ENOENT;
74317984
JCPV
2054
2055 for (i = 0; i < nb; i++)
2056 cs[i] = of_get_named_gpio(np, "cs-gpios", i);
2057
2058 return 0;
2059}
2060#else
8caab75f 2061static int of_spi_register_master(struct spi_controller *ctlr)
74317984
JCPV
2062{
2063 return 0;
2064}
2065#endif
2066
8ae12a0d 2067/**
8caab75f
GU
2068 * spi_register_controller - register SPI master or slave controller
2069 * @ctlr: initialized master, originally from spi_alloc_master() or
2070 * spi_alloc_slave()
33e34dc6 2071 * Context: can sleep
8ae12a0d 2072 *
8caab75f 2073 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2074 * such as the platform bus. The final stage of probe() in that code
8caab75f 2075 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
2076 *
2077 * SPI controllers use board specific (often SOC specific) bus numbers,
2078 * and board-specific addressing for SPI devices combines those numbers
2079 * with chip select numbers. Since SPI does not directly support dynamic
2080 * device identification, boards need configuration tables telling which
2081 * chip is at which address.
2082 *
2083 * This must be called from context that can sleep. It returns zero on
8caab75f 2084 * success, else a negative error code (dropping the controller's refcount).
0c868461 2085 * After a successful return, the caller is responsible for calling
8caab75f 2086 * spi_unregister_controller().
97d56dc6
JMC
2087 *
2088 * Return: zero on success, else a negative error code.
8ae12a0d 2089 */
8caab75f 2090int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2091{
8caab75f 2092 struct device *dev = ctlr->dev.parent;
2b9603a0 2093 struct boardinfo *bi;
8ae12a0d 2094 int status = -ENODEV;
42bdd706 2095 int id, first_dynamic;
8ae12a0d 2096
0c868461
DB
2097 if (!dev)
2098 return -ENODEV;
2099
8caab75f
GU
2100 if (!spi_controller_is_slave(ctlr)) {
2101 status = of_spi_register_master(ctlr);
6c364062
GU
2102 if (status)
2103 return status;
2104 }
74317984 2105
082c8cb4
DB
2106 /* even if it's just one always-selected device, there must
2107 * be at least one chipselect
2108 */
8caab75f 2109 if (ctlr->num_chipselect == 0)
082c8cb4 2110 return -EINVAL;
9b61e302
SM
2111 /* allocate dynamic bus number using Linux idr */
2112 if ((ctlr->bus_num < 0) && ctlr->dev.of_node) {
2113 id = of_alias_get_id(ctlr->dev.of_node, "spi");
2114 if (id >= 0) {
2115 ctlr->bus_num = id;
2116 mutex_lock(&board_lock);
2117 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2118 ctlr->bus_num + 1, GFP_KERNEL);
2119 mutex_unlock(&board_lock);
2120 if (WARN(id < 0, "couldn't get idr"))
2121 return id == -ENOSPC ? -EBUSY : id;
2122 }
2123 }
8caab75f 2124 if (ctlr->bus_num < 0) {
42bdd706
LS
2125 first_dynamic = of_alias_get_highest_id("spi");
2126 if (first_dynamic < 0)
2127 first_dynamic = 0;
2128 else
2129 first_dynamic++;
2130
9a9a047a 2131 mutex_lock(&board_lock);
42bdd706
LS
2132 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2133 0, GFP_KERNEL);
9a9a047a
SM
2134 mutex_unlock(&board_lock);
2135 if (WARN(id < 0, "couldn't get idr"))
2136 return id;
2137 ctlr->bus_num = id;
8ae12a0d 2138 }
8caab75f
GU
2139 INIT_LIST_HEAD(&ctlr->queue);
2140 spin_lock_init(&ctlr->queue_lock);
2141 spin_lock_init(&ctlr->bus_lock_spinlock);
2142 mutex_init(&ctlr->bus_lock_mutex);
2143 mutex_init(&ctlr->io_mutex);
2144 ctlr->bus_lock_flag = 0;
2145 init_completion(&ctlr->xfer_completion);
2146 if (!ctlr->max_dma_len)
2147 ctlr->max_dma_len = INT_MAX;
cf32b71e 2148
8ae12a0d
DB
2149 /* register the device, then userspace will see it.
2150 * registration fails if the bus ID is in use.
2151 */
8caab75f
GU
2152 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
2153 status = device_add(&ctlr->dev);
9b61e302
SM
2154 if (status < 0) {
2155 /* free bus id */
2156 mutex_lock(&board_lock);
2157 idr_remove(&spi_master_idr, ctlr->bus_num);
2158 mutex_unlock(&board_lock);
8ae12a0d 2159 goto done;
9b61e302
SM
2160 }
2161 dev_dbg(dev, "registered %s %s\n",
8caab75f 2162 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 2163 dev_name(&ctlr->dev));
8ae12a0d 2164
ffbbdd21 2165 /* If we're using a queued driver, start the queue */
8caab75f
GU
2166 if (ctlr->transfer)
2167 dev_info(dev, "controller is unqueued, this is deprecated\n");
ffbbdd21 2168 else {
8caab75f 2169 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 2170 if (status) {
8caab75f 2171 device_del(&ctlr->dev);
9b61e302
SM
2172 /* free bus id */
2173 mutex_lock(&board_lock);
2174 idr_remove(&spi_master_idr, ctlr->bus_num);
2175 mutex_unlock(&board_lock);
ffbbdd21
LW
2176 goto done;
2177 }
2178 }
eca2ebc7 2179 /* add statistics */
8caab75f 2180 spin_lock_init(&ctlr->statistics.lock);
ffbbdd21 2181
2b9603a0 2182 mutex_lock(&board_lock);
8caab75f 2183 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 2184 list_for_each_entry(bi, &board_list, list)
8caab75f 2185 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
2186 mutex_unlock(&board_lock);
2187
64bee4d2 2188 /* Register devices from the device tree and ACPI */
8caab75f
GU
2189 of_register_spi_devices(ctlr);
2190 acpi_register_spi_devices(ctlr);
8ae12a0d
DB
2191done:
2192 return status;
2193}
8caab75f 2194EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 2195
666d5b4c
MB
2196static void devm_spi_unregister(struct device *dev, void *res)
2197{
8caab75f 2198 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB
2199}
2200
2201/**
8caab75f
GU
2202 * devm_spi_register_controller - register managed SPI master or slave
2203 * controller
2204 * @dev: device managing SPI controller
2205 * @ctlr: initialized controller, originally from spi_alloc_master() or
2206 * spi_alloc_slave()
666d5b4c
MB
2207 * Context: can sleep
2208 *
8caab75f 2209 * Register a SPI device as with spi_register_controller() which will
68b892f1 2210 * automatically be unregistered and freed.
97d56dc6
JMC
2211 *
2212 * Return: zero on success, else a negative error code.
666d5b4c 2213 */
8caab75f
GU
2214int devm_spi_register_controller(struct device *dev,
2215 struct spi_controller *ctlr)
666d5b4c 2216{
8caab75f 2217 struct spi_controller **ptr;
666d5b4c
MB
2218 int ret;
2219
2220 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
2221 if (!ptr)
2222 return -ENOMEM;
2223
8caab75f 2224 ret = spi_register_controller(ctlr);
4b92894e 2225 if (!ret) {
8caab75f 2226 *ptr = ctlr;
666d5b4c
MB
2227 devres_add(dev, ptr);
2228 } else {
2229 devres_free(ptr);
2230 }
2231
2232 return ret;
2233}
8caab75f 2234EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 2235
34860089 2236static int __unregister(struct device *dev, void *null)
8ae12a0d 2237{
34860089 2238 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
2239 return 0;
2240}
2241
2242/**
8caab75f
GU
2243 * spi_unregister_controller - unregister SPI master or slave controller
2244 * @ctlr: the controller being unregistered
33e34dc6 2245 * Context: can sleep
8ae12a0d 2246 *
8caab75f 2247 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
2248 * only ones directly touching chip registers.
2249 *
2250 * This must be called from context that can sleep.
68b892f1
JH
2251 *
2252 * Note that this function also drops a reference to the controller.
8ae12a0d 2253 */
8caab75f 2254void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 2255{
9b61e302 2256 struct spi_controller *found;
67f7b278 2257 int id = ctlr->bus_num;
89fc9a1a
JG
2258 int dummy;
2259
9b61e302
SM
2260 /* First make sure that this controller was ever added */
2261 mutex_lock(&board_lock);
67f7b278 2262 found = idr_find(&spi_master_idr, id);
9b61e302 2263 mutex_unlock(&board_lock);
8caab75f
GU
2264 if (ctlr->queued) {
2265 if (spi_destroy_queue(ctlr))
2266 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 2267 }
2b9603a0 2268 mutex_lock(&board_lock);
8caab75f 2269 list_del(&ctlr->list);
2b9603a0
FT
2270 mutex_unlock(&board_lock);
2271
8caab75f
GU
2272 dummy = device_for_each_child(&ctlr->dev, NULL, __unregister);
2273 device_unregister(&ctlr->dev);
9b61e302
SM
2274 /* free bus id */
2275 mutex_lock(&board_lock);
fcb7ce26
JN
2276 if (found == ctlr)
2277 idr_remove(&spi_master_idr, id);
9b61e302 2278 mutex_unlock(&board_lock);
8ae12a0d 2279}
8caab75f 2280EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 2281
8caab75f 2282int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW
2283{
2284 int ret;
2285
8caab75f
GU
2286 /* Basically no-ops for non-queued controllers */
2287 if (!ctlr->queued)
ffbbdd21
LW
2288 return 0;
2289
8caab75f 2290 ret = spi_stop_queue(ctlr);
ffbbdd21 2291 if (ret)
8caab75f 2292 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW
2293
2294 return ret;
2295}
8caab75f 2296EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 2297
8caab75f 2298int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW
2299{
2300 int ret;
2301
8caab75f 2302 if (!ctlr->queued)
ffbbdd21
LW
2303 return 0;
2304
8caab75f 2305 ret = spi_start_queue(ctlr);
ffbbdd21 2306 if (ret)
8caab75f 2307 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW
2308
2309 return ret;
2310}
8caab75f 2311EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 2312
8caab75f 2313static int __spi_controller_match(struct device *dev, const void *data)
5ed2c832 2314{
8caab75f 2315 struct spi_controller *ctlr;
9f3b795a 2316 const u16 *bus_num = data;
5ed2c832 2317
8caab75f
GU
2318 ctlr = container_of(dev, struct spi_controller, dev);
2319 return ctlr->bus_num == *bus_num;
5ed2c832
DY
2320}
2321
8ae12a0d
DB
2322/**
2323 * spi_busnum_to_master - look up master associated with bus_num
2324 * @bus_num: the master's bus number
33e34dc6 2325 * Context: can sleep
8ae12a0d
DB
2326 *
2327 * This call may be used with devices that are registered after
2328 * arch init time. It returns a refcounted pointer to the relevant
8caab75f 2329 * spi_controller (which the caller must release), or NULL if there is
8ae12a0d 2330 * no such master registered.
97d56dc6
JMC
2331 *
2332 * Return: the SPI master structure on success, else NULL.
8ae12a0d 2333 */
8caab75f 2334struct spi_controller *spi_busnum_to_master(u16 bus_num)
8ae12a0d 2335{
49dce689 2336 struct device *dev;
8caab75f 2337 struct spi_controller *ctlr = NULL;
5ed2c832 2338
695794ae 2339 dev = class_find_device(&spi_master_class, NULL, &bus_num,
8caab75f 2340 __spi_controller_match);
5ed2c832 2341 if (dev)
8caab75f 2342 ctlr = container_of(dev, struct spi_controller, dev);
5ed2c832 2343 /* reference got in class_find_device */
8caab75f 2344 return ctlr;
8ae12a0d
DB
2345}
2346EXPORT_SYMBOL_GPL(spi_busnum_to_master);
2347
d780c371
MS
2348/*-------------------------------------------------------------------------*/
2349
2350/* Core methods for SPI resource management */
2351
2352/**
2353 * spi_res_alloc - allocate a spi resource that is life-cycle managed
2354 * during the processing of a spi_message while using
2355 * spi_transfer_one
2356 * @spi: the spi device for which we allocate memory
2357 * @release: the release code to execute for this resource
2358 * @size: size to alloc and return
2359 * @gfp: GFP allocation flags
2360 *
2361 * Return: the pointer to the allocated data
2362 *
2363 * This may get enhanced in the future to allocate from a memory pool
8caab75f 2364 * of the @spi_device or @spi_controller to avoid repeated allocations.
d780c371
MS
2365 */
2366void *spi_res_alloc(struct spi_device *spi,
2367 spi_res_release_t release,
2368 size_t size, gfp_t gfp)
2369{
2370 struct spi_res *sres;
2371
2372 sres = kzalloc(sizeof(*sres) + size, gfp);
2373 if (!sres)
2374 return NULL;
2375
2376 INIT_LIST_HEAD(&sres->entry);
2377 sres->release = release;
2378
2379 return sres->data;
2380}
2381EXPORT_SYMBOL_GPL(spi_res_alloc);
2382
2383/**
2384 * spi_res_free - free an spi resource
2385 * @res: pointer to the custom data of a resource
2386 *
2387 */
2388void spi_res_free(void *res)
2389{
2390 struct spi_res *sres = container_of(res, struct spi_res, data);
2391
2392 if (!res)
2393 return;
2394
2395 WARN_ON(!list_empty(&sres->entry));
2396 kfree(sres);
2397}
2398EXPORT_SYMBOL_GPL(spi_res_free);
2399
2400/**
2401 * spi_res_add - add a spi_res to the spi_message
2402 * @message: the spi message
2403 * @res: the spi_resource
2404 */
2405void spi_res_add(struct spi_message *message, void *res)
2406{
2407 struct spi_res *sres = container_of(res, struct spi_res, data);
2408
2409 WARN_ON(!list_empty(&sres->entry));
2410 list_add_tail(&sres->entry, &message->resources);
2411}
2412EXPORT_SYMBOL_GPL(spi_res_add);
2413
2414/**
2415 * spi_res_release - release all spi resources for this message
8caab75f 2416 * @ctlr: the @spi_controller
d780c371
MS
2417 * @message: the @spi_message
2418 */
8caab75f 2419void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
d780c371
MS
2420{
2421 struct spi_res *res;
2422
2423 while (!list_empty(&message->resources)) {
2424 res = list_last_entry(&message->resources,
2425 struct spi_res, entry);
2426
2427 if (res->release)
8caab75f 2428 res->release(ctlr, message, res->data);
d780c371
MS
2429
2430 list_del(&res->entry);
2431
2432 kfree(res);
2433 }
2434}
2435EXPORT_SYMBOL_GPL(spi_res_release);
8ae12a0d
DB
2436
2437/*-------------------------------------------------------------------------*/
2438
523baf5a
MS
2439/* Core methods for spi_message alterations */
2440
8caab75f 2441static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
2442 struct spi_message *msg,
2443 void *res)
2444{
2445 struct spi_replaced_transfers *rxfer = res;
2446 size_t i;
2447
2448 /* call extra callback if requested */
2449 if (rxfer->release)
8caab75f 2450 rxfer->release(ctlr, msg, res);
523baf5a
MS
2451
2452 /* insert replaced transfers back into the message */
2453 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
2454
2455 /* remove the formerly inserted entries */
2456 for (i = 0; i < rxfer->inserted; i++)
2457 list_del(&rxfer->inserted_transfers[i].transfer_list);
2458}
2459
2460/**
2461 * spi_replace_transfers - replace transfers with several transfers
2462 * and register change with spi_message.resources
2463 * @msg: the spi_message we work upon
2464 * @xfer_first: the first spi_transfer we want to replace
2465 * @remove: number of transfers to remove
2466 * @insert: the number of transfers we want to insert instead
2467 * @release: extra release code necessary in some circumstances
2468 * @extradatasize: extra data to allocate (with alignment guarantees
2469 * of struct @spi_transfer)
05885397 2470 * @gfp: gfp flags
523baf5a
MS
2471 *
2472 * Returns: pointer to @spi_replaced_transfers,
2473 * PTR_ERR(...) in case of errors.
2474 */
2475struct spi_replaced_transfers *spi_replace_transfers(
2476 struct spi_message *msg,
2477 struct spi_transfer *xfer_first,
2478 size_t remove,
2479 size_t insert,
2480 spi_replaced_release_t release,
2481 size_t extradatasize,
2482 gfp_t gfp)
2483{
2484 struct spi_replaced_transfers *rxfer;
2485 struct spi_transfer *xfer;
2486 size_t i;
2487
2488 /* allocate the structure using spi_res */
2489 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
2490 insert * sizeof(struct spi_transfer)
2491 + sizeof(struct spi_replaced_transfers)
2492 + extradatasize,
2493 gfp);
2494 if (!rxfer)
2495 return ERR_PTR(-ENOMEM);
2496
2497 /* the release code to invoke before running the generic release */
2498 rxfer->release = release;
2499
2500 /* assign extradata */
2501 if (extradatasize)
2502 rxfer->extradata =
2503 &rxfer->inserted_transfers[insert];
2504
2505 /* init the replaced_transfers list */
2506 INIT_LIST_HEAD(&rxfer->replaced_transfers);
2507
2508 /* assign the list_entry after which we should reinsert
2509 * the @replaced_transfers - it may be spi_message.messages!
2510 */
2511 rxfer->replaced_after = xfer_first->transfer_list.prev;
2512
2513 /* remove the requested number of transfers */
2514 for (i = 0; i < remove; i++) {
2515 /* if the entry after replaced_after it is msg->transfers
2516 * then we have been requested to remove more transfers
2517 * than are in the list
2518 */
2519 if (rxfer->replaced_after->next == &msg->transfers) {
2520 dev_err(&msg->spi->dev,
2521 "requested to remove more spi_transfers than are available\n");
2522 /* insert replaced transfers back into the message */
2523 list_splice(&rxfer->replaced_transfers,
2524 rxfer->replaced_after);
2525
2526 /* free the spi_replace_transfer structure */
2527 spi_res_free(rxfer);
2528
2529 /* and return with an error */
2530 return ERR_PTR(-EINVAL);
2531 }
2532
2533 /* remove the entry after replaced_after from list of
2534 * transfers and add it to list of replaced_transfers
2535 */
2536 list_move_tail(rxfer->replaced_after->next,
2537 &rxfer->replaced_transfers);
2538 }
2539
2540 /* create copy of the given xfer with identical settings
2541 * based on the first transfer to get removed
2542 */
2543 for (i = 0; i < insert; i++) {
2544 /* we need to run in reverse order */
2545 xfer = &rxfer->inserted_transfers[insert - 1 - i];
2546
2547 /* copy all spi_transfer data */
2548 memcpy(xfer, xfer_first, sizeof(*xfer));
2549
2550 /* add to list */
2551 list_add(&xfer->transfer_list, rxfer->replaced_after);
2552
2553 /* clear cs_change and delay_usecs for all but the last */
2554 if (i) {
2555 xfer->cs_change = false;
2556 xfer->delay_usecs = 0;
2557 }
2558 }
2559
2560 /* set up inserted */
2561 rxfer->inserted = insert;
2562
2563 /* and register it with spi_res/spi_message */
2564 spi_res_add(msg, rxfer);
2565
2566 return rxfer;
2567}
2568EXPORT_SYMBOL_GPL(spi_replace_transfers);
2569
8caab75f 2570static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
2571 struct spi_message *msg,
2572 struct spi_transfer **xferp,
2573 size_t maxsize,
2574 gfp_t gfp)
d9f12122
MS
2575{
2576 struct spi_transfer *xfer = *xferp, *xfers;
2577 struct spi_replaced_transfers *srt;
2578 size_t offset;
2579 size_t count, i;
2580
2581 /* warn once about this fact that we are splitting a transfer */
2582 dev_warn_once(&msg->spi->dev,
7d62f51e 2583 "spi_transfer of length %i exceed max length of %zu - needed to split transfers\n",
d9f12122
MS
2584 xfer->len, maxsize);
2585
2586 /* calculate how many we have to replace */
2587 count = DIV_ROUND_UP(xfer->len, maxsize);
2588
2589 /* create replacement */
2590 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC
2591 if (IS_ERR(srt))
2592 return PTR_ERR(srt);
d9f12122
MS
2593 xfers = srt->inserted_transfers;
2594
2595 /* now handle each of those newly inserted spi_transfers
2596 * note that the replacements spi_transfers all are preset
2597 * to the same values as *xferp, so tx_buf, rx_buf and len
2598 * are all identical (as well as most others)
2599 * so we just have to fix up len and the pointers.
2600 *
2601 * this also includes support for the depreciated
2602 * spi_message.is_dma_mapped interface
2603 */
2604
2605 /* the first transfer just needs the length modified, so we
2606 * run it outside the loop
2607 */
c8dab77a 2608 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS
2609
2610 /* all the others need rx_buf/tx_buf also set */
2611 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
2612 /* update rx_buf, tx_buf and dma */
2613 if (xfers[i].rx_buf)
2614 xfers[i].rx_buf += offset;
2615 if (xfers[i].rx_dma)
2616 xfers[i].rx_dma += offset;
2617 if (xfers[i].tx_buf)
2618 xfers[i].tx_buf += offset;
2619 if (xfers[i].tx_dma)
2620 xfers[i].tx_dma += offset;
2621
2622 /* update length */
2623 xfers[i].len = min(maxsize, xfers[i].len - offset);
2624 }
2625
2626 /* we set up xferp to the last entry we have inserted,
2627 * so that we skip those already split transfers
2628 */
2629 *xferp = &xfers[count - 1];
2630
2631 /* increment statistics counters */
8caab75f 2632 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
d9f12122
MS
2633 transfers_split_maxsize);
2634 SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics,
2635 transfers_split_maxsize);
2636
2637 return 0;
2638}
2639
2640/**
2641 * spi_split_tranfers_maxsize - split spi transfers into multiple transfers
2642 * when an individual transfer exceeds a
2643 * certain size
8caab75f 2644 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
2645 * @msg: the @spi_message to transform
2646 * @maxsize: the maximum when to apply this
10f11a22 2647 * @gfp: GFP allocation flags
d9f12122
MS
2648 *
2649 * Return: status of transformation
2650 */
8caab75f 2651int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS
2652 struct spi_message *msg,
2653 size_t maxsize,
2654 gfp_t gfp)
2655{
2656 struct spi_transfer *xfer;
2657 int ret;
2658
2659 /* iterate over the transfer_list,
2660 * but note that xfer is advanced to the last transfer inserted
2661 * to avoid checking sizes again unnecessarily (also xfer does
2662 * potentiall belong to a different list by the time the
2663 * replacement has happened
2664 */
2665 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
2666 if (xfer->len > maxsize) {
8caab75f
GU
2667 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
2668 maxsize, gfp);
d9f12122
MS
2669 if (ret)
2670 return ret;
2671 }
2672 }
2673
2674 return 0;
2675}
2676EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB
2677
2678/*-------------------------------------------------------------------------*/
2679
8caab75f 2680/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
2681 * other core methods are currently defined as inline functions.
2682 */
2683
8caab75f
GU
2684static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
2685 u8 bits_per_word)
63ab645f 2686{
8caab75f 2687 if (ctlr->bits_per_word_mask) {
63ab645f
SB
2688 /* Only 32 bits fit in the mask */
2689 if (bits_per_word > 32)
2690 return -EINVAL;
8caab75f 2691 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
2692 return -EINVAL;
2693 }
2694
2695 return 0;
2696}
2697
7d077197
DB
2698/**
2699 * spi_setup - setup SPI mode and clock rate
2700 * @spi: the device whose settings are being modified
2701 * Context: can sleep, and no requests are queued to the device
2702 *
2703 * SPI protocol drivers may need to update the transfer mode if the
2704 * device doesn't work with its default. They may likewise need
2705 * to update clock rates or word sizes from initial values. This function
2706 * changes those settings, and must be called from a context that can sleep.
2707 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
2708 * effect the next time the device is selected and data is transferred to
2709 * or from it. When this function returns, the spi device is deselected.
2710 *
2711 * Note that this call will fail if the protocol driver specifies an option
2712 * that the underlying controller or its driver does not support. For
2713 * example, not all hardware supports wire transfers using nine bit words,
2714 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
2715 *
2716 * Return: zero on success, else a negative error code.
7d077197
DB
2717 */
2718int spi_setup(struct spi_device *spi)
2719{
83596fbe 2720 unsigned bad_bits, ugly_bits;
5ab8d262 2721 int status;
7d077197 2722
f477b7fb 2723 /* check mode to prevent that DUAL and QUAD set at the same time
2724 */
2725 if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) ||
2726 ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) {
2727 dev_err(&spi->dev,
2728 "setup: can not select dual and quad at the same time\n");
2729 return -EINVAL;
2730 }
2731 /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
2732 */
2733 if ((spi->mode & SPI_3WIRE) && (spi->mode &
2734 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD)))
2735 return -EINVAL;
e7db06b5 2736 /* help drivers fail *cleanly* when they need options
8caab75f 2737 * that aren't supported with their current controller
e7db06b5 2738 */
8caab75f 2739 bad_bits = spi->mode & ~spi->controller->mode_bits;
83596fbe
GU
2740 ugly_bits = bad_bits &
2741 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD);
2742 if (ugly_bits) {
2743 dev_warn(&spi->dev,
2744 "setup: ignoring unsupported mode bits %x\n",
2745 ugly_bits);
2746 spi->mode &= ~ugly_bits;
2747 bad_bits &= ~ugly_bits;
2748 }
e7db06b5 2749 if (bad_bits) {
eb288a1f 2750 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
2751 bad_bits);
2752 return -EINVAL;
2753 }
2754
7d077197
DB
2755 if (!spi->bits_per_word)
2756 spi->bits_per_word = 8;
2757
8caab75f
GU
2758 status = __spi_validate_bits_per_word(spi->controller,
2759 spi->bits_per_word);
5ab8d262
AS
2760 if (status)
2761 return status;
63ab645f 2762
052eb2d4 2763 if (!spi->max_speed_hz)
8caab75f 2764 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 2765
8caab75f
GU
2766 if (spi->controller->setup)
2767 status = spi->controller->setup(spi);
7d077197 2768
abeedb01
FCJ
2769 spi_set_cs(spi, false);
2770
5fe5f05e 2771 dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
7d077197
DB
2772 (int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
2773 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
2774 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
2775 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
2776 (spi->mode & SPI_LOOP) ? "loopback, " : "",
2777 spi->bits_per_word, spi->max_speed_hz,
2778 status);
2779
2780 return status;
2781}
2782EXPORT_SYMBOL_GPL(spi_setup);
2783
90808738 2784static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 2785{
8caab75f 2786 struct spi_controller *ctlr = spi->controller;
e6811d1d 2787 struct spi_transfer *xfer;
6ea31293 2788 int w_size;
cf32b71e 2789
24a0013a
MB
2790 if (list_empty(&message->transfers))
2791 return -EINVAL;
24a0013a 2792
cf32b71e
ES
2793 /* Half-duplex links include original MicroWire, and ones with
2794 * only one data pin like SPI_3WIRE (switches direction) or where
2795 * either MOSI or MISO is missing. They can also be caused by
2796 * software limitations.
2797 */
8caab75f
GU
2798 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
2799 (spi->mode & SPI_3WIRE)) {
2800 unsigned flags = ctlr->flags;
cf32b71e
ES
2801
2802 list_for_each_entry(xfer, &message->transfers, transfer_list) {
2803 if (xfer->rx_buf && xfer->tx_buf)
2804 return -EINVAL;
8caab75f 2805 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 2806 return -EINVAL;
8caab75f 2807 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
2808 return -EINVAL;
2809 }
2810 }
2811
e6811d1d 2812 /**
059b8ffe
LD
2813 * Set transfer bits_per_word and max speed as spi device default if
2814 * it is not set for this transfer.
f477b7fb 2815 * Set transfer tx_nbits and rx_nbits as single transfer default
2816 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
e6811d1d 2817 */
77e80588 2818 message->frame_length = 0;
e6811d1d 2819 list_for_each_entry(xfer, &message->transfers, transfer_list) {
078726ce 2820 message->frame_length += xfer->len;
e6811d1d
LD
2821 if (!xfer->bits_per_word)
2822 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
2823
2824 if (!xfer->speed_hz)
059b8ffe 2825 xfer->speed_hz = spi->max_speed_hz;
7dc9fbc3 2826 if (!xfer->speed_hz)
8caab75f 2827 xfer->speed_hz = ctlr->max_speed_hz;
a6f87fad 2828
8caab75f
GU
2829 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
2830 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 2831
8caab75f 2832 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 2833 return -EINVAL;
a2fd4f9f 2834
4d94bd21
II
2835 /*
2836 * SPI transfer length should be multiple of SPI word size
2837 * where SPI word size should be power-of-two multiple
2838 */
2839 if (xfer->bits_per_word <= 8)
2840 w_size = 1;
2841 else if (xfer->bits_per_word <= 16)
2842 w_size = 2;
2843 else
2844 w_size = 4;
2845
4d94bd21 2846 /* No partial transfers accepted */
6ea31293 2847 if (xfer->len % w_size)
4d94bd21
II
2848 return -EINVAL;
2849
8caab75f
GU
2850 if (xfer->speed_hz && ctlr->min_speed_hz &&
2851 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 2852 return -EINVAL;
f477b7fb 2853
2854 if (xfer->tx_buf && !xfer->tx_nbits)
2855 xfer->tx_nbits = SPI_NBITS_SINGLE;
2856 if (xfer->rx_buf && !xfer->rx_nbits)
2857 xfer->rx_nbits = SPI_NBITS_SINGLE;
2858 /* check transfer tx/rx_nbits:
1afd9989
GU
2859 * 1. check the value matches one of single, dual and quad
2860 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 2861 */
db90a441
SP
2862 if (xfer->tx_buf) {
2863 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
2864 xfer->tx_nbits != SPI_NBITS_DUAL &&
2865 xfer->tx_nbits != SPI_NBITS_QUAD)
2866 return -EINVAL;
2867 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
2868 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
2869 return -EINVAL;
2870 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
2871 !(spi->mode & SPI_TX_QUAD))
2872 return -EINVAL;
db90a441 2873 }
f477b7fb 2874 /* check transfer rx_nbits */
db90a441
SP
2875 if (xfer->rx_buf) {
2876 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
2877 xfer->rx_nbits != SPI_NBITS_DUAL &&
2878 xfer->rx_nbits != SPI_NBITS_QUAD)
2879 return -EINVAL;
2880 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
2881 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
2882 return -EINVAL;
2883 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
2884 !(spi->mode & SPI_RX_QUAD))
2885 return -EINVAL;
db90a441 2886 }
e6811d1d
LD
2887 }
2888
cf32b71e 2889 message->status = -EINPROGRESS;
90808738
MB
2890
2891 return 0;
2892}
2893
2894static int __spi_async(struct spi_device *spi, struct spi_message *message)
2895{
8caab75f 2896 struct spi_controller *ctlr = spi->controller;
90808738
MB
2897
2898 message->spi = spi;
2899
8caab75f 2900 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async);
eca2ebc7
MS
2901 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async);
2902
90808738
MB
2903 trace_spi_message_submit(message);
2904
8caab75f 2905 return ctlr->transfer(spi, message);
cf32b71e
ES
2906}
2907
568d0697
DB
2908/**
2909 * spi_async - asynchronous SPI transfer
2910 * @spi: device with which data will be exchanged
2911 * @message: describes the data transfers, including completion callback
2912 * Context: any (irqs may be blocked, etc)
2913 *
2914 * This call may be used in_irq and other contexts which can't sleep,
2915 * as well as from task contexts which can sleep.
2916 *
2917 * The completion callback is invoked in a context which can't sleep.
2918 * Before that invocation, the value of message->status is undefined.
2919 * When the callback is issued, message->status holds either zero (to
2920 * indicate complete success) or a negative error code. After that
2921 * callback returns, the driver which issued the transfer request may
2922 * deallocate the associated memory; it's no longer in use by any SPI
2923 * core or controller driver code.
2924 *
2925 * Note that although all messages to a spi_device are handled in
2926 * FIFO order, messages may go to different devices in other orders.
2927 * Some device might be higher priority, or have various "hard" access
2928 * time requirements, for example.
2929 *
2930 * On detection of any fault during the transfer, processing of
2931 * the entire message is aborted, and the device is deselected.
2932 * Until returning from the associated message completion callback,
2933 * no other spi_message queued to that device will be processed.
2934 * (This rule applies equally to all the synchronous transfer calls,
2935 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
2936 *
2937 * Return: zero on success, else a negative error code.
568d0697
DB
2938 */
2939int spi_async(struct spi_device *spi, struct spi_message *message)
2940{
8caab75f 2941 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
2942 int ret;
2943 unsigned long flags;
568d0697 2944
90808738
MB
2945 ret = __spi_validate(spi, message);
2946 if (ret != 0)
2947 return ret;
2948
8caab75f 2949 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 2950
8caab75f 2951 if (ctlr->bus_lock_flag)
cf32b71e
ES
2952 ret = -EBUSY;
2953 else
2954 ret = __spi_async(spi, message);
568d0697 2955
8caab75f 2956 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
2957
2958 return ret;
568d0697
DB
2959}
2960EXPORT_SYMBOL_GPL(spi_async);
2961
cf32b71e
ES
2962/**
2963 * spi_async_locked - version of spi_async with exclusive bus usage
2964 * @spi: device with which data will be exchanged
2965 * @message: describes the data transfers, including completion callback
2966 * Context: any (irqs may be blocked, etc)
2967 *
2968 * This call may be used in_irq and other contexts which can't sleep,
2969 * as well as from task contexts which can sleep.
2970 *
2971 * The completion callback is invoked in a context which can't sleep.
2972 * Before that invocation, the value of message->status is undefined.
2973 * When the callback is issued, message->status holds either zero (to
2974 * indicate complete success) or a negative error code. After that
2975 * callback returns, the driver which issued the transfer request may
2976 * deallocate the associated memory; it's no longer in use by any SPI
2977 * core or controller driver code.
2978 *
2979 * Note that although all messages to a spi_device are handled in
2980 * FIFO order, messages may go to different devices in other orders.
2981 * Some device might be higher priority, or have various "hard" access
2982 * time requirements, for example.
2983 *
2984 * On detection of any fault during the transfer, processing of
2985 * the entire message is aborted, and the device is deselected.
2986 * Until returning from the associated message completion callback,
2987 * no other spi_message queued to that device will be processed.
2988 * (This rule applies equally to all the synchronous transfer calls,
2989 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
2990 *
2991 * Return: zero on success, else a negative error code.
cf32b71e
ES
2992 */
2993int spi_async_locked(struct spi_device *spi, struct spi_message *message)
2994{
8caab75f 2995 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
2996 int ret;
2997 unsigned long flags;
2998
90808738
MB
2999 ret = __spi_validate(spi, message);
3000 if (ret != 0)
3001 return ret;
3002
8caab75f 3003 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3004
3005 ret = __spi_async(spi, message);
3006
8caab75f 3007 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3008
3009 return ret;
3010
3011}
3012EXPORT_SYMBOL_GPL(spi_async_locked);
3013
7d077197 3014
556351f1
V
3015int spi_flash_read(struct spi_device *spi,
3016 struct spi_flash_read_message *msg)
3017
3018{
8caab75f 3019 struct spi_controller *master = spi->controller;
f4502dd1 3020 struct device *rx_dev = NULL;
556351f1
V
3021 int ret;
3022
3023 if ((msg->opcode_nbits == SPI_NBITS_DUAL ||
3024 msg->addr_nbits == SPI_NBITS_DUAL) &&
3025 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3026 return -EINVAL;
3027 if ((msg->opcode_nbits == SPI_NBITS_QUAD ||
3028 msg->addr_nbits == SPI_NBITS_QUAD) &&
3029 !(spi->mode & SPI_TX_QUAD))
3030 return -EINVAL;
3031 if (msg->data_nbits == SPI_NBITS_DUAL &&
3032 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3033 return -EINVAL;
3034 if (msg->data_nbits == SPI_NBITS_QUAD &&
3035 !(spi->mode & SPI_RX_QUAD))
3036 return -EINVAL;
3037
3038 if (master->auto_runtime_pm) {
3039 ret = pm_runtime_get_sync(master->dev.parent);
3040 if (ret < 0) {
3041 dev_err(&master->dev, "Failed to power device: %d\n",
3042 ret);
3043 return ret;
3044 }
3045 }
f4502dd1 3046
556351f1 3047 mutex_lock(&master->bus_lock_mutex);
ef4d96ec 3048 mutex_lock(&master->io_mutex);
2bca3445 3049 if (master->dma_rx && master->spi_flash_can_dma(spi, msg)) {
f4502dd1
V
3050 rx_dev = master->dma_rx->device->dev;
3051 ret = spi_map_buf(master, rx_dev, &msg->rx_sg,
3052 msg->buf, msg->len,
3053 DMA_FROM_DEVICE);
3054 if (!ret)
3055 msg->cur_msg_mapped = true;
3056 }
556351f1 3057 ret = master->spi_flash_read(spi, msg);
f4502dd1
V
3058 if (msg->cur_msg_mapped)
3059 spi_unmap_buf(master, rx_dev, &msg->rx_sg,
3060 DMA_FROM_DEVICE);
ef4d96ec 3061 mutex_unlock(&master->io_mutex);
556351f1 3062 mutex_unlock(&master->bus_lock_mutex);
f4502dd1 3063
556351f1
V
3064 if (master->auto_runtime_pm)
3065 pm_runtime_put(master->dev.parent);
3066
3067 return ret;
3068}
3069EXPORT_SYMBOL_GPL(spi_flash_read);
3070
7d077197
DB
3071/*-------------------------------------------------------------------------*/
3072
8caab75f 3073/* Utility methods for SPI protocol drivers, layered on
7d077197
DB
3074 * top of the core. Some other utility methods are defined as
3075 * inline functions.
3076 */
3077
5d870c8e
AM
3078static void spi_complete(void *arg)
3079{
3080 complete(arg);
3081}
3082
ef4d96ec 3083static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
3084{
3085 DECLARE_COMPLETION_ONSTACK(done);
3086 int status;
8caab75f 3087 struct spi_controller *ctlr = spi->controller;
0461a414
MB
3088 unsigned long flags;
3089
3090 status = __spi_validate(spi, message);
3091 if (status != 0)
3092 return status;
cf32b71e
ES
3093
3094 message->complete = spi_complete;
3095 message->context = &done;
0461a414 3096 message->spi = spi;
cf32b71e 3097
8caab75f 3098 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync);
eca2ebc7
MS
3099 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync);
3100
0461a414
MB
3101 /* If we're not using the legacy transfer method then we will
3102 * try to transfer in the calling context so special case.
3103 * This code would be less tricky if we could remove the
3104 * support for driver implemented message queues.
3105 */
8caab75f
GU
3106 if (ctlr->transfer == spi_queued_transfer) {
3107 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3108
3109 trace_spi_message_submit(message);
3110
3111 status = __spi_queued_transfer(spi, message, false);
3112
8caab75f 3113 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3114 } else {
3115 status = spi_async_locked(spi, message);
3116 }
cf32b71e 3117
cf32b71e 3118 if (status == 0) {
0461a414
MB
3119 /* Push out the messages in the calling context if we
3120 * can.
3121 */
8caab75f
GU
3122 if (ctlr->transfer == spi_queued_transfer) {
3123 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
eca2ebc7
MS
3124 spi_sync_immediate);
3125 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics,
3126 spi_sync_immediate);
8caab75f 3127 __spi_pump_messages(ctlr, false);
eca2ebc7 3128 }
0461a414 3129
cf32b71e
ES
3130 wait_for_completion(&done);
3131 status = message->status;
3132 }
3133 message->context = NULL;
3134 return status;
3135}
3136
8ae12a0d
DB
3137/**
3138 * spi_sync - blocking/synchronous SPI data transfers
3139 * @spi: device with which data will be exchanged
3140 * @message: describes the data transfers
33e34dc6 3141 * Context: can sleep
8ae12a0d
DB
3142 *
3143 * This call may only be used from a context that may sleep. The sleep
3144 * is non-interruptible, and has no timeout. Low-overhead controller
3145 * drivers may DMA directly into and out of the message buffers.
3146 *
3147 * Note that the SPI device's chip select is active during the message,
3148 * and then is normally disabled between messages. Drivers for some
3149 * frequently-used devices may want to minimize costs of selecting a chip,
3150 * by leaving it selected in anticipation that the next message will go
3151 * to the same chip. (That may increase power usage.)
3152 *
0c868461
DB
3153 * Also, the caller is guaranteeing that the memory associated with the
3154 * message will not be freed before this call returns.
3155 *
97d56dc6 3156 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3157 */
3158int spi_sync(struct spi_device *spi, struct spi_message *message)
3159{
ef4d96ec
MB
3160 int ret;
3161
8caab75f 3162 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 3163 ret = __spi_sync(spi, message);
8caab75f 3164 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
3165
3166 return ret;
8ae12a0d
DB
3167}
3168EXPORT_SYMBOL_GPL(spi_sync);
3169
cf32b71e
ES
3170/**
3171 * spi_sync_locked - version of spi_sync with exclusive bus usage
3172 * @spi: device with which data will be exchanged
3173 * @message: describes the data transfers
3174 * Context: can sleep
3175 *
3176 * This call may only be used from a context that may sleep. The sleep
3177 * is non-interruptible, and has no timeout. Low-overhead controller
3178 * drivers may DMA directly into and out of the message buffers.
3179 *
3180 * This call should be used by drivers that require exclusive access to the
25985edc 3181 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
3182 * be released by a spi_bus_unlock call when the exclusive access is over.
3183 *
97d56dc6 3184 * Return: zero on success, else a negative error code.
cf32b71e
ES
3185 */
3186int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
3187{
ef4d96ec 3188 return __spi_sync(spi, message);
cf32b71e
ES
3189}
3190EXPORT_SYMBOL_GPL(spi_sync_locked);
3191
3192/**
3193 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 3194 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
3195 * Context: can sleep
3196 *
3197 * This call may only be used from a context that may sleep. The sleep
3198 * is non-interruptible, and has no timeout.
3199 *
3200 * This call should be used by drivers that require exclusive access to the
3201 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
3202 * exclusive access is over. Data transfer must be done by spi_sync_locked
3203 * and spi_async_locked calls when the SPI bus lock is held.
3204 *
97d56dc6 3205 * Return: always zero.
cf32b71e 3206 */
8caab75f 3207int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
3208{
3209 unsigned long flags;
3210
8caab75f 3211 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 3212
8caab75f
GU
3213 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
3214 ctlr->bus_lock_flag = 1;
3215 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3216
3217 /* mutex remains locked until spi_bus_unlock is called */
3218
3219 return 0;
3220}
3221EXPORT_SYMBOL_GPL(spi_bus_lock);
3222
3223/**
3224 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 3225 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
3226 * Context: can sleep
3227 *
3228 * This call may only be used from a context that may sleep. The sleep
3229 * is non-interruptible, and has no timeout.
3230 *
3231 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
3232 * call.
3233 *
97d56dc6 3234 * Return: always zero.
cf32b71e 3235 */
8caab75f 3236int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 3237{
8caab75f 3238 ctlr->bus_lock_flag = 0;
cf32b71e 3239
8caab75f 3240 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
3241
3242 return 0;
3243}
3244EXPORT_SYMBOL_GPL(spi_bus_unlock);
3245
a9948b61 3246/* portable code must never pass more than 32 bytes */
5fe5f05e 3247#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
3248
3249static u8 *buf;
3250
3251/**
3252 * spi_write_then_read - SPI synchronous write followed by read
3253 * @spi: device with which data will be exchanged
3254 * @txbuf: data to be written (need not be dma-safe)
3255 * @n_tx: size of txbuf, in bytes
27570497
JP
3256 * @rxbuf: buffer into which data will be read (need not be dma-safe)
3257 * @n_rx: size of rxbuf, in bytes
33e34dc6 3258 * Context: can sleep
8ae12a0d
DB
3259 *
3260 * This performs a half duplex MicroWire style transaction with the
3261 * device, sending txbuf and then reading rxbuf. The return value
3262 * is zero for success, else a negative errno status code.
b885244e 3263 * This call may only be used from a context that may sleep.
8ae12a0d 3264 *
0c868461 3265 * Parameters to this routine are always copied using a small buffer;
33e34dc6
DB
3266 * portable code should never use this for more than 32 bytes.
3267 * Performance-sensitive or bulk transfer code should instead use
0c868461 3268 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC
3269 *
3270 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3271 */
3272int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
3273 const void *txbuf, unsigned n_tx,
3274 void *rxbuf, unsigned n_rx)
8ae12a0d 3275{
068f4070 3276 static DEFINE_MUTEX(lock);
8ae12a0d
DB
3277
3278 int status;
3279 struct spi_message message;
bdff549e 3280 struct spi_transfer x[2];
8ae12a0d
DB
3281 u8 *local_buf;
3282
b3a223ee
MB
3283 /* Use preallocated DMA-safe buffer if we can. We can't avoid
3284 * copying here, (as a pure convenience thing), but we can
3285 * keep heap costs out of the hot path unless someone else is
3286 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 3287 */
b3a223ee 3288 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
3289 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
3290 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
3291 if (!local_buf)
3292 return -ENOMEM;
3293 } else {
3294 local_buf = buf;
3295 }
8ae12a0d 3296
8275c642 3297 spi_message_init(&message);
5fe5f05e 3298 memset(x, 0, sizeof(x));
bdff549e
DB
3299 if (n_tx) {
3300 x[0].len = n_tx;
3301 spi_message_add_tail(&x[0], &message);
3302 }
3303 if (n_rx) {
3304 x[1].len = n_rx;
3305 spi_message_add_tail(&x[1], &message);
3306 }
8275c642 3307
8ae12a0d 3308 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
3309 x[0].tx_buf = local_buf;
3310 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB
3311
3312 /* do the i/o */
8ae12a0d 3313 status = spi_sync(spi, &message);
9b938b74 3314 if (status == 0)
bdff549e 3315 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 3316
bdff549e 3317 if (x[0].tx_buf == buf)
068f4070 3318 mutex_unlock(&lock);
8ae12a0d
DB
3319 else
3320 kfree(local_buf);
3321
3322 return status;
3323}
3324EXPORT_SYMBOL_GPL(spi_write_then_read);
3325
3326/*-------------------------------------------------------------------------*/
3327
ce79d54a
PA
3328#if IS_ENABLED(CONFIG_OF_DYNAMIC)
3329static int __spi_of_device_match(struct device *dev, void *data)
3330{
3331 return dev->of_node == data;
3332}
3333
3334/* must call put_device() when done with returned spi_device device */
3335static struct spi_device *of_find_spi_device_by_node(struct device_node *node)
3336{
3337 struct device *dev = bus_find_device(&spi_bus_type, NULL, node,
3338 __spi_of_device_match);
3339 return dev ? to_spi_device(dev) : NULL;
3340}
3341
8caab75f 3342static int __spi_of_controller_match(struct device *dev, const void *data)
ce79d54a
PA
3343{
3344 return dev->of_node == data;
3345}
3346
8caab75f
GU
3347/* the spi controllers are not using spi_bus, so we find it with another way */
3348static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
3349{
3350 struct device *dev;
3351
3352 dev = class_find_device(&spi_master_class, NULL, node,
8caab75f 3353 __spi_of_controller_match);
6c364062
GU
3354 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
3355 dev = class_find_device(&spi_slave_class, NULL, node,
8caab75f 3356 __spi_of_controller_match);
ce79d54a
PA
3357 if (!dev)
3358 return NULL;
3359
3360 /* reference got in class_find_device */
8caab75f 3361 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
3362}
3363
3364static int of_spi_notify(struct notifier_block *nb, unsigned long action,
3365 void *arg)
3366{
3367 struct of_reconfig_data *rd = arg;
8caab75f 3368 struct spi_controller *ctlr;
ce79d54a
PA
3369 struct spi_device *spi;
3370
3371 switch (of_reconfig_get_state_change(action, arg)) {
3372 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
3373 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
3374 if (ctlr == NULL)
ce79d54a
PA
3375 return NOTIFY_OK; /* not for us */
3376
bd6c1644 3377 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 3378 put_device(&ctlr->dev);
bd6c1644
GU
3379 return NOTIFY_OK;
3380 }
3381
8caab75f
GU
3382 spi = of_register_spi_device(ctlr, rd->dn);
3383 put_device(&ctlr->dev);
ce79d54a
PA
3384
3385 if (IS_ERR(spi)) {
25c56c88
RH
3386 pr_err("%s: failed to create for '%pOF'\n",
3387 __func__, rd->dn);
e0af98a7 3388 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
3389 return notifier_from_errno(PTR_ERR(spi));
3390 }
3391 break;
3392
3393 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU
3394 /* already depopulated? */
3395 if (!of_node_check_flag(rd->dn, OF_POPULATED))
3396 return NOTIFY_OK;
3397
ce79d54a
PA
3398 /* find our device by node */
3399 spi = of_find_spi_device_by_node(rd->dn);
3400 if (spi == NULL)
3401 return NOTIFY_OK; /* no? not meant for us */
3402
3403 /* unregister takes one ref away */
3404 spi_unregister_device(spi);
3405
3406 /* and put the reference of the find */
3407 put_device(&spi->dev);
3408 break;
3409 }
3410
3411 return NOTIFY_OK;
3412}
3413
3414static struct notifier_block spi_of_notifier = {
3415 .notifier_call = of_spi_notify,
3416};
3417#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
3418extern struct notifier_block spi_of_notifier;
3419#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
3420
7f24467f 3421#if IS_ENABLED(CONFIG_ACPI)
8caab75f 3422static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
3423{
3424 return ACPI_COMPANION(dev->parent) == data;
3425}
3426
3427static int spi_acpi_device_match(struct device *dev, void *data)
3428{
3429 return ACPI_COMPANION(dev) == data;
3430}
3431
8caab75f 3432static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
3433{
3434 struct device *dev;
3435
3436 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 3437 spi_acpi_controller_match);
6c364062
GU
3438 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
3439 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 3440 spi_acpi_controller_match);
7f24467f
OP
3441 if (!dev)
3442 return NULL;
3443
8caab75f 3444 return container_of(dev, struct spi_controller, dev);
7f24467f
OP
3445}
3446
3447static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
3448{
3449 struct device *dev;
3450
3451 dev = bus_find_device(&spi_bus_type, NULL, adev, spi_acpi_device_match);
3452
3453 return dev ? to_spi_device(dev) : NULL;
3454}
3455
3456static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
3457 void *arg)
3458{
3459 struct acpi_device *adev = arg;
8caab75f 3460 struct spi_controller *ctlr;
7f24467f
OP
3461 struct spi_device *spi;
3462
3463 switch (value) {
3464 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU
3465 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
3466 if (!ctlr)
7f24467f
OP
3467 break;
3468
8caab75f
GU
3469 acpi_register_spi_device(ctlr, adev);
3470 put_device(&ctlr->dev);
7f24467f
OP
3471 break;
3472 case ACPI_RECONFIG_DEVICE_REMOVE:
3473 if (!acpi_device_enumerated(adev))
3474 break;
3475
3476 spi = acpi_spi_find_device_by_adev(adev);
3477 if (!spi)
3478 break;
3479
3480 spi_unregister_device(spi);
3481 put_device(&spi->dev);
3482 break;
3483 }
3484
3485 return NOTIFY_OK;
3486}
3487
3488static struct notifier_block spi_acpi_notifier = {
3489 .notifier_call = acpi_spi_notify,
3490};
3491#else
3492extern struct notifier_block spi_acpi_notifier;
3493#endif
3494
8ae12a0d
DB
3495static int __init spi_init(void)
3496{
b885244e
DB
3497 int status;
3498
e94b1766 3499 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
3500 if (!buf) {
3501 status = -ENOMEM;
3502 goto err0;
3503 }
3504
3505 status = bus_register(&spi_bus_type);
3506 if (status < 0)
3507 goto err1;
8ae12a0d 3508
b885244e
DB
3509 status = class_register(&spi_master_class);
3510 if (status < 0)
3511 goto err2;
ce79d54a 3512
6c364062
GU
3513 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
3514 status = class_register(&spi_slave_class);
3515 if (status < 0)
3516 goto err3;
3517 }
3518
5267720e 3519 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 3520 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
3521 if (IS_ENABLED(CONFIG_ACPI))
3522 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 3523
8ae12a0d 3524 return 0;
b885244e 3525
6c364062
GU
3526err3:
3527 class_unregister(&spi_master_class);
b885244e
DB
3528err2:
3529 bus_unregister(&spi_bus_type);
3530err1:
3531 kfree(buf);
3532 buf = NULL;
3533err0:
3534 return status;
8ae12a0d 3535}
b885244e 3536
8ae12a0d
DB
3537/* board_info is normally registered in arch_initcall(),
3538 * but even essential drivers wait till later
b885244e
DB
3539 *
3540 * REVISIT only boardinfo really needs static linking. the rest (device and
3541 * driver registration) _could_ be dynamically linked (modular) ... costs
3542 * include needing to have boardinfo data structures be much more public.
8ae12a0d 3543 */
673c0c00 3544postcore_initcall(spi_init);
8ae12a0d 3545