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Commit | Line | Data |
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8ae12a0d | 1 | /* |
ca632f55 | 2 | * SPI init/core code |
8ae12a0d DB |
3 | * |
4 | * Copyright (C) 2005 David Brownell | |
d57a4282 | 5 | * Copyright (C) 2008 Secret Lab Technologies Ltd. |
8ae12a0d DB |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
8ae12a0d DB |
16 | */ |
17 | ||
8ae12a0d DB |
18 | #include <linux/kernel.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/cache.h> | |
99adef31 MB |
22 | #include <linux/dma-mapping.h> |
23 | #include <linux/dmaengine.h> | |
94040828 | 24 | #include <linux/mutex.h> |
2b7a32f7 | 25 | #include <linux/of_device.h> |
d57a4282 | 26 | #include <linux/of_irq.h> |
86be408b | 27 | #include <linux/clk/clk-conf.h> |
5a0e3ad6 | 28 | #include <linux/slab.h> |
e0626e38 | 29 | #include <linux/mod_devicetable.h> |
8ae12a0d | 30 | #include <linux/spi/spi.h> |
74317984 | 31 | #include <linux/of_gpio.h> |
3ae22e8c | 32 | #include <linux/pm_runtime.h> |
f48c767c | 33 | #include <linux/pm_domain.h> |
826cf175 | 34 | #include <linux/property.h> |
025ed130 | 35 | #include <linux/export.h> |
8bd75c77 | 36 | #include <linux/sched/rt.h> |
ae7e81c0 | 37 | #include <uapi/linux/sched/types.h> |
ffbbdd21 LW |
38 | #include <linux/delay.h> |
39 | #include <linux/kthread.h> | |
64bee4d2 MW |
40 | #include <linux/ioport.h> |
41 | #include <linux/acpi.h> | |
b1b8153c | 42 | #include <linux/highmem.h> |
9b61e302 | 43 | #include <linux/idr.h> |
8a2e487e | 44 | #include <linux/platform_data/x86/apple.h> |
8ae12a0d | 45 | |
56ec1978 MB |
46 | #define CREATE_TRACE_POINTS |
47 | #include <trace/events/spi.h> | |
9b61e302 | 48 | |
46336966 BB |
49 | #include "internals.h" |
50 | ||
9b61e302 | 51 | static DEFINE_IDR(spi_master_idr); |
56ec1978 | 52 | |
8ae12a0d DB |
53 | static void spidev_release(struct device *dev) |
54 | { | |
0ffa0285 | 55 | struct spi_device *spi = to_spi_device(dev); |
8ae12a0d | 56 | |
8caab75f GU |
57 | /* spi controllers may cleanup for released devices */ |
58 | if (spi->controller->cleanup) | |
59 | spi->controller->cleanup(spi); | |
8ae12a0d | 60 | |
8caab75f | 61 | spi_controller_put(spi->controller); |
07a389fe | 62 | kfree(spi); |
8ae12a0d DB |
63 | } |
64 | ||
65 | static ssize_t | |
66 | modalias_show(struct device *dev, struct device_attribute *a, char *buf) | |
67 | { | |
68 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
69 | int len; |
70 | ||
71 | len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1); | |
72 | if (len != -ENODEV) | |
73 | return len; | |
8ae12a0d | 74 | |
d8e328b3 | 75 | return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d | 76 | } |
aa7da564 | 77 | static DEVICE_ATTR_RO(modalias); |
8ae12a0d | 78 | |
eca2ebc7 | 79 | #define SPI_STATISTICS_ATTRS(field, file) \ |
8caab75f GU |
80 | static ssize_t spi_controller_##field##_show(struct device *dev, \ |
81 | struct device_attribute *attr, \ | |
82 | char *buf) \ | |
eca2ebc7 | 83 | { \ |
8caab75f GU |
84 | struct spi_controller *ctlr = container_of(dev, \ |
85 | struct spi_controller, dev); \ | |
86 | return spi_statistics_##field##_show(&ctlr->statistics, buf); \ | |
eca2ebc7 | 87 | } \ |
8caab75f | 88 | static struct device_attribute dev_attr_spi_controller_##field = { \ |
ad25c92e | 89 | .attr = { .name = file, .mode = 0444 }, \ |
8caab75f | 90 | .show = spi_controller_##field##_show, \ |
eca2ebc7 MS |
91 | }; \ |
92 | static ssize_t spi_device_##field##_show(struct device *dev, \ | |
93 | struct device_attribute *attr, \ | |
94 | char *buf) \ | |
95 | { \ | |
d1eba93b | 96 | struct spi_device *spi = to_spi_device(dev); \ |
eca2ebc7 MS |
97 | return spi_statistics_##field##_show(&spi->statistics, buf); \ |
98 | } \ | |
99 | static struct device_attribute dev_attr_spi_device_##field = { \ | |
ad25c92e | 100 | .attr = { .name = file, .mode = 0444 }, \ |
eca2ebc7 MS |
101 | .show = spi_device_##field##_show, \ |
102 | } | |
103 | ||
104 | #define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \ | |
105 | static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \ | |
106 | char *buf) \ | |
107 | { \ | |
108 | unsigned long flags; \ | |
109 | ssize_t len; \ | |
110 | spin_lock_irqsave(&stat->lock, flags); \ | |
111 | len = sprintf(buf, format_string, stat->field); \ | |
112 | spin_unlock_irqrestore(&stat->lock, flags); \ | |
113 | return len; \ | |
114 | } \ | |
115 | SPI_STATISTICS_ATTRS(name, file) | |
116 | ||
117 | #define SPI_STATISTICS_SHOW(field, format_string) \ | |
118 | SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \ | |
119 | field, format_string) | |
120 | ||
121 | SPI_STATISTICS_SHOW(messages, "%lu"); | |
122 | SPI_STATISTICS_SHOW(transfers, "%lu"); | |
123 | SPI_STATISTICS_SHOW(errors, "%lu"); | |
124 | SPI_STATISTICS_SHOW(timedout, "%lu"); | |
125 | ||
126 | SPI_STATISTICS_SHOW(spi_sync, "%lu"); | |
127 | SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu"); | |
128 | SPI_STATISTICS_SHOW(spi_async, "%lu"); | |
129 | ||
130 | SPI_STATISTICS_SHOW(bytes, "%llu"); | |
131 | SPI_STATISTICS_SHOW(bytes_rx, "%llu"); | |
132 | SPI_STATISTICS_SHOW(bytes_tx, "%llu"); | |
133 | ||
6b7bc061 MS |
134 | #define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \ |
135 | SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \ | |
136 | "transfer_bytes_histo_" number, \ | |
137 | transfer_bytes_histo[index], "%lu") | |
138 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1"); | |
139 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3"); | |
140 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7"); | |
141 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15"); | |
142 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31"); | |
143 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63"); | |
144 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127"); | |
145 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255"); | |
146 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511"); | |
147 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023"); | |
148 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047"); | |
149 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095"); | |
150 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191"); | |
151 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383"); | |
152 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767"); | |
153 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535"); | |
154 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+"); | |
155 | ||
d9f12122 MS |
156 | SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu"); |
157 | ||
aa7da564 GKH |
158 | static struct attribute *spi_dev_attrs[] = { |
159 | &dev_attr_modalias.attr, | |
160 | NULL, | |
8ae12a0d | 161 | }; |
eca2ebc7 MS |
162 | |
163 | static const struct attribute_group spi_dev_group = { | |
164 | .attrs = spi_dev_attrs, | |
165 | }; | |
166 | ||
167 | static struct attribute *spi_device_statistics_attrs[] = { | |
168 | &dev_attr_spi_device_messages.attr, | |
169 | &dev_attr_spi_device_transfers.attr, | |
170 | &dev_attr_spi_device_errors.attr, | |
171 | &dev_attr_spi_device_timedout.attr, | |
172 | &dev_attr_spi_device_spi_sync.attr, | |
173 | &dev_attr_spi_device_spi_sync_immediate.attr, | |
174 | &dev_attr_spi_device_spi_async.attr, | |
175 | &dev_attr_spi_device_bytes.attr, | |
176 | &dev_attr_spi_device_bytes_rx.attr, | |
177 | &dev_attr_spi_device_bytes_tx.attr, | |
6b7bc061 MS |
178 | &dev_attr_spi_device_transfer_bytes_histo0.attr, |
179 | &dev_attr_spi_device_transfer_bytes_histo1.attr, | |
180 | &dev_attr_spi_device_transfer_bytes_histo2.attr, | |
181 | &dev_attr_spi_device_transfer_bytes_histo3.attr, | |
182 | &dev_attr_spi_device_transfer_bytes_histo4.attr, | |
183 | &dev_attr_spi_device_transfer_bytes_histo5.attr, | |
184 | &dev_attr_spi_device_transfer_bytes_histo6.attr, | |
185 | &dev_attr_spi_device_transfer_bytes_histo7.attr, | |
186 | &dev_attr_spi_device_transfer_bytes_histo8.attr, | |
187 | &dev_attr_spi_device_transfer_bytes_histo9.attr, | |
188 | &dev_attr_spi_device_transfer_bytes_histo10.attr, | |
189 | &dev_attr_spi_device_transfer_bytes_histo11.attr, | |
190 | &dev_attr_spi_device_transfer_bytes_histo12.attr, | |
191 | &dev_attr_spi_device_transfer_bytes_histo13.attr, | |
192 | &dev_attr_spi_device_transfer_bytes_histo14.attr, | |
193 | &dev_attr_spi_device_transfer_bytes_histo15.attr, | |
194 | &dev_attr_spi_device_transfer_bytes_histo16.attr, | |
d9f12122 | 195 | &dev_attr_spi_device_transfers_split_maxsize.attr, |
eca2ebc7 MS |
196 | NULL, |
197 | }; | |
198 | ||
199 | static const struct attribute_group spi_device_statistics_group = { | |
200 | .name = "statistics", | |
201 | .attrs = spi_device_statistics_attrs, | |
202 | }; | |
203 | ||
204 | static const struct attribute_group *spi_dev_groups[] = { | |
205 | &spi_dev_group, | |
206 | &spi_device_statistics_group, | |
207 | NULL, | |
208 | }; | |
209 | ||
8caab75f GU |
210 | static struct attribute *spi_controller_statistics_attrs[] = { |
211 | &dev_attr_spi_controller_messages.attr, | |
212 | &dev_attr_spi_controller_transfers.attr, | |
213 | &dev_attr_spi_controller_errors.attr, | |
214 | &dev_attr_spi_controller_timedout.attr, | |
215 | &dev_attr_spi_controller_spi_sync.attr, | |
216 | &dev_attr_spi_controller_spi_sync_immediate.attr, | |
217 | &dev_attr_spi_controller_spi_async.attr, | |
218 | &dev_attr_spi_controller_bytes.attr, | |
219 | &dev_attr_spi_controller_bytes_rx.attr, | |
220 | &dev_attr_spi_controller_bytes_tx.attr, | |
221 | &dev_attr_spi_controller_transfer_bytes_histo0.attr, | |
222 | &dev_attr_spi_controller_transfer_bytes_histo1.attr, | |
223 | &dev_attr_spi_controller_transfer_bytes_histo2.attr, | |
224 | &dev_attr_spi_controller_transfer_bytes_histo3.attr, | |
225 | &dev_attr_spi_controller_transfer_bytes_histo4.attr, | |
226 | &dev_attr_spi_controller_transfer_bytes_histo5.attr, | |
227 | &dev_attr_spi_controller_transfer_bytes_histo6.attr, | |
228 | &dev_attr_spi_controller_transfer_bytes_histo7.attr, | |
229 | &dev_attr_spi_controller_transfer_bytes_histo8.attr, | |
230 | &dev_attr_spi_controller_transfer_bytes_histo9.attr, | |
231 | &dev_attr_spi_controller_transfer_bytes_histo10.attr, | |
232 | &dev_attr_spi_controller_transfer_bytes_histo11.attr, | |
233 | &dev_attr_spi_controller_transfer_bytes_histo12.attr, | |
234 | &dev_attr_spi_controller_transfer_bytes_histo13.attr, | |
235 | &dev_attr_spi_controller_transfer_bytes_histo14.attr, | |
236 | &dev_attr_spi_controller_transfer_bytes_histo15.attr, | |
237 | &dev_attr_spi_controller_transfer_bytes_histo16.attr, | |
238 | &dev_attr_spi_controller_transfers_split_maxsize.attr, | |
eca2ebc7 MS |
239 | NULL, |
240 | }; | |
241 | ||
8caab75f | 242 | static const struct attribute_group spi_controller_statistics_group = { |
eca2ebc7 | 243 | .name = "statistics", |
8caab75f | 244 | .attrs = spi_controller_statistics_attrs, |
eca2ebc7 MS |
245 | }; |
246 | ||
247 | static const struct attribute_group *spi_master_groups[] = { | |
8caab75f | 248 | &spi_controller_statistics_group, |
eca2ebc7 MS |
249 | NULL, |
250 | }; | |
251 | ||
252 | void spi_statistics_add_transfer_stats(struct spi_statistics *stats, | |
253 | struct spi_transfer *xfer, | |
8caab75f | 254 | struct spi_controller *ctlr) |
eca2ebc7 MS |
255 | { |
256 | unsigned long flags; | |
6b7bc061 MS |
257 | int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1; |
258 | ||
259 | if (l2len < 0) | |
260 | l2len = 0; | |
eca2ebc7 MS |
261 | |
262 | spin_lock_irqsave(&stats->lock, flags); | |
263 | ||
264 | stats->transfers++; | |
6b7bc061 | 265 | stats->transfer_bytes_histo[l2len]++; |
eca2ebc7 MS |
266 | |
267 | stats->bytes += xfer->len; | |
268 | if ((xfer->tx_buf) && | |
8caab75f | 269 | (xfer->tx_buf != ctlr->dummy_tx)) |
eca2ebc7 MS |
270 | stats->bytes_tx += xfer->len; |
271 | if ((xfer->rx_buf) && | |
8caab75f | 272 | (xfer->rx_buf != ctlr->dummy_rx)) |
eca2ebc7 MS |
273 | stats->bytes_rx += xfer->len; |
274 | ||
275 | spin_unlock_irqrestore(&stats->lock, flags); | |
276 | } | |
277 | EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats); | |
8ae12a0d DB |
278 | |
279 | /* modalias support makes "modprobe $MODALIAS" new-style hotplug work, | |
280 | * and the sysfs version makes coldplug work too. | |
281 | */ | |
282 | ||
75368bf6 AV |
283 | static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, |
284 | const struct spi_device *sdev) | |
285 | { | |
286 | while (id->name[0]) { | |
287 | if (!strcmp(sdev->modalias, id->name)) | |
288 | return id; | |
289 | id++; | |
290 | } | |
291 | return NULL; | |
292 | } | |
293 | ||
294 | const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev) | |
295 | { | |
296 | const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver); | |
297 | ||
298 | return spi_match_id(sdrv->id_table, sdev); | |
299 | } | |
300 | EXPORT_SYMBOL_GPL(spi_get_device_id); | |
301 | ||
8ae12a0d DB |
302 | static int spi_match_device(struct device *dev, struct device_driver *drv) |
303 | { | |
304 | const struct spi_device *spi = to_spi_device(dev); | |
75368bf6 AV |
305 | const struct spi_driver *sdrv = to_spi_driver(drv); |
306 | ||
2b7a32f7 SA |
307 | /* Attempt an OF style match */ |
308 | if (of_driver_match_device(dev, drv)) | |
309 | return 1; | |
310 | ||
64bee4d2 MW |
311 | /* Then try ACPI */ |
312 | if (acpi_driver_match_device(dev, drv)) | |
313 | return 1; | |
314 | ||
75368bf6 AV |
315 | if (sdrv->id_table) |
316 | return !!spi_match_id(sdrv->id_table, spi); | |
8ae12a0d | 317 | |
35f74fca | 318 | return strcmp(spi->modalias, drv->name) == 0; |
8ae12a0d DB |
319 | } |
320 | ||
7eff2e7a | 321 | static int spi_uevent(struct device *dev, struct kobj_uevent_env *env) |
8ae12a0d DB |
322 | { |
323 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
324 | int rc; |
325 | ||
326 | rc = acpi_device_uevent_modalias(dev, env); | |
327 | if (rc != -ENODEV) | |
328 | return rc; | |
8ae12a0d | 329 | |
2856670f | 330 | return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d DB |
331 | } |
332 | ||
8ae12a0d DB |
333 | struct bus_type spi_bus_type = { |
334 | .name = "spi", | |
aa7da564 | 335 | .dev_groups = spi_dev_groups, |
8ae12a0d DB |
336 | .match = spi_match_device, |
337 | .uevent = spi_uevent, | |
8ae12a0d DB |
338 | }; |
339 | EXPORT_SYMBOL_GPL(spi_bus_type); | |
340 | ||
b885244e DB |
341 | |
342 | static int spi_drv_probe(struct device *dev) | |
343 | { | |
344 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
44af7927 | 345 | struct spi_device *spi = to_spi_device(dev); |
33cf00e5 MW |
346 | int ret; |
347 | ||
86be408b SN |
348 | ret = of_clk_set_defaults(dev->of_node, false); |
349 | if (ret) | |
350 | return ret; | |
351 | ||
44af7927 JH |
352 | if (dev->of_node) { |
353 | spi->irq = of_irq_get(dev->of_node, 0); | |
354 | if (spi->irq == -EPROBE_DEFER) | |
355 | return -EPROBE_DEFER; | |
356 | if (spi->irq < 0) | |
357 | spi->irq = 0; | |
358 | } | |
359 | ||
676e7c25 UH |
360 | ret = dev_pm_domain_attach(dev, true); |
361 | if (ret != -EPROBE_DEFER) { | |
44af7927 | 362 | ret = sdrv->probe(spi); |
676e7c25 UH |
363 | if (ret) |
364 | dev_pm_domain_detach(dev, true); | |
365 | } | |
b885244e | 366 | |
33cf00e5 | 367 | return ret; |
b885244e DB |
368 | } |
369 | ||
370 | static int spi_drv_remove(struct device *dev) | |
371 | { | |
372 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
33cf00e5 MW |
373 | int ret; |
374 | ||
aec35f4e | 375 | ret = sdrv->remove(to_spi_device(dev)); |
676e7c25 | 376 | dev_pm_domain_detach(dev, true); |
b885244e | 377 | |
33cf00e5 | 378 | return ret; |
b885244e DB |
379 | } |
380 | ||
381 | static void spi_drv_shutdown(struct device *dev) | |
382 | { | |
383 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
384 | ||
385 | sdrv->shutdown(to_spi_device(dev)); | |
386 | } | |
387 | ||
33e34dc6 | 388 | /** |
ca5d2485 | 389 | * __spi_register_driver - register a SPI driver |
88c9321d | 390 | * @owner: owner module of the driver to register |
33e34dc6 DB |
391 | * @sdrv: the driver to register |
392 | * Context: can sleep | |
97d56dc6 JMC |
393 | * |
394 | * Return: zero on success, else a negative error code. | |
33e34dc6 | 395 | */ |
ca5d2485 | 396 | int __spi_register_driver(struct module *owner, struct spi_driver *sdrv) |
b885244e | 397 | { |
ca5d2485 | 398 | sdrv->driver.owner = owner; |
b885244e DB |
399 | sdrv->driver.bus = &spi_bus_type; |
400 | if (sdrv->probe) | |
401 | sdrv->driver.probe = spi_drv_probe; | |
402 | if (sdrv->remove) | |
403 | sdrv->driver.remove = spi_drv_remove; | |
404 | if (sdrv->shutdown) | |
405 | sdrv->driver.shutdown = spi_drv_shutdown; | |
406 | return driver_register(&sdrv->driver); | |
407 | } | |
ca5d2485 | 408 | EXPORT_SYMBOL_GPL(__spi_register_driver); |
b885244e | 409 | |
8ae12a0d DB |
410 | /*-------------------------------------------------------------------------*/ |
411 | ||
412 | /* SPI devices should normally not be created by SPI device drivers; that | |
8caab75f | 413 | * would make them board-specific. Similarly with SPI controller drivers. |
8ae12a0d DB |
414 | * Device registration normally goes into like arch/.../mach.../board-YYY.c |
415 | * with other readonly (flashable) information about mainboard devices. | |
416 | */ | |
417 | ||
418 | struct boardinfo { | |
419 | struct list_head list; | |
2b9603a0 | 420 | struct spi_board_info board_info; |
8ae12a0d DB |
421 | }; |
422 | ||
423 | static LIST_HEAD(board_list); | |
8caab75f | 424 | static LIST_HEAD(spi_controller_list); |
2b9603a0 FT |
425 | |
426 | /* | |
427 | * Used to protect add/del opertion for board_info list and | |
8caab75f | 428 | * spi_controller list, and their matching process |
9a9a047a | 429 | * also used to protect object of type struct idr |
2b9603a0 | 430 | */ |
94040828 | 431 | static DEFINE_MUTEX(board_lock); |
8ae12a0d | 432 | |
dc87c98e GL |
433 | /** |
434 | * spi_alloc_device - Allocate a new SPI device | |
8caab75f | 435 | * @ctlr: Controller to which device is connected |
dc87c98e GL |
436 | * Context: can sleep |
437 | * | |
438 | * Allows a driver to allocate and initialize a spi_device without | |
439 | * registering it immediately. This allows a driver to directly | |
440 | * fill the spi_device with device parameters before calling | |
441 | * spi_add_device() on it. | |
442 | * | |
443 | * Caller is responsible to call spi_add_device() on the returned | |
8caab75f | 444 | * spi_device structure to add it to the SPI controller. If the caller |
dc87c98e GL |
445 | * needs to discard the spi_device without adding it, then it should |
446 | * call spi_dev_put() on it. | |
447 | * | |
97d56dc6 | 448 | * Return: a pointer to the new device, or NULL. |
dc87c98e | 449 | */ |
8caab75f | 450 | struct spi_device *spi_alloc_device(struct spi_controller *ctlr) |
dc87c98e GL |
451 | { |
452 | struct spi_device *spi; | |
dc87c98e | 453 | |
8caab75f | 454 | if (!spi_controller_get(ctlr)) |
dc87c98e GL |
455 | return NULL; |
456 | ||
5fe5f05e | 457 | spi = kzalloc(sizeof(*spi), GFP_KERNEL); |
dc87c98e | 458 | if (!spi) { |
8caab75f | 459 | spi_controller_put(ctlr); |
dc87c98e GL |
460 | return NULL; |
461 | } | |
462 | ||
8caab75f GU |
463 | spi->master = spi->controller = ctlr; |
464 | spi->dev.parent = &ctlr->dev; | |
dc87c98e GL |
465 | spi->dev.bus = &spi_bus_type; |
466 | spi->dev.release = spidev_release; | |
446411e1 | 467 | spi->cs_gpio = -ENOENT; |
eca2ebc7 MS |
468 | |
469 | spin_lock_init(&spi->statistics.lock); | |
470 | ||
dc87c98e GL |
471 | device_initialize(&spi->dev); |
472 | return spi; | |
473 | } | |
474 | EXPORT_SYMBOL_GPL(spi_alloc_device); | |
475 | ||
e13ac47b JN |
476 | static void spi_dev_set_name(struct spi_device *spi) |
477 | { | |
478 | struct acpi_device *adev = ACPI_COMPANION(&spi->dev); | |
479 | ||
480 | if (adev) { | |
481 | dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev)); | |
482 | return; | |
483 | } | |
484 | ||
8caab75f | 485 | dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev), |
e13ac47b JN |
486 | spi->chip_select); |
487 | } | |
488 | ||
b6fb8d3a MW |
489 | static int spi_dev_check(struct device *dev, void *data) |
490 | { | |
491 | struct spi_device *spi = to_spi_device(dev); | |
492 | struct spi_device *new_spi = data; | |
493 | ||
8caab75f | 494 | if (spi->controller == new_spi->controller && |
b6fb8d3a MW |
495 | spi->chip_select == new_spi->chip_select) |
496 | return -EBUSY; | |
497 | return 0; | |
498 | } | |
499 | ||
dc87c98e GL |
500 | /** |
501 | * spi_add_device - Add spi_device allocated with spi_alloc_device | |
502 | * @spi: spi_device to register | |
503 | * | |
504 | * Companion function to spi_alloc_device. Devices allocated with | |
505 | * spi_alloc_device can be added onto the spi bus with this function. | |
506 | * | |
97d56dc6 | 507 | * Return: 0 on success; negative errno on failure |
dc87c98e GL |
508 | */ |
509 | int spi_add_device(struct spi_device *spi) | |
510 | { | |
e48880e0 | 511 | static DEFINE_MUTEX(spi_add_lock); |
8caab75f GU |
512 | struct spi_controller *ctlr = spi->controller; |
513 | struct device *dev = ctlr->dev.parent; | |
dc87c98e GL |
514 | int status; |
515 | ||
516 | /* Chipselects are numbered 0..max; validate. */ | |
8caab75f GU |
517 | if (spi->chip_select >= ctlr->num_chipselect) { |
518 | dev_err(dev, "cs%d >= max %d\n", spi->chip_select, | |
519 | ctlr->num_chipselect); | |
dc87c98e GL |
520 | return -EINVAL; |
521 | } | |
522 | ||
523 | /* Set the bus ID string */ | |
e13ac47b | 524 | spi_dev_set_name(spi); |
e48880e0 DB |
525 | |
526 | /* We need to make sure there's no other device with this | |
527 | * chipselect **BEFORE** we call setup(), else we'll trash | |
528 | * its configuration. Lock against concurrent add() calls. | |
529 | */ | |
530 | mutex_lock(&spi_add_lock); | |
531 | ||
b6fb8d3a MW |
532 | status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check); |
533 | if (status) { | |
e48880e0 DB |
534 | dev_err(dev, "chipselect %d already in use\n", |
535 | spi->chip_select); | |
e48880e0 DB |
536 | goto done; |
537 | } | |
538 | ||
8caab75f GU |
539 | if (ctlr->cs_gpios) |
540 | spi->cs_gpio = ctlr->cs_gpios[spi->chip_select]; | |
74317984 | 541 | |
e48880e0 DB |
542 | /* Drivers may modify this initial i/o setup, but will |
543 | * normally rely on the device being setup. Devices | |
544 | * using SPI_CS_HIGH can't coexist well otherwise... | |
545 | */ | |
7d077197 | 546 | status = spi_setup(spi); |
dc87c98e | 547 | if (status < 0) { |
eb288a1f LW |
548 | dev_err(dev, "can't setup %s, status %d\n", |
549 | dev_name(&spi->dev), status); | |
e48880e0 | 550 | goto done; |
dc87c98e GL |
551 | } |
552 | ||
e48880e0 | 553 | /* Device may be bound to an active driver when this returns */ |
dc87c98e | 554 | status = device_add(&spi->dev); |
e48880e0 | 555 | if (status < 0) |
eb288a1f LW |
556 | dev_err(dev, "can't add %s, status %d\n", |
557 | dev_name(&spi->dev), status); | |
e48880e0 | 558 | else |
35f74fca | 559 | dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev)); |
dc87c98e | 560 | |
e48880e0 DB |
561 | done: |
562 | mutex_unlock(&spi_add_lock); | |
563 | return status; | |
dc87c98e GL |
564 | } |
565 | EXPORT_SYMBOL_GPL(spi_add_device); | |
8ae12a0d | 566 | |
33e34dc6 DB |
567 | /** |
568 | * spi_new_device - instantiate one new SPI device | |
8caab75f | 569 | * @ctlr: Controller to which device is connected |
33e34dc6 DB |
570 | * @chip: Describes the SPI device |
571 | * Context: can sleep | |
572 | * | |
573 | * On typical mainboards, this is purely internal; and it's not needed | |
8ae12a0d DB |
574 | * after board init creates the hard-wired devices. Some development |
575 | * platforms may not be able to use spi_register_board_info though, and | |
576 | * this is exported so that for example a USB or parport based adapter | |
577 | * driver could add devices (which it would learn about out-of-band). | |
082c8cb4 | 578 | * |
97d56dc6 | 579 | * Return: the new device, or NULL. |
8ae12a0d | 580 | */ |
8caab75f | 581 | struct spi_device *spi_new_device(struct spi_controller *ctlr, |
e9d5a461 | 582 | struct spi_board_info *chip) |
8ae12a0d DB |
583 | { |
584 | struct spi_device *proxy; | |
8ae12a0d DB |
585 | int status; |
586 | ||
082c8cb4 DB |
587 | /* NOTE: caller did any chip->bus_num checks necessary. |
588 | * | |
589 | * Also, unless we change the return value convention to use | |
590 | * error-or-pointer (not NULL-or-pointer), troubleshootability | |
591 | * suggests syslogged diagnostics are best here (ugh). | |
592 | */ | |
593 | ||
8caab75f | 594 | proxy = spi_alloc_device(ctlr); |
dc87c98e | 595 | if (!proxy) |
8ae12a0d DB |
596 | return NULL; |
597 | ||
102eb975 GL |
598 | WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias)); |
599 | ||
8ae12a0d DB |
600 | proxy->chip_select = chip->chip_select; |
601 | proxy->max_speed_hz = chip->max_speed_hz; | |
980a01c9 | 602 | proxy->mode = chip->mode; |
8ae12a0d | 603 | proxy->irq = chip->irq; |
102eb975 | 604 | strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); |
8ae12a0d DB |
605 | proxy->dev.platform_data = (void *) chip->platform_data; |
606 | proxy->controller_data = chip->controller_data; | |
607 | proxy->controller_state = NULL; | |
8ae12a0d | 608 | |
826cf175 DT |
609 | if (chip->properties) { |
610 | status = device_add_properties(&proxy->dev, chip->properties); | |
611 | if (status) { | |
8caab75f | 612 | dev_err(&ctlr->dev, |
826cf175 DT |
613 | "failed to add properties to '%s': %d\n", |
614 | chip->modalias, status); | |
615 | goto err_dev_put; | |
616 | } | |
8ae12a0d DB |
617 | } |
618 | ||
826cf175 DT |
619 | status = spi_add_device(proxy); |
620 | if (status < 0) | |
621 | goto err_remove_props; | |
622 | ||
8ae12a0d | 623 | return proxy; |
826cf175 DT |
624 | |
625 | err_remove_props: | |
626 | if (chip->properties) | |
627 | device_remove_properties(&proxy->dev); | |
628 | err_dev_put: | |
629 | spi_dev_put(proxy); | |
630 | return NULL; | |
8ae12a0d DB |
631 | } |
632 | EXPORT_SYMBOL_GPL(spi_new_device); | |
633 | ||
3b1884c2 GU |
634 | /** |
635 | * spi_unregister_device - unregister a single SPI device | |
636 | * @spi: spi_device to unregister | |
637 | * | |
638 | * Start making the passed SPI device vanish. Normally this would be handled | |
8caab75f | 639 | * by spi_unregister_controller(). |
3b1884c2 GU |
640 | */ |
641 | void spi_unregister_device(struct spi_device *spi) | |
642 | { | |
bd6c1644 GU |
643 | if (!spi) |
644 | return; | |
645 | ||
8324147f | 646 | if (spi->dev.of_node) { |
bd6c1644 | 647 | of_node_clear_flag(spi->dev.of_node, OF_POPULATED); |
8324147f JH |
648 | of_node_put(spi->dev.of_node); |
649 | } | |
7f24467f OP |
650 | if (ACPI_COMPANION(&spi->dev)) |
651 | acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev)); | |
bd6c1644 | 652 | device_unregister(&spi->dev); |
3b1884c2 GU |
653 | } |
654 | EXPORT_SYMBOL_GPL(spi_unregister_device); | |
655 | ||
8caab75f GU |
656 | static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr, |
657 | struct spi_board_info *bi) | |
2b9603a0 FT |
658 | { |
659 | struct spi_device *dev; | |
660 | ||
8caab75f | 661 | if (ctlr->bus_num != bi->bus_num) |
2b9603a0 FT |
662 | return; |
663 | ||
8caab75f | 664 | dev = spi_new_device(ctlr, bi); |
2b9603a0 | 665 | if (!dev) |
8caab75f | 666 | dev_err(ctlr->dev.parent, "can't create new device for %s\n", |
2b9603a0 FT |
667 | bi->modalias); |
668 | } | |
669 | ||
33e34dc6 DB |
670 | /** |
671 | * spi_register_board_info - register SPI devices for a given board | |
672 | * @info: array of chip descriptors | |
673 | * @n: how many descriptors are provided | |
674 | * Context: can sleep | |
675 | * | |
8ae12a0d DB |
676 | * Board-specific early init code calls this (probably during arch_initcall) |
677 | * with segments of the SPI device table. Any device nodes are created later, | |
678 | * after the relevant parent SPI controller (bus_num) is defined. We keep | |
679 | * this table of devices forever, so that reloading a controller driver will | |
680 | * not make Linux forget about these hard-wired devices. | |
681 | * | |
682 | * Other code can also call this, e.g. a particular add-on board might provide | |
683 | * SPI devices through its expansion connector, so code initializing that board | |
684 | * would naturally declare its SPI devices. | |
685 | * | |
686 | * The board info passed can safely be __initdata ... but be careful of | |
687 | * any embedded pointers (platform_data, etc), they're copied as-is. | |
826cf175 | 688 | * Device properties are deep-copied though. |
97d56dc6 JMC |
689 | * |
690 | * Return: zero on success, else a negative error code. | |
8ae12a0d | 691 | */ |
fd4a319b | 692 | int spi_register_board_info(struct spi_board_info const *info, unsigned n) |
8ae12a0d | 693 | { |
2b9603a0 FT |
694 | struct boardinfo *bi; |
695 | int i; | |
8ae12a0d | 696 | |
c7908a37 | 697 | if (!n) |
f974cf57 | 698 | return 0; |
c7908a37 | 699 | |
f9bdb7fd | 700 | bi = kcalloc(n, sizeof(*bi), GFP_KERNEL); |
8ae12a0d DB |
701 | if (!bi) |
702 | return -ENOMEM; | |
8ae12a0d | 703 | |
2b9603a0 | 704 | for (i = 0; i < n; i++, bi++, info++) { |
8caab75f | 705 | struct spi_controller *ctlr; |
8ae12a0d | 706 | |
2b9603a0 | 707 | memcpy(&bi->board_info, info, sizeof(*info)); |
826cf175 DT |
708 | if (info->properties) { |
709 | bi->board_info.properties = | |
710 | property_entries_dup(info->properties); | |
711 | if (IS_ERR(bi->board_info.properties)) | |
712 | return PTR_ERR(bi->board_info.properties); | |
713 | } | |
714 | ||
2b9603a0 FT |
715 | mutex_lock(&board_lock); |
716 | list_add_tail(&bi->list, &board_list); | |
8caab75f GU |
717 | list_for_each_entry(ctlr, &spi_controller_list, list) |
718 | spi_match_controller_to_boardinfo(ctlr, | |
719 | &bi->board_info); | |
2b9603a0 | 720 | mutex_unlock(&board_lock); |
8ae12a0d | 721 | } |
2b9603a0 FT |
722 | |
723 | return 0; | |
8ae12a0d DB |
724 | } |
725 | ||
726 | /*-------------------------------------------------------------------------*/ | |
727 | ||
b158935f MB |
728 | static void spi_set_cs(struct spi_device *spi, bool enable) |
729 | { | |
730 | if (spi->mode & SPI_CS_HIGH) | |
731 | enable = !enable; | |
732 | ||
8eee6b9d | 733 | if (gpio_is_valid(spi->cs_gpio)) { |
b158935f | 734 | gpio_set_value(spi->cs_gpio, !enable); |
8eee6b9d | 735 | /* Some SPI masters need both GPIO CS & slave_select */ |
8caab75f GU |
736 | if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && |
737 | spi->controller->set_cs) | |
738 | spi->controller->set_cs(spi, !enable); | |
739 | } else if (spi->controller->set_cs) { | |
740 | spi->controller->set_cs(spi, !enable); | |
8eee6b9d | 741 | } |
b158935f MB |
742 | } |
743 | ||
2de440f5 | 744 | #ifdef CONFIG_HAS_DMA |
46336966 BB |
745 | int spi_map_buf(struct spi_controller *ctlr, struct device *dev, |
746 | struct sg_table *sgt, void *buf, size_t len, | |
747 | enum dma_data_direction dir) | |
6ad45a27 MB |
748 | { |
749 | const bool vmalloced_buf = is_vmalloc_addr(buf); | |
df88e91b | 750 | unsigned int max_seg_size = dma_get_max_seg_size(dev); |
b1b8153c V |
751 | #ifdef CONFIG_HIGHMEM |
752 | const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE && | |
753 | (unsigned long)buf < (PKMAP_BASE + | |
754 | (LAST_PKMAP * PAGE_SIZE))); | |
755 | #else | |
756 | const bool kmap_buf = false; | |
757 | #endif | |
65598c13 AG |
758 | int desc_len; |
759 | int sgs; | |
6ad45a27 | 760 | struct page *vm_page; |
8dd4a016 | 761 | struct scatterlist *sg; |
6ad45a27 MB |
762 | void *sg_buf; |
763 | size_t min; | |
764 | int i, ret; | |
765 | ||
b1b8153c | 766 | if (vmalloced_buf || kmap_buf) { |
df88e91b | 767 | desc_len = min_t(int, max_seg_size, PAGE_SIZE); |
65598c13 | 768 | sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len); |
0569a88f | 769 | } else if (virt_addr_valid(buf)) { |
8caab75f | 770 | desc_len = min_t(int, max_seg_size, ctlr->max_dma_len); |
65598c13 | 771 | sgs = DIV_ROUND_UP(len, desc_len); |
0569a88f V |
772 | } else { |
773 | return -EINVAL; | |
65598c13 AG |
774 | } |
775 | ||
6ad45a27 MB |
776 | ret = sg_alloc_table(sgt, sgs, GFP_KERNEL); |
777 | if (ret != 0) | |
778 | return ret; | |
779 | ||
8dd4a016 | 780 | sg = &sgt->sgl[0]; |
6ad45a27 | 781 | for (i = 0; i < sgs; i++) { |
6ad45a27 | 782 | |
b1b8153c | 783 | if (vmalloced_buf || kmap_buf) { |
ce99319a MC |
784 | /* |
785 | * Next scatterlist entry size is the minimum between | |
786 | * the desc_len and the remaining buffer length that | |
787 | * fits in a page. | |
788 | */ | |
789 | min = min_t(size_t, desc_len, | |
790 | min_t(size_t, len, | |
791 | PAGE_SIZE - offset_in_page(buf))); | |
b1b8153c V |
792 | if (vmalloced_buf) |
793 | vm_page = vmalloc_to_page(buf); | |
794 | else | |
795 | vm_page = kmap_to_page(buf); | |
6ad45a27 MB |
796 | if (!vm_page) { |
797 | sg_free_table(sgt); | |
798 | return -ENOMEM; | |
799 | } | |
8dd4a016 | 800 | sg_set_page(sg, vm_page, |
c1aefbdd | 801 | min, offset_in_page(buf)); |
6ad45a27 | 802 | } else { |
65598c13 | 803 | min = min_t(size_t, len, desc_len); |
6ad45a27 | 804 | sg_buf = buf; |
8dd4a016 | 805 | sg_set_buf(sg, sg_buf, min); |
6ad45a27 MB |
806 | } |
807 | ||
6ad45a27 MB |
808 | buf += min; |
809 | len -= min; | |
8dd4a016 | 810 | sg = sg_next(sg); |
6ad45a27 MB |
811 | } |
812 | ||
813 | ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); | |
89e4b66a GU |
814 | if (!ret) |
815 | ret = -ENOMEM; | |
6ad45a27 MB |
816 | if (ret < 0) { |
817 | sg_free_table(sgt); | |
818 | return ret; | |
819 | } | |
820 | ||
821 | sgt->nents = ret; | |
822 | ||
823 | return 0; | |
824 | } | |
825 | ||
46336966 BB |
826 | void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev, |
827 | struct sg_table *sgt, enum dma_data_direction dir) | |
6ad45a27 MB |
828 | { |
829 | if (sgt->orig_nents) { | |
830 | dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir); | |
831 | sg_free_table(sgt); | |
832 | } | |
833 | } | |
834 | ||
8caab75f | 835 | static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) |
99adef31 | 836 | { |
99adef31 MB |
837 | struct device *tx_dev, *rx_dev; |
838 | struct spi_transfer *xfer; | |
6ad45a27 | 839 | int ret; |
3a2eba9b | 840 | |
8caab75f | 841 | if (!ctlr->can_dma) |
99adef31 MB |
842 | return 0; |
843 | ||
8caab75f GU |
844 | if (ctlr->dma_tx) |
845 | tx_dev = ctlr->dma_tx->device->dev; | |
c37f45b5 | 846 | else |
8caab75f | 847 | tx_dev = ctlr->dev.parent; |
c37f45b5 | 848 | |
8caab75f GU |
849 | if (ctlr->dma_rx) |
850 | rx_dev = ctlr->dma_rx->device->dev; | |
c37f45b5 | 851 | else |
8caab75f | 852 | rx_dev = ctlr->dev.parent; |
99adef31 MB |
853 | |
854 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 855 | if (!ctlr->can_dma(ctlr, msg->spi, xfer)) |
99adef31 MB |
856 | continue; |
857 | ||
858 | if (xfer->tx_buf != NULL) { | |
8caab75f | 859 | ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg, |
6ad45a27 MB |
860 | (void *)xfer->tx_buf, xfer->len, |
861 | DMA_TO_DEVICE); | |
862 | if (ret != 0) | |
863 | return ret; | |
99adef31 MB |
864 | } |
865 | ||
866 | if (xfer->rx_buf != NULL) { | |
8caab75f | 867 | ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg, |
6ad45a27 MB |
868 | xfer->rx_buf, xfer->len, |
869 | DMA_FROM_DEVICE); | |
870 | if (ret != 0) { | |
8caab75f | 871 | spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, |
6ad45a27 MB |
872 | DMA_TO_DEVICE); |
873 | return ret; | |
99adef31 MB |
874 | } |
875 | } | |
876 | } | |
877 | ||
8caab75f | 878 | ctlr->cur_msg_mapped = true; |
99adef31 MB |
879 | |
880 | return 0; | |
881 | } | |
882 | ||
8caab75f | 883 | static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg) |
99adef31 MB |
884 | { |
885 | struct spi_transfer *xfer; | |
886 | struct device *tx_dev, *rx_dev; | |
887 | ||
8caab75f | 888 | if (!ctlr->cur_msg_mapped || !ctlr->can_dma) |
99adef31 MB |
889 | return 0; |
890 | ||
8caab75f GU |
891 | if (ctlr->dma_tx) |
892 | tx_dev = ctlr->dma_tx->device->dev; | |
c37f45b5 | 893 | else |
8caab75f | 894 | tx_dev = ctlr->dev.parent; |
c37f45b5 | 895 | |
8caab75f GU |
896 | if (ctlr->dma_rx) |
897 | rx_dev = ctlr->dma_rx->device->dev; | |
c37f45b5 | 898 | else |
8caab75f | 899 | rx_dev = ctlr->dev.parent; |
99adef31 MB |
900 | |
901 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 902 | if (!ctlr->can_dma(ctlr, msg->spi, xfer)) |
99adef31 MB |
903 | continue; |
904 | ||
8caab75f GU |
905 | spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE); |
906 | spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE); | |
99adef31 MB |
907 | } |
908 | ||
909 | return 0; | |
910 | } | |
2de440f5 | 911 | #else /* !CONFIG_HAS_DMA */ |
8caab75f | 912 | static inline int __spi_map_msg(struct spi_controller *ctlr, |
2de440f5 GU |
913 | struct spi_message *msg) |
914 | { | |
915 | return 0; | |
916 | } | |
917 | ||
8caab75f | 918 | static inline int __spi_unmap_msg(struct spi_controller *ctlr, |
4b786458 | 919 | struct spi_message *msg) |
2de440f5 GU |
920 | { |
921 | return 0; | |
922 | } | |
923 | #endif /* !CONFIG_HAS_DMA */ | |
924 | ||
8caab75f | 925 | static inline int spi_unmap_msg(struct spi_controller *ctlr, |
4b786458 MS |
926 | struct spi_message *msg) |
927 | { | |
928 | struct spi_transfer *xfer; | |
929 | ||
930 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
931 | /* | |
932 | * Restore the original value of tx_buf or rx_buf if they are | |
933 | * NULL. | |
934 | */ | |
8caab75f | 935 | if (xfer->tx_buf == ctlr->dummy_tx) |
4b786458 | 936 | xfer->tx_buf = NULL; |
8caab75f | 937 | if (xfer->rx_buf == ctlr->dummy_rx) |
4b786458 MS |
938 | xfer->rx_buf = NULL; |
939 | } | |
940 | ||
8caab75f | 941 | return __spi_unmap_msg(ctlr, msg); |
4b786458 MS |
942 | } |
943 | ||
8caab75f | 944 | static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) |
2de440f5 GU |
945 | { |
946 | struct spi_transfer *xfer; | |
947 | void *tmp; | |
948 | unsigned int max_tx, max_rx; | |
949 | ||
8caab75f | 950 | if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) { |
2de440f5 GU |
951 | max_tx = 0; |
952 | max_rx = 0; | |
953 | ||
954 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 955 | if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) && |
2de440f5 GU |
956 | !xfer->tx_buf) |
957 | max_tx = max(xfer->len, max_tx); | |
8caab75f | 958 | if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) && |
2de440f5 GU |
959 | !xfer->rx_buf) |
960 | max_rx = max(xfer->len, max_rx); | |
961 | } | |
962 | ||
963 | if (max_tx) { | |
8caab75f | 964 | tmp = krealloc(ctlr->dummy_tx, max_tx, |
2de440f5 GU |
965 | GFP_KERNEL | GFP_DMA); |
966 | if (!tmp) | |
967 | return -ENOMEM; | |
8caab75f | 968 | ctlr->dummy_tx = tmp; |
2de440f5 GU |
969 | memset(tmp, 0, max_tx); |
970 | } | |
971 | ||
972 | if (max_rx) { | |
8caab75f | 973 | tmp = krealloc(ctlr->dummy_rx, max_rx, |
2de440f5 GU |
974 | GFP_KERNEL | GFP_DMA); |
975 | if (!tmp) | |
976 | return -ENOMEM; | |
8caab75f | 977 | ctlr->dummy_rx = tmp; |
2de440f5 GU |
978 | } |
979 | ||
980 | if (max_tx || max_rx) { | |
981 | list_for_each_entry(xfer, &msg->transfers, | |
982 | transfer_list) { | |
983 | if (!xfer->tx_buf) | |
8caab75f | 984 | xfer->tx_buf = ctlr->dummy_tx; |
2de440f5 | 985 | if (!xfer->rx_buf) |
8caab75f | 986 | xfer->rx_buf = ctlr->dummy_rx; |
2de440f5 GU |
987 | } |
988 | } | |
989 | } | |
990 | ||
8caab75f | 991 | return __spi_map_msg(ctlr, msg); |
2de440f5 | 992 | } |
99adef31 | 993 | |
b158935f MB |
994 | /* |
995 | * spi_transfer_one_message - Default implementation of transfer_one_message() | |
996 | * | |
997 | * This is a standard implementation of transfer_one_message() for | |
8ba811a7 | 998 | * drivers which implement a transfer_one() operation. It provides |
b158935f MB |
999 | * standard handling of delays and chip select management. |
1000 | */ | |
8caab75f | 1001 | static int spi_transfer_one_message(struct spi_controller *ctlr, |
b158935f MB |
1002 | struct spi_message *msg) |
1003 | { | |
1004 | struct spi_transfer *xfer; | |
b158935f MB |
1005 | bool keep_cs = false; |
1006 | int ret = 0; | |
d0716dde | 1007 | unsigned long long ms = 1; |
8caab75f | 1008 | struct spi_statistics *statm = &ctlr->statistics; |
eca2ebc7 | 1009 | struct spi_statistics *stats = &msg->spi->statistics; |
b158935f MB |
1010 | |
1011 | spi_set_cs(msg->spi, true); | |
1012 | ||
eca2ebc7 MS |
1013 | SPI_STATISTICS_INCREMENT_FIELD(statm, messages); |
1014 | SPI_STATISTICS_INCREMENT_FIELD(stats, messages); | |
1015 | ||
b158935f MB |
1016 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { |
1017 | trace_spi_transfer_start(msg, xfer); | |
1018 | ||
8caab75f GU |
1019 | spi_statistics_add_transfer_stats(statm, xfer, ctlr); |
1020 | spi_statistics_add_transfer_stats(stats, xfer, ctlr); | |
eca2ebc7 | 1021 | |
38ec10f6 | 1022 | if (xfer->tx_buf || xfer->rx_buf) { |
8caab75f | 1023 | reinit_completion(&ctlr->xfer_completion); |
b158935f | 1024 | |
8caab75f | 1025 | ret = ctlr->transfer_one(ctlr, msg->spi, xfer); |
38ec10f6 | 1026 | if (ret < 0) { |
eca2ebc7 MS |
1027 | SPI_STATISTICS_INCREMENT_FIELD(statm, |
1028 | errors); | |
1029 | SPI_STATISTICS_INCREMENT_FIELD(stats, | |
1030 | errors); | |
38ec10f6 MB |
1031 | dev_err(&msg->spi->dev, |
1032 | "SPI transfer failed: %d\n", ret); | |
1033 | goto out; | |
1034 | } | |
b158935f | 1035 | |
38ec10f6 MB |
1036 | if (ret > 0) { |
1037 | ret = 0; | |
d0716dde SW |
1038 | ms = 8LL * 1000LL * xfer->len; |
1039 | do_div(ms, xfer->speed_hz); | |
833bfade | 1040 | ms += ms + 200; /* some tolerance */ |
16a0ce4e | 1041 | |
d0716dde SW |
1042 | if (ms > UINT_MAX) |
1043 | ms = UINT_MAX; | |
1044 | ||
8caab75f | 1045 | ms = wait_for_completion_timeout(&ctlr->xfer_completion, |
38ec10f6 MB |
1046 | msecs_to_jiffies(ms)); |
1047 | } | |
16a0ce4e | 1048 | |
38ec10f6 | 1049 | if (ms == 0) { |
eca2ebc7 MS |
1050 | SPI_STATISTICS_INCREMENT_FIELD(statm, |
1051 | timedout); | |
1052 | SPI_STATISTICS_INCREMENT_FIELD(stats, | |
1053 | timedout); | |
38ec10f6 MB |
1054 | dev_err(&msg->spi->dev, |
1055 | "SPI transfer timed out\n"); | |
1056 | msg->status = -ETIMEDOUT; | |
1057 | } | |
1058 | } else { | |
1059 | if (xfer->len) | |
1060 | dev_err(&msg->spi->dev, | |
1061 | "Bufferless transfer has length %u\n", | |
1062 | xfer->len); | |
13a42798 | 1063 | } |
b158935f MB |
1064 | |
1065 | trace_spi_transfer_stop(msg, xfer); | |
1066 | ||
1067 | if (msg->status != -EINPROGRESS) | |
1068 | goto out; | |
1069 | ||
8244bd3a DK |
1070 | if (xfer->delay_usecs) { |
1071 | u16 us = xfer->delay_usecs; | |
1072 | ||
1073 | if (us <= 10) | |
1074 | udelay(us); | |
1075 | else | |
1076 | usleep_range(us, us + DIV_ROUND_UP(us, 10)); | |
1077 | } | |
b158935f MB |
1078 | |
1079 | if (xfer->cs_change) { | |
1080 | if (list_is_last(&xfer->transfer_list, | |
1081 | &msg->transfers)) { | |
1082 | keep_cs = true; | |
1083 | } else { | |
0b73aa63 MB |
1084 | spi_set_cs(msg->spi, false); |
1085 | udelay(10); | |
1086 | spi_set_cs(msg->spi, true); | |
b158935f MB |
1087 | } |
1088 | } | |
1089 | ||
1090 | msg->actual_length += xfer->len; | |
1091 | } | |
1092 | ||
1093 | out: | |
1094 | if (ret != 0 || !keep_cs) | |
1095 | spi_set_cs(msg->spi, false); | |
1096 | ||
1097 | if (msg->status == -EINPROGRESS) | |
1098 | msg->status = ret; | |
1099 | ||
8caab75f GU |
1100 | if (msg->status && ctlr->handle_err) |
1101 | ctlr->handle_err(ctlr, msg); | |
b716c4ff | 1102 | |
8caab75f | 1103 | spi_res_release(ctlr, msg); |
d780c371 | 1104 | |
8caab75f | 1105 | spi_finalize_current_message(ctlr); |
b158935f MB |
1106 | |
1107 | return ret; | |
1108 | } | |
1109 | ||
1110 | /** | |
1111 | * spi_finalize_current_transfer - report completion of a transfer | |
8caab75f | 1112 | * @ctlr: the controller reporting completion |
b158935f MB |
1113 | * |
1114 | * Called by SPI drivers using the core transfer_one_message() | |
1115 | * implementation to notify it that the current interrupt driven | |
9e8f4882 | 1116 | * transfer has finished and the next one may be scheduled. |
b158935f | 1117 | */ |
8caab75f | 1118 | void spi_finalize_current_transfer(struct spi_controller *ctlr) |
b158935f | 1119 | { |
8caab75f | 1120 | complete(&ctlr->xfer_completion); |
b158935f MB |
1121 | } |
1122 | EXPORT_SYMBOL_GPL(spi_finalize_current_transfer); | |
1123 | ||
ffbbdd21 | 1124 | /** |
fc9e0f71 | 1125 | * __spi_pump_messages - function which processes spi message queue |
8caab75f | 1126 | * @ctlr: controller to process queue for |
fc9e0f71 | 1127 | * @in_kthread: true if we are in the context of the message pump thread |
ffbbdd21 LW |
1128 | * |
1129 | * This function checks if there is any spi message in the queue that | |
1130 | * needs processing and if so call out to the driver to initialize hardware | |
1131 | * and transfer each message. | |
1132 | * | |
0461a414 MB |
1133 | * Note that it is called both from the kthread itself and also from |
1134 | * inside spi_sync(); the queue extraction handling at the top of the | |
1135 | * function should deal with this safely. | |
ffbbdd21 | 1136 | */ |
8caab75f | 1137 | static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread) |
ffbbdd21 | 1138 | { |
ffbbdd21 LW |
1139 | unsigned long flags; |
1140 | bool was_busy = false; | |
1141 | int ret; | |
1142 | ||
983aee5d | 1143 | /* Lock queue */ |
8caab75f | 1144 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
983aee5d MB |
1145 | |
1146 | /* Make sure we are not already running a message */ | |
8caab75f GU |
1147 | if (ctlr->cur_msg) { |
1148 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
983aee5d MB |
1149 | return; |
1150 | } | |
1151 | ||
0461a414 | 1152 | /* If another context is idling the device then defer */ |
8caab75f GU |
1153 | if (ctlr->idling) { |
1154 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
1155 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
0461a414 MB |
1156 | return; |
1157 | } | |
1158 | ||
983aee5d | 1159 | /* Check if the queue is idle */ |
8caab75f GU |
1160 | if (list_empty(&ctlr->queue) || !ctlr->running) { |
1161 | if (!ctlr->busy) { | |
1162 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
b0b36b86 | 1163 | return; |
ffbbdd21 | 1164 | } |
fc9e0f71 MB |
1165 | |
1166 | /* Only do teardown in the thread */ | |
1167 | if (!in_kthread) { | |
8caab75f GU |
1168 | kthread_queue_work(&ctlr->kworker, |
1169 | &ctlr->pump_messages); | |
1170 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
fc9e0f71 MB |
1171 | return; |
1172 | } | |
1173 | ||
8caab75f GU |
1174 | ctlr->busy = false; |
1175 | ctlr->idling = true; | |
1176 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
1177 | ||
1178 | kfree(ctlr->dummy_rx); | |
1179 | ctlr->dummy_rx = NULL; | |
1180 | kfree(ctlr->dummy_tx); | |
1181 | ctlr->dummy_tx = NULL; | |
1182 | if (ctlr->unprepare_transfer_hardware && | |
1183 | ctlr->unprepare_transfer_hardware(ctlr)) | |
1184 | dev_err(&ctlr->dev, | |
b0b36b86 | 1185 | "failed to unprepare transfer hardware\n"); |
8caab75f GU |
1186 | if (ctlr->auto_runtime_pm) { |
1187 | pm_runtime_mark_last_busy(ctlr->dev.parent); | |
1188 | pm_runtime_put_autosuspend(ctlr->dev.parent); | |
49834de2 | 1189 | } |
8caab75f | 1190 | trace_spi_controller_idle(ctlr); |
ffbbdd21 | 1191 | |
8caab75f GU |
1192 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1193 | ctlr->idling = false; | |
1194 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1195 | return; |
1196 | } | |
ffbbdd21 | 1197 | |
ffbbdd21 | 1198 | /* Extract head of queue */ |
8caab75f GU |
1199 | ctlr->cur_msg = |
1200 | list_first_entry(&ctlr->queue, struct spi_message, queue); | |
ffbbdd21 | 1201 | |
8caab75f GU |
1202 | list_del_init(&ctlr->cur_msg->queue); |
1203 | if (ctlr->busy) | |
ffbbdd21 LW |
1204 | was_busy = true; |
1205 | else | |
8caab75f GU |
1206 | ctlr->busy = true; |
1207 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1208 | |
8caab75f | 1209 | mutex_lock(&ctlr->io_mutex); |
ef4d96ec | 1210 | |
8caab75f GU |
1211 | if (!was_busy && ctlr->auto_runtime_pm) { |
1212 | ret = pm_runtime_get_sync(ctlr->dev.parent); | |
49834de2 | 1213 | if (ret < 0) { |
8caab75f | 1214 | dev_err(&ctlr->dev, "Failed to power device: %d\n", |
49834de2 | 1215 | ret); |
8caab75f | 1216 | mutex_unlock(&ctlr->io_mutex); |
49834de2 MB |
1217 | return; |
1218 | } | |
1219 | } | |
1220 | ||
56ec1978 | 1221 | if (!was_busy) |
8caab75f | 1222 | trace_spi_controller_busy(ctlr); |
56ec1978 | 1223 | |
8caab75f GU |
1224 | if (!was_busy && ctlr->prepare_transfer_hardware) { |
1225 | ret = ctlr->prepare_transfer_hardware(ctlr); | |
ffbbdd21 | 1226 | if (ret) { |
8caab75f | 1227 | dev_err(&ctlr->dev, |
ffbbdd21 | 1228 | "failed to prepare transfer hardware\n"); |
49834de2 | 1229 | |
8caab75f GU |
1230 | if (ctlr->auto_runtime_pm) |
1231 | pm_runtime_put(ctlr->dev.parent); | |
1232 | mutex_unlock(&ctlr->io_mutex); | |
ffbbdd21 LW |
1233 | return; |
1234 | } | |
1235 | } | |
1236 | ||
8caab75f | 1237 | trace_spi_message_start(ctlr->cur_msg); |
56ec1978 | 1238 | |
8caab75f GU |
1239 | if (ctlr->prepare_message) { |
1240 | ret = ctlr->prepare_message(ctlr, ctlr->cur_msg); | |
2841a5fc | 1241 | if (ret) { |
8caab75f GU |
1242 | dev_err(&ctlr->dev, "failed to prepare message: %d\n", |
1243 | ret); | |
1244 | ctlr->cur_msg->status = ret; | |
1245 | spi_finalize_current_message(ctlr); | |
49023d2e | 1246 | goto out; |
2841a5fc | 1247 | } |
8caab75f | 1248 | ctlr->cur_msg_prepared = true; |
2841a5fc MB |
1249 | } |
1250 | ||
8caab75f | 1251 | ret = spi_map_msg(ctlr, ctlr->cur_msg); |
99adef31 | 1252 | if (ret) { |
8caab75f GU |
1253 | ctlr->cur_msg->status = ret; |
1254 | spi_finalize_current_message(ctlr); | |
49023d2e | 1255 | goto out; |
99adef31 MB |
1256 | } |
1257 | ||
8caab75f | 1258 | ret = ctlr->transfer_one_message(ctlr, ctlr->cur_msg); |
ffbbdd21 | 1259 | if (ret) { |
8caab75f | 1260 | dev_err(&ctlr->dev, |
1f802f82 | 1261 | "failed to transfer one message from queue\n"); |
49023d2e | 1262 | goto out; |
ffbbdd21 | 1263 | } |
49023d2e JH |
1264 | |
1265 | out: | |
8caab75f | 1266 | mutex_unlock(&ctlr->io_mutex); |
62826970 MB |
1267 | |
1268 | /* Prod the scheduler in case transfer_one() was busy waiting */ | |
49023d2e JH |
1269 | if (!ret) |
1270 | cond_resched(); | |
ffbbdd21 LW |
1271 | } |
1272 | ||
fc9e0f71 MB |
1273 | /** |
1274 | * spi_pump_messages - kthread work function which processes spi message queue | |
8caab75f | 1275 | * @work: pointer to kthread work struct contained in the controller struct |
fc9e0f71 MB |
1276 | */ |
1277 | static void spi_pump_messages(struct kthread_work *work) | |
1278 | { | |
8caab75f GU |
1279 | struct spi_controller *ctlr = |
1280 | container_of(work, struct spi_controller, pump_messages); | |
fc9e0f71 | 1281 | |
8caab75f | 1282 | __spi_pump_messages(ctlr, true); |
fc9e0f71 MB |
1283 | } |
1284 | ||
8caab75f | 1285 | static int spi_init_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1286 | { |
1287 | struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 }; | |
1288 | ||
8caab75f GU |
1289 | ctlr->running = false; |
1290 | ctlr->busy = false; | |
ffbbdd21 | 1291 | |
8caab75f GU |
1292 | kthread_init_worker(&ctlr->kworker); |
1293 | ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker, | |
1294 | "%s", dev_name(&ctlr->dev)); | |
1295 | if (IS_ERR(ctlr->kworker_task)) { | |
1296 | dev_err(&ctlr->dev, "failed to create message pump task\n"); | |
1297 | return PTR_ERR(ctlr->kworker_task); | |
ffbbdd21 | 1298 | } |
8caab75f | 1299 | kthread_init_work(&ctlr->pump_messages, spi_pump_messages); |
ffbbdd21 LW |
1300 | |
1301 | /* | |
8caab75f | 1302 | * Controller config will indicate if this controller should run the |
ffbbdd21 LW |
1303 | * message pump with high (realtime) priority to reduce the transfer |
1304 | * latency on the bus by minimising the delay between a transfer | |
1305 | * request and the scheduling of the message pump thread. Without this | |
1306 | * setting the message pump thread will remain at default priority. | |
1307 | */ | |
8caab75f GU |
1308 | if (ctlr->rt) { |
1309 | dev_info(&ctlr->dev, | |
ffbbdd21 | 1310 | "will run message pump with realtime priority\n"); |
8caab75f | 1311 | sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, ¶m); |
ffbbdd21 LW |
1312 | } |
1313 | ||
1314 | return 0; | |
1315 | } | |
1316 | ||
1317 | /** | |
1318 | * spi_get_next_queued_message() - called by driver to check for queued | |
1319 | * messages | |
8caab75f | 1320 | * @ctlr: the controller to check for queued messages |
ffbbdd21 LW |
1321 | * |
1322 | * If there are more messages in the queue, the next message is returned from | |
1323 | * this call. | |
97d56dc6 JMC |
1324 | * |
1325 | * Return: the next message in the queue, else NULL if the queue is empty. | |
ffbbdd21 | 1326 | */ |
8caab75f | 1327 | struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr) |
ffbbdd21 LW |
1328 | { |
1329 | struct spi_message *next; | |
1330 | unsigned long flags; | |
1331 | ||
1332 | /* get a pointer to the next message, if any */ | |
8caab75f GU |
1333 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1334 | next = list_first_entry_or_null(&ctlr->queue, struct spi_message, | |
1cfd97f9 | 1335 | queue); |
8caab75f | 1336 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1337 | |
1338 | return next; | |
1339 | } | |
1340 | EXPORT_SYMBOL_GPL(spi_get_next_queued_message); | |
1341 | ||
1342 | /** | |
1343 | * spi_finalize_current_message() - the current message is complete | |
8caab75f | 1344 | * @ctlr: the controller to return the message to |
ffbbdd21 LW |
1345 | * |
1346 | * Called by the driver to notify the core that the message in the front of the | |
1347 | * queue is complete and can be removed from the queue. | |
1348 | */ | |
8caab75f | 1349 | void spi_finalize_current_message(struct spi_controller *ctlr) |
ffbbdd21 LW |
1350 | { |
1351 | struct spi_message *mesg; | |
1352 | unsigned long flags; | |
2841a5fc | 1353 | int ret; |
ffbbdd21 | 1354 | |
8caab75f GU |
1355 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1356 | mesg = ctlr->cur_msg; | |
1357 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1358 | |
8caab75f | 1359 | spi_unmap_msg(ctlr, mesg); |
99adef31 | 1360 | |
8caab75f GU |
1361 | if (ctlr->cur_msg_prepared && ctlr->unprepare_message) { |
1362 | ret = ctlr->unprepare_message(ctlr, mesg); | |
2841a5fc | 1363 | if (ret) { |
8caab75f GU |
1364 | dev_err(&ctlr->dev, "failed to unprepare message: %d\n", |
1365 | ret); | |
2841a5fc MB |
1366 | } |
1367 | } | |
391949b6 | 1368 | |
8caab75f GU |
1369 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1370 | ctlr->cur_msg = NULL; | |
1371 | ctlr->cur_msg_prepared = false; | |
1372 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
1373 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
8e76ef88 MS |
1374 | |
1375 | trace_spi_message_done(mesg); | |
2841a5fc | 1376 | |
ffbbdd21 LW |
1377 | mesg->state = NULL; |
1378 | if (mesg->complete) | |
1379 | mesg->complete(mesg->context); | |
1380 | } | |
1381 | EXPORT_SYMBOL_GPL(spi_finalize_current_message); | |
1382 | ||
8caab75f | 1383 | static int spi_start_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1384 | { |
1385 | unsigned long flags; | |
1386 | ||
8caab75f | 1387 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 | 1388 | |
8caab75f GU |
1389 | if (ctlr->running || ctlr->busy) { |
1390 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1391 | return -EBUSY; |
1392 | } | |
1393 | ||
8caab75f GU |
1394 | ctlr->running = true; |
1395 | ctlr->cur_msg = NULL; | |
1396 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1397 | |
8caab75f | 1398 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); |
ffbbdd21 LW |
1399 | |
1400 | return 0; | |
1401 | } | |
1402 | ||
8caab75f | 1403 | static int spi_stop_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1404 | { |
1405 | unsigned long flags; | |
1406 | unsigned limit = 500; | |
1407 | int ret = 0; | |
1408 | ||
8caab75f | 1409 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1410 | |
1411 | /* | |
1412 | * This is a bit lame, but is optimized for the common execution path. | |
8caab75f | 1413 | * A wait_queue on the ctlr->busy could be used, but then the common |
ffbbdd21 LW |
1414 | * execution path (pump_messages) would be required to call wake_up or |
1415 | * friends on every SPI message. Do this instead. | |
1416 | */ | |
8caab75f GU |
1417 | while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) { |
1418 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
f97b26b0 | 1419 | usleep_range(10000, 11000); |
8caab75f | 1420 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1421 | } |
1422 | ||
8caab75f | 1423 | if (!list_empty(&ctlr->queue) || ctlr->busy) |
ffbbdd21 LW |
1424 | ret = -EBUSY; |
1425 | else | |
8caab75f | 1426 | ctlr->running = false; |
ffbbdd21 | 1427 | |
8caab75f | 1428 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1429 | |
1430 | if (ret) { | |
8caab75f | 1431 | dev_warn(&ctlr->dev, "could not stop message queue\n"); |
ffbbdd21 LW |
1432 | return ret; |
1433 | } | |
1434 | return ret; | |
1435 | } | |
1436 | ||
8caab75f | 1437 | static int spi_destroy_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1438 | { |
1439 | int ret; | |
1440 | ||
8caab75f | 1441 | ret = spi_stop_queue(ctlr); |
ffbbdd21 LW |
1442 | |
1443 | /* | |
3989144f | 1444 | * kthread_flush_worker will block until all work is done. |
ffbbdd21 LW |
1445 | * If the reason that stop_queue timed out is that the work will never |
1446 | * finish, then it does no good to call flush/stop thread, so | |
1447 | * return anyway. | |
1448 | */ | |
1449 | if (ret) { | |
8caab75f | 1450 | dev_err(&ctlr->dev, "problem destroying queue\n"); |
ffbbdd21 LW |
1451 | return ret; |
1452 | } | |
1453 | ||
8caab75f GU |
1454 | kthread_flush_worker(&ctlr->kworker); |
1455 | kthread_stop(ctlr->kworker_task); | |
ffbbdd21 LW |
1456 | |
1457 | return 0; | |
1458 | } | |
1459 | ||
0461a414 MB |
1460 | static int __spi_queued_transfer(struct spi_device *spi, |
1461 | struct spi_message *msg, | |
1462 | bool need_pump) | |
ffbbdd21 | 1463 | { |
8caab75f | 1464 | struct spi_controller *ctlr = spi->controller; |
ffbbdd21 LW |
1465 | unsigned long flags; |
1466 | ||
8caab75f | 1467 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 | 1468 | |
8caab75f GU |
1469 | if (!ctlr->running) { |
1470 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1471 | return -ESHUTDOWN; |
1472 | } | |
1473 | msg->actual_length = 0; | |
1474 | msg->status = -EINPROGRESS; | |
1475 | ||
8caab75f GU |
1476 | list_add_tail(&msg->queue, &ctlr->queue); |
1477 | if (!ctlr->busy && need_pump) | |
1478 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
ffbbdd21 | 1479 | |
8caab75f | 1480 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1481 | return 0; |
1482 | } | |
1483 | ||
0461a414 MB |
1484 | /** |
1485 | * spi_queued_transfer - transfer function for queued transfers | |
1486 | * @spi: spi device which is requesting transfer | |
1487 | * @msg: spi message which is to handled is queued to driver queue | |
97d56dc6 JMC |
1488 | * |
1489 | * Return: zero on success, else a negative error code. | |
0461a414 MB |
1490 | */ |
1491 | static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg) | |
1492 | { | |
1493 | return __spi_queued_transfer(spi, msg, true); | |
1494 | } | |
1495 | ||
8caab75f | 1496 | static int spi_controller_initialize_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1497 | { |
1498 | int ret; | |
1499 | ||
8caab75f GU |
1500 | ctlr->transfer = spi_queued_transfer; |
1501 | if (!ctlr->transfer_one_message) | |
1502 | ctlr->transfer_one_message = spi_transfer_one_message; | |
ffbbdd21 LW |
1503 | |
1504 | /* Initialize and start queue */ | |
8caab75f | 1505 | ret = spi_init_queue(ctlr); |
ffbbdd21 | 1506 | if (ret) { |
8caab75f | 1507 | dev_err(&ctlr->dev, "problem initializing queue\n"); |
ffbbdd21 LW |
1508 | goto err_init_queue; |
1509 | } | |
8caab75f GU |
1510 | ctlr->queued = true; |
1511 | ret = spi_start_queue(ctlr); | |
ffbbdd21 | 1512 | if (ret) { |
8caab75f | 1513 | dev_err(&ctlr->dev, "problem starting queue\n"); |
ffbbdd21 LW |
1514 | goto err_start_queue; |
1515 | } | |
1516 | ||
1517 | return 0; | |
1518 | ||
1519 | err_start_queue: | |
8caab75f | 1520 | spi_destroy_queue(ctlr); |
c3676d5c | 1521 | err_init_queue: |
ffbbdd21 LW |
1522 | return ret; |
1523 | } | |
1524 | ||
988f259b BB |
1525 | /** |
1526 | * spi_flush_queue - Send all pending messages in the queue from the callers' | |
1527 | * context | |
1528 | * @ctlr: controller to process queue for | |
1529 | * | |
1530 | * This should be used when one wants to ensure all pending messages have been | |
1531 | * sent before doing something. Is used by the spi-mem code to make sure SPI | |
1532 | * memory operations do not preempt regular SPI transfers that have been queued | |
1533 | * before the spi-mem operation. | |
1534 | */ | |
1535 | void spi_flush_queue(struct spi_controller *ctlr) | |
1536 | { | |
1537 | if (ctlr->transfer == spi_queued_transfer) | |
1538 | __spi_pump_messages(ctlr, false); | |
1539 | } | |
1540 | ||
ffbbdd21 LW |
1541 | /*-------------------------------------------------------------------------*/ |
1542 | ||
7cb94361 | 1543 | #if defined(CONFIG_OF) |
8caab75f | 1544 | static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, |
c2e51ac3 | 1545 | struct device_node *nc) |
aff5e3f8 | 1546 | { |
aff5e3f8 | 1547 | u32 value; |
c2e51ac3 | 1548 | int rc; |
aff5e3f8 | 1549 | |
aff5e3f8 | 1550 | /* Mode (clock phase/polarity/etc.) */ |
e0bcb680 | 1551 | if (of_property_read_bool(nc, "spi-cpha")) |
aff5e3f8 | 1552 | spi->mode |= SPI_CPHA; |
e0bcb680 | 1553 | if (of_property_read_bool(nc, "spi-cpol")) |
aff5e3f8 | 1554 | spi->mode |= SPI_CPOL; |
e0bcb680 | 1555 | if (of_property_read_bool(nc, "spi-cs-high")) |
aff5e3f8 | 1556 | spi->mode |= SPI_CS_HIGH; |
e0bcb680 | 1557 | if (of_property_read_bool(nc, "spi-3wire")) |
aff5e3f8 | 1558 | spi->mode |= SPI_3WIRE; |
e0bcb680 | 1559 | if (of_property_read_bool(nc, "spi-lsb-first")) |
aff5e3f8 PA |
1560 | spi->mode |= SPI_LSB_FIRST; |
1561 | ||
1562 | /* Device DUAL/QUAD mode */ | |
1563 | if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) { | |
1564 | switch (value) { | |
1565 | case 1: | |
1566 | break; | |
1567 | case 2: | |
1568 | spi->mode |= SPI_TX_DUAL; | |
1569 | break; | |
1570 | case 4: | |
1571 | spi->mode |= SPI_TX_QUAD; | |
1572 | break; | |
1573 | default: | |
8caab75f | 1574 | dev_warn(&ctlr->dev, |
aff5e3f8 PA |
1575 | "spi-tx-bus-width %d not supported\n", |
1576 | value); | |
1577 | break; | |
1578 | } | |
1579 | } | |
1580 | ||
1581 | if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) { | |
1582 | switch (value) { | |
1583 | case 1: | |
1584 | break; | |
1585 | case 2: | |
1586 | spi->mode |= SPI_RX_DUAL; | |
1587 | break; | |
1588 | case 4: | |
1589 | spi->mode |= SPI_RX_QUAD; | |
1590 | break; | |
1591 | default: | |
8caab75f | 1592 | dev_warn(&ctlr->dev, |
aff5e3f8 PA |
1593 | "spi-rx-bus-width %d not supported\n", |
1594 | value); | |
1595 | break; | |
1596 | } | |
1597 | } | |
1598 | ||
8caab75f | 1599 | if (spi_controller_is_slave(ctlr)) { |
6c364062 | 1600 | if (strcmp(nc->name, "slave")) { |
25c56c88 RH |
1601 | dev_err(&ctlr->dev, "%pOF is not called 'slave'\n", |
1602 | nc); | |
6c364062 GU |
1603 | return -EINVAL; |
1604 | } | |
1605 | return 0; | |
1606 | } | |
1607 | ||
1608 | /* Device address */ | |
1609 | rc = of_property_read_u32(nc, "reg", &value); | |
1610 | if (rc) { | |
25c56c88 RH |
1611 | dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n", |
1612 | nc, rc); | |
6c364062 GU |
1613 | return rc; |
1614 | } | |
1615 | spi->chip_select = value; | |
1616 | ||
aff5e3f8 PA |
1617 | /* Device speed */ |
1618 | rc = of_property_read_u32(nc, "spi-max-frequency", &value); | |
1619 | if (rc) { | |
8caab75f | 1620 | dev_err(&ctlr->dev, |
25c56c88 | 1621 | "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc); |
c2e51ac3 | 1622 | return rc; |
aff5e3f8 PA |
1623 | } |
1624 | spi->max_speed_hz = value; | |
1625 | ||
c2e51ac3 GU |
1626 | return 0; |
1627 | } | |
1628 | ||
1629 | static struct spi_device * | |
8caab75f | 1630 | of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc) |
c2e51ac3 GU |
1631 | { |
1632 | struct spi_device *spi; | |
1633 | int rc; | |
1634 | ||
1635 | /* Alloc an spi_device */ | |
8caab75f | 1636 | spi = spi_alloc_device(ctlr); |
c2e51ac3 | 1637 | if (!spi) { |
25c56c88 | 1638 | dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc); |
c2e51ac3 GU |
1639 | rc = -ENOMEM; |
1640 | goto err_out; | |
1641 | } | |
1642 | ||
1643 | /* Select device driver */ | |
1644 | rc = of_modalias_node(nc, spi->modalias, | |
1645 | sizeof(spi->modalias)); | |
1646 | if (rc < 0) { | |
25c56c88 | 1647 | dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc); |
c2e51ac3 GU |
1648 | goto err_out; |
1649 | } | |
1650 | ||
8caab75f | 1651 | rc = of_spi_parse_dt(ctlr, spi, nc); |
c2e51ac3 GU |
1652 | if (rc) |
1653 | goto err_out; | |
1654 | ||
aff5e3f8 PA |
1655 | /* Store a pointer to the node in the device structure */ |
1656 | of_node_get(nc); | |
1657 | spi->dev.of_node = nc; | |
1658 | ||
1659 | /* Register the new device */ | |
aff5e3f8 PA |
1660 | rc = spi_add_device(spi); |
1661 | if (rc) { | |
25c56c88 | 1662 | dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc); |
8324147f | 1663 | goto err_of_node_put; |
aff5e3f8 PA |
1664 | } |
1665 | ||
1666 | return spi; | |
1667 | ||
8324147f JH |
1668 | err_of_node_put: |
1669 | of_node_put(nc); | |
aff5e3f8 PA |
1670 | err_out: |
1671 | spi_dev_put(spi); | |
1672 | return ERR_PTR(rc); | |
1673 | } | |
1674 | ||
d57a4282 GL |
1675 | /** |
1676 | * of_register_spi_devices() - Register child devices onto the SPI bus | |
8caab75f | 1677 | * @ctlr: Pointer to spi_controller device |
d57a4282 | 1678 | * |
6c364062 GU |
1679 | * Registers an spi_device for each child node of controller node which |
1680 | * represents a valid SPI slave. | |
d57a4282 | 1681 | */ |
8caab75f | 1682 | static void of_register_spi_devices(struct spi_controller *ctlr) |
d57a4282 GL |
1683 | { |
1684 | struct spi_device *spi; | |
1685 | struct device_node *nc; | |
d57a4282 | 1686 | |
8caab75f | 1687 | if (!ctlr->dev.of_node) |
d57a4282 GL |
1688 | return; |
1689 | ||
8caab75f | 1690 | for_each_available_child_of_node(ctlr->dev.of_node, nc) { |
bd6c1644 GU |
1691 | if (of_node_test_and_set_flag(nc, OF_POPULATED)) |
1692 | continue; | |
8caab75f | 1693 | spi = of_register_spi_device(ctlr, nc); |
e0af98a7 | 1694 | if (IS_ERR(spi)) { |
8caab75f | 1695 | dev_warn(&ctlr->dev, |
25c56c88 | 1696 | "Failed to create SPI device for %pOF\n", nc); |
e0af98a7 RR |
1697 | of_node_clear_flag(nc, OF_POPULATED); |
1698 | } | |
d57a4282 GL |
1699 | } |
1700 | } | |
1701 | #else | |
8caab75f | 1702 | static void of_register_spi_devices(struct spi_controller *ctlr) { } |
d57a4282 GL |
1703 | #endif |
1704 | ||
64bee4d2 | 1705 | #ifdef CONFIG_ACPI |
8a2e487e LW |
1706 | static void acpi_spi_parse_apple_properties(struct spi_device *spi) |
1707 | { | |
1708 | struct acpi_device *dev = ACPI_COMPANION(&spi->dev); | |
1709 | const union acpi_object *obj; | |
1710 | ||
1711 | if (!x86_apple_machine) | |
1712 | return; | |
1713 | ||
1714 | if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj) | |
1715 | && obj->buffer.length >= 4) | |
1716 | spi->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer; | |
1717 | ||
1718 | if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj) | |
1719 | && obj->buffer.length == 8) | |
1720 | spi->bits_per_word = *(u64 *)obj->buffer.pointer; | |
1721 | ||
1722 | if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj) | |
1723 | && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer) | |
1724 | spi->mode |= SPI_LSB_FIRST; | |
1725 | ||
1726 | if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj) | |
1727 | && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer) | |
1728 | spi->mode |= SPI_CPOL; | |
1729 | ||
1730 | if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj) | |
1731 | && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer) | |
1732 | spi->mode |= SPI_CPHA; | |
1733 | } | |
1734 | ||
64bee4d2 MW |
1735 | static int acpi_spi_add_resource(struct acpi_resource *ares, void *data) |
1736 | { | |
1737 | struct spi_device *spi = data; | |
8caab75f | 1738 | struct spi_controller *ctlr = spi->controller; |
64bee4d2 MW |
1739 | |
1740 | if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) { | |
1741 | struct acpi_resource_spi_serialbus *sb; | |
1742 | ||
1743 | sb = &ares->data.spi_serial_bus; | |
1744 | if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) { | |
a0a90718 MW |
1745 | /* |
1746 | * ACPI DeviceSelection numbering is handled by the | |
1747 | * host controller driver in Windows and can vary | |
1748 | * from driver to driver. In Linux we always expect | |
1749 | * 0 .. max - 1 so we need to ask the driver to | |
1750 | * translate between the two schemes. | |
1751 | */ | |
8caab75f GU |
1752 | if (ctlr->fw_translate_cs) { |
1753 | int cs = ctlr->fw_translate_cs(ctlr, | |
a0a90718 MW |
1754 | sb->device_selection); |
1755 | if (cs < 0) | |
1756 | return cs; | |
1757 | spi->chip_select = cs; | |
1758 | } else { | |
1759 | spi->chip_select = sb->device_selection; | |
1760 | } | |
1761 | ||
64bee4d2 MW |
1762 | spi->max_speed_hz = sb->connection_speed; |
1763 | ||
1764 | if (sb->clock_phase == ACPI_SPI_SECOND_PHASE) | |
1765 | spi->mode |= SPI_CPHA; | |
1766 | if (sb->clock_polarity == ACPI_SPI_START_HIGH) | |
1767 | spi->mode |= SPI_CPOL; | |
1768 | if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH) | |
1769 | spi->mode |= SPI_CS_HIGH; | |
1770 | } | |
1771 | } else if (spi->irq < 0) { | |
1772 | struct resource r; | |
1773 | ||
1774 | if (acpi_dev_resource_interrupt(ares, 0, &r)) | |
1775 | spi->irq = r.start; | |
1776 | } | |
1777 | ||
1778 | /* Always tell the ACPI core to skip this resource */ | |
1779 | return 1; | |
1780 | } | |
1781 | ||
8caab75f | 1782 | static acpi_status acpi_register_spi_device(struct spi_controller *ctlr, |
7f24467f | 1783 | struct acpi_device *adev) |
64bee4d2 | 1784 | { |
64bee4d2 | 1785 | struct list_head resource_list; |
64bee4d2 MW |
1786 | struct spi_device *spi; |
1787 | int ret; | |
1788 | ||
7f24467f OP |
1789 | if (acpi_bus_get_status(adev) || !adev->status.present || |
1790 | acpi_device_enumerated(adev)) | |
64bee4d2 MW |
1791 | return AE_OK; |
1792 | ||
8caab75f | 1793 | spi = spi_alloc_device(ctlr); |
64bee4d2 | 1794 | if (!spi) { |
8caab75f | 1795 | dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n", |
64bee4d2 MW |
1796 | dev_name(&adev->dev)); |
1797 | return AE_NO_MEMORY; | |
1798 | } | |
1799 | ||
7b199811 | 1800 | ACPI_COMPANION_SET(&spi->dev, adev); |
64bee4d2 MW |
1801 | spi->irq = -1; |
1802 | ||
1803 | INIT_LIST_HEAD(&resource_list); | |
1804 | ret = acpi_dev_get_resources(adev, &resource_list, | |
1805 | acpi_spi_add_resource, spi); | |
1806 | acpi_dev_free_resource_list(&resource_list); | |
1807 | ||
8a2e487e LW |
1808 | acpi_spi_parse_apple_properties(spi); |
1809 | ||
64bee4d2 MW |
1810 | if (ret < 0 || !spi->max_speed_hz) { |
1811 | spi_dev_put(spi); | |
1812 | return AE_OK; | |
1813 | } | |
1814 | ||
0c6543f6 DD |
1815 | acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias, |
1816 | sizeof(spi->modalias)); | |
1817 | ||
33ada67d CR |
1818 | if (spi->irq < 0) |
1819 | spi->irq = acpi_dev_gpio_irq_get(adev, 0); | |
1820 | ||
7f24467f OP |
1821 | acpi_device_set_enumerated(adev); |
1822 | ||
33cf00e5 | 1823 | adev->power.flags.ignore_parent = true; |
64bee4d2 | 1824 | if (spi_add_device(spi)) { |
33cf00e5 | 1825 | adev->power.flags.ignore_parent = false; |
8caab75f | 1826 | dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n", |
64bee4d2 MW |
1827 | dev_name(&adev->dev)); |
1828 | spi_dev_put(spi); | |
1829 | } | |
1830 | ||
1831 | return AE_OK; | |
1832 | } | |
1833 | ||
7f24467f OP |
1834 | static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level, |
1835 | void *data, void **return_value) | |
1836 | { | |
8caab75f | 1837 | struct spi_controller *ctlr = data; |
7f24467f OP |
1838 | struct acpi_device *adev; |
1839 | ||
1840 | if (acpi_bus_get_device(handle, &adev)) | |
1841 | return AE_OK; | |
1842 | ||
8caab75f | 1843 | return acpi_register_spi_device(ctlr, adev); |
7f24467f OP |
1844 | } |
1845 | ||
8caab75f | 1846 | static void acpi_register_spi_devices(struct spi_controller *ctlr) |
64bee4d2 MW |
1847 | { |
1848 | acpi_status status; | |
1849 | acpi_handle handle; | |
1850 | ||
8caab75f | 1851 | handle = ACPI_HANDLE(ctlr->dev.parent); |
64bee4d2 MW |
1852 | if (!handle) |
1853 | return; | |
1854 | ||
1855 | status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, | |
8caab75f | 1856 | acpi_spi_add_device, NULL, ctlr, NULL); |
64bee4d2 | 1857 | if (ACPI_FAILURE(status)) |
8caab75f | 1858 | dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n"); |
64bee4d2 MW |
1859 | } |
1860 | #else | |
8caab75f | 1861 | static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {} |
64bee4d2 MW |
1862 | #endif /* CONFIG_ACPI */ |
1863 | ||
8caab75f | 1864 | static void spi_controller_release(struct device *dev) |
8ae12a0d | 1865 | { |
8caab75f | 1866 | struct spi_controller *ctlr; |
8ae12a0d | 1867 | |
8caab75f GU |
1868 | ctlr = container_of(dev, struct spi_controller, dev); |
1869 | kfree(ctlr); | |
8ae12a0d DB |
1870 | } |
1871 | ||
1872 | static struct class spi_master_class = { | |
1873 | .name = "spi_master", | |
1874 | .owner = THIS_MODULE, | |
8caab75f | 1875 | .dev_release = spi_controller_release, |
eca2ebc7 | 1876 | .dev_groups = spi_master_groups, |
8ae12a0d DB |
1877 | }; |
1878 | ||
6c364062 GU |
1879 | #ifdef CONFIG_SPI_SLAVE |
1880 | /** | |
1881 | * spi_slave_abort - abort the ongoing transfer request on an SPI slave | |
1882 | * controller | |
1883 | * @spi: device used for the current transfer | |
1884 | */ | |
1885 | int spi_slave_abort(struct spi_device *spi) | |
1886 | { | |
8caab75f | 1887 | struct spi_controller *ctlr = spi->controller; |
6c364062 | 1888 | |
8caab75f GU |
1889 | if (spi_controller_is_slave(ctlr) && ctlr->slave_abort) |
1890 | return ctlr->slave_abort(ctlr); | |
6c364062 GU |
1891 | |
1892 | return -ENOTSUPP; | |
1893 | } | |
1894 | EXPORT_SYMBOL_GPL(spi_slave_abort); | |
1895 | ||
1896 | static int match_true(struct device *dev, void *data) | |
1897 | { | |
1898 | return 1; | |
1899 | } | |
1900 | ||
1901 | static ssize_t spi_slave_show(struct device *dev, | |
1902 | struct device_attribute *attr, char *buf) | |
1903 | { | |
8caab75f GU |
1904 | struct spi_controller *ctlr = container_of(dev, struct spi_controller, |
1905 | dev); | |
6c364062 GU |
1906 | struct device *child; |
1907 | ||
1908 | child = device_find_child(&ctlr->dev, NULL, match_true); | |
1909 | return sprintf(buf, "%s\n", | |
1910 | child ? to_spi_device(child)->modalias : NULL); | |
1911 | } | |
1912 | ||
1913 | static ssize_t spi_slave_store(struct device *dev, | |
1914 | struct device_attribute *attr, const char *buf, | |
1915 | size_t count) | |
1916 | { | |
8caab75f GU |
1917 | struct spi_controller *ctlr = container_of(dev, struct spi_controller, |
1918 | dev); | |
6c364062 GU |
1919 | struct spi_device *spi; |
1920 | struct device *child; | |
1921 | char name[32]; | |
1922 | int rc; | |
1923 | ||
1924 | rc = sscanf(buf, "%31s", name); | |
1925 | if (rc != 1 || !name[0]) | |
1926 | return -EINVAL; | |
1927 | ||
1928 | child = device_find_child(&ctlr->dev, NULL, match_true); | |
1929 | if (child) { | |
1930 | /* Remove registered slave */ | |
1931 | device_unregister(child); | |
1932 | put_device(child); | |
1933 | } | |
1934 | ||
1935 | if (strcmp(name, "(null)")) { | |
1936 | /* Register new slave */ | |
1937 | spi = spi_alloc_device(ctlr); | |
1938 | if (!spi) | |
1939 | return -ENOMEM; | |
1940 | ||
1941 | strlcpy(spi->modalias, name, sizeof(spi->modalias)); | |
1942 | ||
1943 | rc = spi_add_device(spi); | |
1944 | if (rc) { | |
1945 | spi_dev_put(spi); | |
1946 | return rc; | |
1947 | } | |
1948 | } | |
1949 | ||
1950 | return count; | |
1951 | } | |
1952 | ||
1953 | static DEVICE_ATTR(slave, 0644, spi_slave_show, spi_slave_store); | |
1954 | ||
1955 | static struct attribute *spi_slave_attrs[] = { | |
1956 | &dev_attr_slave.attr, | |
1957 | NULL, | |
1958 | }; | |
1959 | ||
1960 | static const struct attribute_group spi_slave_group = { | |
1961 | .attrs = spi_slave_attrs, | |
1962 | }; | |
1963 | ||
1964 | static const struct attribute_group *spi_slave_groups[] = { | |
8caab75f | 1965 | &spi_controller_statistics_group, |
6c364062 GU |
1966 | &spi_slave_group, |
1967 | NULL, | |
1968 | }; | |
1969 | ||
1970 | static struct class spi_slave_class = { | |
1971 | .name = "spi_slave", | |
1972 | .owner = THIS_MODULE, | |
8caab75f | 1973 | .dev_release = spi_controller_release, |
6c364062 GU |
1974 | .dev_groups = spi_slave_groups, |
1975 | }; | |
1976 | #else | |
1977 | extern struct class spi_slave_class; /* dummy */ | |
1978 | #endif | |
8ae12a0d DB |
1979 | |
1980 | /** | |
6c364062 | 1981 | * __spi_alloc_controller - allocate an SPI master or slave controller |
8ae12a0d | 1982 | * @dev: the controller, possibly using the platform_bus |
33e34dc6 | 1983 | * @size: how much zeroed driver-private data to allocate; the pointer to this |
49dce689 | 1984 | * memory is in the driver_data field of the returned device, |
8caab75f | 1985 | * accessible with spi_controller_get_devdata(). |
6c364062 GU |
1986 | * @slave: flag indicating whether to allocate an SPI master (false) or SPI |
1987 | * slave (true) controller | |
33e34dc6 | 1988 | * Context: can sleep |
8ae12a0d | 1989 | * |
6c364062 | 1990 | * This call is used only by SPI controller drivers, which are the |
8ae12a0d | 1991 | * only ones directly touching chip registers. It's how they allocate |
8caab75f | 1992 | * an spi_controller structure, prior to calling spi_register_controller(). |
8ae12a0d | 1993 | * |
97d56dc6 | 1994 | * This must be called from context that can sleep. |
8ae12a0d | 1995 | * |
6c364062 | 1996 | * The caller is responsible for assigning the bus number and initializing the |
8caab75f GU |
1997 | * controller's methods before calling spi_register_controller(); and (after |
1998 | * errors adding the device) calling spi_controller_put() to prevent a memory | |
1999 | * leak. | |
97d56dc6 | 2000 | * |
6c364062 | 2001 | * Return: the SPI controller structure on success, else NULL. |
8ae12a0d | 2002 | */ |
8caab75f GU |
2003 | struct spi_controller *__spi_alloc_controller(struct device *dev, |
2004 | unsigned int size, bool slave) | |
8ae12a0d | 2005 | { |
8caab75f | 2006 | struct spi_controller *ctlr; |
8ae12a0d | 2007 | |
0c868461 DB |
2008 | if (!dev) |
2009 | return NULL; | |
2010 | ||
8caab75f GU |
2011 | ctlr = kzalloc(size + sizeof(*ctlr), GFP_KERNEL); |
2012 | if (!ctlr) | |
8ae12a0d DB |
2013 | return NULL; |
2014 | ||
8caab75f GU |
2015 | device_initialize(&ctlr->dev); |
2016 | ctlr->bus_num = -1; | |
2017 | ctlr->num_chipselect = 1; | |
2018 | ctlr->slave = slave; | |
6c364062 | 2019 | if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave) |
8caab75f | 2020 | ctlr->dev.class = &spi_slave_class; |
6c364062 | 2021 | else |
8caab75f GU |
2022 | ctlr->dev.class = &spi_master_class; |
2023 | ctlr->dev.parent = dev; | |
2024 | pm_suspend_ignore_children(&ctlr->dev, true); | |
2025 | spi_controller_set_devdata(ctlr, &ctlr[1]); | |
8ae12a0d | 2026 | |
8caab75f | 2027 | return ctlr; |
8ae12a0d | 2028 | } |
6c364062 | 2029 | EXPORT_SYMBOL_GPL(__spi_alloc_controller); |
8ae12a0d | 2030 | |
74317984 | 2031 | #ifdef CONFIG_OF |
8caab75f | 2032 | static int of_spi_register_master(struct spi_controller *ctlr) |
74317984 | 2033 | { |
e80beb27 | 2034 | int nb, i, *cs; |
8caab75f | 2035 | struct device_node *np = ctlr->dev.of_node; |
74317984 JCPV |
2036 | |
2037 | if (!np) | |
2038 | return 0; | |
2039 | ||
2040 | nb = of_gpio_named_count(np, "cs-gpios"); | |
8caab75f | 2041 | ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); |
74317984 | 2042 | |
8ec5d84e AL |
2043 | /* Return error only for an incorrectly formed cs-gpios property */ |
2044 | if (nb == 0 || nb == -ENOENT) | |
74317984 | 2045 | return 0; |
8ec5d84e AL |
2046 | else if (nb < 0) |
2047 | return nb; | |
74317984 | 2048 | |
8caab75f | 2049 | cs = devm_kzalloc(&ctlr->dev, sizeof(int) * ctlr->num_chipselect, |
74317984 | 2050 | GFP_KERNEL); |
8caab75f | 2051 | ctlr->cs_gpios = cs; |
74317984 | 2052 | |
8caab75f | 2053 | if (!ctlr->cs_gpios) |
74317984 JCPV |
2054 | return -ENOMEM; |
2055 | ||
8caab75f | 2056 | for (i = 0; i < ctlr->num_chipselect; i++) |
446411e1 | 2057 | cs[i] = -ENOENT; |
74317984 JCPV |
2058 | |
2059 | for (i = 0; i < nb; i++) | |
2060 | cs[i] = of_get_named_gpio(np, "cs-gpios", i); | |
2061 | ||
2062 | return 0; | |
2063 | } | |
2064 | #else | |
8caab75f | 2065 | static int of_spi_register_master(struct spi_controller *ctlr) |
74317984 JCPV |
2066 | { |
2067 | return 0; | |
2068 | } | |
2069 | #endif | |
2070 | ||
bdf3a3b5 BB |
2071 | static int spi_controller_check_ops(struct spi_controller *ctlr) |
2072 | { | |
2073 | /* | |
2074 | * The controller must at least implement one of the ->transfer() | |
2075 | * hooks. | |
2076 | */ | |
2077 | if (!ctlr->transfer && !ctlr->transfer_one && | |
2078 | !ctlr->transfer_one_message) | |
2079 | return -EINVAL; | |
2080 | ||
2081 | return 0; | |
2082 | } | |
2083 | ||
8ae12a0d | 2084 | /** |
8caab75f GU |
2085 | * spi_register_controller - register SPI master or slave controller |
2086 | * @ctlr: initialized master, originally from spi_alloc_master() or | |
2087 | * spi_alloc_slave() | |
33e34dc6 | 2088 | * Context: can sleep |
8ae12a0d | 2089 | * |
8caab75f | 2090 | * SPI controllers connect to their drivers using some non-SPI bus, |
8ae12a0d | 2091 | * such as the platform bus. The final stage of probe() in that code |
8caab75f | 2092 | * includes calling spi_register_controller() to hook up to this SPI bus glue. |
8ae12a0d DB |
2093 | * |
2094 | * SPI controllers use board specific (often SOC specific) bus numbers, | |
2095 | * and board-specific addressing for SPI devices combines those numbers | |
2096 | * with chip select numbers. Since SPI does not directly support dynamic | |
2097 | * device identification, boards need configuration tables telling which | |
2098 | * chip is at which address. | |
2099 | * | |
2100 | * This must be called from context that can sleep. It returns zero on | |
8caab75f | 2101 | * success, else a negative error code (dropping the controller's refcount). |
0c868461 | 2102 | * After a successful return, the caller is responsible for calling |
8caab75f | 2103 | * spi_unregister_controller(). |
97d56dc6 JMC |
2104 | * |
2105 | * Return: zero on success, else a negative error code. | |
8ae12a0d | 2106 | */ |
8caab75f | 2107 | int spi_register_controller(struct spi_controller *ctlr) |
8ae12a0d | 2108 | { |
8caab75f | 2109 | struct device *dev = ctlr->dev.parent; |
2b9603a0 | 2110 | struct boardinfo *bi; |
8ae12a0d | 2111 | int status = -ENODEV; |
42bdd706 | 2112 | int id, first_dynamic; |
8ae12a0d | 2113 | |
0c868461 DB |
2114 | if (!dev) |
2115 | return -ENODEV; | |
2116 | ||
bdf3a3b5 BB |
2117 | /* |
2118 | * Make sure all necessary hooks are implemented before registering | |
2119 | * the SPI controller. | |
2120 | */ | |
2121 | status = spi_controller_check_ops(ctlr); | |
2122 | if (status) | |
2123 | return status; | |
2124 | ||
8caab75f GU |
2125 | if (!spi_controller_is_slave(ctlr)) { |
2126 | status = of_spi_register_master(ctlr); | |
6c364062 GU |
2127 | if (status) |
2128 | return status; | |
2129 | } | |
74317984 | 2130 | |
082c8cb4 DB |
2131 | /* even if it's just one always-selected device, there must |
2132 | * be at least one chipselect | |
2133 | */ | |
8caab75f | 2134 | if (ctlr->num_chipselect == 0) |
082c8cb4 | 2135 | return -EINVAL; |
9b61e302 SM |
2136 | /* allocate dynamic bus number using Linux idr */ |
2137 | if ((ctlr->bus_num < 0) && ctlr->dev.of_node) { | |
2138 | id = of_alias_get_id(ctlr->dev.of_node, "spi"); | |
2139 | if (id >= 0) { | |
2140 | ctlr->bus_num = id; | |
2141 | mutex_lock(&board_lock); | |
2142 | id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num, | |
2143 | ctlr->bus_num + 1, GFP_KERNEL); | |
2144 | mutex_unlock(&board_lock); | |
2145 | if (WARN(id < 0, "couldn't get idr")) | |
2146 | return id == -ENOSPC ? -EBUSY : id; | |
2147 | } | |
2148 | } | |
8caab75f | 2149 | if (ctlr->bus_num < 0) { |
42bdd706 LS |
2150 | first_dynamic = of_alias_get_highest_id("spi"); |
2151 | if (first_dynamic < 0) | |
2152 | first_dynamic = 0; | |
2153 | else | |
2154 | first_dynamic++; | |
2155 | ||
9a9a047a | 2156 | mutex_lock(&board_lock); |
42bdd706 LS |
2157 | id = idr_alloc(&spi_master_idr, ctlr, first_dynamic, |
2158 | 0, GFP_KERNEL); | |
9a9a047a SM |
2159 | mutex_unlock(&board_lock); |
2160 | if (WARN(id < 0, "couldn't get idr")) | |
2161 | return id; | |
2162 | ctlr->bus_num = id; | |
8ae12a0d | 2163 | } |
8caab75f GU |
2164 | INIT_LIST_HEAD(&ctlr->queue); |
2165 | spin_lock_init(&ctlr->queue_lock); | |
2166 | spin_lock_init(&ctlr->bus_lock_spinlock); | |
2167 | mutex_init(&ctlr->bus_lock_mutex); | |
2168 | mutex_init(&ctlr->io_mutex); | |
2169 | ctlr->bus_lock_flag = 0; | |
2170 | init_completion(&ctlr->xfer_completion); | |
2171 | if (!ctlr->max_dma_len) | |
2172 | ctlr->max_dma_len = INT_MAX; | |
cf32b71e | 2173 | |
8ae12a0d DB |
2174 | /* register the device, then userspace will see it. |
2175 | * registration fails if the bus ID is in use. | |
2176 | */ | |
8caab75f GU |
2177 | dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num); |
2178 | status = device_add(&ctlr->dev); | |
9b61e302 SM |
2179 | if (status < 0) { |
2180 | /* free bus id */ | |
2181 | mutex_lock(&board_lock); | |
2182 | idr_remove(&spi_master_idr, ctlr->bus_num); | |
2183 | mutex_unlock(&board_lock); | |
8ae12a0d | 2184 | goto done; |
9b61e302 SM |
2185 | } |
2186 | dev_dbg(dev, "registered %s %s\n", | |
8caab75f | 2187 | spi_controller_is_slave(ctlr) ? "slave" : "master", |
9b61e302 | 2188 | dev_name(&ctlr->dev)); |
8ae12a0d | 2189 | |
ffbbdd21 | 2190 | /* If we're using a queued driver, start the queue */ |
8caab75f GU |
2191 | if (ctlr->transfer) |
2192 | dev_info(dev, "controller is unqueued, this is deprecated\n"); | |
ffbbdd21 | 2193 | else { |
8caab75f | 2194 | status = spi_controller_initialize_queue(ctlr); |
ffbbdd21 | 2195 | if (status) { |
8caab75f | 2196 | device_del(&ctlr->dev); |
9b61e302 SM |
2197 | /* free bus id */ |
2198 | mutex_lock(&board_lock); | |
2199 | idr_remove(&spi_master_idr, ctlr->bus_num); | |
2200 | mutex_unlock(&board_lock); | |
ffbbdd21 LW |
2201 | goto done; |
2202 | } | |
2203 | } | |
eca2ebc7 | 2204 | /* add statistics */ |
8caab75f | 2205 | spin_lock_init(&ctlr->statistics.lock); |
ffbbdd21 | 2206 | |
2b9603a0 | 2207 | mutex_lock(&board_lock); |
8caab75f | 2208 | list_add_tail(&ctlr->list, &spi_controller_list); |
2b9603a0 | 2209 | list_for_each_entry(bi, &board_list, list) |
8caab75f | 2210 | spi_match_controller_to_boardinfo(ctlr, &bi->board_info); |
2b9603a0 FT |
2211 | mutex_unlock(&board_lock); |
2212 | ||
64bee4d2 | 2213 | /* Register devices from the device tree and ACPI */ |
8caab75f GU |
2214 | of_register_spi_devices(ctlr); |
2215 | acpi_register_spi_devices(ctlr); | |
8ae12a0d DB |
2216 | done: |
2217 | return status; | |
2218 | } | |
8caab75f | 2219 | EXPORT_SYMBOL_GPL(spi_register_controller); |
8ae12a0d | 2220 | |
666d5b4c MB |
2221 | static void devm_spi_unregister(struct device *dev, void *res) |
2222 | { | |
8caab75f | 2223 | spi_unregister_controller(*(struct spi_controller **)res); |
666d5b4c MB |
2224 | } |
2225 | ||
2226 | /** | |
8caab75f GU |
2227 | * devm_spi_register_controller - register managed SPI master or slave |
2228 | * controller | |
2229 | * @dev: device managing SPI controller | |
2230 | * @ctlr: initialized controller, originally from spi_alloc_master() or | |
2231 | * spi_alloc_slave() | |
666d5b4c MB |
2232 | * Context: can sleep |
2233 | * | |
8caab75f | 2234 | * Register a SPI device as with spi_register_controller() which will |
68b892f1 | 2235 | * automatically be unregistered and freed. |
97d56dc6 JMC |
2236 | * |
2237 | * Return: zero on success, else a negative error code. | |
666d5b4c | 2238 | */ |
8caab75f GU |
2239 | int devm_spi_register_controller(struct device *dev, |
2240 | struct spi_controller *ctlr) | |
666d5b4c | 2241 | { |
8caab75f | 2242 | struct spi_controller **ptr; |
666d5b4c MB |
2243 | int ret; |
2244 | ||
2245 | ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL); | |
2246 | if (!ptr) | |
2247 | return -ENOMEM; | |
2248 | ||
8caab75f | 2249 | ret = spi_register_controller(ctlr); |
4b92894e | 2250 | if (!ret) { |
8caab75f | 2251 | *ptr = ctlr; |
666d5b4c MB |
2252 | devres_add(dev, ptr); |
2253 | } else { | |
2254 | devres_free(ptr); | |
2255 | } | |
2256 | ||
2257 | return ret; | |
2258 | } | |
8caab75f | 2259 | EXPORT_SYMBOL_GPL(devm_spi_register_controller); |
666d5b4c | 2260 | |
34860089 | 2261 | static int __unregister(struct device *dev, void *null) |
8ae12a0d | 2262 | { |
34860089 | 2263 | spi_unregister_device(to_spi_device(dev)); |
8ae12a0d DB |
2264 | return 0; |
2265 | } | |
2266 | ||
2267 | /** | |
8caab75f GU |
2268 | * spi_unregister_controller - unregister SPI master or slave controller |
2269 | * @ctlr: the controller being unregistered | |
33e34dc6 | 2270 | * Context: can sleep |
8ae12a0d | 2271 | * |
8caab75f | 2272 | * This call is used only by SPI controller drivers, which are the |
8ae12a0d DB |
2273 | * only ones directly touching chip registers. |
2274 | * | |
2275 | * This must be called from context that can sleep. | |
68b892f1 JH |
2276 | * |
2277 | * Note that this function also drops a reference to the controller. | |
8ae12a0d | 2278 | */ |
8caab75f | 2279 | void spi_unregister_controller(struct spi_controller *ctlr) |
8ae12a0d | 2280 | { |
9b61e302 | 2281 | struct spi_controller *found; |
67f7b278 | 2282 | int id = ctlr->bus_num; |
89fc9a1a JG |
2283 | int dummy; |
2284 | ||
9b61e302 SM |
2285 | /* First make sure that this controller was ever added */ |
2286 | mutex_lock(&board_lock); | |
67f7b278 | 2287 | found = idr_find(&spi_master_idr, id); |
9b61e302 | 2288 | mutex_unlock(&board_lock); |
8caab75f GU |
2289 | if (ctlr->queued) { |
2290 | if (spi_destroy_queue(ctlr)) | |
2291 | dev_err(&ctlr->dev, "queue remove failed\n"); | |
ffbbdd21 | 2292 | } |
2b9603a0 | 2293 | mutex_lock(&board_lock); |
8caab75f | 2294 | list_del(&ctlr->list); |
2b9603a0 FT |
2295 | mutex_unlock(&board_lock); |
2296 | ||
8caab75f GU |
2297 | dummy = device_for_each_child(&ctlr->dev, NULL, __unregister); |
2298 | device_unregister(&ctlr->dev); | |
9b61e302 SM |
2299 | /* free bus id */ |
2300 | mutex_lock(&board_lock); | |
613bd1ea JN |
2301 | if (found == ctlr) |
2302 | idr_remove(&spi_master_idr, id); | |
9b61e302 | 2303 | mutex_unlock(&board_lock); |
8ae12a0d | 2304 | } |
8caab75f | 2305 | EXPORT_SYMBOL_GPL(spi_unregister_controller); |
8ae12a0d | 2306 | |
8caab75f | 2307 | int spi_controller_suspend(struct spi_controller *ctlr) |
ffbbdd21 LW |
2308 | { |
2309 | int ret; | |
2310 | ||
8caab75f GU |
2311 | /* Basically no-ops for non-queued controllers */ |
2312 | if (!ctlr->queued) | |
ffbbdd21 LW |
2313 | return 0; |
2314 | ||
8caab75f | 2315 | ret = spi_stop_queue(ctlr); |
ffbbdd21 | 2316 | if (ret) |
8caab75f | 2317 | dev_err(&ctlr->dev, "queue stop failed\n"); |
ffbbdd21 LW |
2318 | |
2319 | return ret; | |
2320 | } | |
8caab75f | 2321 | EXPORT_SYMBOL_GPL(spi_controller_suspend); |
ffbbdd21 | 2322 | |
8caab75f | 2323 | int spi_controller_resume(struct spi_controller *ctlr) |
ffbbdd21 LW |
2324 | { |
2325 | int ret; | |
2326 | ||
8caab75f | 2327 | if (!ctlr->queued) |
ffbbdd21 LW |
2328 | return 0; |
2329 | ||
8caab75f | 2330 | ret = spi_start_queue(ctlr); |
ffbbdd21 | 2331 | if (ret) |
8caab75f | 2332 | dev_err(&ctlr->dev, "queue restart failed\n"); |
ffbbdd21 LW |
2333 | |
2334 | return ret; | |
2335 | } | |
8caab75f | 2336 | EXPORT_SYMBOL_GPL(spi_controller_resume); |
ffbbdd21 | 2337 | |
8caab75f | 2338 | static int __spi_controller_match(struct device *dev, const void *data) |
5ed2c832 | 2339 | { |
8caab75f | 2340 | struct spi_controller *ctlr; |
9f3b795a | 2341 | const u16 *bus_num = data; |
5ed2c832 | 2342 | |
8caab75f GU |
2343 | ctlr = container_of(dev, struct spi_controller, dev); |
2344 | return ctlr->bus_num == *bus_num; | |
5ed2c832 DY |
2345 | } |
2346 | ||
8ae12a0d DB |
2347 | /** |
2348 | * spi_busnum_to_master - look up master associated with bus_num | |
2349 | * @bus_num: the master's bus number | |
33e34dc6 | 2350 | * Context: can sleep |
8ae12a0d DB |
2351 | * |
2352 | * This call may be used with devices that are registered after | |
2353 | * arch init time. It returns a refcounted pointer to the relevant | |
8caab75f | 2354 | * spi_controller (which the caller must release), or NULL if there is |
8ae12a0d | 2355 | * no such master registered. |
97d56dc6 JMC |
2356 | * |
2357 | * Return: the SPI master structure on success, else NULL. | |
8ae12a0d | 2358 | */ |
8caab75f | 2359 | struct spi_controller *spi_busnum_to_master(u16 bus_num) |
8ae12a0d | 2360 | { |
49dce689 | 2361 | struct device *dev; |
8caab75f | 2362 | struct spi_controller *ctlr = NULL; |
5ed2c832 | 2363 | |
695794ae | 2364 | dev = class_find_device(&spi_master_class, NULL, &bus_num, |
8caab75f | 2365 | __spi_controller_match); |
5ed2c832 | 2366 | if (dev) |
8caab75f | 2367 | ctlr = container_of(dev, struct spi_controller, dev); |
5ed2c832 | 2368 | /* reference got in class_find_device */ |
8caab75f | 2369 | return ctlr; |
8ae12a0d DB |
2370 | } |
2371 | EXPORT_SYMBOL_GPL(spi_busnum_to_master); | |
2372 | ||
d780c371 MS |
2373 | /*-------------------------------------------------------------------------*/ |
2374 | ||
2375 | /* Core methods for SPI resource management */ | |
2376 | ||
2377 | /** | |
2378 | * spi_res_alloc - allocate a spi resource that is life-cycle managed | |
2379 | * during the processing of a spi_message while using | |
2380 | * spi_transfer_one | |
2381 | * @spi: the spi device for which we allocate memory | |
2382 | * @release: the release code to execute for this resource | |
2383 | * @size: size to alloc and return | |
2384 | * @gfp: GFP allocation flags | |
2385 | * | |
2386 | * Return: the pointer to the allocated data | |
2387 | * | |
2388 | * This may get enhanced in the future to allocate from a memory pool | |
8caab75f | 2389 | * of the @spi_device or @spi_controller to avoid repeated allocations. |
d780c371 MS |
2390 | */ |
2391 | void *spi_res_alloc(struct spi_device *spi, | |
2392 | spi_res_release_t release, | |
2393 | size_t size, gfp_t gfp) | |
2394 | { | |
2395 | struct spi_res *sres; | |
2396 | ||
2397 | sres = kzalloc(sizeof(*sres) + size, gfp); | |
2398 | if (!sres) | |
2399 | return NULL; | |
2400 | ||
2401 | INIT_LIST_HEAD(&sres->entry); | |
2402 | sres->release = release; | |
2403 | ||
2404 | return sres->data; | |
2405 | } | |
2406 | EXPORT_SYMBOL_GPL(spi_res_alloc); | |
2407 | ||
2408 | /** | |
2409 | * spi_res_free - free an spi resource | |
2410 | * @res: pointer to the custom data of a resource | |
2411 | * | |
2412 | */ | |
2413 | void spi_res_free(void *res) | |
2414 | { | |
2415 | struct spi_res *sres = container_of(res, struct spi_res, data); | |
2416 | ||
2417 | if (!res) | |
2418 | return; | |
2419 | ||
2420 | WARN_ON(!list_empty(&sres->entry)); | |
2421 | kfree(sres); | |
2422 | } | |
2423 | EXPORT_SYMBOL_GPL(spi_res_free); | |
2424 | ||
2425 | /** | |
2426 | * spi_res_add - add a spi_res to the spi_message | |
2427 | * @message: the spi message | |
2428 | * @res: the spi_resource | |
2429 | */ | |
2430 | void spi_res_add(struct spi_message *message, void *res) | |
2431 | { | |
2432 | struct spi_res *sres = container_of(res, struct spi_res, data); | |
2433 | ||
2434 | WARN_ON(!list_empty(&sres->entry)); | |
2435 | list_add_tail(&sres->entry, &message->resources); | |
2436 | } | |
2437 | EXPORT_SYMBOL_GPL(spi_res_add); | |
2438 | ||
2439 | /** | |
2440 | * spi_res_release - release all spi resources for this message | |
8caab75f | 2441 | * @ctlr: the @spi_controller |
d780c371 MS |
2442 | * @message: the @spi_message |
2443 | */ | |
8caab75f | 2444 | void spi_res_release(struct spi_controller *ctlr, struct spi_message *message) |
d780c371 MS |
2445 | { |
2446 | struct spi_res *res; | |
2447 | ||
2448 | while (!list_empty(&message->resources)) { | |
2449 | res = list_last_entry(&message->resources, | |
2450 | struct spi_res, entry); | |
2451 | ||
2452 | if (res->release) | |
8caab75f | 2453 | res->release(ctlr, message, res->data); |
d780c371 MS |
2454 | |
2455 | list_del(&res->entry); | |
2456 | ||
2457 | kfree(res); | |
2458 | } | |
2459 | } | |
2460 | EXPORT_SYMBOL_GPL(spi_res_release); | |
8ae12a0d DB |
2461 | |
2462 | /*-------------------------------------------------------------------------*/ | |
2463 | ||
523baf5a MS |
2464 | /* Core methods for spi_message alterations */ |
2465 | ||
8caab75f | 2466 | static void __spi_replace_transfers_release(struct spi_controller *ctlr, |
523baf5a MS |
2467 | struct spi_message *msg, |
2468 | void *res) | |
2469 | { | |
2470 | struct spi_replaced_transfers *rxfer = res; | |
2471 | size_t i; | |
2472 | ||
2473 | /* call extra callback if requested */ | |
2474 | if (rxfer->release) | |
8caab75f | 2475 | rxfer->release(ctlr, msg, res); |
523baf5a MS |
2476 | |
2477 | /* insert replaced transfers back into the message */ | |
2478 | list_splice(&rxfer->replaced_transfers, rxfer->replaced_after); | |
2479 | ||
2480 | /* remove the formerly inserted entries */ | |
2481 | for (i = 0; i < rxfer->inserted; i++) | |
2482 | list_del(&rxfer->inserted_transfers[i].transfer_list); | |
2483 | } | |
2484 | ||
2485 | /** | |
2486 | * spi_replace_transfers - replace transfers with several transfers | |
2487 | * and register change with spi_message.resources | |
2488 | * @msg: the spi_message we work upon | |
2489 | * @xfer_first: the first spi_transfer we want to replace | |
2490 | * @remove: number of transfers to remove | |
2491 | * @insert: the number of transfers we want to insert instead | |
2492 | * @release: extra release code necessary in some circumstances | |
2493 | * @extradatasize: extra data to allocate (with alignment guarantees | |
2494 | * of struct @spi_transfer) | |
05885397 | 2495 | * @gfp: gfp flags |
523baf5a MS |
2496 | * |
2497 | * Returns: pointer to @spi_replaced_transfers, | |
2498 | * PTR_ERR(...) in case of errors. | |
2499 | */ | |
2500 | struct spi_replaced_transfers *spi_replace_transfers( | |
2501 | struct spi_message *msg, | |
2502 | struct spi_transfer *xfer_first, | |
2503 | size_t remove, | |
2504 | size_t insert, | |
2505 | spi_replaced_release_t release, | |
2506 | size_t extradatasize, | |
2507 | gfp_t gfp) | |
2508 | { | |
2509 | struct spi_replaced_transfers *rxfer; | |
2510 | struct spi_transfer *xfer; | |
2511 | size_t i; | |
2512 | ||
2513 | /* allocate the structure using spi_res */ | |
2514 | rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release, | |
2515 | insert * sizeof(struct spi_transfer) | |
2516 | + sizeof(struct spi_replaced_transfers) | |
2517 | + extradatasize, | |
2518 | gfp); | |
2519 | if (!rxfer) | |
2520 | return ERR_PTR(-ENOMEM); | |
2521 | ||
2522 | /* the release code to invoke before running the generic release */ | |
2523 | rxfer->release = release; | |
2524 | ||
2525 | /* assign extradata */ | |
2526 | if (extradatasize) | |
2527 | rxfer->extradata = | |
2528 | &rxfer->inserted_transfers[insert]; | |
2529 | ||
2530 | /* init the replaced_transfers list */ | |
2531 | INIT_LIST_HEAD(&rxfer->replaced_transfers); | |
2532 | ||
2533 | /* assign the list_entry after which we should reinsert | |
2534 | * the @replaced_transfers - it may be spi_message.messages! | |
2535 | */ | |
2536 | rxfer->replaced_after = xfer_first->transfer_list.prev; | |
2537 | ||
2538 | /* remove the requested number of transfers */ | |
2539 | for (i = 0; i < remove; i++) { | |
2540 | /* if the entry after replaced_after it is msg->transfers | |
2541 | * then we have been requested to remove more transfers | |
2542 | * than are in the list | |
2543 | */ | |
2544 | if (rxfer->replaced_after->next == &msg->transfers) { | |
2545 | dev_err(&msg->spi->dev, | |
2546 | "requested to remove more spi_transfers than are available\n"); | |
2547 | /* insert replaced transfers back into the message */ | |
2548 | list_splice(&rxfer->replaced_transfers, | |
2549 | rxfer->replaced_after); | |
2550 | ||
2551 | /* free the spi_replace_transfer structure */ | |
2552 | spi_res_free(rxfer); | |
2553 | ||
2554 | /* and return with an error */ | |
2555 | return ERR_PTR(-EINVAL); | |
2556 | } | |
2557 | ||
2558 | /* remove the entry after replaced_after from list of | |
2559 | * transfers and add it to list of replaced_transfers | |
2560 | */ | |
2561 | list_move_tail(rxfer->replaced_after->next, | |
2562 | &rxfer->replaced_transfers); | |
2563 | } | |
2564 | ||
2565 | /* create copy of the given xfer with identical settings | |
2566 | * based on the first transfer to get removed | |
2567 | */ | |
2568 | for (i = 0; i < insert; i++) { | |
2569 | /* we need to run in reverse order */ | |
2570 | xfer = &rxfer->inserted_transfers[insert - 1 - i]; | |
2571 | ||
2572 | /* copy all spi_transfer data */ | |
2573 | memcpy(xfer, xfer_first, sizeof(*xfer)); | |
2574 | ||
2575 | /* add to list */ | |
2576 | list_add(&xfer->transfer_list, rxfer->replaced_after); | |
2577 | ||
2578 | /* clear cs_change and delay_usecs for all but the last */ | |
2579 | if (i) { | |
2580 | xfer->cs_change = false; | |
2581 | xfer->delay_usecs = 0; | |
2582 | } | |
2583 | } | |
2584 | ||
2585 | /* set up inserted */ | |
2586 | rxfer->inserted = insert; | |
2587 | ||
2588 | /* and register it with spi_res/spi_message */ | |
2589 | spi_res_add(msg, rxfer); | |
2590 | ||
2591 | return rxfer; | |
2592 | } | |
2593 | EXPORT_SYMBOL_GPL(spi_replace_transfers); | |
2594 | ||
8caab75f | 2595 | static int __spi_split_transfer_maxsize(struct spi_controller *ctlr, |
08933418 FE |
2596 | struct spi_message *msg, |
2597 | struct spi_transfer **xferp, | |
2598 | size_t maxsize, | |
2599 | gfp_t gfp) | |
d9f12122 MS |
2600 | { |
2601 | struct spi_transfer *xfer = *xferp, *xfers; | |
2602 | struct spi_replaced_transfers *srt; | |
2603 | size_t offset; | |
2604 | size_t count, i; | |
2605 | ||
2606 | /* warn once about this fact that we are splitting a transfer */ | |
2607 | dev_warn_once(&msg->spi->dev, | |
7d62f51e | 2608 | "spi_transfer of length %i exceed max length of %zu - needed to split transfers\n", |
d9f12122 MS |
2609 | xfer->len, maxsize); |
2610 | ||
2611 | /* calculate how many we have to replace */ | |
2612 | count = DIV_ROUND_UP(xfer->len, maxsize); | |
2613 | ||
2614 | /* create replacement */ | |
2615 | srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp); | |
657d32ef DC |
2616 | if (IS_ERR(srt)) |
2617 | return PTR_ERR(srt); | |
d9f12122 MS |
2618 | xfers = srt->inserted_transfers; |
2619 | ||
2620 | /* now handle each of those newly inserted spi_transfers | |
2621 | * note that the replacements spi_transfers all are preset | |
2622 | * to the same values as *xferp, so tx_buf, rx_buf and len | |
2623 | * are all identical (as well as most others) | |
2624 | * so we just have to fix up len and the pointers. | |
2625 | * | |
2626 | * this also includes support for the depreciated | |
2627 | * spi_message.is_dma_mapped interface | |
2628 | */ | |
2629 | ||
2630 | /* the first transfer just needs the length modified, so we | |
2631 | * run it outside the loop | |
2632 | */ | |
c8dab77a | 2633 | xfers[0].len = min_t(size_t, maxsize, xfer[0].len); |
d9f12122 MS |
2634 | |
2635 | /* all the others need rx_buf/tx_buf also set */ | |
2636 | for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) { | |
2637 | /* update rx_buf, tx_buf and dma */ | |
2638 | if (xfers[i].rx_buf) | |
2639 | xfers[i].rx_buf += offset; | |
2640 | if (xfers[i].rx_dma) | |
2641 | xfers[i].rx_dma += offset; | |
2642 | if (xfers[i].tx_buf) | |
2643 | xfers[i].tx_buf += offset; | |
2644 | if (xfers[i].tx_dma) | |
2645 | xfers[i].tx_dma += offset; | |
2646 | ||
2647 | /* update length */ | |
2648 | xfers[i].len = min(maxsize, xfers[i].len - offset); | |
2649 | } | |
2650 | ||
2651 | /* we set up xferp to the last entry we have inserted, | |
2652 | * so that we skip those already split transfers | |
2653 | */ | |
2654 | *xferp = &xfers[count - 1]; | |
2655 | ||
2656 | /* increment statistics counters */ | |
8caab75f | 2657 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, |
d9f12122 MS |
2658 | transfers_split_maxsize); |
2659 | SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics, | |
2660 | transfers_split_maxsize); | |
2661 | ||
2662 | return 0; | |
2663 | } | |
2664 | ||
2665 | /** | |
2666 | * spi_split_tranfers_maxsize - split spi transfers into multiple transfers | |
2667 | * when an individual transfer exceeds a | |
2668 | * certain size | |
8caab75f | 2669 | * @ctlr: the @spi_controller for this transfer |
3700ce95 MI |
2670 | * @msg: the @spi_message to transform |
2671 | * @maxsize: the maximum when to apply this | |
10f11a22 | 2672 | * @gfp: GFP allocation flags |
d9f12122 MS |
2673 | * |
2674 | * Return: status of transformation | |
2675 | */ | |
8caab75f | 2676 | int spi_split_transfers_maxsize(struct spi_controller *ctlr, |
d9f12122 MS |
2677 | struct spi_message *msg, |
2678 | size_t maxsize, | |
2679 | gfp_t gfp) | |
2680 | { | |
2681 | struct spi_transfer *xfer; | |
2682 | int ret; | |
2683 | ||
2684 | /* iterate over the transfer_list, | |
2685 | * but note that xfer is advanced to the last transfer inserted | |
2686 | * to avoid checking sizes again unnecessarily (also xfer does | |
2687 | * potentiall belong to a different list by the time the | |
2688 | * replacement has happened | |
2689 | */ | |
2690 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
2691 | if (xfer->len > maxsize) { | |
8caab75f GU |
2692 | ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer, |
2693 | maxsize, gfp); | |
d9f12122 MS |
2694 | if (ret) |
2695 | return ret; | |
2696 | } | |
2697 | } | |
2698 | ||
2699 | return 0; | |
2700 | } | |
2701 | EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize); | |
8ae12a0d DB |
2702 | |
2703 | /*-------------------------------------------------------------------------*/ | |
2704 | ||
8caab75f | 2705 | /* Core methods for SPI controller protocol drivers. Some of the |
7d077197 DB |
2706 | * other core methods are currently defined as inline functions. |
2707 | */ | |
2708 | ||
8caab75f GU |
2709 | static int __spi_validate_bits_per_word(struct spi_controller *ctlr, |
2710 | u8 bits_per_word) | |
63ab645f | 2711 | { |
8caab75f | 2712 | if (ctlr->bits_per_word_mask) { |
63ab645f SB |
2713 | /* Only 32 bits fit in the mask */ |
2714 | if (bits_per_word > 32) | |
2715 | return -EINVAL; | |
8caab75f | 2716 | if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word))) |
63ab645f SB |
2717 | return -EINVAL; |
2718 | } | |
2719 | ||
2720 | return 0; | |
2721 | } | |
2722 | ||
7d077197 DB |
2723 | /** |
2724 | * spi_setup - setup SPI mode and clock rate | |
2725 | * @spi: the device whose settings are being modified | |
2726 | * Context: can sleep, and no requests are queued to the device | |
2727 | * | |
2728 | * SPI protocol drivers may need to update the transfer mode if the | |
2729 | * device doesn't work with its default. They may likewise need | |
2730 | * to update clock rates or word sizes from initial values. This function | |
2731 | * changes those settings, and must be called from a context that can sleep. | |
2732 | * Except for SPI_CS_HIGH, which takes effect immediately, the changes take | |
2733 | * effect the next time the device is selected and data is transferred to | |
2734 | * or from it. When this function returns, the spi device is deselected. | |
2735 | * | |
2736 | * Note that this call will fail if the protocol driver specifies an option | |
2737 | * that the underlying controller or its driver does not support. For | |
2738 | * example, not all hardware supports wire transfers using nine bit words, | |
2739 | * LSB-first wire encoding, or active-high chipselects. | |
97d56dc6 JMC |
2740 | * |
2741 | * Return: zero on success, else a negative error code. | |
7d077197 DB |
2742 | */ |
2743 | int spi_setup(struct spi_device *spi) | |
2744 | { | |
83596fbe | 2745 | unsigned bad_bits, ugly_bits; |
5ab8d262 | 2746 | int status; |
7d077197 | 2747 | |
f477b7fb | 2748 | /* check mode to prevent that DUAL and QUAD set at the same time |
2749 | */ | |
2750 | if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) || | |
2751 | ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) { | |
2752 | dev_err(&spi->dev, | |
2753 | "setup: can not select dual and quad at the same time\n"); | |
2754 | return -EINVAL; | |
2755 | } | |
2756 | /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden | |
2757 | */ | |
2758 | if ((spi->mode & SPI_3WIRE) && (spi->mode & | |
2759 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD))) | |
2760 | return -EINVAL; | |
e7db06b5 | 2761 | /* help drivers fail *cleanly* when they need options |
8caab75f | 2762 | * that aren't supported with their current controller |
e7db06b5 | 2763 | */ |
8caab75f | 2764 | bad_bits = spi->mode & ~spi->controller->mode_bits; |
83596fbe GU |
2765 | ugly_bits = bad_bits & |
2766 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD); | |
2767 | if (ugly_bits) { | |
2768 | dev_warn(&spi->dev, | |
2769 | "setup: ignoring unsupported mode bits %x\n", | |
2770 | ugly_bits); | |
2771 | spi->mode &= ~ugly_bits; | |
2772 | bad_bits &= ~ugly_bits; | |
2773 | } | |
e7db06b5 | 2774 | if (bad_bits) { |
eb288a1f | 2775 | dev_err(&spi->dev, "setup: unsupported mode bits %x\n", |
e7db06b5 DB |
2776 | bad_bits); |
2777 | return -EINVAL; | |
2778 | } | |
2779 | ||
7d077197 DB |
2780 | if (!spi->bits_per_word) |
2781 | spi->bits_per_word = 8; | |
2782 | ||
8caab75f GU |
2783 | status = __spi_validate_bits_per_word(spi->controller, |
2784 | spi->bits_per_word); | |
5ab8d262 AS |
2785 | if (status) |
2786 | return status; | |
63ab645f | 2787 | |
052eb2d4 | 2788 | if (!spi->max_speed_hz) |
8caab75f | 2789 | spi->max_speed_hz = spi->controller->max_speed_hz; |
052eb2d4 | 2790 | |
8caab75f GU |
2791 | if (spi->controller->setup) |
2792 | status = spi->controller->setup(spi); | |
7d077197 | 2793 | |
abeedb01 FCJ |
2794 | spi_set_cs(spi, false); |
2795 | ||
5fe5f05e | 2796 | dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n", |
7d077197 DB |
2797 | (int) (spi->mode & (SPI_CPOL | SPI_CPHA)), |
2798 | (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "", | |
2799 | (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "", | |
2800 | (spi->mode & SPI_3WIRE) ? "3wire, " : "", | |
2801 | (spi->mode & SPI_LOOP) ? "loopback, " : "", | |
2802 | spi->bits_per_word, spi->max_speed_hz, | |
2803 | status); | |
2804 | ||
2805 | return status; | |
2806 | } | |
2807 | EXPORT_SYMBOL_GPL(spi_setup); | |
2808 | ||
90808738 | 2809 | static int __spi_validate(struct spi_device *spi, struct spi_message *message) |
cf32b71e | 2810 | { |
8caab75f | 2811 | struct spi_controller *ctlr = spi->controller; |
e6811d1d | 2812 | struct spi_transfer *xfer; |
6ea31293 | 2813 | int w_size; |
cf32b71e | 2814 | |
24a0013a MB |
2815 | if (list_empty(&message->transfers)) |
2816 | return -EINVAL; | |
24a0013a | 2817 | |
cf32b71e ES |
2818 | /* Half-duplex links include original MicroWire, and ones with |
2819 | * only one data pin like SPI_3WIRE (switches direction) or where | |
2820 | * either MOSI or MISO is missing. They can also be caused by | |
2821 | * software limitations. | |
2822 | */ | |
8caab75f GU |
2823 | if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) || |
2824 | (spi->mode & SPI_3WIRE)) { | |
2825 | unsigned flags = ctlr->flags; | |
cf32b71e ES |
2826 | |
2827 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
2828 | if (xfer->rx_buf && xfer->tx_buf) | |
2829 | return -EINVAL; | |
8caab75f | 2830 | if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf) |
cf32b71e | 2831 | return -EINVAL; |
8caab75f | 2832 | if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf) |
cf32b71e ES |
2833 | return -EINVAL; |
2834 | } | |
2835 | } | |
2836 | ||
e6811d1d | 2837 | /** |
059b8ffe LD |
2838 | * Set transfer bits_per_word and max speed as spi device default if |
2839 | * it is not set for this transfer. | |
f477b7fb | 2840 | * Set transfer tx_nbits and rx_nbits as single transfer default |
2841 | * (SPI_NBITS_SINGLE) if it is not set for this transfer. | |
e6811d1d | 2842 | */ |
77e80588 | 2843 | message->frame_length = 0; |
e6811d1d | 2844 | list_for_each_entry(xfer, &message->transfers, transfer_list) { |
078726ce | 2845 | message->frame_length += xfer->len; |
e6811d1d LD |
2846 | if (!xfer->bits_per_word) |
2847 | xfer->bits_per_word = spi->bits_per_word; | |
a6f87fad AL |
2848 | |
2849 | if (!xfer->speed_hz) | |
059b8ffe | 2850 | xfer->speed_hz = spi->max_speed_hz; |
7dc9fbc3 | 2851 | if (!xfer->speed_hz) |
8caab75f | 2852 | xfer->speed_hz = ctlr->max_speed_hz; |
a6f87fad | 2853 | |
8caab75f GU |
2854 | if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz) |
2855 | xfer->speed_hz = ctlr->max_speed_hz; | |
56ede94a | 2856 | |
8caab75f | 2857 | if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word)) |
63ab645f | 2858 | return -EINVAL; |
a2fd4f9f | 2859 | |
4d94bd21 II |
2860 | /* |
2861 | * SPI transfer length should be multiple of SPI word size | |
2862 | * where SPI word size should be power-of-two multiple | |
2863 | */ | |
2864 | if (xfer->bits_per_word <= 8) | |
2865 | w_size = 1; | |
2866 | else if (xfer->bits_per_word <= 16) | |
2867 | w_size = 2; | |
2868 | else | |
2869 | w_size = 4; | |
2870 | ||
4d94bd21 | 2871 | /* No partial transfers accepted */ |
6ea31293 | 2872 | if (xfer->len % w_size) |
4d94bd21 II |
2873 | return -EINVAL; |
2874 | ||
8caab75f GU |
2875 | if (xfer->speed_hz && ctlr->min_speed_hz && |
2876 | xfer->speed_hz < ctlr->min_speed_hz) | |
a2fd4f9f | 2877 | return -EINVAL; |
f477b7fb | 2878 | |
2879 | if (xfer->tx_buf && !xfer->tx_nbits) | |
2880 | xfer->tx_nbits = SPI_NBITS_SINGLE; | |
2881 | if (xfer->rx_buf && !xfer->rx_nbits) | |
2882 | xfer->rx_nbits = SPI_NBITS_SINGLE; | |
2883 | /* check transfer tx/rx_nbits: | |
1afd9989 GU |
2884 | * 1. check the value matches one of single, dual and quad |
2885 | * 2. check tx/rx_nbits match the mode in spi_device | |
f477b7fb | 2886 | */ |
db90a441 SP |
2887 | if (xfer->tx_buf) { |
2888 | if (xfer->tx_nbits != SPI_NBITS_SINGLE && | |
2889 | xfer->tx_nbits != SPI_NBITS_DUAL && | |
2890 | xfer->tx_nbits != SPI_NBITS_QUAD) | |
2891 | return -EINVAL; | |
2892 | if ((xfer->tx_nbits == SPI_NBITS_DUAL) && | |
2893 | !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD))) | |
2894 | return -EINVAL; | |
2895 | if ((xfer->tx_nbits == SPI_NBITS_QUAD) && | |
2896 | !(spi->mode & SPI_TX_QUAD)) | |
2897 | return -EINVAL; | |
db90a441 | 2898 | } |
f477b7fb | 2899 | /* check transfer rx_nbits */ |
db90a441 SP |
2900 | if (xfer->rx_buf) { |
2901 | if (xfer->rx_nbits != SPI_NBITS_SINGLE && | |
2902 | xfer->rx_nbits != SPI_NBITS_DUAL && | |
2903 | xfer->rx_nbits != SPI_NBITS_QUAD) | |
2904 | return -EINVAL; | |
2905 | if ((xfer->rx_nbits == SPI_NBITS_DUAL) && | |
2906 | !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD))) | |
2907 | return -EINVAL; | |
2908 | if ((xfer->rx_nbits == SPI_NBITS_QUAD) && | |
2909 | !(spi->mode & SPI_RX_QUAD)) | |
2910 | return -EINVAL; | |
db90a441 | 2911 | } |
e6811d1d LD |
2912 | } |
2913 | ||
cf32b71e | 2914 | message->status = -EINPROGRESS; |
90808738 MB |
2915 | |
2916 | return 0; | |
2917 | } | |
2918 | ||
2919 | static int __spi_async(struct spi_device *spi, struct spi_message *message) | |
2920 | { | |
8caab75f | 2921 | struct spi_controller *ctlr = spi->controller; |
90808738 MB |
2922 | |
2923 | message->spi = spi; | |
2924 | ||
8caab75f | 2925 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async); |
eca2ebc7 MS |
2926 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async); |
2927 | ||
90808738 MB |
2928 | trace_spi_message_submit(message); |
2929 | ||
8caab75f | 2930 | return ctlr->transfer(spi, message); |
cf32b71e ES |
2931 | } |
2932 | ||
568d0697 DB |
2933 | /** |
2934 | * spi_async - asynchronous SPI transfer | |
2935 | * @spi: device with which data will be exchanged | |
2936 | * @message: describes the data transfers, including completion callback | |
2937 | * Context: any (irqs may be blocked, etc) | |
2938 | * | |
2939 | * This call may be used in_irq and other contexts which can't sleep, | |
2940 | * as well as from task contexts which can sleep. | |
2941 | * | |
2942 | * The completion callback is invoked in a context which can't sleep. | |
2943 | * Before that invocation, the value of message->status is undefined. | |
2944 | * When the callback is issued, message->status holds either zero (to | |
2945 | * indicate complete success) or a negative error code. After that | |
2946 | * callback returns, the driver which issued the transfer request may | |
2947 | * deallocate the associated memory; it's no longer in use by any SPI | |
2948 | * core or controller driver code. | |
2949 | * | |
2950 | * Note that although all messages to a spi_device are handled in | |
2951 | * FIFO order, messages may go to different devices in other orders. | |
2952 | * Some device might be higher priority, or have various "hard" access | |
2953 | * time requirements, for example. | |
2954 | * | |
2955 | * On detection of any fault during the transfer, processing of | |
2956 | * the entire message is aborted, and the device is deselected. | |
2957 | * Until returning from the associated message completion callback, | |
2958 | * no other spi_message queued to that device will be processed. | |
2959 | * (This rule applies equally to all the synchronous transfer calls, | |
2960 | * which are wrappers around this core asynchronous primitive.) | |
97d56dc6 JMC |
2961 | * |
2962 | * Return: zero on success, else a negative error code. | |
568d0697 DB |
2963 | */ |
2964 | int spi_async(struct spi_device *spi, struct spi_message *message) | |
2965 | { | |
8caab75f | 2966 | struct spi_controller *ctlr = spi->controller; |
cf32b71e ES |
2967 | int ret; |
2968 | unsigned long flags; | |
568d0697 | 2969 | |
90808738 MB |
2970 | ret = __spi_validate(spi, message); |
2971 | if (ret != 0) | |
2972 | return ret; | |
2973 | ||
8caab75f | 2974 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
568d0697 | 2975 | |
8caab75f | 2976 | if (ctlr->bus_lock_flag) |
cf32b71e ES |
2977 | ret = -EBUSY; |
2978 | else | |
2979 | ret = __spi_async(spi, message); | |
568d0697 | 2980 | |
8caab75f | 2981 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
2982 | |
2983 | return ret; | |
568d0697 DB |
2984 | } |
2985 | EXPORT_SYMBOL_GPL(spi_async); | |
2986 | ||
cf32b71e ES |
2987 | /** |
2988 | * spi_async_locked - version of spi_async with exclusive bus usage | |
2989 | * @spi: device with which data will be exchanged | |
2990 | * @message: describes the data transfers, including completion callback | |
2991 | * Context: any (irqs may be blocked, etc) | |
2992 | * | |
2993 | * This call may be used in_irq and other contexts which can't sleep, | |
2994 | * as well as from task contexts which can sleep. | |
2995 | * | |
2996 | * The completion callback is invoked in a context which can't sleep. | |
2997 | * Before that invocation, the value of message->status is undefined. | |
2998 | * When the callback is issued, message->status holds either zero (to | |
2999 | * indicate complete success) or a negative error code. After that | |
3000 | * callback returns, the driver which issued the transfer request may | |
3001 | * deallocate the associated memory; it's no longer in use by any SPI | |
3002 | * core or controller driver code. | |
3003 | * | |
3004 | * Note that although all messages to a spi_device are handled in | |
3005 | * FIFO order, messages may go to different devices in other orders. | |
3006 | * Some device might be higher priority, or have various "hard" access | |
3007 | * time requirements, for example. | |
3008 | * | |
3009 | * On detection of any fault during the transfer, processing of | |
3010 | * the entire message is aborted, and the device is deselected. | |
3011 | * Until returning from the associated message completion callback, | |
3012 | * no other spi_message queued to that device will be processed. | |
3013 | * (This rule applies equally to all the synchronous transfer calls, | |
3014 | * which are wrappers around this core asynchronous primitive.) | |
97d56dc6 JMC |
3015 | * |
3016 | * Return: zero on success, else a negative error code. | |
cf32b71e ES |
3017 | */ |
3018 | int spi_async_locked(struct spi_device *spi, struct spi_message *message) | |
3019 | { | |
8caab75f | 3020 | struct spi_controller *ctlr = spi->controller; |
cf32b71e ES |
3021 | int ret; |
3022 | unsigned long flags; | |
3023 | ||
90808738 MB |
3024 | ret = __spi_validate(spi, message); |
3025 | if (ret != 0) | |
3026 | return ret; | |
3027 | ||
8caab75f | 3028 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3029 | |
3030 | ret = __spi_async(spi, message); | |
3031 | ||
8caab75f | 3032 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3033 | |
3034 | return ret; | |
3035 | ||
3036 | } | |
3037 | EXPORT_SYMBOL_GPL(spi_async_locked); | |
3038 | ||
7d077197 | 3039 | |
556351f1 V |
3040 | int spi_flash_read(struct spi_device *spi, |
3041 | struct spi_flash_read_message *msg) | |
3042 | ||
3043 | { | |
8caab75f | 3044 | struct spi_controller *master = spi->controller; |
f4502dd1 | 3045 | struct device *rx_dev = NULL; |
556351f1 V |
3046 | int ret; |
3047 | ||
3048 | if ((msg->opcode_nbits == SPI_NBITS_DUAL || | |
3049 | msg->addr_nbits == SPI_NBITS_DUAL) && | |
3050 | !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD))) | |
3051 | return -EINVAL; | |
3052 | if ((msg->opcode_nbits == SPI_NBITS_QUAD || | |
3053 | msg->addr_nbits == SPI_NBITS_QUAD) && | |
3054 | !(spi->mode & SPI_TX_QUAD)) | |
3055 | return -EINVAL; | |
3056 | if (msg->data_nbits == SPI_NBITS_DUAL && | |
3057 | !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD))) | |
3058 | return -EINVAL; | |
3059 | if (msg->data_nbits == SPI_NBITS_QUAD && | |
3060 | !(spi->mode & SPI_RX_QUAD)) | |
3061 | return -EINVAL; | |
3062 | ||
3063 | if (master->auto_runtime_pm) { | |
3064 | ret = pm_runtime_get_sync(master->dev.parent); | |
3065 | if (ret < 0) { | |
3066 | dev_err(&master->dev, "Failed to power device: %d\n", | |
3067 | ret); | |
3068 | return ret; | |
3069 | } | |
3070 | } | |
f4502dd1 | 3071 | |
556351f1 | 3072 | mutex_lock(&master->bus_lock_mutex); |
ef4d96ec | 3073 | mutex_lock(&master->io_mutex); |
2bca3445 | 3074 | if (master->dma_rx && master->spi_flash_can_dma(spi, msg)) { |
f4502dd1 V |
3075 | rx_dev = master->dma_rx->device->dev; |
3076 | ret = spi_map_buf(master, rx_dev, &msg->rx_sg, | |
3077 | msg->buf, msg->len, | |
3078 | DMA_FROM_DEVICE); | |
3079 | if (!ret) | |
3080 | msg->cur_msg_mapped = true; | |
3081 | } | |
556351f1 | 3082 | ret = master->spi_flash_read(spi, msg); |
f4502dd1 V |
3083 | if (msg->cur_msg_mapped) |
3084 | spi_unmap_buf(master, rx_dev, &msg->rx_sg, | |
3085 | DMA_FROM_DEVICE); | |
ef4d96ec | 3086 | mutex_unlock(&master->io_mutex); |
556351f1 | 3087 | mutex_unlock(&master->bus_lock_mutex); |
f4502dd1 | 3088 | |
556351f1 V |
3089 | if (master->auto_runtime_pm) |
3090 | pm_runtime_put(master->dev.parent); | |
3091 | ||
3092 | return ret; | |
3093 | } | |
3094 | EXPORT_SYMBOL_GPL(spi_flash_read); | |
3095 | ||
7d077197 DB |
3096 | /*-------------------------------------------------------------------------*/ |
3097 | ||
8caab75f | 3098 | /* Utility methods for SPI protocol drivers, layered on |
7d077197 DB |
3099 | * top of the core. Some other utility methods are defined as |
3100 | * inline functions. | |
3101 | */ | |
3102 | ||
5d870c8e AM |
3103 | static void spi_complete(void *arg) |
3104 | { | |
3105 | complete(arg); | |
3106 | } | |
3107 | ||
ef4d96ec | 3108 | static int __spi_sync(struct spi_device *spi, struct spi_message *message) |
cf32b71e ES |
3109 | { |
3110 | DECLARE_COMPLETION_ONSTACK(done); | |
3111 | int status; | |
8caab75f | 3112 | struct spi_controller *ctlr = spi->controller; |
0461a414 MB |
3113 | unsigned long flags; |
3114 | ||
3115 | status = __spi_validate(spi, message); | |
3116 | if (status != 0) | |
3117 | return status; | |
cf32b71e ES |
3118 | |
3119 | message->complete = spi_complete; | |
3120 | message->context = &done; | |
0461a414 | 3121 | message->spi = spi; |
cf32b71e | 3122 | |
8caab75f | 3123 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync); |
eca2ebc7 MS |
3124 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync); |
3125 | ||
0461a414 MB |
3126 | /* If we're not using the legacy transfer method then we will |
3127 | * try to transfer in the calling context so special case. | |
3128 | * This code would be less tricky if we could remove the | |
3129 | * support for driver implemented message queues. | |
3130 | */ | |
8caab75f GU |
3131 | if (ctlr->transfer == spi_queued_transfer) { |
3132 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); | |
0461a414 MB |
3133 | |
3134 | trace_spi_message_submit(message); | |
3135 | ||
3136 | status = __spi_queued_transfer(spi, message, false); | |
3137 | ||
8caab75f | 3138 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
0461a414 MB |
3139 | } else { |
3140 | status = spi_async_locked(spi, message); | |
3141 | } | |
cf32b71e | 3142 | |
cf32b71e | 3143 | if (status == 0) { |
0461a414 MB |
3144 | /* Push out the messages in the calling context if we |
3145 | * can. | |
3146 | */ | |
8caab75f GU |
3147 | if (ctlr->transfer == spi_queued_transfer) { |
3148 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, | |
eca2ebc7 MS |
3149 | spi_sync_immediate); |
3150 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, | |
3151 | spi_sync_immediate); | |
8caab75f | 3152 | __spi_pump_messages(ctlr, false); |
eca2ebc7 | 3153 | } |
0461a414 | 3154 | |
cf32b71e ES |
3155 | wait_for_completion(&done); |
3156 | status = message->status; | |
3157 | } | |
3158 | message->context = NULL; | |
3159 | return status; | |
3160 | } | |
3161 | ||
8ae12a0d DB |
3162 | /** |
3163 | * spi_sync - blocking/synchronous SPI data transfers | |
3164 | * @spi: device with which data will be exchanged | |
3165 | * @message: describes the data transfers | |
33e34dc6 | 3166 | * Context: can sleep |
8ae12a0d DB |
3167 | * |
3168 | * This call may only be used from a context that may sleep. The sleep | |
3169 | * is non-interruptible, and has no timeout. Low-overhead controller | |
3170 | * drivers may DMA directly into and out of the message buffers. | |
3171 | * | |
3172 | * Note that the SPI device's chip select is active during the message, | |
3173 | * and then is normally disabled between messages. Drivers for some | |
3174 | * frequently-used devices may want to minimize costs of selecting a chip, | |
3175 | * by leaving it selected in anticipation that the next message will go | |
3176 | * to the same chip. (That may increase power usage.) | |
3177 | * | |
0c868461 DB |
3178 | * Also, the caller is guaranteeing that the memory associated with the |
3179 | * message will not be freed before this call returns. | |
3180 | * | |
97d56dc6 | 3181 | * Return: zero on success, else a negative error code. |
8ae12a0d DB |
3182 | */ |
3183 | int spi_sync(struct spi_device *spi, struct spi_message *message) | |
3184 | { | |
ef4d96ec MB |
3185 | int ret; |
3186 | ||
8caab75f | 3187 | mutex_lock(&spi->controller->bus_lock_mutex); |
ef4d96ec | 3188 | ret = __spi_sync(spi, message); |
8caab75f | 3189 | mutex_unlock(&spi->controller->bus_lock_mutex); |
ef4d96ec MB |
3190 | |
3191 | return ret; | |
8ae12a0d DB |
3192 | } |
3193 | EXPORT_SYMBOL_GPL(spi_sync); | |
3194 | ||
cf32b71e ES |
3195 | /** |
3196 | * spi_sync_locked - version of spi_sync with exclusive bus usage | |
3197 | * @spi: device with which data will be exchanged | |
3198 | * @message: describes the data transfers | |
3199 | * Context: can sleep | |
3200 | * | |
3201 | * This call may only be used from a context that may sleep. The sleep | |
3202 | * is non-interruptible, and has no timeout. Low-overhead controller | |
3203 | * drivers may DMA directly into and out of the message buffers. | |
3204 | * | |
3205 | * This call should be used by drivers that require exclusive access to the | |
25985edc | 3206 | * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must |
cf32b71e ES |
3207 | * be released by a spi_bus_unlock call when the exclusive access is over. |
3208 | * | |
97d56dc6 | 3209 | * Return: zero on success, else a negative error code. |
cf32b71e ES |
3210 | */ |
3211 | int spi_sync_locked(struct spi_device *spi, struct spi_message *message) | |
3212 | { | |
ef4d96ec | 3213 | return __spi_sync(spi, message); |
cf32b71e ES |
3214 | } |
3215 | EXPORT_SYMBOL_GPL(spi_sync_locked); | |
3216 | ||
3217 | /** | |
3218 | * spi_bus_lock - obtain a lock for exclusive SPI bus usage | |
8caab75f | 3219 | * @ctlr: SPI bus master that should be locked for exclusive bus access |
cf32b71e ES |
3220 | * Context: can sleep |
3221 | * | |
3222 | * This call may only be used from a context that may sleep. The sleep | |
3223 | * is non-interruptible, and has no timeout. | |
3224 | * | |
3225 | * This call should be used by drivers that require exclusive access to the | |
3226 | * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the | |
3227 | * exclusive access is over. Data transfer must be done by spi_sync_locked | |
3228 | * and spi_async_locked calls when the SPI bus lock is held. | |
3229 | * | |
97d56dc6 | 3230 | * Return: always zero. |
cf32b71e | 3231 | */ |
8caab75f | 3232 | int spi_bus_lock(struct spi_controller *ctlr) |
cf32b71e ES |
3233 | { |
3234 | unsigned long flags; | |
3235 | ||
8caab75f | 3236 | mutex_lock(&ctlr->bus_lock_mutex); |
cf32b71e | 3237 | |
8caab75f GU |
3238 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
3239 | ctlr->bus_lock_flag = 1; | |
3240 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); | |
cf32b71e ES |
3241 | |
3242 | /* mutex remains locked until spi_bus_unlock is called */ | |
3243 | ||
3244 | return 0; | |
3245 | } | |
3246 | EXPORT_SYMBOL_GPL(spi_bus_lock); | |
3247 | ||
3248 | /** | |
3249 | * spi_bus_unlock - release the lock for exclusive SPI bus usage | |
8caab75f | 3250 | * @ctlr: SPI bus master that was locked for exclusive bus access |
cf32b71e ES |
3251 | * Context: can sleep |
3252 | * | |
3253 | * This call may only be used from a context that may sleep. The sleep | |
3254 | * is non-interruptible, and has no timeout. | |
3255 | * | |
3256 | * This call releases an SPI bus lock previously obtained by an spi_bus_lock | |
3257 | * call. | |
3258 | * | |
97d56dc6 | 3259 | * Return: always zero. |
cf32b71e | 3260 | */ |
8caab75f | 3261 | int spi_bus_unlock(struct spi_controller *ctlr) |
cf32b71e | 3262 | { |
8caab75f | 3263 | ctlr->bus_lock_flag = 0; |
cf32b71e | 3264 | |
8caab75f | 3265 | mutex_unlock(&ctlr->bus_lock_mutex); |
cf32b71e ES |
3266 | |
3267 | return 0; | |
3268 | } | |
3269 | EXPORT_SYMBOL_GPL(spi_bus_unlock); | |
3270 | ||
a9948b61 | 3271 | /* portable code must never pass more than 32 bytes */ |
5fe5f05e | 3272 | #define SPI_BUFSIZ max(32, SMP_CACHE_BYTES) |
8ae12a0d DB |
3273 | |
3274 | static u8 *buf; | |
3275 | ||
3276 | /** | |
3277 | * spi_write_then_read - SPI synchronous write followed by read | |
3278 | * @spi: device with which data will be exchanged | |
3279 | * @txbuf: data to be written (need not be dma-safe) | |
3280 | * @n_tx: size of txbuf, in bytes | |
27570497 JP |
3281 | * @rxbuf: buffer into which data will be read (need not be dma-safe) |
3282 | * @n_rx: size of rxbuf, in bytes | |
33e34dc6 | 3283 | * Context: can sleep |
8ae12a0d DB |
3284 | * |
3285 | * This performs a half duplex MicroWire style transaction with the | |
3286 | * device, sending txbuf and then reading rxbuf. The return value | |
3287 | * is zero for success, else a negative errno status code. | |
b885244e | 3288 | * This call may only be used from a context that may sleep. |
8ae12a0d | 3289 | * |
0c868461 | 3290 | * Parameters to this routine are always copied using a small buffer; |
33e34dc6 DB |
3291 | * portable code should never use this for more than 32 bytes. |
3292 | * Performance-sensitive or bulk transfer code should instead use | |
0c868461 | 3293 | * spi_{async,sync}() calls with dma-safe buffers. |
97d56dc6 JMC |
3294 | * |
3295 | * Return: zero on success, else a negative error code. | |
8ae12a0d DB |
3296 | */ |
3297 | int spi_write_then_read(struct spi_device *spi, | |
0c4a1590 MB |
3298 | const void *txbuf, unsigned n_tx, |
3299 | void *rxbuf, unsigned n_rx) | |
8ae12a0d | 3300 | { |
068f4070 | 3301 | static DEFINE_MUTEX(lock); |
8ae12a0d DB |
3302 | |
3303 | int status; | |
3304 | struct spi_message message; | |
bdff549e | 3305 | struct spi_transfer x[2]; |
8ae12a0d DB |
3306 | u8 *local_buf; |
3307 | ||
b3a223ee MB |
3308 | /* Use preallocated DMA-safe buffer if we can. We can't avoid |
3309 | * copying here, (as a pure convenience thing), but we can | |
3310 | * keep heap costs out of the hot path unless someone else is | |
3311 | * using the pre-allocated buffer or the transfer is too large. | |
8ae12a0d | 3312 | */ |
b3a223ee | 3313 | if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) { |
2cd94c8a MB |
3314 | local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx), |
3315 | GFP_KERNEL | GFP_DMA); | |
b3a223ee MB |
3316 | if (!local_buf) |
3317 | return -ENOMEM; | |
3318 | } else { | |
3319 | local_buf = buf; | |
3320 | } | |
8ae12a0d | 3321 | |
8275c642 | 3322 | spi_message_init(&message); |
5fe5f05e | 3323 | memset(x, 0, sizeof(x)); |
bdff549e DB |
3324 | if (n_tx) { |
3325 | x[0].len = n_tx; | |
3326 | spi_message_add_tail(&x[0], &message); | |
3327 | } | |
3328 | if (n_rx) { | |
3329 | x[1].len = n_rx; | |
3330 | spi_message_add_tail(&x[1], &message); | |
3331 | } | |
8275c642 | 3332 | |
8ae12a0d | 3333 | memcpy(local_buf, txbuf, n_tx); |
bdff549e DB |
3334 | x[0].tx_buf = local_buf; |
3335 | x[1].rx_buf = local_buf + n_tx; | |
8ae12a0d DB |
3336 | |
3337 | /* do the i/o */ | |
8ae12a0d | 3338 | status = spi_sync(spi, &message); |
9b938b74 | 3339 | if (status == 0) |
bdff549e | 3340 | memcpy(rxbuf, x[1].rx_buf, n_rx); |
8ae12a0d | 3341 | |
bdff549e | 3342 | if (x[0].tx_buf == buf) |
068f4070 | 3343 | mutex_unlock(&lock); |
8ae12a0d DB |
3344 | else |
3345 | kfree(local_buf); | |
3346 | ||
3347 | return status; | |
3348 | } | |
3349 | EXPORT_SYMBOL_GPL(spi_write_then_read); | |
3350 | ||
3351 | /*-------------------------------------------------------------------------*/ | |
3352 | ||
ce79d54a PA |
3353 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) |
3354 | static int __spi_of_device_match(struct device *dev, void *data) | |
3355 | { | |
3356 | return dev->of_node == data; | |
3357 | } | |
3358 | ||
3359 | /* must call put_device() when done with returned spi_device device */ | |
3360 | static struct spi_device *of_find_spi_device_by_node(struct device_node *node) | |
3361 | { | |
3362 | struct device *dev = bus_find_device(&spi_bus_type, NULL, node, | |
3363 | __spi_of_device_match); | |
3364 | return dev ? to_spi_device(dev) : NULL; | |
3365 | } | |
3366 | ||
8caab75f | 3367 | static int __spi_of_controller_match(struct device *dev, const void *data) |
ce79d54a PA |
3368 | { |
3369 | return dev->of_node == data; | |
3370 | } | |
3371 | ||
8caab75f GU |
3372 | /* the spi controllers are not using spi_bus, so we find it with another way */ |
3373 | static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node) | |
ce79d54a PA |
3374 | { |
3375 | struct device *dev; | |
3376 | ||
3377 | dev = class_find_device(&spi_master_class, NULL, node, | |
8caab75f | 3378 | __spi_of_controller_match); |
6c364062 GU |
3379 | if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE)) |
3380 | dev = class_find_device(&spi_slave_class, NULL, node, | |
8caab75f | 3381 | __spi_of_controller_match); |
ce79d54a PA |
3382 | if (!dev) |
3383 | return NULL; | |
3384 | ||
3385 | /* reference got in class_find_device */ | |
8caab75f | 3386 | return container_of(dev, struct spi_controller, dev); |
ce79d54a PA |
3387 | } |
3388 | ||
3389 | static int of_spi_notify(struct notifier_block *nb, unsigned long action, | |
3390 | void *arg) | |
3391 | { | |
3392 | struct of_reconfig_data *rd = arg; | |
8caab75f | 3393 | struct spi_controller *ctlr; |
ce79d54a PA |
3394 | struct spi_device *spi; |
3395 | ||
3396 | switch (of_reconfig_get_state_change(action, arg)) { | |
3397 | case OF_RECONFIG_CHANGE_ADD: | |
8caab75f GU |
3398 | ctlr = of_find_spi_controller_by_node(rd->dn->parent); |
3399 | if (ctlr == NULL) | |
ce79d54a PA |
3400 | return NOTIFY_OK; /* not for us */ |
3401 | ||
bd6c1644 | 3402 | if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) { |
8caab75f | 3403 | put_device(&ctlr->dev); |
bd6c1644 GU |
3404 | return NOTIFY_OK; |
3405 | } | |
3406 | ||
8caab75f GU |
3407 | spi = of_register_spi_device(ctlr, rd->dn); |
3408 | put_device(&ctlr->dev); | |
ce79d54a PA |
3409 | |
3410 | if (IS_ERR(spi)) { | |
25c56c88 RH |
3411 | pr_err("%s: failed to create for '%pOF'\n", |
3412 | __func__, rd->dn); | |
e0af98a7 | 3413 | of_node_clear_flag(rd->dn, OF_POPULATED); |
ce79d54a PA |
3414 | return notifier_from_errno(PTR_ERR(spi)); |
3415 | } | |
3416 | break; | |
3417 | ||
3418 | case OF_RECONFIG_CHANGE_REMOVE: | |
bd6c1644 GU |
3419 | /* already depopulated? */ |
3420 | if (!of_node_check_flag(rd->dn, OF_POPULATED)) | |
3421 | return NOTIFY_OK; | |
3422 | ||
ce79d54a PA |
3423 | /* find our device by node */ |
3424 | spi = of_find_spi_device_by_node(rd->dn); | |
3425 | if (spi == NULL) | |
3426 | return NOTIFY_OK; /* no? not meant for us */ | |
3427 | ||
3428 | /* unregister takes one ref away */ | |
3429 | spi_unregister_device(spi); | |
3430 | ||
3431 | /* and put the reference of the find */ | |
3432 | put_device(&spi->dev); | |
3433 | break; | |
3434 | } | |
3435 | ||
3436 | return NOTIFY_OK; | |
3437 | } | |
3438 | ||
3439 | static struct notifier_block spi_of_notifier = { | |
3440 | .notifier_call = of_spi_notify, | |
3441 | }; | |
3442 | #else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ | |
3443 | extern struct notifier_block spi_of_notifier; | |
3444 | #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ | |
3445 | ||
7f24467f | 3446 | #if IS_ENABLED(CONFIG_ACPI) |
8caab75f | 3447 | static int spi_acpi_controller_match(struct device *dev, const void *data) |
7f24467f OP |
3448 | { |
3449 | return ACPI_COMPANION(dev->parent) == data; | |
3450 | } | |
3451 | ||
3452 | static int spi_acpi_device_match(struct device *dev, void *data) | |
3453 | { | |
3454 | return ACPI_COMPANION(dev) == data; | |
3455 | } | |
3456 | ||
8caab75f | 3457 | static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev) |
7f24467f OP |
3458 | { |
3459 | struct device *dev; | |
3460 | ||
3461 | dev = class_find_device(&spi_master_class, NULL, adev, | |
8caab75f | 3462 | spi_acpi_controller_match); |
6c364062 GU |
3463 | if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE)) |
3464 | dev = class_find_device(&spi_slave_class, NULL, adev, | |
8caab75f | 3465 | spi_acpi_controller_match); |
7f24467f OP |
3466 | if (!dev) |
3467 | return NULL; | |
3468 | ||
8caab75f | 3469 | return container_of(dev, struct spi_controller, dev); |
7f24467f OP |
3470 | } |
3471 | ||
3472 | static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev) | |
3473 | { | |
3474 | struct device *dev; | |
3475 | ||
3476 | dev = bus_find_device(&spi_bus_type, NULL, adev, spi_acpi_device_match); | |
3477 | ||
3478 | return dev ? to_spi_device(dev) : NULL; | |
3479 | } | |
3480 | ||
3481 | static int acpi_spi_notify(struct notifier_block *nb, unsigned long value, | |
3482 | void *arg) | |
3483 | { | |
3484 | struct acpi_device *adev = arg; | |
8caab75f | 3485 | struct spi_controller *ctlr; |
7f24467f OP |
3486 | struct spi_device *spi; |
3487 | ||
3488 | switch (value) { | |
3489 | case ACPI_RECONFIG_DEVICE_ADD: | |
8caab75f GU |
3490 | ctlr = acpi_spi_find_controller_by_adev(adev->parent); |
3491 | if (!ctlr) | |
7f24467f OP |
3492 | break; |
3493 | ||
8caab75f GU |
3494 | acpi_register_spi_device(ctlr, adev); |
3495 | put_device(&ctlr->dev); | |
7f24467f OP |
3496 | break; |
3497 | case ACPI_RECONFIG_DEVICE_REMOVE: | |
3498 | if (!acpi_device_enumerated(adev)) | |
3499 | break; | |
3500 | ||
3501 | spi = acpi_spi_find_device_by_adev(adev); | |
3502 | if (!spi) | |
3503 | break; | |
3504 | ||
3505 | spi_unregister_device(spi); | |
3506 | put_device(&spi->dev); | |
3507 | break; | |
3508 | } | |
3509 | ||
3510 | return NOTIFY_OK; | |
3511 | } | |
3512 | ||
3513 | static struct notifier_block spi_acpi_notifier = { | |
3514 | .notifier_call = acpi_spi_notify, | |
3515 | }; | |
3516 | #else | |
3517 | extern struct notifier_block spi_acpi_notifier; | |
3518 | #endif | |
3519 | ||
8ae12a0d DB |
3520 | static int __init spi_init(void) |
3521 | { | |
b885244e DB |
3522 | int status; |
3523 | ||
e94b1766 | 3524 | buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL); |
b885244e DB |
3525 | if (!buf) { |
3526 | status = -ENOMEM; | |
3527 | goto err0; | |
3528 | } | |
3529 | ||
3530 | status = bus_register(&spi_bus_type); | |
3531 | if (status < 0) | |
3532 | goto err1; | |
8ae12a0d | 3533 | |
b885244e DB |
3534 | status = class_register(&spi_master_class); |
3535 | if (status < 0) | |
3536 | goto err2; | |
ce79d54a | 3537 | |
6c364062 GU |
3538 | if (IS_ENABLED(CONFIG_SPI_SLAVE)) { |
3539 | status = class_register(&spi_slave_class); | |
3540 | if (status < 0) | |
3541 | goto err3; | |
3542 | } | |
3543 | ||
5267720e | 3544 | if (IS_ENABLED(CONFIG_OF_DYNAMIC)) |
ce79d54a | 3545 | WARN_ON(of_reconfig_notifier_register(&spi_of_notifier)); |
7f24467f OP |
3546 | if (IS_ENABLED(CONFIG_ACPI)) |
3547 | WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier)); | |
ce79d54a | 3548 | |
8ae12a0d | 3549 | return 0; |
b885244e | 3550 | |
6c364062 GU |
3551 | err3: |
3552 | class_unregister(&spi_master_class); | |
b885244e DB |
3553 | err2: |
3554 | bus_unregister(&spi_bus_type); | |
3555 | err1: | |
3556 | kfree(buf); | |
3557 | buf = NULL; | |
3558 | err0: | |
3559 | return status; | |
8ae12a0d | 3560 | } |
b885244e | 3561 | |
8ae12a0d DB |
3562 | /* board_info is normally registered in arch_initcall(), |
3563 | * but even essential drivers wait till later | |
b885244e DB |
3564 | * |
3565 | * REVISIT only boardinfo really needs static linking. the rest (device and | |
3566 | * driver registration) _could_ be dynamically linked (modular) ... costs | |
3567 | * include needing to have boardinfo data structures be much more public. | |
8ae12a0d | 3568 | */ |
673c0c00 | 3569 | postcore_initcall(spi_init); |
8ae12a0d | 3570 |