[mirror_ubuntu-bionic-kernel.git] / drivers / ssb / driver_gpio.c

/*
 * Sonics Silicon Backplane
 * GPIO driver
 *
 * Copyright 2011, Broadcom Corporation
 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include <linux/gpio/driver.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/export.h>
#include <linux/ssb/ssb.h>

#include "ssb_private.h"


/**************************************************
 * Shared
 **************************************************/

#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	if (bus->bustype == SSB_BUSTYPE_SSB)
		return irq_find_mapping(bus->irq_domain, gpio);
	else
		return -EINVAL;
}
#endif

/**************************************************
 * ChipCommon
 **************************************************/

static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
}

static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio,
				      int value)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
}

static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
					   unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
	return 0;
}

static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
					    unsigned int gpio, int value)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
	ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
	return 0;
}

static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
	/* clear pulldown */
	ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
	/* Set pullup */
	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);

	return 0;
}

static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	/* clear pullup */
	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
}

#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);

	ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
}

static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);
	u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));

	ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
	ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
}

static struct irq_chip ssb_gpio_irq_chipco_chip = {
	.name		= "SSB-GPIO-CC",
	.irq_mask	= ssb_gpio_irq_chipco_mask,
	.irq_unmask	= ssb_gpio_irq_chipco_unmask,
};

static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
{
	struct ssb_bus *bus = dev_id;
	struct ssb_chipcommon *chipco = &bus->chipco;
	u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
	u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
	u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
	unsigned long irqs = (val ^ pol) & mask;
	int gpio;

	if (!irqs)
		return IRQ_NONE;

	for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
		generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
	ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);

	return IRQ_HANDLED;
}

static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
{
	struct ssb_chipcommon *chipco = &bus->chipco;
	struct gpio_chip *chip = &bus->gpio;
	int gpio, hwirq, err;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return 0;

	bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
						&irq_domain_simple_ops, chipco);
	if (!bus->irq_domain) {
		err = -ENODEV;
		goto err_irq_domain;
	}
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_create_mapping(bus->irq_domain, gpio);

		irq_set_chip_data(irq, bus);
		irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
					 handle_simple_irq);
	}

	hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
	err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
			  "gpio", bus);
	if (err)
		goto err_req_irq;

	ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
	chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);

	return 0;

err_req_irq:
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
err_irq_domain:
	return err;
}

static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
{
	struct ssb_chipcommon *chipco = &bus->chipco;
	struct gpio_chip *chip = &bus->gpio;
	int gpio;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return;

	chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
	free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
}
#else
static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
{
	return 0;
}

static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
{
}
#endif

static int ssb_gpio_chipco_init(struct ssb_bus *bus)
{
	struct gpio_chip *chip = &bus->gpio;
	int err;

	chip->label		= "ssb_chipco_gpio";
	chip->owner		= THIS_MODULE;
	chip->request		= ssb_gpio_chipco_request;
	chip->free		= ssb_gpio_chipco_free;
	chip->get		= ssb_gpio_chipco_get_value;
	chip->set		= ssb_gpio_chipco_set_value;
	chip->direction_input	= ssb_gpio_chipco_direction_input;
	chip->direction_output	= ssb_gpio_chipco_direction_output;
#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
	chip->to_irq		= ssb_gpio_to_irq;
#endif
	chip->ngpio		= 16;
	/* There is just one SoC in one device and its GPIO addresses should be
	 * deterministic to address them more easily. The other buses could get
	 * a random base number. */
	if (bus->bustype == SSB_BUSTYPE_SSB)
		chip->base		= 0;
	else
		chip->base		= -1;

	err = ssb_gpio_irq_chipco_domain_init(bus);
	if (err)
		return err;

	err = gpiochip_add_data(chip, bus);
	if (err) {
		ssb_gpio_irq_chipco_domain_exit(bus);
		return err;
	}

	return 0;
}

/**************************************************
 * EXTIF
 **************************************************/

#ifdef CONFIG_SSB_DRIVER_EXTIF

static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
}

static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned int gpio,
				     int value)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
}

static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
					  unsigned int gpio)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
	return 0;
}

static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
					   unsigned int gpio, int value)
{
	struct ssb_bus *bus = gpiochip_get_data(chip);

	ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
	ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
	return 0;
}

#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
static void ssb_gpio_irq_extif_mask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);

	ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
}

static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
{
	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	int gpio = irqd_to_hwirq(d);
	u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));

	ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
	ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
}

static struct irq_chip ssb_gpio_irq_extif_chip = {
	.name		= "SSB-GPIO-EXTIF",
	.irq_mask	= ssb_gpio_irq_extif_mask,
	.irq_unmask	= ssb_gpio_irq_extif_unmask,
};

static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
{
	struct ssb_bus *bus = dev_id;
	struct ssb_extif *extif = &bus->extif;
	u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
	u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
	u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
	unsigned long irqs = (val ^ pol) & mask;
	int gpio;

	if (!irqs)
		return IRQ_NONE;

	for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
		generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
	ssb_extif_gpio_polarity(extif, irqs, val & irqs);

	return IRQ_HANDLED;
}

static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
{
	struct ssb_extif *extif = &bus->extif;
	struct gpio_chip *chip = &bus->gpio;
	int gpio, hwirq, err;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return 0;

	bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
						&irq_domain_simple_ops, extif);
	if (!bus->irq_domain) {
		err = -ENODEV;
		goto err_irq_domain;
	}
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_create_mapping(bus->irq_domain, gpio);

		irq_set_chip_data(irq, bus);
		irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
					 handle_simple_irq);
	}

	hwirq = ssb_mips_irq(bus->extif.dev) + 2;
	err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
			  "gpio", bus);
	if (err)
		goto err_req_irq;

	ssb_extif_gpio_intmask(&bus->extif, ~0, 0);

	return 0;

err_req_irq:
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
err_irq_domain:
	return err;
}

static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
{
	struct ssb_extif *extif = &bus->extif;
	struct gpio_chip *chip = &bus->gpio;
	int gpio;

	if (bus->bustype != SSB_BUSTYPE_SSB)
		return;

	free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
	for (gpio = 0; gpio < chip->ngpio; gpio++) {
		int irq = irq_find_mapping(bus->irq_domain, gpio);

		irq_dispose_mapping(irq);
	}
	irq_domain_remove(bus->irq_domain);
}
#else
static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
{
	return 0;
}

static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
{
}
#endif

static int ssb_gpio_extif_init(struct ssb_bus *bus)
{
	struct gpio_chip *chip = &bus->gpio;
	int err;

	chip->label		= "ssb_extif_gpio";
	chip->owner		= THIS_MODULE;
	chip->get		= ssb_gpio_extif_get_value;
	chip->set		= ssb_gpio_extif_set_value;
	chip->direction_input	= ssb_gpio_extif_direction_input;
	chip->direction_output	= ssb_gpio_extif_direction_output;
#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
	chip->to_irq		= ssb_gpio_to_irq;
#endif
	chip->ngpio		= 5;
	/* There is just one SoC in one device and its GPIO addresses should be
	 * deterministic to address them more easily. The other buses could get
	 * a random base number. */
	if (bus->bustype == SSB_BUSTYPE_SSB)
		chip->base		= 0;
	else
		chip->base		= -1;

	err = ssb_gpio_irq_extif_domain_init(bus);
	if (err)
		return err;

	err = gpiochip_add_data(chip, bus);
	if (err) {
		ssb_gpio_irq_extif_domain_exit(bus);
		return err;
	}

	return 0;
}

#else
static int ssb_gpio_extif_init(struct ssb_bus *bus)
{
	return -ENOTSUPP;
}
#endif

/**************************************************
 * Init
 **************************************************/

int ssb_gpio_init(struct ssb_bus *bus)
{
	if (ssb_chipco_available(&bus->chipco))
		return ssb_gpio_chipco_init(bus);
	else if (ssb_extif_available(&bus->extif))
		return ssb_gpio_extif_init(bus);
	else
		SSB_WARN_ON(1);

	return -1;
}

int ssb_gpio_unregister(struct ssb_bus *bus)
{
	if (ssb_chipco_available(&bus->chipco) ||
	    ssb_extif_available(&bus->extif)) {
		gpiochip_remove(&bus->gpio);
		return 0;
	} else {
		SSB_WARN_ON(1);
	}

	return -1;
}
Commit	Line	Data
ec43b08b HM	1	/*
	2	* Sonics Silicon Backplane
	3	* GPIO driver
	4	*
	5	* Copyright 2011, Broadcom Corporation
	6	* Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
	7	*
	8	* Licensed under the GNU/GPL. See COPYING for details.
	9	*/
	10
2d4443be	11	#include <linux/gpio/driver.h>
7c1bc0da RM	12	#include <linux/irq.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/irqdomain.h>
ec43b08b HM	15	#include <linux/export.h>
	16	#include <linux/ssb/ssb.h>
	17
	18	#include "ssb_private.h"
	19
7c1bc0da RM	20
	21	/**************************************************
	22	* Shared
	23	**************************************************/
	24
7c1bc0da	25	#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
c683ffe2	26	static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
7c1bc0da	27	{
2d4443be	28	struct ssb_bus *bus = gpiochip_get_data(chip);
7c1bc0da RM	29
	30	if (bus->bustype == SSB_BUSTYPE_SSB)
	31	return irq_find_mapping(bus->irq_domain, gpio);
	32	else
	33	return -EINVAL;
	34	}
	35	#endif
	36
	37	/**************************************************
	38	* ChipCommon
	39	**************************************************/
	40
c683ffe2	41	static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio)
ec43b08b	42	{
2d4443be	43	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	44
	45	return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
	46	}
	47
c683ffe2	48	static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio,
ec43b08b HM	49	int value)
ec43b08b HM	50	{
2d4443be	51	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	52
	53	ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
	54	}
	55
	56	static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
c683ffe2	57	unsigned int gpio)
ec43b08b	58	{
2d4443be	59	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	60
	61	ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
	62	return 0;
	63	}
	64
	65	static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
c683ffe2	66	unsigned int gpio, int value)
ec43b08b	67	{
2d4443be	68	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	69
	70	ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
	71	ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
	72	return 0;
	73	}
	74
c683ffe2	75	static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned int gpio)
ec43b08b	76	{
2d4443be	77	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	78
	79	ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
	80	/* clear pulldown */
	81	ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
	82	/* Set pullup */
	83	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
	84
	85	return 0;
	86	}
	87
c683ffe2	88	static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned int gpio)
ec43b08b	89	{
2d4443be	90	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	91
	92	/* clear pullup */
	93	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
	94	}
	95
7c1bc0da RM	96	#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
7c1bc0da RM	97	static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
a6ca2e10	98	{
7c1bc0da RM	99	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
7c1bc0da RM	100	int gpio = irqd_to_hwirq(d);
a6ca2e10	101
7c1bc0da RM	102	ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
	103	}
	104
	105	static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
	106	{
	107	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	108	int gpio = irqd_to_hwirq(d);
	109	u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
	110
	111	ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
	112	ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
	113	}
	114
	115	static struct irq_chip ssb_gpio_irq_chipco_chip = {
	116	.name = "SSB-GPIO-CC",
	117	.irq_mask = ssb_gpio_irq_chipco_mask,
	118	.irq_unmask = ssb_gpio_irq_chipco_unmask,
	119	};
	120
	121	static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
	122	{
	123	struct ssb_bus *bus = dev_id;
	124	struct ssb_chipcommon *chipco = &bus->chipco;
	125	u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
	126	u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
	127	u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
	128	unsigned long irqs = (val ^ pol) & mask;
	129	int gpio;
	130
	131	if (!irqs)
	132	return IRQ_NONE;
	133
	134	for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
	135	generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
	136	ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
	137
	138	return IRQ_HANDLED;
	139	}
	140
	141	static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
	142	{
	143	struct ssb_chipcommon *chipco = &bus->chipco;
	144	struct gpio_chip *chip = &bus->gpio;
	145	int gpio, hwirq, err;
	146
	147	if (bus->bustype != SSB_BUSTYPE_SSB)
	148	return 0;
	149
	150	bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
	151	&irq_domain_simple_ops, chipco);
	152	if (!bus->irq_domain) {
	153	err = -ENODEV;
	154	goto err_irq_domain;
	155	}
	156	for (gpio = 0; gpio < chip->ngpio; gpio++) {
	157	int irq = irq_create_mapping(bus->irq_domain, gpio);
	158
	159	irq_set_chip_data(irq, bus);
	160	irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
	161	handle_simple_irq);
	162	}
	163
	164	hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
	165	err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
166	"gpio", bus);
167	if (err)
168	goto err_req_irq;
169
170	ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
171	chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
172
173	return 0;
174
175	err_req_irq:
176	for (gpio = 0; gpio < chip->ngpio; gpio++) {
177	int irq = irq_find_mapping(bus->irq_domain, gpio);
178
179	irq_dispose_mapping(irq);
180	}
181	irq_domain_remove(bus->irq_domain);
182	err_irq_domain:
183	return err;
184	}
185
186	static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
187	{
188	struct ssb_chipcommon *chipco = &bus->chipco;
189	struct gpio_chip *chip = &bus->gpio;
190	int gpio;
191
192	if (bus->bustype != SSB_BUSTYPE_SSB)
193	return;
194
195	chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
196	free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
197	for (gpio = 0; gpio < chip->ngpio; gpio++) {
198	int irq = irq_find_mapping(bus->irq_domain, gpio);
199
200	irq_dispose_mapping(irq);
201	}
202	irq_domain_remove(bus->irq_domain);
203	}
204	#else
205	static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
206	{
207	return 0;
a6ca2e10 HM	208	}
a6ca2e10 HM	209
7c1bc0da RM	210	static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
	211	{
	212	}
	213	#endif
	214
ec43b08b HM	215	static int ssb_gpio_chipco_init(struct ssb_bus *bus)
	216	{
	217	struct gpio_chip *chip = &bus->gpio;
7c1bc0da	218	int err;
ec43b08b HM	219
	220	chip->label = "ssb_chipco_gpio";
	221	chip->owner = THIS_MODULE;
	222	chip->request = ssb_gpio_chipco_request;
	223	chip->free = ssb_gpio_chipco_free;
	224	chip->get = ssb_gpio_chipco_get_value;
	225	chip->set = ssb_gpio_chipco_set_value;
	226	chip->direction_input = ssb_gpio_chipco_direction_input;
	227	chip->direction_output = ssb_gpio_chipco_direction_output;
7c1bc0da RM	228	#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
	229	chip->to_irq = ssb_gpio_to_irq;
	230	#endif
ec43b08b HM	231	chip->ngpio = 16;
	232	/* There is just one SoC in one device and its GPIO addresses should be
	233	* deterministic to address them more easily. The other buses could get
	234	* a random base number. */
	235	if (bus->bustype == SSB_BUSTYPE_SSB)
	236	chip->base = 0;
	237	else
	238	chip->base = -1;
	239
7c1bc0da RM	240	err = ssb_gpio_irq_chipco_domain_init(bus);
	241	if (err)
	242	return err;
	243
2d4443be	244	err = gpiochip_add_data(chip, bus);
7c1bc0da RM	245	if (err) {
	246	ssb_gpio_irq_chipco_domain_exit(bus);
	247	return err;
	248	}
	249
	250	return 0;
ec43b08b HM	251	}
ec43b08b HM	252
7c1bc0da RM	253	/**************************************************
	254	* EXTIF
	255	**************************************************/
	256
ec43b08b HM	257	#ifdef CONFIG_SSB_DRIVER_EXTIF
ec43b08b HM	258
c683ffe2	259	static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned int gpio)
ec43b08b	260	{
2d4443be	261	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	262
	263	return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
	264	}
	265
c683ffe2	266	static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned int gpio,
ec43b08b HM	267	int value)
ec43b08b HM	268	{
2d4443be	269	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	270
	271	ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
	272	}
	273
	274	static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
c683ffe2	275	unsigned int gpio)
ec43b08b	276	{
2d4443be	277	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	278
	279	ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
	280	return 0;
	281	}
	282
	283	static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
c683ffe2	284	unsigned int gpio, int value)
ec43b08b	285	{
2d4443be	286	struct ssb_bus *bus = gpiochip_get_data(chip);
ec43b08b HM	287
	288	ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
	289	ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
	290	return 0;
	291	}
	292
7c1bc0da RM	293	#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
7c1bc0da RM	294	static void ssb_gpio_irq_extif_mask(struct irq_data *d)
a6ca2e10	295	{
7c1bc0da RM	296	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
7c1bc0da RM	297	int gpio = irqd_to_hwirq(d);
a6ca2e10	298
7c1bc0da RM	299	ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
	300	}
	301
	302	static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
	303	{
	304	struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
	305	int gpio = irqd_to_hwirq(d);
	306	u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
	307
	308	ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
	309	ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
	310	}
	311
	312	static struct irq_chip ssb_gpio_irq_extif_chip = {
	313	.name = "SSB-GPIO-EXTIF",
	314	.irq_mask = ssb_gpio_irq_extif_mask,
	315	.irq_unmask = ssb_gpio_irq_extif_unmask,
	316	};
	317
	318	static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
	319	{
	320	struct ssb_bus *bus = dev_id;
	321	struct ssb_extif *extif = &bus->extif;
	322	u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
	323	u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
	324	u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
	325	unsigned long irqs = (val ^ pol) & mask;
	326	int gpio;
	327
	328	if (!irqs)
	329	return IRQ_NONE;
	330
	331	for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
	332	generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
	333	ssb_extif_gpio_polarity(extif, irqs, val & irqs);
	334
	335	return IRQ_HANDLED;
	336	}
	337
	338	static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
	339	{
	340	struct ssb_extif *extif = &bus->extif;
	341	struct gpio_chip *chip = &bus->gpio;
	342	int gpio, hwirq, err;
	343
	344	if (bus->bustype != SSB_BUSTYPE_SSB)
	345	return 0;
	346
	347	bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
	348	&irq_domain_simple_ops, extif);
	349	if (!bus->irq_domain) {
	350	err = -ENODEV;
	351	goto err_irq_domain;
	352	}
	353	for (gpio = 0; gpio < chip->ngpio; gpio++) {
	354	int irq = irq_create_mapping(bus->irq_domain, gpio);
	355
	356	irq_set_chip_data(irq, bus);
	357	irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
	358	handle_simple_irq);
	359	}
	360
	361	hwirq = ssb_mips_irq(bus->extif.dev) + 2;
	362	err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
363	"gpio", bus);
364	if (err)
365	goto err_req_irq;
366
367	ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
368
369	return 0;
370
371	err_req_irq:
372	for (gpio = 0; gpio < chip->ngpio; gpio++) {
373	int irq = irq_find_mapping(bus->irq_domain, gpio);
374
375	irq_dispose_mapping(irq);
376	}
377	irq_domain_remove(bus->irq_domain);
378	err_irq_domain:
379	return err;
380	}
381
382	static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
383	{
384	struct ssb_extif *extif = &bus->extif;
385	struct gpio_chip *chip = &bus->gpio;
386	int gpio;
387
388	if (bus->bustype != SSB_BUSTYPE_SSB)
389	return;
390
391	free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
392	for (gpio = 0; gpio < chip->ngpio; gpio++) {
393	int irq = irq_find_mapping(bus->irq_domain, gpio);
394
395	irq_dispose_mapping(irq);
396	}
397	irq_domain_remove(bus->irq_domain);
a6ca2e10	398	}
7c1bc0da RM	399	#else
	400	static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
	401	{
	402	return 0;
	403	}
	404
	405	static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
	406	{
	407	}
	408	#endif
a6ca2e10	409
ec43b08b HM	410	static int ssb_gpio_extif_init(struct ssb_bus *bus)
	411	{
	412	struct gpio_chip *chip = &bus->gpio;
7c1bc0da	413	int err;
ec43b08b HM	414
	415	chip->label = "ssb_extif_gpio";
	416	chip->owner = THIS_MODULE;
	417	chip->get = ssb_gpio_extif_get_value;
	418	chip->set = ssb_gpio_extif_set_value;
	419	chip->direction_input = ssb_gpio_extif_direction_input;
	420	chip->direction_output = ssb_gpio_extif_direction_output;
7c1bc0da RM	421	#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
	422	chip->to_irq = ssb_gpio_to_irq;
	423	#endif
ec43b08b HM	424	chip->ngpio = 5;
	425	/* There is just one SoC in one device and its GPIO addresses should be
	426	* deterministic to address them more easily. The other buses could get
	427	* a random base number. */
	428	if (bus->bustype == SSB_BUSTYPE_SSB)
	429	chip->base = 0;
	430	else
	431	chip->base = -1;
	432
7c1bc0da RM	433	err = ssb_gpio_irq_extif_domain_init(bus);
	434	if (err)
	435	return err;
	436
2d4443be	437	err = gpiochip_add_data(chip, bus);
7c1bc0da RM	438	if (err) {
	439	ssb_gpio_irq_extif_domain_exit(bus);
	440	return err;
	441	}
	442
	443	return 0;
ec43b08b HM	444	}
	445
	446	#else
	447	static int ssb_gpio_extif_init(struct ssb_bus *bus)
	448	{
	449	return -ENOTSUPP;
	450	}
	451	#endif
	452
7c1bc0da RM	453	/**************************************************
	454	* Init
	455	**************************************************/
	456
ec43b08b HM	457	int ssb_gpio_init(struct ssb_bus *bus)
	458	{
	459	if (ssb_chipco_available(&bus->chipco))
	460	return ssb_gpio_chipco_init(bus);
	461	else if (ssb_extif_available(&bus->extif))
	462	return ssb_gpio_extif_init(bus);
	463	else
	464	SSB_WARN_ON(1);
	465
	466	return -1;
	467	}
600485ed HM	468
	469	int ssb_gpio_unregister(struct ssb_bus *bus)
	470	{
	471	if (ssb_chipco_available(&bus->chipco) \|\|
	472	ssb_extif_available(&bus->extif)) {
88d5e520	473	gpiochip_remove(&bus->gpio);
88d5e520	474	return 0;
600485ed HM	475	} else {
	476	SSB_WARN_ON(1);
	477	}
	478
	479	return -1;
	480	}