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1 | #ifndef LINUX_SSB_PRIVATE_H_ |
2 | #define LINUX_SSB_PRIVATE_H_ | |
3 | ||
4 | #include <linux/ssb/ssb.h> | |
5 | #include <linux/types.h> | |
6 | ||
7 | ||
8 | #define PFX "ssb: " | |
9 | ||
10 | #ifdef CONFIG_SSB_SILENT | |
11 | # define ssb_printk(fmt, x...) do { /* nothing */ } while (0) | |
12 | #else | |
13 | # define ssb_printk printk | |
14 | #endif /* CONFIG_SSB_SILENT */ | |
15 | ||
16 | /* dprintk: Debugging printk; vanishes for non-debug compilation */ | |
17 | #ifdef CONFIG_SSB_DEBUG | |
18 | # define ssb_dprintk(fmt, x...) ssb_printk(fmt , ##x) | |
19 | #else | |
20 | # define ssb_dprintk(fmt, x...) do { /* nothing */ } while (0) | |
21 | #endif | |
22 | ||
23 | #ifdef CONFIG_SSB_DEBUG | |
24 | # define SSB_WARN_ON(x) WARN_ON(x) | |
25 | # define SSB_BUG_ON(x) BUG_ON(x) | |
26 | #else | |
27 | static inline int __ssb_do_nothing(int x) { return x; } | |
28 | # define SSB_WARN_ON(x) __ssb_do_nothing(unlikely(!!(x))) | |
29 | # define SSB_BUG_ON(x) __ssb_do_nothing(unlikely(!!(x))) | |
30 | #endif | |
31 | ||
32 | ||
33 | /* pci.c */ | |
34 | #ifdef CONFIG_SSB_PCIHOST | |
35 | extern int ssb_pci_switch_core(struct ssb_bus *bus, | |
36 | struct ssb_device *dev); | |
37 | extern int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
38 | u8 coreidx); | |
39 | extern int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
40 | int turn_on); | |
41 | extern int ssb_pci_get_invariants(struct ssb_bus *bus, | |
42 | struct ssb_init_invariants *iv); | |
43 | extern void ssb_pci_exit(struct ssb_bus *bus); | |
44 | extern int ssb_pci_init(struct ssb_bus *bus); | |
45 | extern const struct ssb_bus_ops ssb_pci_ops; | |
46 | ||
47 | #else /* CONFIG_SSB_PCIHOST */ | |
48 | ||
49 | static inline int ssb_pci_switch_core(struct ssb_bus *bus, | |
50 | struct ssb_device *dev) | |
51 | { | |
52 | return 0; | |
53 | } | |
54 | static inline int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
55 | u8 coreidx) | |
56 | { | |
57 | return 0; | |
58 | } | |
59 | static inline int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
60 | int turn_on) | |
61 | { | |
62 | return 0; | |
63 | } | |
64 | static inline void ssb_pci_exit(struct ssb_bus *bus) | |
65 | { | |
66 | } | |
67 | static inline int ssb_pci_init(struct ssb_bus *bus) | |
68 | { | |
69 | return 0; | |
70 | } | |
71 | #endif /* CONFIG_SSB_PCIHOST */ | |
72 | ||
73 | ||
74 | /* pcmcia.c */ | |
75 | #ifdef CONFIG_SSB_PCMCIAHOST | |
76 | extern int ssb_pcmcia_switch_core(struct ssb_bus *bus, | |
77 | struct ssb_device *dev); | |
78 | extern int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, | |
79 | u8 coreidx); | |
80 | extern int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
81 | u8 seg); | |
82 | extern int ssb_pcmcia_get_invariants(struct ssb_bus *bus, | |
83 | struct ssb_init_invariants *iv); | |
8fe2b65a | 84 | extern int ssb_pcmcia_hardware_setup(struct ssb_bus *bus); |
e7ec2e32 | 85 | extern void ssb_pcmcia_exit(struct ssb_bus *bus); |
61e115a5 MB |
86 | extern int ssb_pcmcia_init(struct ssb_bus *bus); |
87 | extern const struct ssb_bus_ops ssb_pcmcia_ops; | |
88 | #else /* CONFIG_SSB_PCMCIAHOST */ | |
89 | static inline int ssb_pcmcia_switch_core(struct ssb_bus *bus, | |
90 | struct ssb_device *dev) | |
91 | { | |
92 | return 0; | |
93 | } | |
94 | static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, | |
95 | u8 coreidx) | |
96 | { | |
97 | return 0; | |
98 | } | |
99 | static inline int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
100 | u8 seg) | |
101 | { | |
102 | return 0; | |
103 | } | |
8fe2b65a MB |
104 | static inline int ssb_pcmcia_hardware_setup(struct ssb_bus *bus) |
105 | { | |
106 | return 0; | |
107 | } | |
e7ec2e32 MB |
108 | static inline void ssb_pcmcia_exit(struct ssb_bus *bus) |
109 | { | |
110 | } | |
61e115a5 MB |
111 | static inline int ssb_pcmcia_init(struct ssb_bus *bus) |
112 | { | |
113 | return 0; | |
114 | } | |
115 | #endif /* CONFIG_SSB_PCMCIAHOST */ | |
116 | ||
24ea602e AH |
117 | /* sdio.c */ |
118 | #ifdef CONFIG_SSB_SDIOHOST | |
119 | extern int ssb_sdio_get_invariants(struct ssb_bus *bus, | |
120 | struct ssb_init_invariants *iv); | |
121 | ||
122 | extern u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset); | |
123 | extern int ssb_sdio_switch_core(struct ssb_bus *bus, struct ssb_device *dev); | |
124 | extern int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx); | |
125 | extern int ssb_sdio_hardware_setup(struct ssb_bus *bus); | |
126 | extern void ssb_sdio_exit(struct ssb_bus *bus); | |
127 | extern int ssb_sdio_init(struct ssb_bus *bus); | |
128 | ||
129 | extern const struct ssb_bus_ops ssb_sdio_ops; | |
130 | #else /* CONFIG_SSB_SDIOHOST */ | |
131 | static inline u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset) | |
132 | { | |
133 | return 0; | |
134 | } | |
135 | static inline int ssb_sdio_switch_core(struct ssb_bus *bus, | |
136 | struct ssb_device *dev) | |
137 | { | |
138 | return 0; | |
139 | } | |
140 | static inline int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx) | |
141 | { | |
142 | return 0; | |
143 | } | |
144 | static inline int ssb_sdio_hardware_setup(struct ssb_bus *bus) | |
145 | { | |
146 | return 0; | |
147 | } | |
148 | static inline void ssb_sdio_exit(struct ssb_bus *bus) | |
149 | { | |
150 | } | |
151 | static inline int ssb_sdio_init(struct ssb_bus *bus) | |
152 | { | |
153 | return 0; | |
154 | } | |
155 | #endif /* CONFIG_SSB_SDIOHOST */ | |
156 | ||
61e115a5 MB |
157 | |
158 | /* scan.c */ | |
159 | extern const char *ssb_core_name(u16 coreid); | |
160 | extern int ssb_bus_scan(struct ssb_bus *bus, | |
161 | unsigned long baseaddr); | |
162 | extern void ssb_iounmap(struct ssb_bus *ssb); | |
163 | ||
164 | ||
e7ec2e32 MB |
165 | /* sprom.c */ |
166 | extern | |
167 | ssize_t ssb_attr_sprom_show(struct ssb_bus *bus, char *buf, | |
168 | int (*sprom_read)(struct ssb_bus *bus, u16 *sprom)); | |
169 | extern | |
170 | ssize_t ssb_attr_sprom_store(struct ssb_bus *bus, | |
171 | const char *buf, size_t count, | |
172 | int (*sprom_check_crc)(const u16 *sprom, size_t size), | |
173 | int (*sprom_write)(struct ssb_bus *bus, const u16 *sprom)); | |
b3ae52b6 HM |
174 | extern int ssb_fill_sprom_with_fallback(struct ssb_bus *bus, |
175 | struct ssb_sprom *out); | |
e7ec2e32 MB |
176 | |
177 | ||
61e115a5 MB |
178 | /* core.c */ |
179 | extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m); | |
61e115a5 | 180 | extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev); |
aab547ce MB |
181 | int ssb_for_each_bus_call(unsigned long data, |
182 | int (*func)(struct ssb_bus *bus, unsigned long data)); | |
e7ec2e32 MB |
183 | extern struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev); |
184 | ||
3ba6018a MB |
185 | struct ssb_freeze_context { |
186 | /* Pointer to the bus */ | |
187 | struct ssb_bus *bus; | |
188 | /* Boolean list to indicate whether a device is frozen on this bus. */ | |
189 | bool device_frozen[SSB_MAX_NR_CORES]; | |
190 | }; | |
191 | extern int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx); | |
192 | extern int ssb_devices_thaw(struct ssb_freeze_context *ctx); | |
193 | ||
194 | ||
61e115a5 MB |
195 | |
196 | /* b43_pci_bridge.c */ | |
c7084535 | 197 | #ifdef CONFIG_SSB_B43_PCI_BRIDGE |
61e115a5 MB |
198 | extern int __init b43_pci_ssb_bridge_init(void); |
199 | extern void __exit b43_pci_ssb_bridge_exit(void); | |
0052b8bb | 200 | #else /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 MB |
201 | static inline int b43_pci_ssb_bridge_init(void) |
202 | { | |
203 | return 0; | |
204 | } | |
205 | static inline void b43_pci_ssb_bridge_exit(void) | |
206 | { | |
207 | } | |
0052b8bb | 208 | #endif /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 MB |
209 | |
210 | #endif /* LINUX_SSB_PRIVATE_H_ */ |