projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 30295c89 VM |
1 | //- |
| 2 | // Copyright (c) 2009-2010 Atheros Communications Inc. | |
| 3 | // All rights reserved. | |
| 4 | // | |
| 5 | // | |
| 6 | // Permission to use, copy, modify, and/or distribute this software for any | |
| 7 | // purpose with or without fee is hereby granted, provided that the above | |
| 8 | // copyright notice and this permission notice appear in all copies. | |
| 9 | // | |
| 10 | // THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
| 11 | // WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
| 12 | // MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
| 13 | // ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
| 14 | // WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
| 15 | // ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
| 16 | // OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
| 17 | // | |
| 18 | // | |
| 19 | // | |
| 20 | // | |
| 21 | ||
| 22 | ||
| 23 | #ifndef __A_HCI_H__ | |
| 24 | #define __A_HCI_H__ | |
| 25 | ||
| 26 | #define HCI_CMD_OGF_MASK 0x3F | |
| 27 | #define HCI_CMD_OGF_SHIFT 10 | |
| 28 | #define HCI_CMD_GET_OGF(opcode) ((opcode >> HCI_CMD_OGF_SHIFT) & HCI_CMD_OGF_MASK) | |
| 29 | ||
| 30 | #define HCI_CMD_OCF_MASK 0x3FF | |
| 31 | #define HCI_CMD_OCF_SHIFT 0 | |
| 32 | #define HCI_CMD_GET_OCF(opcode) (((opcode) >> HCI_CMD_OCF_SHIFT) & HCI_CMD_OCF_MASK) | |
| 33 | ||
| 34 | #define HCI_FORM_OPCODE(ocf, ogf) ((ocf & HCI_CMD_OCF_MASK) << HCI_CMD_OCF_SHIFT | \ | |
| 35 | (ogf & HCI_CMD_OGF_MASK) << HCI_CMD_OGF_SHIFT) | |
| 36 | ||
| 37 | ||
| 38 | /*======== HCI Opcode groups ===============*/ | |
| 39 | #define OGF_NOP 0x00 | |
| 40 | #define OGF_LINK_CONTROL 0x01 | |
| 41 | #define OGF_LINK_POLICY 0x03 | |
| 42 | #define OGF_INFO_PARAMS 0x04 | |
| 43 | #define OGF_STATUS 0x05 | |
| 44 | #define OGF_TESTING 0x06 | |
| 45 | #define OGF_BLUETOOTH 0x3E | |
| 46 | #define OGF_VENDOR_DEBUG 0x3F | |
| 47 | ||
| 48 | ||
| 49 | ||
| 50 | #define OCF_NOP 0x00 | |
| 51 | ||
| 52 | ||
| 53 | /*===== Link Control Commands Opcode===================*/ | |
| 54 | #define OCF_HCI_Create_Physical_Link 0x35 | |
| 55 | #define OCF_HCI_Accept_Physical_Link_Req 0x36 | |
| 56 | #define OCF_HCI_Disconnect_Physical_Link 0x37 | |
| 57 | #define OCF_HCI_Create_Logical_Link 0x38 | |
| 58 | #define OCF_HCI_Accept_Logical_Link 0x39 | |
| 59 | #define OCF_HCI_Disconnect_Logical_Link 0x3A | |
| 60 | #define OCF_HCI_Logical_Link_Cancel 0x3B | |
| 61 | #define OCF_HCI_Flow_Spec_Modify 0x3C | |
| 62 | ||
| 63 | ||
| 64 | ||
| 65 | /*===== Link Policy Commands Opcode====================*/ | |
| 66 | #define OCF_HCI_Set_Event_Mask 0x01 | |
| 67 | #define OCF_HCI_Reset 0x03 | |
| 68 | #define OCF_HCI_Read_Conn_Accept_Timeout 0x15 | |
| 69 | #define OCF_HCI_Write_Conn_Accept_Timeout 0x16 | |
| 70 | #define OCF_HCI_Read_Link_Supervision_Timeout 0x36 | |
| 71 | #define OCF_HCI_Write_Link_Supervision_Timeout 0x37 | |
| 72 | #define OCF_HCI_Enhanced_Flush 0x5F | |
| 73 | #define OCF_HCI_Read_Logical_Link_Accept_Timeout 0x61 | |
| 74 | #define OCF_HCI_Write_Logical_Link_Accept_Timeout 0x62 | |
| 75 | #define OCF_HCI_Set_Event_Mask_Page_2 0x63 | |
| 76 | #define OCF_HCI_Read_Location_Data 0x64 | |
| 77 | #define OCF_HCI_Write_Location_Data 0x65 | |
| 78 | #define OCF_HCI_Read_Flow_Control_Mode 0x66 | |
| 79 | #define OCF_HCI_Write_Flow_Control_Mode 0x67 | |
| 80 | #define OCF_HCI_Read_BE_Flush_Timeout 0x69 | |
| 81 | #define OCF_HCI_Write_BE_Flush_Timeout 0x6A | |
| 82 | #define OCF_HCI_Short_Range_Mode 0x6B | |
| 83 | ||
| 84 | ||
| 85 | /*======== Info Commands Opcode========================*/ | |
| 86 | #define OCF_HCI_Read_Local_Ver_Info 0x01 | |
| 87 | #define OCF_HCI_Read_Local_Supported_Cmds 0x02 | |
| 88 | #define OCF_HCI_Read_Data_Block_Size 0x0A | |
| 89 | /*======== Status Commands Opcode======================*/ | |
| 90 | #define OCF_HCI_Read_Failed_Contact_Counter 0x01 | |
| 91 | #define OCF_HCI_Reset_Failed_Contact_Counter 0x02 | |
| 92 | #define OCF_HCI_Read_Link_Quality 0x03 | |
| 93 | #define OCF_HCI_Read_RSSI 0x05 | |
| 94 | #define OCF_HCI_Read_Local_AMP_Info 0x09 | |
| 95 | #define OCF_HCI_Read_Local_AMP_ASSOC 0x0A | |
| 96 | #define OCF_HCI_Write_Remote_AMP_ASSOC 0x0B | |
| 97 | ||
| 98 | ||
| 99 | /*======= AMP_ASSOC Specific TLV tags =================*/ | |
| 100 | #define AMP_ASSOC_MAC_ADDRESS_INFO_TYPE 0x1 | |
| 101 | #define AMP_ASSOC_PREF_CHAN_LIST 0x2 | |
| 102 | #define AMP_ASSOC_CONNECTED_CHAN 0x3 | |
| 103 | #define AMP_ASSOC_PAL_CAPABILITIES 0x4 | |
| 104 | #define AMP_ASSOC_PAL_VERSION 0x5 | |
| 105 | ||
| 106 | ||
| 107 | /*========= PAL Events =================================*/ | |
| 108 | #define PAL_COMMAND_COMPLETE_EVENT 0x0E | |
| 109 | #define PAL_COMMAND_STATUS_EVENT 0x0F | |
| 110 | #define PAL_HARDWARE_ERROR_EVENT 0x10 | |
| 111 | #define PAL_FLUSH_OCCURRED_EVENT 0x11 | |
| 112 | #define PAL_LOOPBACK_EVENT 0x19 | |
| 113 | #define PAL_BUFFER_OVERFLOW_EVENT 0x1A | |
| 114 | #define PAL_QOS_VIOLATION_EVENT 0x1E | |
| 115 | #define PAL_ENHANCED_FLUSH_COMPLT_EVENT 0x39 | |
| 116 | #define PAL_PHYSICAL_LINK_COMPL_EVENT 0x40 | |
| 117 | #define PAL_CHANNEL_SELECT_EVENT 0x41 | |
| 118 | #define PAL_DISCONNECT_PHYSICAL_LINK_EVENT 0x42 | |
| 119 | #define PAL_PHY_LINK_EARLY_LOSS_WARNING_EVENT 0x43 | |
| 120 | #define PAL_PHY_LINK_RECOVERY_EVENT 0x44 | |
| 121 | #define PAL_LOGICAL_LINK_COMPL_EVENT 0x45 | |
| 122 | #define PAL_DISCONNECT_LOGICAL_LINK_COMPL_EVENT 0x46 | |
| 123 | #define PAL_FLOW_SPEC_MODIFY_COMPL_EVENT 0x47 | |
| 124 | #define PAL_NUM_COMPL_DATA_BLOCK_EVENT 0x48 | |
| 125 | #define PAL_SHORT_RANGE_MODE_CHANGE_COMPL_EVENT 0x4C | |
| 126 | #define PAL_AMP_STATUS_CHANGE_EVENT 0x4D | |
| 25985edc | 127 | /*======== End of PAL events definition =================*/ |
| 30295c89 VM |
128 | |
| 129 | ||
| 130 | /*======== Timeouts (not part of HCI cmd, but input to PAL engine) =========*/ | |
| 131 | #define Timer_Conn_Accept_TO 0x01 | |
| 132 | #define Timer_Link_Supervision_TO 0x02 | |
| 133 | ||
| 134 | #define NUM_HCI_COMMAND_PKTS 0x1 | |
| 135 | ||
| 136 | ||
| 137 | /*====== NOP Cmd ============================*/ | |
| 138 | #define HCI_CMD_NOP HCI_FORM_OPCODE(OCF_NOP, OGF_NOP) | |
| 139 | ||
| 140 | ||
| 141 | /*===== Link Control Commands================*/ | |
| 142 | #define HCI_Create_Physical_Link HCI_FORM_OPCODE(OCF_HCI_Create_Physical_Link, OGF_LINK_CONTROL) | |
| 143 | #define HCI_Accept_Physical_Link_Req HCI_FORM_OPCODE(OCF_HCI_Accept_Physical_Link_Req, OGF_LINK_CONTROL) | |
| 144 | #define HCI_Disconnect_Physical_Link HCI_FORM_OPCODE(OCF_HCI_Disconnect_Physical_Link, OGF_LINK_CONTROL) | |
| 145 | #define HCI_Create_Logical_Link HCI_FORM_OPCODE(OCF_HCI_Create_Logical_Link, OGF_LINK_CONTROL) | |
| 146 | #define HCI_Accept_Logical_Link HCI_FORM_OPCODE(OCF_HCI_Accept_Logical_Link, OGF_LINK_CONTROL) | |
| 147 | #define HCI_Disconnect_Logical_Link HCI_FORM_OPCODE(OCF_HCI_Disconnect_Logical_Link, OGF_LINK_CONTROL) | |
| 148 | #define HCI_Logical_Link_Cancel HCI_FORM_OPCODE(OCF_HCI_Logical_Link_Cancel, OGF_LINK_CONTROL) | |
| 149 | #define HCI_Flow_Spec_Modify HCI_FORM_OPCODE(OCF_HCI_Flow_Spec_Modify, OGF_LINK_CONTROL) | |
| 150 | ||
| 151 | ||
| 152 | /*===== Link Policy Commands ================*/ | |
| 153 | #define HCI_Set_Event_Mask HCI_FORM_OPCODE(OCF_HCI_Set_Event_Mask, OGF_LINK_POLICY) | |
| 154 | #define HCI_Reset HCI_FORM_OPCODE(OCF_HCI_Reset, OGF_LINK_POLICY) | |
| 155 | #define HCI_Enhanced_Flush HCI_FORM_OPCODE(OCF_HCI_Enhanced_Flush, OGF_LINK_POLICY) | |
| 156 | #define HCI_Read_Conn_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_Conn_Accept_Timeout, OGF_LINK_POLICY) | |
| 157 | #define HCI_Write_Conn_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_Conn_Accept_Timeout, OGF_LINK_POLICY) | |
| 158 | #define HCI_Read_Logical_Link_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_Logical_Link_Accept_Timeout, OGF_LINK_POLICY) | |
| 159 | #define HCI_Write_Logical_Link_Accept_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_Logical_Link_Accept_Timeout, OGF_LINK_POLICY) | |
| 160 | #define HCI_Read_Link_Supervision_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_Link_Supervision_Timeout, OGF_LINK_POLICY) | |
| 161 | #define HCI_Write_Link_Supervision_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_Link_Supervision_Timeout, OGF_LINK_POLICY) | |
| 162 | #define HCI_Read_Location_Data HCI_FORM_OPCODE(OCF_HCI_Read_Location_Data, OGF_LINK_POLICY) | |
| 163 | #define HCI_Write_Location_Data HCI_FORM_OPCODE(OCF_HCI_Write_Location_Data, OGF_LINK_POLICY) | |
| 164 | #define HCI_Set_Event_Mask_Page_2 HCI_FORM_OPCODE(OCF_HCI_Set_Event_Mask_Page_2, OGF_LINK_POLICY) | |
| 165 | #define HCI_Read_Flow_Control_Mode HCI_FORM_OPCODE(OCF_HCI_Read_Flow_Control_Mode, OGF_LINK_POLICY) | |
| 166 | #define HCI_Write_Flow_Control_Mode HCI_FORM_OPCODE(OCF_HCI_Write_Flow_Control_Mode, OGF_LINK_POLICY) | |
| 167 | #define HCI_Write_BE_Flush_Timeout HCI_FORM_OPCODE(OCF_HCI_Write_BE_Flush_Timeout, OGF_LINK_POLICY) | |
| 168 | #define HCI_Read_BE_Flush_Timeout HCI_FORM_OPCODE(OCF_HCI_Read_BE_Flush_Timeout, OGF_LINK_POLICY) | |
| 169 | #define HCI_Short_Range_Mode HCI_FORM_OPCODE(OCF_HCI_Short_Range_Mode, OGF_LINK_POLICY) | |
| 170 | ||
| 171 | ||
| 172 | /*===== Info Commands =====================*/ | |
| 173 | #define HCI_Read_Local_Ver_Info HCI_FORM_OPCODE(OCF_HCI_Read_Local_Ver_Info, OGF_INFO_PARAMS) | |
| 174 | #define HCI_Read_Local_Supported_Cmds HCI_FORM_OPCODE(OCF_HCI_Read_Local_Supported_Cmds, OGF_INFO_PARAMS) | |
| 175 | #define HCI_Read_Data_Block_Size HCI_FORM_OPCODE(OCF_HCI_Read_Data_Block_Size, OGF_INFO_PARAMS) | |
| 176 | ||
| 177 | /*===== Status Commands =====================*/ | |
| 178 | #define HCI_Read_Link_Quality HCI_FORM_OPCODE(OCF_HCI_Read_Link_Quality, OGF_STATUS) | |
| 179 | #define HCI_Read_RSSI HCI_FORM_OPCODE(OCF_HCI_Read_RSSI, OGF_STATUS) | |
| 180 | #define HCI_Read_Local_AMP_Info HCI_FORM_OPCODE(OCF_HCI_Read_Local_AMP_Info, OGF_STATUS) | |
| 181 | #define HCI_Read_Local_AMP_ASSOC HCI_FORM_OPCODE(OCF_HCI_Read_Local_AMP_ASSOC, OGF_STATUS) | |
| 182 | #define HCI_Write_Remote_AMP_ASSOC HCI_FORM_OPCODE(OCF_HCI_Write_Remote_AMP_ASSOC, OGF_STATUS) | |
| 183 | ||
| 184 | /*====== End of cmd definitions =============*/ | |
| 185 | ||
| 186 | ||
| 187 | ||
| 188 | /*===== Timeouts(private - can't come from HCI)=================*/ | |
| 189 | #define Conn_Accept_TO HCI_FORM_OPCODE(Timer_Conn_Accept_TO, OGF_VENDOR_DEBUG) | |
| 190 | #define Link_Supervision_TO HCI_FORM_OPCODE(Timer_Link_Supervision_TO, OGF_VENDOR_DEBUG) | |
| 191 | ||
| 192 | /*----- PAL Constants (Sec 6 of Doc)------------------------*/ | |
| 193 | #define Max80211_PAL_PDU_Size 1492 | |
| 194 | #define Max80211_AMP_ASSOC_Len 672 | |
| 195 | #define MinGUserPrio 4 | |
| 196 | #define MaxGUserPrio 7 | |
| 197 | #define BEUserPrio0 0 | |
| 198 | #define BEUserPrio1 3 | |
| 199 | #define Max80211BeaconPeriod 2000 /* in millisec */ | |
| 200 | #define ShortRangeModePowerMax 4 /* dBm */ | |
| 201 | ||
| 202 | /*------ PAL Protocol Identifiers (Sec5.1) ------------------*/ | |
| 203 | typedef enum { | |
| 204 | ACL_DATA = 0x01, | |
| 205 | ACTIVITY_REPORT, | |
| 206 | SECURED_FRAMES, | |
| 207 | LINK_SUPERVISION_REQ, | |
| 208 | LINK_SUPERVISION_RESP, | |
| 209 | }PAL_PROTOCOL_IDENTIFIERS; | |
| 210 | ||
| 211 | #define HCI_CMD_HDR_SZ 3 | |
| 212 | #define HCI_EVENT_HDR_SIZE 2 | |
| 213 | #define MAX_EVT_PKT_SZ 255 | |
| 214 | #define AMP_ASSOC_MAX_FRAG_SZ 248 | |
| 215 | #define AMP_MAX_GUARANTEED_BW 20000 | |
| 216 | ||
| 217 | #define DEFAULT_CONN_ACCPT_TO 5000 | |
| 218 | #define DEFAULT_LL_ACCPT_TO 5000 | |
| 219 | #define DEFAULT_LSTO 10000 | |
| 220 | ||
| 221 | #define PACKET_BASED_FLOW_CONTROL_MODE 0x00 | |
| 222 | #define DATA_BLK_BASED_FLOW_CONTROL_MODE 0x01 | |
| 223 | ||
| 224 | #define SERVICE_TYPE_BEST_EFFORT 0x01 | |
| 225 | #define SERVICE_TYPE_GUARANTEED 0x02 | |
| 226 | ||
| 227 | #define MAC_ADDR_LEN 6 | |
| 228 | #define LINK_KEY_LEN 32 | |
| 229 | ||
| 230 | typedef enum { | |
| 231 | ACL_DATA_PB_1ST_NON_AUTOMATICALLY_FLUSHABLE = 0x00, | |
| 232 | ACL_DATA_PB_CONTINUING_FRAGMENT = 0x01, | |
| 233 | ACL_DATA_PB_1ST_AUTOMATICALLY_FLUSHABLE = 0x02, | |
| 234 | ACL_DATA_PB_COMPLETE_PDU = 0x03, | |
| 235 | } ACL_DATA_PB_FLAGS; | |
| 236 | #define ACL_DATA_PB_FLAGS_SHIFT 12 | |
| 237 | ||
| 238 | typedef enum { | |
| 239 | ACL_DATA_BC_POINT_TO_POINT = 0x00, | |
| 240 | } ACL_DATA_BC_FLAGS; | |
| 241 | #define ACL_DATA_BC_FLAGS_SHIFT 14 | |
| 242 | ||
| 243 | /* Command pkt */ | |
| 244 | typedef struct hci_cmd_pkt_t { | |
| 4853ac05 | 245 | u16 opcode; |
| ab3655da JP |
246 | u8 param_length; |
| 247 | u8 params[255]; | |
| 30295c89 VM |
248 | } POSTPACK HCI_CMD_PKT; |
| 249 | ||
| 250 | #define ACL_DATA_HDR_SIZE 4 /* hdl_and flags + data_len */ | |
| 251 | /* Data pkt */ | |
| 252 | typedef struct hci_acl_data_pkt_t { | |
| 4853ac05 JP |
253 | u16 hdl_and_flags; |
| 254 | u16 data_len; | |
| ab3655da | 255 | u8 data[Max80211_PAL_PDU_Size]; |
| 30295c89 VM |
256 | } POSTPACK HCI_ACL_DATA_PKT; |
| 257 | ||
| 258 | /* Event pkt */ | |
| 259 | typedef struct hci_event_pkt_t { | |
| ab3655da JP |
260 | u8 event_code; |
| 261 | u8 param_len; | |
| 262 | u8 params[256]; | |
| 30295c89 VM |
263 | } POSTPACK HCI_EVENT_PKT; |
| 264 | ||
| 265 | ||
| 266 | /*============== HCI Command definitions ======================= */ | |
| 267 | typedef struct hci_cmd_phy_link_t { | |
| 4853ac05 | 268 | u16 opcode; |
| ab3655da JP |
269 | u8 param_length; |
| 270 | u8 phy_link_hdl; | |
| 271 | u8 link_key_len; | |
| 272 | u8 link_key_type; | |
| 273 | u8 link_key[LINK_KEY_LEN]; | |
| 30295c89 VM |
274 | } POSTPACK HCI_CMD_PHY_LINK; |
| 275 | ||
| 276 | typedef struct hci_cmd_write_rem_amp_assoc_t { | |
| 4853ac05 | 277 | u16 opcode; |
| ab3655da JP |
278 | u8 param_length; |
| 279 | u8 phy_link_hdl; | |
| 4853ac05 JP |
280 | u16 len_so_far; |
| 281 | u16 amp_assoc_remaining_len; | |
| ab3655da | 282 | u8 amp_assoc_frag[AMP_ASSOC_MAX_FRAG_SZ]; |
| 30295c89 VM |
283 | } POSTPACK HCI_CMD_WRITE_REM_AMP_ASSOC; |
| 284 | ||
| 285 | ||
| 286 | typedef struct hci_cmd_opcode_hdl_t { | |
| 4853ac05 | 287 | u16 opcode; |
| ab3655da | 288 | u8 param_length; |
| 4853ac05 | 289 | u16 hdl; |
| 30295c89 VM |
290 | } POSTPACK HCI_CMD_READ_LINK_QUAL, |
| 291 | HCI_CMD_FLUSH, | |
| 292 | HCI_CMD_READ_LINK_SUPERVISION_TIMEOUT; | |
| 293 | ||
| 294 | typedef struct hci_cmd_read_local_amp_assoc_t { | |
| 4853ac05 | 295 | u16 opcode; |
| ab3655da JP |
296 | u8 param_length; |
| 297 | u8 phy_link_hdl; | |
| 4853ac05 JP |
298 | u16 len_so_far; |
| 299 | u16 max_rem_amp_assoc_len; | |
| 30295c89 VM |
300 | } POSTPACK HCI_CMD_READ_LOCAL_AMP_ASSOC; |
| 301 | ||
| 302 | ||
| 303 | typedef struct hci_cmd_set_event_mask_t { | |
| 4853ac05 | 304 | u16 opcode; |
| ab3655da | 305 | u8 param_length; |
| c353f4b3 | 306 | u64 mask; |
| 30295c89 VM |
307 | }POSTPACK HCI_CMD_SET_EVT_MASK, HCI_CMD_SET_EVT_MASK_PG_2; |
| 308 | ||
| 309 | ||
| 310 | typedef struct hci_cmd_enhanced_flush_t{ | |
| 4853ac05 | 311 | u16 opcode; |
| ab3655da | 312 | u8 param_length; |
| 4853ac05 | 313 | u16 hdl; |
| ab3655da | 314 | u8 type; |
| 30295c89 VM |
315 | } POSTPACK HCI_CMD_ENHANCED_FLUSH; |
| 316 | ||
| 317 | ||
| 318 | typedef struct hci_cmd_write_timeout_t { | |
| 4853ac05 | 319 | u16 opcode; |
| ab3655da | 320 | u8 param_length; |
| 4853ac05 | 321 | u16 timeout; |
| 30295c89 VM |
322 | } POSTPACK HCI_CMD_WRITE_TIMEOUT; |
| 323 | ||
| 324 | typedef struct hci_cmd_write_link_supervision_timeout_t { | |
| 4853ac05 | 325 | u16 opcode; |
| ab3655da | 326 | u8 param_length; |
| 4853ac05 JP |
327 | u16 hdl; |
| 328 | u16 timeout; | |
| 30295c89 VM |
329 | } POSTPACK HCI_CMD_WRITE_LINK_SUPERVISION_TIMEOUT; |
| 330 | ||
| 331 | typedef struct hci_cmd_write_flow_control_t { | |
| 4853ac05 | 332 | u16 opcode; |
| ab3655da JP |
333 | u8 param_length; |
| 334 | u8 mode; | |
| 30295c89 VM |
335 | } POSTPACK HCI_CMD_WRITE_FLOW_CONTROL; |
| 336 | ||
| 337 | typedef struct location_data_cfg_t { | |
| ab3655da JP |
338 | u8 reg_domain_aware; |
| 339 | u8 reg_domain[3]; | |
| 340 | u8 reg_options; | |
| 30295c89 VM |
341 | } POSTPACK LOCATION_DATA_CFG; |
| 342 | ||
| 343 | typedef struct hci_cmd_write_location_data_t { | |
| 4853ac05 | 344 | u16 opcode; |
| ab3655da | 345 | u8 param_length; |
| 30295c89 VM |
346 | LOCATION_DATA_CFG cfg; |
| 347 | } POSTPACK HCI_CMD_WRITE_LOCATION_DATA; | |
| 348 | ||
| 349 | ||
| 350 | typedef struct flow_spec_t { | |
| ab3655da JP |
351 | u8 id; |
| 352 | u8 service_type; | |
| 4853ac05 | 353 | u16 max_sdu; |
| e1ce2a3a JP |
354 | u32 sdu_inter_arrival_time; |
| 355 | u32 access_latency; | |
| 356 | u32 flush_timeout; | |
| 30295c89 VM |
357 | } POSTPACK FLOW_SPEC; |
| 358 | ||
| 359 | ||
| 360 | typedef struct hci_cmd_create_logical_link_t { | |
| 4853ac05 | 361 | u16 opcode; |
| ab3655da JP |
362 | u8 param_length; |
| 363 | u8 phy_link_hdl; | |
| 30295c89 VM |
364 | FLOW_SPEC tx_flow_spec; |
| 365 | FLOW_SPEC rx_flow_spec; | |
| 366 | } POSTPACK HCI_CMD_CREATE_LOGICAL_LINK; | |
| 367 | ||
| 368 | typedef struct hci_cmd_flow_spec_modify_t { | |
| 4853ac05 | 369 | u16 opcode; |
| ab3655da | 370 | u8 param_length; |
| 4853ac05 | 371 | u16 hdl; |
| 30295c89 VM |
372 | FLOW_SPEC tx_flow_spec; |
| 373 | FLOW_SPEC rx_flow_spec; | |
| 374 | } POSTPACK HCI_CMD_FLOW_SPEC_MODIFY; | |
| 375 | ||
| 376 | typedef struct hci_cmd_logical_link_cancel_t { | |
| 4853ac05 | 377 | u16 opcode; |
| ab3655da JP |
378 | u8 param_length; |
| 379 | u8 phy_link_hdl; | |
| 380 | u8 tx_flow_spec_id; | |
| 30295c89 VM |
381 | } POSTPACK HCI_CMD_LOGICAL_LINK_CANCEL; |
| 382 | ||
| 383 | typedef struct hci_cmd_disconnect_logical_link_t { | |
| 4853ac05 | 384 | u16 opcode; |
| ab3655da | 385 | u8 param_length; |
| 4853ac05 | 386 | u16 logical_link_hdl; |
| 30295c89 VM |
387 | } POSTPACK HCI_CMD_DISCONNECT_LOGICAL_LINK; |
| 388 | ||
| 389 | typedef struct hci_cmd_disconnect_phy_link_t { | |
| 4853ac05 | 390 | u16 opcode; |
| ab3655da JP |
391 | u8 param_length; |
| 392 | u8 phy_link_hdl; | |
| 30295c89 VM |
393 | } POSTPACK HCI_CMD_DISCONNECT_PHY_LINK; |
| 394 | ||
| 395 | typedef struct hci_cmd_srm_t { | |
| 4853ac05 | 396 | u16 opcode; |
| ab3655da JP |
397 | u8 param_length; |
| 398 | u8 phy_link_hdl; | |
| 399 | u8 mode; | |
| 30295c89 VM |
400 | } POSTPACK HCI_CMD_SHORT_RANGE_MODE; |
| 401 | /*============== HCI Command definitions end ======================= */ | |
| 402 | ||
| 403 | ||
| 404 | ||
| 405 | /*============== HCI Event definitions ============================= */ | |
| 406 | ||
| 407 | /* Command complete event */ | |
| 408 | typedef struct hci_event_cmd_complete_t { | |
| ab3655da JP |
409 | u8 event_code; |
| 410 | u8 param_len; | |
| 411 | u8 num_hci_cmd_pkts; | |
| 4853ac05 | 412 | u16 opcode; |
| ab3655da | 413 | u8 params[255]; |
| 30295c89 VM |
414 | } POSTPACK HCI_EVENT_CMD_COMPLETE; |
| 415 | ||
| 416 | ||
| 417 | /* Command status event */ | |
| 418 | typedef struct hci_event_cmd_status_t { | |
| ab3655da JP |
419 | u8 event_code; |
| 420 | u8 param_len; | |
| 421 | u8 status; | |
| 422 | u8 num_hci_cmd_pkts; | |
| 4853ac05 | 423 | u16 opcode; |
| 30295c89 VM |
424 | } POSTPACK HCI_EVENT_CMD_STATUS; |
| 425 | ||
| 426 | /* Hardware Error event */ | |
| 427 | typedef struct hci_event_hw_err_t { | |
| ab3655da JP |
428 | u8 event_code; |
| 429 | u8 param_len; | |
| 430 | u8 hw_err_code; | |
| 30295c89 VM |
431 | } POSTPACK HCI_EVENT_HW_ERR; |
| 432 | ||
| 25985edc | 433 | /* Flush occurred event */ |
| 30295c89 VM |
434 | /* Qos Violation event */ |
| 435 | typedef struct hci_event_handle_t { | |
| ab3655da JP |
436 | u8 event_code; |
| 437 | u8 param_len; | |
| 4853ac05 | 438 | u16 handle; |
| 30295c89 VM |
439 | } POSTPACK HCI_EVENT_FLUSH_OCCRD, |
| 440 | HCI_EVENT_QOS_VIOLATION; | |
| 441 | ||
| 442 | /* Loopback command event */ | |
| 443 | typedef struct hci_loopback_cmd_t { | |
| ab3655da JP |
444 | u8 event_code; |
| 445 | u8 param_len; | |
| 446 | u8 params[252]; | |
| 30295c89 VM |
447 | } POSTPACK HCI_EVENT_LOOPBACK_CMD; |
| 448 | ||
| 449 | /* Data buffer overflow event */ | |
| 450 | typedef struct hci_data_buf_overflow_t { | |
| ab3655da JP |
451 | u8 event_code; |
| 452 | u8 param_len; | |
| 453 | u8 link_type; | |
| 30295c89 VM |
454 | } POSTPACK HCI_EVENT_DATA_BUF_OVERFLOW; |
| 455 | ||
| 456 | /* Enhanced Flush complete event */ | |
| 457 | typedef struct hci_enhanced_flush_complt_t{ | |
| ab3655da JP |
458 | u8 event_code; |
| 459 | u8 param_len; | |
| 4853ac05 | 460 | u16 hdl; |
| 30295c89 VM |
461 | } POSTPACK HCI_EVENT_ENHANCED_FLUSH_COMPLT; |
| 462 | ||
| 463 | /* Channel select event */ | |
| 464 | typedef struct hci_event_chan_select_t { | |
| ab3655da JP |
465 | u8 event_code; |
| 466 | u8 param_len; | |
| 467 | u8 phy_link_hdl; | |
| 30295c89 VM |
468 | } POSTPACK HCI_EVENT_CHAN_SELECT; |
| 469 | ||
| 470 | /* Physical Link Complete event */ | |
| 471 | typedef struct hci_event_phy_link_complete_event_t { | |
| ab3655da JP |
472 | u8 event_code; |
| 473 | u8 param_len; | |
| 474 | u8 status; | |
| 475 | u8 phy_link_hdl; | |
| 30295c89 VM |
476 | } POSTPACK HCI_EVENT_PHY_LINK_COMPLETE; |
| 477 | ||
| 478 | /* Logical Link complete event */ | |
| 479 | typedef struct hci_event_logical_link_complete_event_t { | |
| ab3655da JP |
480 | u8 event_code; |
| 481 | u8 param_len; | |
| 482 | u8 status; | |
| 4853ac05 | 483 | u16 logical_link_hdl; |
| ab3655da JP |
484 | u8 phy_hdl; |
| 485 | u8 tx_flow_id; | |
| 30295c89 VM |
486 | } POSTPACK HCI_EVENT_LOGICAL_LINK_COMPLETE_EVENT; |
| 487 | ||
| 488 | /* Disconnect Logical Link complete event */ | |
| 489 | typedef struct hci_event_disconnect_logical_link_event_t { | |
| ab3655da JP |
490 | u8 event_code; |
| 491 | u8 param_len; | |
| 492 | u8 status; | |
| 4853ac05 | 493 | u16 logical_link_hdl; |
| ab3655da | 494 | u8 reason; |
| 30295c89 VM |
495 | } POSTPACK HCI_EVENT_DISCONNECT_LOGICAL_LINK_EVENT; |
| 496 | ||
| 497 | /* Disconnect Physical Link complete event */ | |
| 498 | typedef struct hci_event_disconnect_phy_link_complete_t { | |
| ab3655da JP |
499 | u8 event_code; |
| 500 | u8 param_len; | |
| 501 | u8 status; | |
| 502 | u8 phy_link_hdl; | |
| 503 | u8 reason; | |
| 30295c89 VM |
504 | } POSTPACK HCI_EVENT_DISCONNECT_PHY_LINK_COMPLETE; |
| 505 | ||
| 506 | typedef struct hci_event_physical_link_loss_early_warning_t{ | |
| ab3655da JP |
507 | u8 event_code; |
| 508 | u8 param_len; | |
| 509 | u8 phy_hdl; | |
| 510 | u8 reason; | |
| 30295c89 VM |
511 | } POSTPACK HCI_EVENT_PHY_LINK_LOSS_EARLY_WARNING; |
| 512 | ||
| 513 | typedef struct hci_event_physical_link_recovery_t{ | |
| ab3655da JP |
514 | u8 event_code; |
| 515 | u8 param_len; | |
| 516 | u8 phy_hdl; | |
| 30295c89 VM |
517 | } POSTPACK HCI_EVENT_PHY_LINK_RECOVERY; |
| 518 | ||
| 519 | ||
| 520 | /* Flow spec modify complete event */ | |
| 521 | /* Flush event */ | |
| 522 | typedef struct hci_event_status_handle_t { | |
| ab3655da JP |
523 | u8 event_code; |
| 524 | u8 param_len; | |
| 525 | u8 status; | |
| 4853ac05 | 526 | u16 handle; |
| 30295c89 VM |
527 | } POSTPACK HCI_EVENT_FLOW_SPEC_MODIFY, |
| 528 | HCI_EVENT_FLUSH; | |
| 529 | ||
| 530 | ||
| 531 | /* Num of completed data blocks event */ | |
| 532 | typedef struct hci_event_num_of_compl_data_blks_t { | |
| ab3655da JP |
533 | u8 event_code; |
| 534 | u8 param_len; | |
| 4853ac05 | 535 | u16 num_data_blks; |
| ab3655da JP |
536 | u8 num_handles; |
| 537 | u8 params[255]; | |
| 30295c89 VM |
538 | } POSTPACK HCI_EVENT_NUM_COMPL_DATA_BLKS; |
| 539 | ||
| 540 | /* Short range mode change complete event */ | |
| 541 | typedef struct hci_srm_cmpl_t { | |
| ab3655da JP |
542 | u8 event_code; |
| 543 | u8 param_len; | |
| 544 | u8 status; | |
| 545 | u8 phy_link; | |
| 546 | u8 state; | |
| 30295c89 VM |
547 | } POSTPACK HCI_EVENT_SRM_COMPL; |
| 548 | ||
| 549 | typedef struct hci_event_amp_status_change_t{ | |
| ab3655da JP |
550 | u8 event_code; |
| 551 | u8 param_len; | |
| 552 | u8 status; | |
| 553 | u8 amp_status; | |
| 30295c89 VM |
554 | } POSTPACK HCI_EVENT_AMP_STATUS_CHANGE; |
| 555 | ||
| 556 | /*============== Event definitions end =========================== */ | |
| 557 | ||
| 558 | ||
| 559 | typedef struct local_amp_info_resp_t { | |
| ab3655da JP |
560 | u8 status; |
| 561 | u8 amp_status; | |
| e1ce2a3a JP |
562 | u32 total_bw; /* kbps */ |
| 563 | u32 max_guranteed_bw; /* kbps */ | |
| 564 | u32 min_latency; | |
| 565 | u32 max_pdu_size; | |
| ab3655da | 566 | u8 amp_type; |
| 4853ac05 JP |
567 | u16 pal_capabilities; |
| 568 | u16 amp_assoc_len; | |
| e1ce2a3a JP |
569 | u32 max_flush_timeout; /* in ms */ |
| 570 | u32 be_flush_timeout; /* in ms */ | |
| 30295c89 VM |
571 | } POSTPACK LOCAL_AMP_INFO; |
| 572 | ||
| 573 | typedef struct amp_assoc_cmd_resp_t{ | |
| ab3655da JP |
574 | u8 status; |
| 575 | u8 phy_hdl; | |
| 4853ac05 | 576 | u16 amp_assoc_len; |
| ab3655da | 577 | u8 amp_assoc_frag[AMP_ASSOC_MAX_FRAG_SZ]; |
| 30295c89 VM |
578 | }POSTPACK AMP_ASSOC_CMD_RESP; |
| 579 | ||
| 580 | ||
| 581 | enum PAL_HCI_CMD_STATUS { | |
| 582 | PAL_HCI_CMD_PROCESSED, | |
| 583 | PAL_HCI_CMD_IGNORED | |
| 584 | }; | |
| 585 | ||
| 586 | ||
| 587 | /*============= HCI Error Codes =======================*/ | |
| 588 | #define HCI_SUCCESS 0x00 | |
| 589 | #define HCI_ERR_UNKNOW_CMD 0x01 | |
| 590 | #define HCI_ERR_UNKNOWN_CONN_ID 0x02 | |
| 591 | #define HCI_ERR_HW_FAILURE 0x03 | |
| 592 | #define HCI_ERR_PAGE_TIMEOUT 0x04 | |
| 593 | #define HCI_ERR_AUTH_FAILURE 0x05 | |
| 594 | #define HCI_ERR_KEY_MISSING 0x06 | |
| 595 | #define HCI_ERR_MEM_CAP_EXECED 0x07 | |
| 596 | #define HCI_ERR_CON_TIMEOUT 0x08 | |
| 597 | #define HCI_ERR_CON_LIMIT_EXECED 0x09 | |
| 598 | #define HCI_ERR_ACL_CONN_ALRDY_EXISTS 0x0B | |
| 599 | #define HCI_ERR_COMMAND_DISALLOWED 0x0C | |
| 600 | #define HCI_ERR_CONN_REJ_BY_LIMIT_RES 0x0D | |
| 601 | #define HCI_ERR_CONN_REJ_BY_SEC 0x0E | |
| 602 | #define HCI_ERR_CONN_REJ_BY_BAD_ADDR 0x0F | |
| 603 | #define HCI_ERR_CONN_ACCPT_TIMEOUT 0x10 | |
| 604 | #define HCI_ERR_UNSUPPORT_FEATURE 0x11 | |
| 605 | #define HCI_ERR_INVALID_HCI_CMD_PARAMS 0x12 | |
| 606 | #define HCI_ERR_REMOTE_USER_TERMINATE_CONN 0x13 | |
| 607 | #define HCI_ERR_CON_TERM_BY_HOST 0x16 | |
| 608 | #define HCI_ERR_UNSPECIFIED_ERROR 0x1F | |
| 609 | #define HCI_ERR_ENCRYPTION_MODE_NOT_SUPPORT 0x25 | |
| 610 | #define HCI_ERR_REQUESTED_QOS_NOT_SUPPORT 0x27 | |
| 611 | #define HCI_ERR_QOS_UNACCEPTABLE_PARM 0x2C | |
| 612 | #define HCI_ERR_QOS_REJECTED 0x2D | |
| 613 | #define HCI_ERR_CONN_REJ_NO_SUITABLE_CHAN 0x39 | |
| 614 | ||
| 615 | /*============= HCI Error Codes End =======================*/ | |
| 616 | ||
| 617 | ||
| 618 | /* Following are event return parameters.. part of HCI events | |
| 619 | */ | |
| 620 | typedef struct timeout_read_t { | |
| ab3655da | 621 | u8 status; |
| 4853ac05 | 622 | u16 timeout; |
| 30295c89 VM |
623 | }POSTPACK TIMEOUT_INFO; |
| 624 | ||
| 625 | typedef struct link_supervision_timeout_read_t { | |
| ab3655da | 626 | u8 status; |
| 4853ac05 JP |
627 | u16 hdl; |
| 628 | u16 timeout; | |
| 30295c89 VM |
629 | }POSTPACK LINK_SUPERVISION_TIMEOUT_INFO; |
| 630 | ||
| 631 | typedef struct status_hdl_t { | |
| ab3655da | 632 | u8 status; |
| 4853ac05 | 633 | u16 hdl; |
| 30295c89 VM |
634 | }POSTPACK INFO_STATUS_HDL; |
| 635 | ||
| 636 | typedef struct write_remote_amp_assoc_t{ | |
| ab3655da JP |
637 | u8 status; |
| 638 | u8 hdl; | |
| 30295c89 VM |
639 | }POSTPACK WRITE_REMOTE_AMP_ASSOC_INFO; |
| 640 | ||
| 641 | typedef struct read_loc_info_t { | |
| ab3655da | 642 | u8 status; |
| 30295c89 VM |
643 | LOCATION_DATA_CFG loc; |
| 644 | }POSTPACK READ_LOC_INFO; | |
| 645 | ||
| 646 | typedef struct read_flow_ctrl_mode_t { | |
| ab3655da JP |
647 | u8 status; |
| 648 | u8 mode; | |
| 30295c89 VM |
649 | }POSTPACK READ_FLWCTRL_INFO; |
| 650 | ||
| 651 | typedef struct read_data_blk_size_t { | |
| ab3655da | 652 | u8 status; |
| 4853ac05 JP |
653 | u16 max_acl_data_pkt_len; |
| 654 | u16 data_block_len; | |
| 655 | u16 total_num_data_blks; | |
| 30295c89 VM |
656 | }POSTPACK READ_DATA_BLK_SIZE_INFO; |
| 657 | ||
| 658 | /* Read Link quality info */ | |
| 659 | typedef struct link_qual_t { | |
| ab3655da | 660 | u8 status; |
| 4853ac05 | 661 | u16 hdl; |
| ab3655da | 662 | u8 link_qual; |
| 30295c89 VM |
663 | } POSTPACK READ_LINK_QUAL_INFO, |
| 664 | READ_RSSI_INFO; | |
| 665 | ||
| 666 | typedef struct ll_cancel_resp_t { | |
| ab3655da JP |
667 | u8 status; |
| 668 | u8 phy_link_hdl; | |
| 669 | u8 tx_flow_spec_id; | |
| 30295c89 VM |
670 | } POSTPACK LL_CANCEL_RESP; |
| 671 | ||
| 672 | typedef struct read_local_ver_info_t { | |
| ab3655da JP |
673 | u8 status; |
| 674 | u8 hci_version; | |
| 4853ac05 | 675 | u16 hci_revision; |
| ab3655da | 676 | u8 pal_version; |
| 4853ac05 JP |
677 | u16 manf_name; |
| 678 | u16 pal_sub_ver; | |
| 30295c89 VM |
679 | } POSTPACK READ_LOCAL_VER_INFO; |
| 680 | ||
| 681 | ||
| 682 | #endif /* __A_HCI_H__ */ |