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[mirror_ubuntu-hirsute-kernel.git] / drivers / staging / comedi / drivers / jr3_pci.c
CommitLineData
07b509e6
AB		 1/*
2 comedi/drivers/jr3_pci.c
3 hardware driver for JR3/PCI force sensor board
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2007 Anders Blomdell <anders.blomdell@control.lth.se>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23/*
24Driver: jr3_pci
25Description: JR3/PCI force sensor board
26Author: Anders Blomdell <anders.blomdell@control.lth.se>
27Status: works
28Devices: [JR3] PCI force sensor board (jr3_pci)
29
30 The DSP on the board requires initialization code, which can
31 be loaded by placing it in /lib/firmware/comedi.
32 The initialization code should be somewhere on the media you got
33 with your card. One version is available from http://www.comedi.org
34 in the comedi_nonfree_firmware tarball.
35
36 Configuration options:
37 [0] - PCI bus number - if bus number and slot number are 0,
38 then driver search for first unused card
39 [1] - PCI slot number
40
41*/
42
43#include "../comedidev.h"
44
45#include <linux/delay.h>
46#include <linux/ctype.h>
47#include <linux/firmware.h>
9b5de0a0
AB		 48#include <linux/jiffies.h>
49#include <linux/timer.h>
07b509e6
AB		 50#include "comedi_pci.h"
51#include "jr3_pci.h"
52
07b509e6
AB		 53#define PCI_VENDOR_ID_JR3 0x1762
54#define PCI_DEVICE_ID_JR3_1_CHANNEL 0x3111
55#define PCI_DEVICE_ID_JR3_2_CHANNEL 0x3112
56#define PCI_DEVICE_ID_JR3_3_CHANNEL 0x3113
57#define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114
58
da91b269
BP		 59static int jr3_pci_attach(struct comedi_device *dev, struct comedi_devconfig *it);
60static int jr3_pci_detach(struct comedi_device *dev);
07b509e6 61
139dfbdf 62static struct comedi_driver driver_jr3_pci = {
68c3dbff
BP		 63 .driver_name = "jr3_pci",
64 .module = THIS_MODULE,
65 .attach = jr3_pci_attach,
66 .detach = jr3_pci_detach,
07b509e6
AB		 67};
68
69static DEFINE_PCI_DEVICE_TABLE(jr3_pci_pci_table) = {
70 {PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
72 {PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74 {PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL,
75 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
76 {PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_4_CHANNEL,
77 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
78 {0}
79};
80
81MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
82
217fbbbc
BP		 83struct jr3_pci_dev_private {
84
07b509e6
AB		 85 struct pci_dev *pci_dev;
86 int pci_enabled;
b2e1b3c2 87 volatile struct jr3_t *iobase;
07b509e6
AB		 88 int n_channels;
89 struct timer_list timer;
217fbbbc
BP		 90};
91
07b509e6 92
83101a17
BP		 93struct poll_delay_t {
94
07b509e6
AB		 95 int min;
96 int max;
83101a17
BP		 97};
98
07b509e6 99
c6a3b7b6 100struct jr3_pci_subdev_private {
67080790 101 volatile struct jr3_channel *channel;
07b509e6
AB		 102 unsigned long next_time_min;
103 unsigned long next_time_max;
104 enum { state_jr3_poll,
105 state_jr3_init_wait_for_offset,
106 state_jr3_init_transform_complete,
107 state_jr3_init_set_full_scale_complete,
108 state_jr3_init_use_offset_complete,
109 state_jr3_done
110 } state;
111 int channel_no;
112 int serial_no;
113 int model_no;
114 struct {
115 int length;
1f6325d6 116 struct comedi_krange range;
07b509e6 117 } range[9];
9ced1de6 118 const struct comedi_lrange *range_table_list[8 * 7 + 2];
790c5541 119 unsigned int maxdata_list[8 * 7 + 2];
07b509e6
AB		 120 u16 errors;
121 int retries;
c6a3b7b6 122};
07b509e6 123
c5331be1
FMH		 124/* Hotplug firmware loading stuff */
125
126typedef int comedi_firmware_callback(struct comedi_device *dev,
127 const u8 *data, size_t size);
128
129static int comedi_load_firmware(struct comedi_device *dev, char *name,
130 comedi_firmware_callback cb)
131{
132 int result = 0;
133 const struct firmware *fw;
134 char *firmware_path;
135 static const char *prefix = "comedi/";
136 struct jr3_pci_dev_private *devpriv = dev->private;
137
138 firmware_path = kmalloc(strlen(prefix) + strlen(name) + 1, GFP_KERNEL);
139 if (!firmware_path) {
140 result = -ENOMEM;
141 } else {
142 firmware_path[0] = '\0';
143 strcat(firmware_path, prefix);
144 strcat(firmware_path, name);
145 result = request_firmware(&fw, firmware_path,
146 &devpriv->pci_dev->dev);
147 if (result == 0) {
148 if (!cb)
149 result = -EINVAL;
150 else
151 result = cb(dev, fw->data, fw->size);
152 release_firmware(fw);
153 }
154 kfree(firmware_path);
155 }
156 return result;
157}
158
83101a17 159static struct poll_delay_t poll_delay_min_max(int min, int max)
07b509e6 160{
83101a17 161 struct poll_delay_t result;
07b509e6
AB		 162
163 result.min = min;
164 result.max = max;
165 return result;
166}
167
67080790 168static int is_complete(volatile struct jr3_channel *channel)
07b509e6
AB		 169{
170 return get_s16(&channel->command_word0) == 0;
171}
172
6ae9488b 173struct transform_t {
07b509e6
AB		 174 struct {
175 u16 link_type;
176 s16 link_amount;
177 } link[8];
6ae9488b 178};
07b509e6 179
67080790 180static void set_transforms(volatile struct jr3_channel *channel,
6ae9488b 181 struct transform_t transf, short num)
07b509e6
AB		 182{
183 int i;
184
2696fb57 185 num &= 0x000f; /* Make sure that 0 <= num <= 15 */
07b509e6
AB		 186 for (i = 0; i < 8; i++) {
187
188 set_u16(&channel->transforms[num].link[i].link_type,
189 transf.link[i].link_type);
5f74ea14 190 udelay(1);
07b509e6
AB		 191 set_s16(&channel->transforms[num].link[i].link_amount,
192 transf.link[i].link_amount);
5f74ea14 193 udelay(1);
07b509e6
AB		 194 if (transf.link[i].link_type == end_x_form) {
195 break;
196 }
197 }
198}
199
67080790 200static void use_transform(volatile struct jr3_channel *channel, short transf_num)
07b509e6
AB		 201{
202 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
203}
204
67080790 205static void use_offset(volatile struct jr3_channel *channel, short offset_num)
07b509e6
AB		 206{
207 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
208}
209
67080790 210static void set_offset(volatile struct jr3_channel *channel)
07b509e6
AB		 211{
212 set_s16(&channel->command_word0, 0x0700);
213}
214
050509fa 215struct six_axis_t {
07b509e6
AB		 216 s16 fx;
217 s16 fy;
218 s16 fz;
219 s16 mx;
220 s16 my;
221 s16 mz;
050509fa 222};
07b509e6 223
67080790 224static void set_full_scales(volatile struct jr3_channel *channel,
050509fa 225 struct six_axis_t full_scale)
07b509e6
AB		 226{
227 printk("%d %d %d %d %d %d\n",
228 full_scale.fx,
229 full_scale.fy,
230 full_scale.fz, full_scale.mx, full_scale.my, full_scale.mz);
231 set_s16(&channel->full_scale.fx, full_scale.fx);
232 set_s16(&channel->full_scale.fy, full_scale.fy);
233 set_s16(&channel->full_scale.fz, full_scale.fz);
234 set_s16(&channel->full_scale.mx, full_scale.mx);
235 set_s16(&channel->full_scale.my, full_scale.my);
236 set_s16(&channel->full_scale.mz, full_scale.mz);
237 set_s16(&channel->command_word0, 0x0a00);
238}
239
050509fa 240static struct six_axis_t get_min_full_scales(volatile struct jr3_channel *channel)
07b509e6 241{
050509fa 242 struct six_axis_t result;
07b509e6
AB		 243 result.fx = get_s16(&channel->min_full_scale.fx);
244 result.fy = get_s16(&channel->min_full_scale.fy);
245 result.fz = get_s16(&channel->min_full_scale.fz);
246 result.mx = get_s16(&channel->min_full_scale.mx);
247 result.my = get_s16(&channel->min_full_scale.my);
248 result.mz = get_s16(&channel->min_full_scale.mz);
249 return result;
250}
251
050509fa 252static struct six_axis_t get_max_full_scales(volatile struct jr3_channel *channel)
07b509e6 253{
050509fa 254 struct six_axis_t result;
07b509e6
AB		 255 result.fx = get_s16(&channel->max_full_scale.fx);
256 result.fy = get_s16(&channel->max_full_scale.fy);
257 result.fz = get_s16(&channel->max_full_scale.fz);
258 result.mx = get_s16(&channel->max_full_scale.mx);
259 result.my = get_s16(&channel->max_full_scale.my);
260 result.mz = get_s16(&channel->max_full_scale.mz);
261 return result;
262}
263
da91b269
BP		 264static int jr3_pci_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
265 struct comedi_insn *insn, unsigned int *data)
07b509e6
AB		 266{
267 int result;
c6a3b7b6 268 struct jr3_pci_subdev_private *p;
07b509e6
AB		 269 int channel;
270
271 p = s->private;
272 channel = CR_CHAN(insn->chanspec);
273 if (p == NULL || channel > 57) {
274 result = -EINVAL;
275 } else {
276 int i;
277
278 result = insn->n;
279 if (p->state != state_jr3_done ||
280 (get_u16(&p->channel->
281 errors) & (watch_dog | watch_dog2 |
282 sensor_change))) {
283 /* No sensor or sensor changed */
284 if (p->state == state_jr3_done) {
285 /* Restart polling */
286 p->state = state_jr3_poll;
287 }
288 result = -EAGAIN;
289 }
290 for (i = 0; i < insn->n; i++) {
291 if (channel < 56) {
292 int axis, filter;
293
294 axis = channel % 8;
295 filter = channel / 8;
296 if (p->state != state_jr3_done) {
297 data[i] = 0;
298 } else {
299 int F = 0;
300 switch (axis) {
301 case 0:{
302 F = get_s16(&p->
303 channel->
304 filter[filter].
305 fx);
306 }
307 break;
308 case 1:{
309 F = get_s16(&p->
310 channel->
311 filter[filter].
312 fy);
313 }
314 break;
315 case 2:{
316 F = get_s16(&p->
317 channel->
318 filter[filter].
319 fz);
320 }
321 break;
322 case 3:{
323 F = get_s16(&p->
324 channel->
325 filter[filter].
326 mx);
327 }
328 break;
329 case 4:{
330 F = get_s16(&p->
331 channel->
332 filter[filter].
333 my);
334 }
335 break;
336 case 5:{
337 F = get_s16(&p->
338 channel->
339 filter[filter].
340 mz);
341 }
342 break;
343 case 6:{
344 F = get_s16(&p->
345 channel->
346 filter[filter].
347 v1);
348 }
349 break;
350 case 7:{
351 F = get_s16(&p->
352 channel->
353 filter[filter].
354 v2);
355 }
356 break;
357 }
358 data[i] = F + 0x4000;
359 }
360 } else if (channel == 56) {
361 if (p->state != state_jr3_done) {
362 data[i] = 0;
363 } else {
364 data[i] =
365 get_u16(&p->channel->model_no);
366 }
367 } else if (channel == 57) {
368 if (p->state != state_jr3_done) {
369 data[i] = 0;
370 } else {
371 data[i] =
372 get_u16(&p->channel->serial_no);
373 }
374 }
375 }
376 }
377 return result;
378}
379
da91b269 380static void jr3_pci_open(struct comedi_device *dev)
07b509e6
AB		 381{
382 int i;
217fbbbc 383 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB		 384
385 printk("jr3_pci_open\n");
386 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 387 struct jr3_pci_subdev_private *p;
07b509e6
AB		 388
389 p = dev->subdevices[i].private;
390 if (p) {
391 printk("serial: %p %d (%d)\n", p, p->serial_no,
392 p->channel_no);
393 }
394 }
395}
396
da91b269 397int read_idm_word(const u8 *data, size_t size, int *pos, unsigned int *val)
07b509e6
AB		 398{
399 int result = 0;
400 if (pos != 0 && val != 0) {
2696fb57 401 /* Skip over non hex */
07b509e6
AB		 402 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++) {
403 }
2696fb57 404 /* Collect value */
07b509e6
AB		 405 *val = 0;
406 for (; *pos < size && isxdigit(data[*pos]); (*pos)++) {
407 char ch = tolower(data[*pos]);
408 result = 1;
409 if ('0' <= ch && ch <= '9') {
410 *val = (*val << 4) + (ch - '0');
411 } else if ('a' <= ch && ch <= 'f') {
412 *val = (*val << 4) + (ch - 'a' + 10);
413 }
414 }
415 }
416 return result;
417}
418
da91b269 419static int jr3_download_firmware(struct comedi_device *dev, const u8 *data,
07b509e6
AB		 420 size_t size)
421{
422 /*
423 * IDM file format is:
424 * { count, address, data <count> } *
425 * ffff
426 */
427 int result, more, pos, OK;
428
429 result = 0;
430 more = 1;
431 pos = 0;
432 OK = 0;
433 while (more) {
434 unsigned int count, addr;
435
436 more = more && read_idm_word(data, size, &pos, &count);
437 if (more && count == 0xffff) {
438 OK = 1;
439 break;
440 }
441 more = more && read_idm_word(data, size, &pos, &addr);
442 while (more && count > 0) {
443 unsigned int dummy;
444 more = more && read_idm_word(data, size, &pos, &dummy);
445 count--;
446 }
447 }
448
449 if (!OK) {
450 result = -ENODATA;
451 } else {
452 int i;
217fbbbc 453 struct jr3_pci_dev_private *p = dev->private;
07b509e6
AB		 454
455 for (i = 0; i < p->n_channels; i++) {
c6a3b7b6 456 struct jr3_pci_subdev_private *sp;
07b509e6
AB		 457
458 sp = dev->subdevices[i].private;
459 more = 1;
460 pos = 0;
461 while (more) {
462 unsigned int count, addr;
463 more = more
464 && read_idm_word(data, size, &pos,
465 &count);
466 if (more && count == 0xffff) {
467 break;
468 }
469 more = more
470 && read_idm_word(data, size, &pos,
471 &addr);
472 printk("Loading#%d %4.4x bytes at %4.4x\n", i,
473 count, addr);
474 while (more && count > 0) {
475 if (addr & 0x4000) {
2696fb57 476 /* 16 bit data, never seen in real life!! */
07b509e6
AB		 477 unsigned int data1;
478
479 more = more
480 && read_idm_word(data,
481 size, &pos, &data1);
482 count--;
2696fb57
BP		 483 /* printk("jr3_data, not tested\n"); */
484 /* jr3[addr + 0x20000 * pnum] = data1; */
07b509e6 485 } else {
2696fb57 486 /* Download 24 bit program */
07b509e6
AB		 487 unsigned int data1, data2;
488
489 more = more
490 && read_idm_word(data,
491 size, &pos, &data1);
492 more = more
493 && read_idm_word(data,
494 size, &pos, &data2);
495 count -= 2;
496 if (more) {
497 set_u16(&p->iobase->
498 channel[i].
499 program_low
500 [addr], data1);
5f74ea14 501 udelay(1);
07b509e6
AB		 502 set_u16(&p->iobase->
503 channel[i].
504 program_high
505 [addr], data2);
5f74ea14 506 udelay(1);
07b509e6
AB		 507
508 }
509 }
510 addr++;
511 }
512 }
513 }
514 }
515 return result;
516}
517
da91b269 518static struct poll_delay_t jr3_pci_poll_subdevice(struct comedi_subdevice *s)
07b509e6 519{
83101a17 520 struct poll_delay_t result = poll_delay_min_max(1000, 2000);
c6a3b7b6 521 struct jr3_pci_subdev_private *p = s->private;
07b509e6
AB		 522
523 if (p) {
67080790 524 volatile struct jr3_channel *channel = p->channel;
07b509e6
AB		 525 int errors = get_u16(&channel->errors);
526
527 if (errors != p->errors) {
528 printk("Errors: %x -> %x\n", p->errors, errors);
529 p->errors = errors;
530 }
531 if (errors & (watch_dog | watch_dog2 | sensor_change)) {
2696fb57 532 /* Sensor communication lost, force poll mode */
07b509e6
AB		 533 p->state = state_jr3_poll;
534
535 }
536 switch (p->state) {
537 case state_jr3_poll:{
538 u16 model_no = get_u16(&channel->model_no);
539 u16 serial_no = get_u16(&channel->serial_no);
540 if ((errors & (watch_dog | watch_dog2)) ||
541 model_no == 0 || serial_no == 0) {
2696fb57
BP		 542/*
543 * Still no sensor, keep on polling. Since it takes up to 10 seconds
544 * for offsets to stabilize, polling each second should suffice.
545 */
07b509e6
AB		 546 result = poll_delay_min_max(1000, 2000);
547 } else {
548 p->retries = 0;
549 p->state =
550 state_jr3_init_wait_for_offset;
551 result = poll_delay_min_max(1000, 2000);
552 }
553 }
554 break;
555 case state_jr3_init_wait_for_offset:{
556 p->retries++;
557 if (p->retries < 10) {
2696fb57 558 /* Wait for offeset to stabilize (< 10 s according to manual) */
07b509e6
AB		 559 result = poll_delay_min_max(1000, 2000);
560 } else {
6ae9488b 561 struct transform_t transf;
07b509e6
AB		 562
563 p->model_no =
564 get_u16(&channel->model_no);
565 p->serial_no =
566 get_u16(&channel->serial_no);
567
568 printk("Setting transform for channel %d\n", p->channel_no);
569 printk("Sensor Model = %i\n",
570 p->model_no);
571 printk("Sensor Serial = %i\n",
572 p->serial_no);
573
2696fb57 574 /* Transformation all zeros */
07b509e6
AB		 575 transf.link[0].link_type =
576 (enum link_types)0;
577 transf.link[0].link_amount = 0;
578 transf.link[1].link_type =
579 (enum link_types)0;
580 transf.link[1].link_amount = 0;
581 transf.link[2].link_type =
582 (enum link_types)0;
583 transf.link[2].link_amount = 0;
584 transf.link[3].link_type =
585 (enum link_types)0;
586 transf.link[3].link_amount = 0;
587
588 set_transforms(channel, transf, 0);
589 use_transform(channel, 0);
590 p->state =
591 state_jr3_init_transform_complete;
2696fb57 592 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
07b509e6
AB		 593 }
594 } break;
595 case state_jr3_init_transform_complete:{
596 if (!is_complete(channel)) {
597 printk("state_jr3_init_transform_complete complete = %d\n", is_complete(channel));
598 result = poll_delay_min_max(20, 100);
599 } else {
2696fb57 600 /* Set full scale */
050509fa
BP		 601 struct six_axis_t min_full_scale;
602 struct six_axis_t max_full_scale;
07b509e6
AB		 603
604 min_full_scale =
605 get_min_full_scales(channel);
606 printk("Obtained Min. Full Scales:\n");
607 printk("%i ", (min_full_scale).fx);
608 printk("%i ", (min_full_scale).fy);
609 printk("%i ", (min_full_scale).fz);
610 printk("%i ", (min_full_scale).mx);
611 printk("%i ", (min_full_scale).my);
612 printk("%i ", (min_full_scale).mz);
613 printk("\n");
614
615 max_full_scale =
616 get_max_full_scales(channel);
617 printk("Obtained Max. Full Scales:\n");
618 printk("%i ", (max_full_scale).fx);
619 printk("%i ", (max_full_scale).fy);
620 printk("%i ", (max_full_scale).fz);
621 printk("%i ", (max_full_scale).mx);
622 printk("%i ", (max_full_scale).my);
623 printk("%i ", (max_full_scale).mz);
624 printk("\n");
625
626 set_full_scales(channel,
627 max_full_scale);
628
629 p->state =
630 state_jr3_init_set_full_scale_complete;
2696fb57 631 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
07b509e6
AB		 632 }
633 }
634 break;
635 case state_jr3_init_set_full_scale_complete:{
636 if (!is_complete(channel)) {
637 printk("state_jr3_init_set_full_scale_complete complete = %d\n", is_complete(channel));
638 result = poll_delay_min_max(20, 100);
639 } else {
cdc14cd0 640 volatile struct force_array *full_scale;
07b509e6 641
2696fb57 642 /* Use ranges in kN or we will overflow arount 2000N! */
07b509e6
AB		 643 full_scale = &channel->full_scale;
644 p->range[0].range.min =
645 -get_s16(&full_scale->fx) *
646 1000;
647 p->range[0].range.max =
648 get_s16(&full_scale->fx) * 1000;
649 p->range[1].range.min =
650 -get_s16(&full_scale->fy) *
651 1000;
652 p->range[1].range.max =
653 get_s16(&full_scale->fy) * 1000;
654 p->range[2].range.min =
655 -get_s16(&full_scale->fz) *
656 1000;
657 p->range[2].range.max =
658 get_s16(&full_scale->fz) * 1000;
659 p->range[3].range.min =
660 -get_s16(&full_scale->mx) * 100;
661 p->range[3].range.max =
662 get_s16(&full_scale->mx) * 100;
663 p->range[4].range.min =
664 -get_s16(&full_scale->my) * 100;
665 p->range[4].range.max =
666 get_s16(&full_scale->my) * 100;
667 p->range[5].range.min =
668 -get_s16(&full_scale->mz) * 100;
669 p->range[5].range.max =
670 get_s16(&full_scale->mz) * 100;
2696fb57
BP		 671 p->range[6].range.min = -get_s16(&full_scale->v1) * 100; /* ?? */
672 p->range[6].range.max = get_s16(&full_scale->v1) * 100; /* ?? */
673 p->range[7].range.min = -get_s16(&full_scale->v2) * 100; /* ?? */
674 p->range[7].range.max = get_s16(&full_scale->v2) * 100; /* ?? */
07b509e6
AB		 675 p->range[8].range.min = 0;
676 p->range[8].range.max = 65535;
677
678 {
679 int i;
680 for (i = 0; i < 9; i++) {
681 printk("%d %d - %d\n",
682 i,
683 p->range[i].
684 range.min,
685 p->range[i].
686 range.max);
687 }
688 }
689
690 use_offset(channel, 0);
691 p->state =
692 state_jr3_init_use_offset_complete;
2696fb57 693 result = poll_delay_min_max(40, 100); /* Allow 40 ms for completion */
07b509e6
AB		 694 }
695 }
696 break;
697 case state_jr3_init_use_offset_complete:{
698 if (!is_complete(channel)) {
699 printk("state_jr3_init_use_offset_complete complete = %d\n", is_complete(channel));
700 result = poll_delay_min_max(20, 100);
701 } else {
702 printk("Default offsets %d %d %d %d %d %d\n", get_s16(&channel->offsets.fx), get_s16(&channel->offsets.fy), get_s16(&channel->offsets.fz), get_s16(&channel->offsets.mx), get_s16(&channel->offsets.my), get_s16(&channel->offsets.mz));
703
704 set_s16(&channel->offsets.fx, 0);
705 set_s16(&channel->offsets.fy, 0);
706 set_s16(&channel->offsets.fz, 0);
707 set_s16(&channel->offsets.mx, 0);
708 set_s16(&channel->offsets.my, 0);
709 set_s16(&channel->offsets.mz, 0);
710
711 set_offset(channel);
712
713 p->state = state_jr3_done;
714 }
715 }
716 break;
717 case state_jr3_done:{
718 poll_delay_min_max(10000, 20000);
719 }
720 break;
721 default:{
722 poll_delay_min_max(1000, 2000);
723 }
724 break;
725 }
726 }
727 return result;
728}
729
730static void jr3_pci_poll_dev(unsigned long data)
731{
732 unsigned long flags;
71b5f4f1 733 struct comedi_device *dev = (struct comedi_device *) data;
217fbbbc 734 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB		 735 unsigned long now;
736 int delay;
737 int i;
738
5f74ea14 739 spin_lock_irqsave(&dev->spinlock, flags);
07b509e6
AB		 740 delay = 1000;
741 now = jiffies;
2696fb57 742 /* Poll all channels that are ready to be polled */
07b509e6 743 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 744 struct jr3_pci_subdev_private *subdevpriv = dev->subdevices[i].private;
07b509e6 745 if (now > subdevpriv->next_time_min) {
83101a17 746 struct poll_delay_t sub_delay;
07b509e6
AB		 747
748 sub_delay = jr3_pci_poll_subdevice(&dev->subdevices[i]);
749 subdevpriv->next_time_min =
750 jiffies + msecs_to_jiffies(sub_delay.min);
751 subdevpriv->next_time_max =
752 jiffies + msecs_to_jiffies(sub_delay.max);
753 if (sub_delay.max && sub_delay.max < delay) {
2696fb57
BP		 754/*
755* Wake up as late as possible -> poll as many channels as possible
756* at once
757*/
07b509e6
AB		 758 delay = sub_delay.max;
759 }
760 }
761 }
5f74ea14 762 spin_unlock_irqrestore(&dev->spinlock, flags);
07b509e6
AB		 763
764 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
765 add_timer(&devpriv->timer);
766}
767
da91b269 768static int jr3_pci_attach(struct comedi_device *dev, struct comedi_devconfig *it)
07b509e6
AB		 769{
770 int result = 0;
771 struct pci_dev *card = NULL;
772 int opt_bus, opt_slot, i;
217fbbbc 773 struct jr3_pci_dev_private *devpriv;
07b509e6
AB		 774
775 printk("comedi%d: jr3_pci\n", dev->minor);
776
777 opt_bus = it->options[0];
778 opt_slot = it->options[1];
779
67080790
BP		 780 if (sizeof(struct jr3_channel) != 0xc00) {
781 printk("sizeof(struct jr3_channel) = %x [expected %x]\n",
782 (unsigned)sizeof(struct jr3_channel), 0xc00);
07b509e6
AB		 783 return -EINVAL;
784 }
785
217fbbbc 786 result = alloc_private(dev, sizeof(struct jr3_pci_dev_private));
07b509e6
AB		 787 if (result < 0) {
788 return -ENOMEM;
789 }
790 card = NULL;
791 devpriv = dev->private;
792 init_timer(&devpriv->timer);
793 while (1) {
794 card = pci_get_device(PCI_VENDOR_ID_JR3, PCI_ANY_ID, card);
795 if (card == NULL) {
796 /* No card found */
797 break;
798 } else {
799 switch (card->device) {
800 case PCI_DEVICE_ID_JR3_1_CHANNEL:{
801 devpriv->n_channels = 1;
802 }
803 break;
804 case PCI_DEVICE_ID_JR3_2_CHANNEL:{
805 devpriv->n_channels = 2;
806 }
807 break;
808 case PCI_DEVICE_ID_JR3_3_CHANNEL:{
809 devpriv->n_channels = 3;
810 }
811 break;
812 case PCI_DEVICE_ID_JR3_4_CHANNEL:{
813 devpriv->n_channels = 4;
814 }
815 break;
816 default:{
817 devpriv->n_channels = 0;
818 }
819 }
820 if (devpriv->n_channels >= 1) {
821 if (opt_bus == 0 && opt_slot == 0) {
822 /* Take first available card */
823 break;
824 } else if (opt_bus == card->bus->number &&
825 opt_slot == PCI_SLOT(card->devfn)) {
826 /* Take requested card */
827 break;
828 }
829 }
830 }
831 }
832 if (!card) {
833 printk(" no jr3_pci found\n");
834 return -EIO;
835 } else {
836 devpriv->pci_dev = card;
837 dev->board_name = "jr3_pci";
838 }
c3744138
BP		 839
840 result = comedi_pci_enable(card, "jr3_pci");
841 if (result < 0) {
07b509e6
AB		 842 return -EIO;
843 }
c3744138 844
07b509e6 845 devpriv->pci_enabled = 1;
b2e1b3c2 846 devpriv->iobase = ioremap(pci_resource_start(card, 0), sizeof(struct jr3_t));
07b509e6
AB		 847 result = alloc_subdevices(dev, devpriv->n_channels);
848 if (result < 0)
849 goto out;
850
851 dev->open = jr3_pci_open;
852 for (i = 0; i < devpriv->n_channels; i++) {
853 dev->subdevices[i].type = COMEDI_SUBD_AI;
854 dev->subdevices[i].subdev_flags = SDF_READABLE | SDF_GROUND;
855 dev->subdevices[i].n_chan = 8 * 7 + 2;
856 dev->subdevices[i].insn_read = jr3_pci_ai_insn_read;
857 dev->subdevices[i].private =
c6a3b7b6 858 kzalloc(sizeof(struct jr3_pci_subdev_private), GFP_KERNEL);
07b509e6 859 if (dev->subdevices[i].private) {
c6a3b7b6 860 struct jr3_pci_subdev_private *p;
07b509e6
AB		 861 int j;
862
863 p = dev->subdevices[i].private;
864 p->channel = &devpriv->iobase->channel[i].data;
865 printk("p->channel %p %p (%tx)\n",
866 p->channel, devpriv->iobase,
867 ((char *)(p->channel) -
868 (char *)(devpriv->iobase)));
869 p->channel_no = i;
870 for (j = 0; j < 8; j++) {
871 int k;
872
873 p->range[j].length = 1;
874 p->range[j].range.min = -1000000;
875 p->range[j].range.max = 1000000;
876 for (k = 0; k < 7; k++) {
877 p->range_table_list[j + k * 8] =
9b9bcba0 878 (struct comedi_lrange *) &p->range[j];
07b509e6
AB		 879 p->maxdata_list[j + k * 8] = 0x7fff;
880 }
881 }
882 p->range[8].length = 1;
883 p->range[8].range.min = 0;
884 p->range[8].range.max = 65536;
885
886 p->range_table_list[56] =
9b9bcba0 887 (struct comedi_lrange *) &p->range[8];
07b509e6 888 p->range_table_list[57] =
9b9bcba0 889 (struct comedi_lrange *) &p->range[8];
07b509e6
AB		 890 p->maxdata_list[56] = 0xffff;
891 p->maxdata_list[57] = 0xffff;
2696fb57 892 /* Channel specific range and maxdata */
07b509e6
AB		 893 dev->subdevices[i].range_table = 0;
894 dev->subdevices[i].range_table_list =
895 p->range_table_list;
896 dev->subdevices[i].maxdata = 0;
897 dev->subdevices[i].maxdata_list = p->maxdata_list;
898 }
899 }
900
2696fb57 901 /* Reset DSP card */
07b509e6
AB		 902 devpriv->iobase->channel[0].reset = 0;
903
904 result = comedi_load_firmware(dev, "jr3pci.idm", jr3_download_firmware);
905 printk("Firmare load %d\n", result);
906
907 if (result < 0) {
908 goto out;
909 }
2696fb57
BP		 910/*
911 * TODO: use firmware to load preferred offset tables. Suggested
912 * format:
913 * model serial Fx Fy Fz Mx My Mz\n
914 *
915 * comedi_load_firmware(dev, "jr3_offsets_table", jr3_download_firmware);
916 */
07b509e6 917
2696fb57
BP		 918/*
919 * It takes a few milliseconds for software to settle as much as we
920 * can read firmware version
921 */
07b509e6
AB		 922 msleep_interruptible(25);
923 for (i = 0; i < 0x18; i++) {
924 printk("%c",
925 get_u16(&devpriv->iobase->channel[0].data.
926 copyright[i]) >> 8);
927 }
928
2696fb57 929 /* Start card timer */
07b509e6 930 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 931 struct jr3_pci_subdev_private *p = dev->subdevices[i].private;
07b509e6
AB		 932
933 p->next_time_min = jiffies + msecs_to_jiffies(500);
934 p->next_time_max = jiffies + msecs_to_jiffies(2000);
935 }
936
937 devpriv->timer.data = (unsigned long)dev;
938 devpriv->timer.function = jr3_pci_poll_dev;
939 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
940 add_timer(&devpriv->timer);
941
942 out:
943 return result;
944}
945
da91b269 946static int jr3_pci_detach(struct comedi_device *dev)
07b509e6
AB		 947{
948 int i;
217fbbbc 949 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB		 950
951 printk("comedi%d: jr3_pci: remove\n", dev->minor);
952 if (devpriv) {
953 del_timer_sync(&devpriv->timer);
954
955 if (dev->subdevices) {
956 for (i = 0; i < devpriv->n_channels; i++) {
957 kfree(dev->subdevices[i].private);
958 }
959 }
960
961 if (devpriv->iobase) {
962 iounmap((void *)devpriv->iobase);
963 }
964 if (devpriv->pci_enabled) {
965 comedi_pci_disable(devpriv->pci_dev);
966 }
967
968 if (devpriv->pci_dev) {
969 pci_dev_put(devpriv->pci_dev);
970 }
971 }
972 return 0;
973}
974
975COMEDI_PCI_INITCLEANUP(driver_jr3_pci, jr3_pci_pci_table);
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