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Commit | Line | Data |
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c4beb34e DS |
1 | /* |
2 | comedi/drivers/ni_pcimio.c | |
3 | Hardware driver for NI PCI-MIO E series cards | |
4 | ||
5 | COMEDI - Linux Control and Measurement Device Interface | |
6 | Copyright (C) 1997-8 David A. Schleef <ds@schleef.org> | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c4beb34e DS |
17 | */ |
18 | /* | |
19 | Driver: ni_pcimio | |
20 | Description: National Instruments PCI-MIO-E series and M series (all boards) | |
21 | Author: ds, John Hallen, Frank Mori Hess, Rolf Mueller, Herbert Peremans, | |
22 | Herman Bruyninckx, Terry Barnaby | |
23 | Status: works | |
24 | Devices: [National Instruments] PCI-MIO-16XE-50 (ni_pcimio), | |
25 | PCI-MIO-16XE-10, PXI-6030E, PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-6014, PCI-6040E, | |
26 | PXI-6040E, PCI-6030E, PCI-6031E, PCI-6032E, PCI-6033E, PCI-6071E, PCI-6023E, | |
27 | PCI-6024E, PCI-6025E, PXI-6025E, PCI-6034E, PCI-6035E, PCI-6052E, | |
586b9839 IA |
28 | PCI-6110, PCI-6111, PCI-6220, PCI-6221, PCI-6224, PXI-6224, |
29 | PCI-6225, PXI-6225, PCI-6229, PCI-6250, PCI-6251, PCIe-6251, PXIe-6251, | |
30 | PCI-6254, PCI-6259, PCIe-6259, | |
c4beb34e DS |
31 | PCI-6280, PCI-6281, PXI-6281, PCI-6284, PCI-6289, |
32 | PCI-6711, PXI-6711, PCI-6713, PXI-6713, | |
33 | PXI-6071E, PCI-6070E, PXI-6070E, | |
34 | PXI-6052E, PCI-6036E, PCI-6731, PCI-6733, PXI-6733, | |
35 | PCI-6143, PXI-6143 | |
586b9839 | 36 | Updated: Mon, 09 Jan 2012 14:52:48 +0000 |
c4beb34e DS |
37 | |
38 | These boards are almost identical to the AT-MIO E series, except that | |
39 | they use the PCI bus instead of ISA (i.e., AT). See the notes for | |
40 | the ni_atmio.o driver for additional information about these boards. | |
41 | ||
42 | Autocalibration is supported on many of the devices, using the | |
43 | comedi_calibrate (or comedi_soft_calibrate for m-series) utility. | |
44 | M-Series boards do analog input and analog output calibration entirely | |
45 | in software. The software calibration corrects | |
46 | the analog input for offset, gain and | |
47 | nonlinearity. The analog outputs are corrected for offset and gain. | |
48 | See the comedilib documentation on comedi_get_softcal_converter() for | |
49 | more information. | |
50 | ||
51 | By default, the driver uses DMA to transfer analog input data to | |
52 | memory. When DMA is enabled, not all triggering features are | |
53 | supported. | |
54 | ||
55 | Digital I/O may not work on 673x. | |
56 | ||
57 | Note that the PCI-6143 is a simultaineous sampling device with 8 convertors. | |
58 | With this board all of the convertors perform one simultaineous sample during | |
59 | a scan interval. The period for a scan is used for the convert time in a | |
60 | Comedi cmd. The convert trigger source is normally set to TRIG_NOW by default. | |
61 | ||
62 | The RTSI trigger bus is supported on these cards on | |
63 | subdevice 10. See the comedilib documentation for details. | |
64 | ||
65 | Information (number of channels, bits, etc.) for some devices may be | |
66 | incorrect. Please check this and submit a bug if there are problems | |
67 | for your device. | |
68 | ||
69 | SCXI is probably broken for m-series boards. | |
70 | ||
71 | Bugs: | |
72 | - When DMA is enabled, COMEDI_EV_CONVERT does | |
73 | not work correctly. | |
74 | ||
75 | */ | |
76 | /* | |
77 | The PCI-MIO E series driver was originally written by | |
78 | Tomasz Motylewski <...>, and ported to comedi by ds. | |
79 | ||
80 | References: | |
81 | ||
82 | 341079b.pdf PCI E Series Register-Level Programmer Manual | |
83 | 340934b.pdf DAQ-STC reference manual | |
84 | ||
85 | 322080b.pdf 6711/6713/6715 User Manual | |
86 | ||
87 | 320945c.pdf PCI E Series User Manual | |
88 | 322138a.pdf PCI-6052E and DAQPad-6052E User Manual | |
89 | ||
90 | ISSUES: | |
91 | ||
92 | need to deal with external reference for DAC, and other DAC | |
93 | properties in board properties | |
94 | ||
95 | deal with at-mio-16de-10 revision D to N changes, etc. | |
96 | ||
97 | need to add other CALDAC type | |
98 | ||
99 | need to slow down DAC loading. I don't trust NI's claim that | |
100 | two writes to the PCI bus slows IO enough. I would prefer to | |
5f74ea14 | 101 | use udelay(). Timing specs: (clock) |
c4beb34e DS |
102 | AD8522 30ns |
103 | DAC8043 120ns | |
104 | DAC8800 60ns | |
105 | MB88341 ? | |
106 | ||
107 | */ | |
108 | ||
ce157f80 | 109 | #include <linux/module.h> |
33782dd5 HS |
110 | #include <linux/delay.h> |
111 | ||
06972432 | 112 | #include "../comedi_pci.h" |
c4beb34e | 113 | |
f8db88ef | 114 | #include <asm/byteorder.h> |
c4beb34e DS |
115 | |
116 | #include "ni_stc.h" | |
117 | #include "mite.h" | |
118 | ||
c4beb34e DS |
119 | #define PCIDMA |
120 | ||
c4beb34e DS |
121 | /* These are not all the possible ao ranges for 628x boards. |
122 | They can do OFFSET +- REFERENCE where OFFSET can be | |
123 | 0V, 5V, APFI<0,1>, or AO<0...3> and RANGE can | |
124 | be 10V, 5V, 2V, 1V, APFI<0,1>, AO<0...3>. That's | |
125 | 63 different possibilities. An AO channel | |
126 | can not act as it's own OFFSET or REFERENCE. | |
127 | */ | |
a19d9824 HS |
128 | static const struct comedi_lrange range_ni_M_628x_ao = { |
129 | 8, { | |
130 | BIP_RANGE(10), | |
131 | BIP_RANGE(5), | |
132 | BIP_RANGE(2), | |
133 | BIP_RANGE(1), | |
134 | RANGE(-5, 15), | |
135 | UNI_RANGE(10), | |
136 | RANGE(3, 7), | |
137 | RANGE(4, 6), | |
138 | RANGE_ext(-1, 1) | |
139 | } | |
c4beb34e | 140 | }; |
0a85b6f0 | 141 | |
a19d9824 HS |
142 | static const struct comedi_lrange range_ni_M_625x_ao = { |
143 | 3, { | |
144 | BIP_RANGE(10), | |
145 | BIP_RANGE(5), | |
146 | RANGE_ext(-1, 1) | |
147 | } | |
c4beb34e | 148 | }; |
0a85b6f0 | 149 | |
a25a701a HS |
150 | enum ni_pcimio_boardid { |
151 | BOARD_PCIMIO_16XE_50, | |
152 | BOARD_PCIMIO_16XE_10, | |
153 | BOARD_PCI6014, | |
154 | BOARD_PXI6030E, | |
155 | BOARD_PCIMIO_16E_1, | |
156 | BOARD_PCIMIO_16E_4, | |
157 | BOARD_PXI6040E, | |
158 | BOARD_PCI6031E, | |
159 | BOARD_PCI6032E, | |
160 | BOARD_PCI6033E, | |
161 | BOARD_PCI6071E, | |
162 | BOARD_PCI6023E, | |
163 | BOARD_PCI6024E, | |
164 | BOARD_PCI6025E, | |
165 | BOARD_PXI6025E, | |
166 | BOARD_PCI6034E, | |
167 | BOARD_PCI6035E, | |
168 | BOARD_PCI6052E, | |
169 | BOARD_PCI6110, | |
170 | BOARD_PCI6111, | |
171 | /* BOARD_PCI6115, */ | |
172 | /* BOARD_PXI6115, */ | |
173 | BOARD_PCI6711, | |
174 | BOARD_PXI6711, | |
175 | BOARD_PCI6713, | |
176 | BOARD_PXI6713, | |
177 | BOARD_PCI6731, | |
178 | /* BOARD_PXI6731, */ | |
179 | BOARD_PCI6733, | |
180 | BOARD_PXI6733, | |
181 | BOARD_PXI6071E, | |
182 | BOARD_PXI6070E, | |
183 | BOARD_PXI6052E, | |
184 | BOARD_PXI6031E, | |
185 | BOARD_PCI6036E, | |
186 | BOARD_PCI6220, | |
187 | BOARD_PCI6221, | |
188 | BOARD_PCI6221_37PIN, | |
189 | BOARD_PCI6224, | |
190 | BOARD_PXI6224, | |
191 | BOARD_PCI6225, | |
192 | BOARD_PXI6225, | |
193 | BOARD_PCI6229, | |
194 | BOARD_PCI6250, | |
195 | BOARD_PCI6251, | |
196 | BOARD_PCIE6251, | |
197 | BOARD_PXIE6251, | |
198 | BOARD_PCI6254, | |
199 | BOARD_PCI6259, | |
200 | BOARD_PCIE6259, | |
201 | BOARD_PCI6280, | |
202 | BOARD_PCI6281, | |
203 | BOARD_PXI6281, | |
204 | BOARD_PCI6284, | |
205 | BOARD_PCI6289, | |
206 | BOARD_PCI6143, | |
207 | BOARD_PXI6143, | |
208 | }; | |
209 | ||
8ab41df0 | 210 | static const struct ni_board_struct ni_boards[] = { |
a25a701a | 211 | [BOARD_PCIMIO_16XE_50] = { |
68278f10 HS |
212 | .name = "pci-mio-16xe-50", |
213 | .n_adchan = 16, | |
db2255f5 | 214 | .ai_maxdata = 0xffff, |
68278f10 HS |
215 | .ai_fifo_depth = 2048, |
216 | .alwaysdither = 1, | |
217 | .gainlkup = ai_gain_8, | |
218 | .ai_speed = 50000, | |
219 | .n_aochan = 2, | |
c5f26499 | 220 | .ao_maxdata = 0x0fff, |
68278f10 HS |
221 | .ao_range_table = &range_bipolar10, |
222 | .ao_speed = 50000, | |
68278f10 HS |
223 | .caldac = { dac8800, dac8043 }, |
224 | }, | |
a25a701a | 225 | [BOARD_PCIMIO_16XE_10] = { |
68278f10 HS |
226 | .name = "pci-mio-16xe-10", /* aka pci-6030E */ |
227 | .n_adchan = 16, | |
db2255f5 | 228 | .ai_maxdata = 0xffff, |
68278f10 HS |
229 | .ai_fifo_depth = 512, |
230 | .alwaysdither = 1, | |
231 | .gainlkup = ai_gain_14, | |
232 | .ai_speed = 10000, | |
233 | .n_aochan = 2, | |
c5f26499 | 234 | .ao_maxdata = 0xffff, |
68278f10 HS |
235 | .ao_fifo_depth = 2048, |
236 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 237 | .ao_speed = 10000, |
68278f10 HS |
238 | .caldac = { dac8800, dac8043, ad8522 }, |
239 | }, | |
a25a701a | 240 | [BOARD_PCI6014] = { |
68278f10 HS |
241 | .name = "pci-6014", |
242 | .n_adchan = 16, | |
db2255f5 | 243 | .ai_maxdata = 0xffff, |
68278f10 HS |
244 | .ai_fifo_depth = 512, |
245 | .alwaysdither = 1, | |
246 | .gainlkup = ai_gain_4, | |
247 | .ai_speed = 5000, | |
248 | .n_aochan = 2, | |
c5f26499 | 249 | .ao_maxdata = 0xffff, |
68278f10 HS |
250 | .ao_range_table = &range_bipolar10, |
251 | .ao_speed = 100000, | |
68278f10 HS |
252 | .caldac = { ad8804_debug }, |
253 | }, | |
a25a701a | 254 | [BOARD_PXI6030E] = { |
68278f10 HS |
255 | .name = "pxi-6030e", |
256 | .n_adchan = 16, | |
db2255f5 | 257 | .ai_maxdata = 0xffff, |
68278f10 HS |
258 | .ai_fifo_depth = 512, |
259 | .alwaysdither = 1, | |
260 | .gainlkup = ai_gain_14, | |
261 | .ai_speed = 10000, | |
262 | .n_aochan = 2, | |
c5f26499 | 263 | .ao_maxdata = 0xffff, |
68278f10 HS |
264 | .ao_fifo_depth = 2048, |
265 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 266 | .ao_speed = 10000, |
68278f10 HS |
267 | .caldac = { dac8800, dac8043, ad8522 }, |
268 | }, | |
a25a701a | 269 | [BOARD_PCIMIO_16E_1] = { |
68278f10 HS |
270 | .name = "pci-mio-16e-1", /* aka pci-6070e */ |
271 | .n_adchan = 16, | |
db2255f5 | 272 | .ai_maxdata = 0x0fff, |
68278f10 HS |
273 | .ai_fifo_depth = 512, |
274 | .gainlkup = ai_gain_16, | |
275 | .ai_speed = 800, | |
276 | .n_aochan = 2, | |
c5f26499 | 277 | .ao_maxdata = 0x0fff, |
68278f10 HS |
278 | .ao_fifo_depth = 2048, |
279 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 280 | .ao_speed = 1000, |
68278f10 HS |
281 | .caldac = { mb88341 }, |
282 | }, | |
a25a701a | 283 | [BOARD_PCIMIO_16E_4] = { |
68278f10 HS |
284 | .name = "pci-mio-16e-4", /* aka pci-6040e */ |
285 | .n_adchan = 16, | |
db2255f5 | 286 | .ai_maxdata = 0x0fff, |
68278f10 HS |
287 | .ai_fifo_depth = 512, |
288 | .gainlkup = ai_gain_16, | |
289 | /* | |
290 | * there have been reported problems with | |
291 | * full speed on this board | |
292 | */ | |
293 | .ai_speed = 2000, | |
294 | .n_aochan = 2, | |
c5f26499 | 295 | .ao_maxdata = 0x0fff, |
68278f10 HS |
296 | .ao_fifo_depth = 512, |
297 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 298 | .ao_speed = 1000, |
68278f10 HS |
299 | .caldac = { ad8804_debug }, /* doc says mb88341 */ |
300 | }, | |
a25a701a | 301 | [BOARD_PXI6040E] = { |
68278f10 HS |
302 | .name = "pxi-6040e", |
303 | .n_adchan = 16, | |
db2255f5 | 304 | .ai_maxdata = 0x0fff, |
68278f10 HS |
305 | .ai_fifo_depth = 512, |
306 | .gainlkup = ai_gain_16, | |
307 | .ai_speed = 2000, | |
308 | .n_aochan = 2, | |
c5f26499 | 309 | .ao_maxdata = 0x0fff, |
68278f10 HS |
310 | .ao_fifo_depth = 512, |
311 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 312 | .ao_speed = 1000, |
68278f10 HS |
313 | .caldac = { mb88341 }, |
314 | }, | |
a25a701a | 315 | [BOARD_PCI6031E] = { |
68278f10 HS |
316 | .name = "pci-6031e", |
317 | .n_adchan = 64, | |
db2255f5 | 318 | .ai_maxdata = 0xffff, |
68278f10 HS |
319 | .ai_fifo_depth = 512, |
320 | .alwaysdither = 1, | |
321 | .gainlkup = ai_gain_14, | |
322 | .ai_speed = 10000, | |
323 | .n_aochan = 2, | |
c5f26499 | 324 | .ao_maxdata = 0xffff, |
68278f10 HS |
325 | .ao_fifo_depth = 2048, |
326 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 327 | .ao_speed = 10000, |
68278f10 HS |
328 | .caldac = { dac8800, dac8043, ad8522 }, |
329 | }, | |
a25a701a | 330 | [BOARD_PCI6032E] = { |
68278f10 HS |
331 | .name = "pci-6032e", |
332 | .n_adchan = 16, | |
db2255f5 | 333 | .ai_maxdata = 0xffff, |
68278f10 HS |
334 | .ai_fifo_depth = 512, |
335 | .alwaysdither = 1, | |
336 | .gainlkup = ai_gain_14, | |
337 | .ai_speed = 10000, | |
68278f10 HS |
338 | .caldac = { dac8800, dac8043, ad8522 }, |
339 | }, | |
a25a701a | 340 | [BOARD_PCI6033E] = { |
68278f10 HS |
341 | .name = "pci-6033e", |
342 | .n_adchan = 64, | |
db2255f5 | 343 | .ai_maxdata = 0xffff, |
68278f10 HS |
344 | .ai_fifo_depth = 512, |
345 | .alwaysdither = 1, | |
346 | .gainlkup = ai_gain_14, | |
347 | .ai_speed = 10000, | |
68278f10 HS |
348 | .caldac = { dac8800, dac8043, ad8522 }, |
349 | }, | |
a25a701a | 350 | [BOARD_PCI6071E] = { |
68278f10 HS |
351 | .name = "pci-6071e", |
352 | .n_adchan = 64, | |
db2255f5 | 353 | .ai_maxdata = 0x0fff, |
68278f10 HS |
354 | .ai_fifo_depth = 512, |
355 | .alwaysdither = 1, | |
356 | .gainlkup = ai_gain_16, | |
357 | .ai_speed = 800, | |
358 | .n_aochan = 2, | |
c5f26499 | 359 | .ao_maxdata = 0x0fff, |
68278f10 HS |
360 | .ao_fifo_depth = 2048, |
361 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 362 | .ao_speed = 1000, |
68278f10 HS |
363 | .caldac = { ad8804_debug }, |
364 | }, | |
a25a701a | 365 | [BOARD_PCI6023E] = { |
68278f10 HS |
366 | .name = "pci-6023e", |
367 | .n_adchan = 16, | |
db2255f5 | 368 | .ai_maxdata = 0x0fff, |
68278f10 HS |
369 | .ai_fifo_depth = 512, |
370 | .gainlkup = ai_gain_4, | |
371 | .ai_speed = 5000, | |
68278f10 HS |
372 | .caldac = { ad8804_debug }, /* manual is wrong */ |
373 | }, | |
a25a701a | 374 | [BOARD_PCI6024E] = { |
68278f10 HS |
375 | .name = "pci-6024e", |
376 | .n_adchan = 16, | |
db2255f5 | 377 | .ai_maxdata = 0x0fff, |
68278f10 HS |
378 | .ai_fifo_depth = 512, |
379 | .gainlkup = ai_gain_4, | |
380 | .ai_speed = 5000, | |
381 | .n_aochan = 2, | |
c5f26499 | 382 | .ao_maxdata = 0x0fff, |
68278f10 HS |
383 | .ao_range_table = &range_bipolar10, |
384 | .ao_speed = 100000, | |
68278f10 HS |
385 | .caldac = { ad8804_debug }, /* manual is wrong */ |
386 | }, | |
a25a701a | 387 | [BOARD_PCI6025E] = { |
68278f10 HS |
388 | .name = "pci-6025e", |
389 | .n_adchan = 16, | |
db2255f5 | 390 | .ai_maxdata = 0x0fff, |
68278f10 HS |
391 | .ai_fifo_depth = 512, |
392 | .gainlkup = ai_gain_4, | |
393 | .ai_speed = 5000, | |
394 | .n_aochan = 2, | |
c5f26499 | 395 | .ao_maxdata = 0x0fff, |
68278f10 HS |
396 | .ao_range_table = &range_bipolar10, |
397 | .ao_speed = 100000, | |
68278f10 HS |
398 | .caldac = { ad8804_debug }, /* manual is wrong */ |
399 | .has_8255 = 1, | |
400 | }, | |
a25a701a | 401 | [BOARD_PXI6025E] = { |
68278f10 HS |
402 | .name = "pxi-6025e", |
403 | .n_adchan = 16, | |
db2255f5 | 404 | .ai_maxdata = 0x0fff, |
68278f10 HS |
405 | .ai_fifo_depth = 512, |
406 | .gainlkup = ai_gain_4, | |
407 | .ai_speed = 5000, | |
408 | .n_aochan = 2, | |
c5f26499 | 409 | .ao_maxdata = 0x0fff, |
68278f10 | 410 | .ao_range_table = &range_ni_E_ao_ext, |
68278f10 | 411 | .ao_speed = 100000, |
68278f10 HS |
412 | .caldac = { ad8804_debug }, /* manual is wrong */ |
413 | .has_8255 = 1, | |
414 | }, | |
a25a701a | 415 | [BOARD_PCI6034E] = { |
68278f10 HS |
416 | .name = "pci-6034e", |
417 | .n_adchan = 16, | |
db2255f5 | 418 | .ai_maxdata = 0xffff, |
68278f10 HS |
419 | .ai_fifo_depth = 512, |
420 | .alwaysdither = 1, | |
421 | .gainlkup = ai_gain_4, | |
422 | .ai_speed = 5000, | |
68278f10 HS |
423 | .caldac = { ad8804_debug }, |
424 | }, | |
a25a701a | 425 | [BOARD_PCI6035E] = { |
68278f10 HS |
426 | .name = "pci-6035e", |
427 | .n_adchan = 16, | |
db2255f5 | 428 | .ai_maxdata = 0xffff, |
68278f10 HS |
429 | .ai_fifo_depth = 512, |
430 | .alwaysdither = 1, | |
431 | .gainlkup = ai_gain_4, | |
432 | .ai_speed = 5000, | |
433 | .n_aochan = 2, | |
c5f26499 | 434 | .ao_maxdata = 0x0fff, |
68278f10 HS |
435 | .ao_range_table = &range_bipolar10, |
436 | .ao_speed = 100000, | |
68278f10 HS |
437 | .caldac = { ad8804_debug }, |
438 | }, | |
a25a701a | 439 | [BOARD_PCI6052E] = { |
68278f10 HS |
440 | .name = "pci-6052e", |
441 | .n_adchan = 16, | |
db2255f5 | 442 | .ai_maxdata = 0xffff, |
68278f10 HS |
443 | .ai_fifo_depth = 512, |
444 | .alwaysdither = 1, | |
445 | .gainlkup = ai_gain_16, | |
446 | .ai_speed = 3000, | |
447 | .n_aochan = 2, | |
c5f26499 | 448 | .ao_maxdata = 0xffff, |
68278f10 HS |
449 | .ao_fifo_depth = 2048, |
450 | .ao_range_table = &range_ni_E_ao_ext, | |
451 | .ao_speed = 3000, | |
68278f10 HS |
452 | /* manual is wrong */ |
453 | .caldac = { ad8804_debug, ad8804_debug, ad8522 }, | |
454 | }, | |
a25a701a | 455 | [BOARD_PCI6110] = { |
68278f10 HS |
456 | .name = "pci-6110", |
457 | .n_adchan = 4, | |
db2255f5 | 458 | .ai_maxdata = 0x0fff, |
68278f10 HS |
459 | .ai_fifo_depth = 8192, |
460 | .alwaysdither = 0, | |
461 | .gainlkup = ai_gain_611x, | |
462 | .ai_speed = 200, | |
463 | .n_aochan = 2, | |
c5f26499 | 464 | .ao_maxdata = 0xffff, |
68278f10 HS |
465 | .reg_type = ni_reg_611x, |
466 | .ao_range_table = &range_bipolar10, | |
467 | .ao_fifo_depth = 2048, | |
468 | .ao_speed = 250, | |
68278f10 HS |
469 | .caldac = { ad8804, ad8804 }, |
470 | }, | |
a25a701a | 471 | [BOARD_PCI6111] = { |
68278f10 HS |
472 | .name = "pci-6111", |
473 | .n_adchan = 2, | |
db2255f5 | 474 | .ai_maxdata = 0x0fff, |
68278f10 HS |
475 | .ai_fifo_depth = 8192, |
476 | .gainlkup = ai_gain_611x, | |
477 | .ai_speed = 200, | |
478 | .n_aochan = 2, | |
c5f26499 | 479 | .ao_maxdata = 0xffff, |
68278f10 HS |
480 | .reg_type = ni_reg_611x, |
481 | .ao_range_table = &range_bipolar10, | |
482 | .ao_fifo_depth = 2048, | |
483 | .ao_speed = 250, | |
68278f10 HS |
484 | .caldac = { ad8804, ad8804 }, |
485 | }, | |
c4beb34e DS |
486 | #if 0 |
487 | /* The 6115 boards probably need their own driver */ | |
a25a701a | 488 | [BOARD_PCI6115] = { /* .device_id = 0x2ed0, */ |
68278f10 HS |
489 | .name = "pci-6115", |
490 | .n_adchan = 4, | |
db2255f5 | 491 | .ai_maxdata = 0x0fff, |
68278f10 HS |
492 | .ai_fifo_depth = 8192, |
493 | .gainlkup = ai_gain_611x, | |
494 | .ai_speed = 100, | |
495 | .n_aochan = 2, | |
c5f26499 | 496 | .ao_maxdata = 0xffff, |
68278f10 HS |
497 | .ao_671x = 1, |
498 | .ao_fifo_depth = 2048, | |
499 | .ao_speed = 250, | |
68278f10 HS |
500 | .reg_611x = 1, |
501 | /* XXX */ | |
502 | .caldac = { ad8804_debug, ad8804_debug, ad8804_debug }, | |
503 | }, | |
c4beb34e DS |
504 | #endif |
505 | #if 0 | |
a25a701a | 506 | [BOARD_PXI6115] = { /* .device_id = ????, */ |
68278f10 HS |
507 | .name = "pxi-6115", |
508 | .n_adchan = 4, | |
db2255f5 | 509 | .ai_maxdata = 0x0fff, |
68278f10 HS |
510 | .ai_fifo_depth = 8192, |
511 | .gainlkup = ai_gain_611x, | |
512 | .ai_speed = 100, | |
513 | .n_aochan = 2, | |
c5f26499 | 514 | .ao_maxdata = 0xffff, |
68278f10 HS |
515 | .ao_671x = 1, |
516 | .ao_fifo_depth = 2048, | |
517 | .ao_speed = 250, | |
518 | .reg_611x = 1, | |
68278f10 HS |
519 | /* XXX */ |
520 | .caldac = { ad8804_debug, ad8804_debug, ad8804_debug }, | |
521 | }, | |
c4beb34e | 522 | #endif |
a25a701a | 523 | [BOARD_PCI6711] = { |
68278f10 HS |
524 | .name = "pci-6711", |
525 | .n_aochan = 4, | |
c5f26499 | 526 | .ao_maxdata = 0x0fff, |
68278f10 HS |
527 | /* data sheet says 8192, but fifo really holds 16384 samples */ |
528 | .ao_fifo_depth = 16384, | |
529 | .ao_range_table = &range_bipolar10, | |
530 | .ao_speed = 1000, | |
68278f10 HS |
531 | .reg_type = ni_reg_6711, |
532 | .caldac = { ad8804_debug }, | |
533 | }, | |
a25a701a | 534 | [BOARD_PXI6711] = { |
68278f10 HS |
535 | .name = "pxi-6711", |
536 | .n_aochan = 4, | |
c5f26499 | 537 | .ao_maxdata = 0x0fff, |
68278f10 HS |
538 | .ao_fifo_depth = 16384, |
539 | .ao_range_table = &range_bipolar10, | |
540 | .ao_speed = 1000, | |
68278f10 HS |
541 | .reg_type = ni_reg_6711, |
542 | .caldac = { ad8804_debug }, | |
543 | }, | |
a25a701a | 544 | [BOARD_PCI6713] = { |
68278f10 HS |
545 | .name = "pci-6713", |
546 | .n_aochan = 8, | |
c5f26499 | 547 | .ao_maxdata = 0x0fff, |
68278f10 HS |
548 | .ao_fifo_depth = 16384, |
549 | .ao_range_table = &range_bipolar10, | |
550 | .ao_speed = 1000, | |
68278f10 HS |
551 | .reg_type = ni_reg_6713, |
552 | .caldac = { ad8804_debug, ad8804_debug }, | |
553 | }, | |
a25a701a | 554 | [BOARD_PXI6713] = { |
68278f10 HS |
555 | .name = "pxi-6713", |
556 | .n_aochan = 8, | |
c5f26499 | 557 | .ao_maxdata = 0x0fff, |
68278f10 HS |
558 | .ao_fifo_depth = 16384, |
559 | .ao_range_table = &range_bipolar10, | |
560 | .ao_speed = 1000, | |
68278f10 HS |
561 | .reg_type = ni_reg_6713, |
562 | .caldac = { ad8804_debug, ad8804_debug }, | |
563 | }, | |
a25a701a | 564 | [BOARD_PCI6731] = { |
68278f10 HS |
565 | .name = "pci-6731", |
566 | .n_aochan = 4, | |
c5f26499 | 567 | .ao_maxdata = 0xffff, |
68278f10 HS |
568 | .ao_fifo_depth = 8192, |
569 | .ao_range_table = &range_bipolar10, | |
570 | .ao_speed = 1000, | |
68278f10 HS |
571 | .reg_type = ni_reg_6711, |
572 | .caldac = { ad8804_debug }, | |
573 | }, | |
a25a701a HS |
574 | #if 0 |
575 | [BOARD_PXI6731] = { /* .device_id = ????, */ | |
68278f10 HS |
576 | .name = "pxi-6731", |
577 | .n_aochan = 4, | |
c5f26499 | 578 | .ao_maxdata = 0xffff, |
68278f10 HS |
579 | .ao_fifo_depth = 8192, |
580 | .ao_range_table = &range_bipolar10, | |
68278f10 HS |
581 | .reg_type = ni_reg_6711, |
582 | .caldac = { ad8804_debug }, | |
583 | }, | |
c4beb34e | 584 | #endif |
a25a701a | 585 | [BOARD_PCI6733] = { |
68278f10 HS |
586 | .name = "pci-6733", |
587 | .n_aochan = 8, | |
c5f26499 | 588 | .ao_maxdata = 0xffff, |
68278f10 HS |
589 | .ao_fifo_depth = 16384, |
590 | .ao_range_table = &range_bipolar10, | |
591 | .ao_speed = 1000, | |
68278f10 HS |
592 | .reg_type = ni_reg_6713, |
593 | .caldac = { ad8804_debug, ad8804_debug }, | |
594 | }, | |
a25a701a | 595 | [BOARD_PXI6733] = { |
68278f10 HS |
596 | .name = "pxi-6733", |
597 | .n_aochan = 8, | |
c5f26499 | 598 | .ao_maxdata = 0xffff, |
68278f10 HS |
599 | .ao_fifo_depth = 16384, |
600 | .ao_range_table = &range_bipolar10, | |
601 | .ao_speed = 1000, | |
68278f10 HS |
602 | .reg_type = ni_reg_6713, |
603 | .caldac = { ad8804_debug, ad8804_debug }, | |
604 | }, | |
a25a701a | 605 | [BOARD_PXI6071E] = { |
68278f10 HS |
606 | .name = "pxi-6071e", |
607 | .n_adchan = 64, | |
db2255f5 | 608 | .ai_maxdata = 0x0fff, |
68278f10 HS |
609 | .ai_fifo_depth = 512, |
610 | .alwaysdither = 1, | |
611 | .gainlkup = ai_gain_16, | |
612 | .ai_speed = 800, | |
613 | .n_aochan = 2, | |
c5f26499 | 614 | .ao_maxdata = 0x0fff, |
68278f10 HS |
615 | .ao_fifo_depth = 2048, |
616 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 617 | .ao_speed = 1000, |
68278f10 HS |
618 | .caldac = { ad8804_debug }, |
619 | }, | |
a25a701a | 620 | [BOARD_PXI6070E] = { |
68278f10 HS |
621 | .name = "pxi-6070e", |
622 | .n_adchan = 16, | |
db2255f5 | 623 | .ai_maxdata = 0x0fff, |
68278f10 HS |
624 | .ai_fifo_depth = 512, |
625 | .alwaysdither = 1, | |
626 | .gainlkup = ai_gain_16, | |
627 | .ai_speed = 800, | |
628 | .n_aochan = 2, | |
c5f26499 | 629 | .ao_maxdata = 0x0fff, |
68278f10 HS |
630 | .ao_fifo_depth = 2048, |
631 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 632 | .ao_speed = 1000, |
68278f10 HS |
633 | .caldac = { ad8804_debug }, |
634 | }, | |
a25a701a | 635 | [BOARD_PXI6052E] = { |
68278f10 HS |
636 | .name = "pxi-6052e", |
637 | .n_adchan = 16, | |
db2255f5 | 638 | .ai_maxdata = 0xffff, |
68278f10 HS |
639 | .ai_fifo_depth = 512, |
640 | .alwaysdither = 1, | |
641 | .gainlkup = ai_gain_16, | |
642 | .ai_speed = 3000, | |
643 | .n_aochan = 2, | |
c5f26499 | 644 | .ao_maxdata = 0xffff, |
68278f10 HS |
645 | .ao_fifo_depth = 2048, |
646 | .ao_range_table = &range_ni_E_ao_ext, | |
647 | .ao_speed = 3000, | |
68278f10 HS |
648 | .caldac = { mb88341, mb88341, ad8522 }, |
649 | }, | |
a25a701a | 650 | [BOARD_PXI6031E] = { |
68278f10 HS |
651 | .name = "pxi-6031e", |
652 | .n_adchan = 64, | |
db2255f5 | 653 | .ai_maxdata = 0xffff, |
68278f10 HS |
654 | .ai_fifo_depth = 512, |
655 | .alwaysdither = 1, | |
656 | .gainlkup = ai_gain_14, | |
657 | .ai_speed = 10000, | |
658 | .n_aochan = 2, | |
c5f26499 | 659 | .ao_maxdata = 0xffff, |
68278f10 HS |
660 | .ao_fifo_depth = 2048, |
661 | .ao_range_table = &range_ni_E_ao_ext, | |
68278f10 | 662 | .ao_speed = 10000, |
68278f10 HS |
663 | .caldac = { dac8800, dac8043, ad8522 }, |
664 | }, | |
a25a701a | 665 | [BOARD_PCI6036E] = { |
68278f10 HS |
666 | .name = "pci-6036e", |
667 | .n_adchan = 16, | |
db2255f5 | 668 | .ai_maxdata = 0xffff, |
68278f10 HS |
669 | .ai_fifo_depth = 512, |
670 | .alwaysdither = 1, | |
671 | .gainlkup = ai_gain_4, | |
672 | .ai_speed = 5000, | |
673 | .n_aochan = 2, | |
c5f26499 | 674 | .ao_maxdata = 0xffff, |
68278f10 HS |
675 | .ao_range_table = &range_bipolar10, |
676 | .ao_speed = 100000, | |
68278f10 HS |
677 | .caldac = { ad8804_debug }, |
678 | }, | |
a25a701a | 679 | [BOARD_PCI6220] = { |
68278f10 HS |
680 | .name = "pci-6220", |
681 | .n_adchan = 16, | |
db2255f5 | 682 | .ai_maxdata = 0xffff, |
68278f10 HS |
683 | .ai_fifo_depth = 512, /* FIXME: guess */ |
684 | .gainlkup = ai_gain_622x, | |
685 | .ai_speed = 4000, | |
68278f10 HS |
686 | .reg_type = ni_reg_622x, |
687 | .caldac = { caldac_none }, | |
688 | }, | |
a25a701a | 689 | [BOARD_PCI6221] = { |
68278f10 HS |
690 | .name = "pci-6221", |
691 | .n_adchan = 16, | |
db2255f5 | 692 | .ai_maxdata = 0xffff, |
68278f10 HS |
693 | .ai_fifo_depth = 4095, |
694 | .gainlkup = ai_gain_622x, | |
695 | .ai_speed = 4000, | |
696 | .n_aochan = 2, | |
c5f26499 | 697 | .ao_maxdata = 0xffff, |
68278f10 | 698 | .ao_fifo_depth = 8191, |
a4f6d9ca | 699 | .ao_range_table = &range_bipolar10, |
68278f10 HS |
700 | .reg_type = ni_reg_622x, |
701 | .ao_speed = 1200, | |
68278f10 HS |
702 | .caldac = { caldac_none }, |
703 | }, | |
a25a701a | 704 | [BOARD_PCI6221_37PIN] = { |
68278f10 HS |
705 | .name = "pci-6221_37pin", |
706 | .n_adchan = 16, | |
db2255f5 | 707 | .ai_maxdata = 0xffff, |
68278f10 HS |
708 | .ai_fifo_depth = 4095, |
709 | .gainlkup = ai_gain_622x, | |
710 | .ai_speed = 4000, | |
711 | .n_aochan = 2, | |
c5f26499 | 712 | .ao_maxdata = 0xffff, |
68278f10 | 713 | .ao_fifo_depth = 8191, |
a4f6d9ca | 714 | .ao_range_table = &range_bipolar10, |
68278f10 HS |
715 | .reg_type = ni_reg_622x, |
716 | .ao_speed = 1200, | |
68278f10 HS |
717 | .caldac = { caldac_none }, |
718 | }, | |
a25a701a | 719 | [BOARD_PCI6224] = { |
68278f10 HS |
720 | .name = "pci-6224", |
721 | .n_adchan = 32, | |
db2255f5 | 722 | .ai_maxdata = 0xffff, |
68278f10 HS |
723 | .ai_fifo_depth = 4095, |
724 | .gainlkup = ai_gain_622x, | |
725 | .ai_speed = 4000, | |
726 | .reg_type = ni_reg_622x, | |
0615c162 | 727 | .has_32dio_chan = 1, |
68278f10 HS |
728 | .caldac = { caldac_none }, |
729 | }, | |
a25a701a | 730 | [BOARD_PXI6224] = { |
68278f10 HS |
731 | .name = "pxi-6224", |
732 | .n_adchan = 32, | |
db2255f5 | 733 | .ai_maxdata = 0xffff, |
68278f10 HS |
734 | .ai_fifo_depth = 4095, |
735 | .gainlkup = ai_gain_622x, | |
736 | .ai_speed = 4000, | |
737 | .reg_type = ni_reg_622x, | |
0615c162 | 738 | .has_32dio_chan = 1, |
68278f10 HS |
739 | .caldac = { caldac_none }, |
740 | }, | |
a25a701a | 741 | [BOARD_PCI6225] = { |
68278f10 HS |
742 | .name = "pci-6225", |
743 | .n_adchan = 80, | |
db2255f5 | 744 | .ai_maxdata = 0xffff, |
68278f10 HS |
745 | .ai_fifo_depth = 4095, |
746 | .gainlkup = ai_gain_622x, | |
747 | .ai_speed = 4000, | |
748 | .n_aochan = 2, | |
c5f26499 | 749 | .ao_maxdata = 0xffff, |
68278f10 | 750 | .ao_fifo_depth = 8191, |
a4f6d9ca | 751 | .ao_range_table = &range_bipolar10, |
68278f10 HS |
752 | .reg_type = ni_reg_622x, |
753 | .ao_speed = 1200, | |
0615c162 | 754 | .has_32dio_chan = 1, |
68278f10 HS |
755 | .caldac = { caldac_none }, |
756 | }, | |
a25a701a | 757 | [BOARD_PXI6225] = { |
68278f10 HS |
758 | .name = "pxi-6225", |
759 | .n_adchan = 80, | |
db2255f5 | 760 | .ai_maxdata = 0xffff, |
68278f10 HS |
761 | .ai_fifo_depth = 4095, |
762 | .gainlkup = ai_gain_622x, | |
763 | .ai_speed = 4000, | |
764 | .n_aochan = 2, | |
c5f26499 | 765 | .ao_maxdata = 0xffff, |
68278f10 | 766 | .ao_fifo_depth = 8191, |
a4f6d9ca | 767 | .ao_range_table = &range_bipolar10, |
68278f10 HS |
768 | .reg_type = ni_reg_622x, |
769 | .ao_speed = 1200, | |
0615c162 | 770 | .has_32dio_chan = 1, |
68278f10 | 771 | .caldac = { caldac_none }, |
ecb8486d | 772 | }, |
a25a701a | 773 | [BOARD_PCI6229] = { |
68278f10 HS |
774 | .name = "pci-6229", |
775 | .n_adchan = 32, | |
db2255f5 | 776 | .ai_maxdata = 0xffff, |
68278f10 HS |
777 | .ai_fifo_depth = 4095, |
778 | .gainlkup = ai_gain_622x, | |
779 | .ai_speed = 4000, | |
780 | .n_aochan = 4, | |
c5f26499 | 781 | .ao_maxdata = 0xffff, |
68278f10 | 782 | .ao_fifo_depth = 8191, |
a4f6d9ca | 783 | .ao_range_table = &range_bipolar10, |
68278f10 HS |
784 | .reg_type = ni_reg_622x, |
785 | .ao_speed = 1200, | |
0615c162 | 786 | .has_32dio_chan = 1, |
68278f10 HS |
787 | .caldac = { caldac_none }, |
788 | }, | |
a25a701a | 789 | [BOARD_PCI6250] = { |
68278f10 HS |
790 | .name = "pci-6250", |
791 | .n_adchan = 16, | |
db2255f5 | 792 | .ai_maxdata = 0xffff, |
68278f10 HS |
793 | .ai_fifo_depth = 4095, |
794 | .gainlkup = ai_gain_628x, | |
795 | .ai_speed = 800, | |
796 | .reg_type = ni_reg_625x, | |
68278f10 HS |
797 | .caldac = { caldac_none }, |
798 | }, | |
a25a701a | 799 | [BOARD_PCI6251] = { |
68278f10 HS |
800 | .name = "pci-6251", |
801 | .n_adchan = 16, | |
db2255f5 | 802 | .ai_maxdata = 0xffff, |
68278f10 HS |
803 | .ai_fifo_depth = 4095, |
804 | .gainlkup = ai_gain_628x, | |
805 | .ai_speed = 800, | |
806 | .n_aochan = 2, | |
c5f26499 | 807 | .ao_maxdata = 0xffff, |
68278f10 HS |
808 | .ao_fifo_depth = 8191, |
809 | .ao_range_table = &range_ni_M_625x_ao, | |
810 | .reg_type = ni_reg_625x, | |
811 | .ao_speed = 350, | |
68278f10 HS |
812 | .caldac = { caldac_none }, |
813 | }, | |
a25a701a | 814 | [BOARD_PCIE6251] = { |
68278f10 HS |
815 | .name = "pcie-6251", |
816 | .n_adchan = 16, | |
db2255f5 | 817 | .ai_maxdata = 0xffff, |
68278f10 HS |
818 | .ai_fifo_depth = 4095, |
819 | .gainlkup = ai_gain_628x, | |
820 | .ai_speed = 800, | |
821 | .n_aochan = 2, | |
c5f26499 | 822 | .ao_maxdata = 0xffff, |
68278f10 HS |
823 | .ao_fifo_depth = 8191, |
824 | .ao_range_table = &range_ni_M_625x_ao, | |
825 | .reg_type = ni_reg_625x, | |
826 | .ao_speed = 350, | |
68278f10 HS |
827 | .caldac = { caldac_none }, |
828 | }, | |
a25a701a | 829 | [BOARD_PXIE6251] = { |
68278f10 HS |
830 | .name = "pxie-6251", |
831 | .n_adchan = 16, | |
db2255f5 | 832 | .ai_maxdata = 0xffff, |
68278f10 HS |
833 | .ai_fifo_depth = 4095, |
834 | .gainlkup = ai_gain_628x, | |
835 | .ai_speed = 800, | |
836 | .n_aochan = 2, | |
c5f26499 | 837 | .ao_maxdata = 0xffff, |
68278f10 HS |
838 | .ao_fifo_depth = 8191, |
839 | .ao_range_table = &range_ni_M_625x_ao, | |
840 | .reg_type = ni_reg_625x, | |
841 | .ao_speed = 350, | |
68278f10 HS |
842 | .caldac = { caldac_none }, |
843 | }, | |
a25a701a | 844 | [BOARD_PCI6254] = { |
68278f10 HS |
845 | .name = "pci-6254", |
846 | .n_adchan = 32, | |
db2255f5 | 847 | .ai_maxdata = 0xffff, |
68278f10 HS |
848 | .ai_fifo_depth = 4095, |
849 | .gainlkup = ai_gain_628x, | |
850 | .ai_speed = 800, | |
851 | .reg_type = ni_reg_625x, | |
0615c162 | 852 | .has_32dio_chan = 1, |
68278f10 HS |
853 | .caldac = { caldac_none }, |
854 | }, | |
a25a701a | 855 | [BOARD_PCI6259] = { |
68278f10 HS |
856 | .name = "pci-6259", |
857 | .n_adchan = 32, | |
db2255f5 | 858 | .ai_maxdata = 0xffff, |
68278f10 HS |
859 | .ai_fifo_depth = 4095, |
860 | .gainlkup = ai_gain_628x, | |
861 | .ai_speed = 800, | |
862 | .n_aochan = 4, | |
c5f26499 | 863 | .ao_maxdata = 0xffff, |
68278f10 HS |
864 | .ao_fifo_depth = 8191, |
865 | .ao_range_table = &range_ni_M_625x_ao, | |
866 | .reg_type = ni_reg_625x, | |
867 | .ao_speed = 350, | |
0615c162 | 868 | .has_32dio_chan = 1, |
68278f10 HS |
869 | .caldac = { caldac_none }, |
870 | }, | |
a25a701a | 871 | [BOARD_PCIE6259] = { |
68278f10 HS |
872 | .name = "pcie-6259", |
873 | .n_adchan = 32, | |
db2255f5 | 874 | .ai_maxdata = 0xffff, |
68278f10 HS |
875 | .ai_fifo_depth = 4095, |
876 | .gainlkup = ai_gain_628x, | |
877 | .ai_speed = 800, | |
878 | .n_aochan = 4, | |
c5f26499 | 879 | .ao_maxdata = 0xffff, |
68278f10 HS |
880 | .ao_fifo_depth = 8191, |
881 | .ao_range_table = &range_ni_M_625x_ao, | |
882 | .reg_type = ni_reg_625x, | |
883 | .ao_speed = 350, | |
0615c162 | 884 | .has_32dio_chan = 1, |
68278f10 HS |
885 | .caldac = { caldac_none }, |
886 | }, | |
a25a701a | 887 | [BOARD_PCI6280] = { |
68278f10 HS |
888 | .name = "pci-6280", |
889 | .n_adchan = 16, | |
db2255f5 | 890 | .ai_maxdata = 0x3ffff, |
68278f10 HS |
891 | .ai_fifo_depth = 2047, |
892 | .gainlkup = ai_gain_628x, | |
893 | .ai_speed = 1600, | |
894 | .ao_fifo_depth = 8191, | |
895 | .reg_type = ni_reg_628x, | |
68278f10 HS |
896 | .caldac = { caldac_none }, |
897 | }, | |
a25a701a | 898 | [BOARD_PCI6281] = { |
68278f10 HS |
899 | .name = "pci-6281", |
900 | .n_adchan = 16, | |
db2255f5 | 901 | .ai_maxdata = 0x3ffff, |
68278f10 HS |
902 | .ai_fifo_depth = 2047, |
903 | .gainlkup = ai_gain_628x, | |
904 | .ai_speed = 1600, | |
905 | .n_aochan = 2, | |
c5f26499 | 906 | .ao_maxdata = 0xffff, |
68278f10 HS |
907 | .ao_fifo_depth = 8191, |
908 | .ao_range_table = &range_ni_M_628x_ao, | |
909 | .reg_type = ni_reg_628x, | |
68278f10 | 910 | .ao_speed = 350, |
68278f10 HS |
911 | .caldac = { caldac_none }, |
912 | }, | |
a25a701a | 913 | [BOARD_PXI6281] = { |
68278f10 HS |
914 | .name = "pxi-6281", |
915 | .n_adchan = 16, | |
db2255f5 | 916 | .ai_maxdata = 0x3ffff, |
68278f10 HS |
917 | .ai_fifo_depth = 2047, |
918 | .gainlkup = ai_gain_628x, | |
919 | .ai_speed = 1600, | |
920 | .n_aochan = 2, | |
c5f26499 | 921 | .ao_maxdata = 0xffff, |
68278f10 HS |
922 | .ao_fifo_depth = 8191, |
923 | .ao_range_table = &range_ni_M_628x_ao, | |
924 | .reg_type = ni_reg_628x, | |
68278f10 | 925 | .ao_speed = 350, |
68278f10 HS |
926 | .caldac = { caldac_none }, |
927 | }, | |
a25a701a | 928 | [BOARD_PCI6284] = { |
68278f10 HS |
929 | .name = "pci-6284", |
930 | .n_adchan = 32, | |
db2255f5 | 931 | .ai_maxdata = 0x3ffff, |
68278f10 HS |
932 | .ai_fifo_depth = 2047, |
933 | .gainlkup = ai_gain_628x, | |
934 | .ai_speed = 1600, | |
935 | .reg_type = ni_reg_628x, | |
0615c162 | 936 | .has_32dio_chan = 1, |
68278f10 HS |
937 | .caldac = { caldac_none }, |
938 | }, | |
a25a701a | 939 | [BOARD_PCI6289] = { |
68278f10 HS |
940 | .name = "pci-6289", |
941 | .n_adchan = 32, | |
db2255f5 | 942 | .ai_maxdata = 0x3ffff, |
68278f10 HS |
943 | .ai_fifo_depth = 2047, |
944 | .gainlkup = ai_gain_628x, | |
945 | .ai_speed = 1600, | |
946 | .n_aochan = 4, | |
c5f26499 | 947 | .ao_maxdata = 0xffff, |
68278f10 HS |
948 | .ao_fifo_depth = 8191, |
949 | .ao_range_table = &range_ni_M_628x_ao, | |
950 | .reg_type = ni_reg_628x, | |
68278f10 | 951 | .ao_speed = 350, |
0615c162 | 952 | .has_32dio_chan = 1, |
68278f10 HS |
953 | .caldac = { caldac_none }, |
954 | }, | |
a25a701a | 955 | [BOARD_PCI6143] = { |
68278f10 HS |
956 | .name = "pci-6143", |
957 | .n_adchan = 8, | |
db2255f5 | 958 | .ai_maxdata = 0xffff, |
68278f10 HS |
959 | .ai_fifo_depth = 1024, |
960 | .gainlkup = ai_gain_6143, | |
961 | .ai_speed = 4000, | |
962 | .reg_type = ni_reg_6143, | |
68278f10 HS |
963 | .caldac = { ad8804_debug, ad8804_debug }, |
964 | }, | |
a25a701a | 965 | [BOARD_PXI6143] = { |
68278f10 HS |
966 | .name = "pxi-6143", |
967 | .n_adchan = 8, | |
db2255f5 | 968 | .ai_maxdata = 0xffff, |
68278f10 HS |
969 | .ai_fifo_depth = 1024, |
970 | .gainlkup = ai_gain_6143, | |
971 | .ai_speed = 4000, | |
972 | .reg_type = ni_reg_6143, | |
68278f10 HS |
973 | .caldac = { ad8804_debug, ad8804_debug }, |
974 | }, | |
c4beb34e DS |
975 | }; |
976 | ||
ac63baf5 | 977 | #include "ni_mio_common.c" |
c4beb34e | 978 | |
0a85b6f0 | 979 | static int pcimio_ai_change(struct comedi_device *dev, |
d546b896 | 980 | struct comedi_subdevice *s) |
a55e9067 HS |
981 | { |
982 | struct ni_private *devpriv = dev->private; | |
983 | int ret; | |
984 | ||
985 | ret = mite_buf_change(devpriv->ai_mite_ring, s); | |
986 | if (ret < 0) | |
987 | return ret; | |
988 | ||
989 | return 0; | |
990 | } | |
991 | ||
0a85b6f0 | 992 | static int pcimio_ao_change(struct comedi_device *dev, |
d546b896 | 993 | struct comedi_subdevice *s) |
a55e9067 HS |
994 | { |
995 | struct ni_private *devpriv = dev->private; | |
996 | int ret; | |
997 | ||
998 | ret = mite_buf_change(devpriv->ao_mite_ring, s); | |
999 | if (ret < 0) | |
1000 | return ret; | |
1001 | ||
1002 | return 0; | |
1003 | } | |
1004 | ||
0a85b6f0 | 1005 | static int pcimio_gpct0_change(struct comedi_device *dev, |
d546b896 | 1006 | struct comedi_subdevice *s) |
a55e9067 HS |
1007 | { |
1008 | struct ni_private *devpriv = dev->private; | |
1009 | int ret; | |
1010 | ||
1011 | ret = mite_buf_change(devpriv->gpct_mite_ring[0], s); | |
1012 | if (ret < 0) | |
1013 | return ret; | |
1014 | ||
1015 | return 0; | |
1016 | } | |
1017 | ||
0a85b6f0 | 1018 | static int pcimio_gpct1_change(struct comedi_device *dev, |
d546b896 | 1019 | struct comedi_subdevice *s) |
a55e9067 HS |
1020 | { |
1021 | struct ni_private *devpriv = dev->private; | |
1022 | int ret; | |
1023 | ||
1024 | ret = mite_buf_change(devpriv->gpct_mite_ring[1], s); | |
1025 | if (ret < 0) | |
1026 | return ret; | |
1027 | ||
1028 | return 0; | |
1029 | } | |
1030 | ||
0a85b6f0 | 1031 | static int pcimio_dio_change(struct comedi_device *dev, |
d546b896 | 1032 | struct comedi_subdevice *s) |
a55e9067 HS |
1033 | { |
1034 | struct ni_private *devpriv = dev->private; | |
1035 | int ret; | |
1036 | ||
1037 | ret = mite_buf_change(devpriv->cdo_mite_ring, s); | |
1038 | if (ret < 0) | |
1039 | return ret; | |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | ||
da91b269 | 1044 | static void m_series_init_eeprom_buffer(struct comedi_device *dev) |
c4beb34e | 1045 | { |
0e05c552 | 1046 | struct ni_private *devpriv = dev->private; |
c4beb34e DS |
1047 | static const int Start_Cal_EEPROM = 0x400; |
1048 | static const unsigned window_size = 10; | |
f8db88ef FMH |
1049 | static const int serial_number_eeprom_offset = 0x4; |
1050 | static const int serial_number_eeprom_length = 0x4; | |
c4beb34e DS |
1051 | unsigned old_iodwbsr_bits; |
1052 | unsigned old_iodwbsr1_bits; | |
1053 | unsigned old_iodwcr1_bits; | |
1054 | int i; | |
1055 | ||
1056 | old_iodwbsr_bits = readl(devpriv->mite->mite_io_addr + MITE_IODWBSR); | |
1057 | old_iodwbsr1_bits = readl(devpriv->mite->mite_io_addr + MITE_IODWBSR_1); | |
1058 | old_iodwcr1_bits = readl(devpriv->mite->mite_io_addr + MITE_IODWCR_1); | |
1059 | writel(0x0, devpriv->mite->mite_io_addr + MITE_IODWBSR); | |
1060 | writel(((0x80 | window_size) | devpriv->mite->daq_phys_addr), | |
0a85b6f0 MT |
1061 | devpriv->mite->mite_io_addr + MITE_IODWBSR_1); |
1062 | writel(0x1 | old_iodwcr1_bits, | |
1063 | devpriv->mite->mite_io_addr + MITE_IODWCR_1); | |
c4beb34e DS |
1064 | writel(0xf, devpriv->mite->mite_io_addr + 0x30); |
1065 | ||
f8db88ef FMH |
1066 | BUG_ON(serial_number_eeprom_length > sizeof(devpriv->serial_number)); |
1067 | for (i = 0; i < serial_number_eeprom_length; ++i) { | |
0a85b6f0 | 1068 | char *byte_ptr = (char *)&devpriv->serial_number + i; |
ac63baf5 | 1069 | *byte_ptr = ni_readb(dev, serial_number_eeprom_offset + i); |
f8db88ef FMH |
1070 | } |
1071 | devpriv->serial_number = be32_to_cpu(devpriv->serial_number); | |
1072 | ||
25c0ca84 | 1073 | for (i = 0; i < M_SERIES_EEPROM_SIZE; ++i) |
ac63baf5 | 1074 | devpriv->eeprom_buffer[i] = ni_readb(dev, Start_Cal_EEPROM + i); |
c4beb34e DS |
1075 | |
1076 | writel(old_iodwbsr1_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR_1); | |
1077 | writel(old_iodwbsr_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR); | |
1078 | writel(old_iodwcr1_bits, devpriv->mite->mite_io_addr + MITE_IODWCR_1); | |
1079 | writel(0x0, devpriv->mite->mite_io_addr + 0x30); | |
1080 | } | |
1081 | ||
da91b269 | 1082 | static void init_6143(struct comedi_device *dev) |
c4beb34e | 1083 | { |
068be499 | 1084 | const struct ni_board_struct *board = dev->board_ptr; |
0e05c552 HS |
1085 | struct ni_private *devpriv = dev->private; |
1086 | ||
2696fb57 | 1087 | /* Disable interrupts */ |
b30f0d0c | 1088 | ni_stc_writew(dev, 0, Interrupt_Control_Register); |
c4beb34e | 1089 | |
2696fb57 | 1090 | /* Initialise 6143 AI specific bits */ |
9c340ac9 HS |
1091 | |
1092 | /* Set G0,G1 DMA mode to E series version */ | |
ac63baf5 | 1093 | ni_writeb(dev, 0x00, Magic_6143); |
9c340ac9 | 1094 | /* Set EOCMode, ADCMode and pipelinedelay */ |
ac63baf5 | 1095 | ni_writeb(dev, 0x80, PipelineDelay_6143); |
9c340ac9 | 1096 | /* Set EOC Delay */ |
ac63baf5 | 1097 | ni_writeb(dev, 0x00, EOC_Set_6143); |
c4beb34e | 1098 | |
6293e357 | 1099 | /* Set the FIFO half full level */ |
ac63baf5 | 1100 | ni_writel(dev, board->ai_fifo_depth / 2, AIFIFO_Flag_6143); |
c4beb34e | 1101 | |
2696fb57 | 1102 | /* Strobe Relay disable bit */ |
c4beb34e | 1103 | devpriv->ai_calib_source_enabled = 0; |
ac63baf5 HS |
1104 | ni_writew(dev, devpriv->ai_calib_source | |
1105 | Calibration_Channel_6143_RelayOff, | |
1106 | Calibration_Channel_6143); | |
1107 | ni_writew(dev, devpriv->ai_calib_source, Calibration_Channel_6143); | |
c4beb34e DS |
1108 | } |
1109 | ||
484ecc95 | 1110 | static void pcimio_detach(struct comedi_device *dev) |
c4beb34e | 1111 | { |
0e05c552 HS |
1112 | struct ni_private *devpriv = dev->private; |
1113 | ||
c4beb34e | 1114 | mio_common_detach(dev); |
25c0ca84 | 1115 | if (dev->irq) |
5f74ea14 | 1116 | free_irq(dev->irq, dev); |
0e05c552 | 1117 | if (devpriv) { |
c4beb34e DS |
1118 | mite_free_ring(devpriv->ai_mite_ring); |
1119 | mite_free_ring(devpriv->ao_mite_ring); | |
1120 | mite_free_ring(devpriv->cdo_mite_ring); | |
1121 | mite_free_ring(devpriv->gpct_mite_ring[0]); | |
1122 | mite_free_ring(devpriv->gpct_mite_ring[1]); | |
b876e985 | 1123 | mite_detach(devpriv->mite); |
c4beb34e | 1124 | } |
5f8a5f4f HS |
1125 | if (dev->mmio) |
1126 | iounmap(dev->mmio); | |
7f072f54 | 1127 | comedi_pci_disable(dev); |
c4beb34e DS |
1128 | } |
1129 | ||
a690b7e5 | 1130 | static int pcimio_auto_attach(struct comedi_device *dev, |
a25a701a | 1131 | unsigned long context) |
c4beb34e | 1132 | { |
750af5e5 | 1133 | struct pci_dev *pcidev = comedi_to_pci_dev(dev); |
a25a701a | 1134 | const struct ni_board_struct *board = NULL; |
0e05c552 | 1135 | struct ni_private *devpriv; |
c108a5e0 | 1136 | unsigned int irq; |
c4beb34e DS |
1137 | int ret; |
1138 | ||
a25a701a HS |
1139 | if (context < ARRAY_SIZE(ni_boards)) |
1140 | board = &ni_boards[context]; | |
1141 | if (!board) | |
1142 | return -ENODEV; | |
1143 | dev->board_ptr = board; | |
1144 | dev->board_name = board->name; | |
c4beb34e | 1145 | |
818f569f HS |
1146 | ret = comedi_pci_enable(dev); |
1147 | if (ret) | |
1148 | return ret; | |
818f569f | 1149 | |
c4beb34e | 1150 | ret = ni_alloc_private(dev); |
0e05c552 | 1151 | if (ret) |
c4beb34e | 1152 | return ret; |
0e05c552 | 1153 | devpriv = dev->private; |
c4beb34e | 1154 | |
a5cf79e3 | 1155 | devpriv->mite = mite_alloc(pcidev); |
b0213674 | 1156 | if (!devpriv->mite) |
a5cf79e3 | 1157 | return -ENOMEM; |
c4beb34e | 1158 | |
b30f0d0c | 1159 | if (board->reg_type & ni_reg_m_series_mask) |
17733219 | 1160 | devpriv->is_m_series = 1; |
a52b53e4 HS |
1161 | if (board->reg_type & ni_reg_6xxx_mask) |
1162 | devpriv->is_6xxx = 1; | |
1163 | if (board->reg_type == ni_reg_611x) | |
1164 | devpriv->is_611x = 1; | |
1165 | if (board->reg_type == ni_reg_6143) | |
1166 | devpriv->is_6143 = 1; | |
1167 | if (board->reg_type == ni_reg_622x) | |
1168 | devpriv->is_622x = 1; | |
1169 | if (board->reg_type == ni_reg_625x) | |
1170 | devpriv->is_625x = 1; | |
1171 | if (board->reg_type == ni_reg_628x) | |
1172 | devpriv->is_628x = 1; | |
1173 | if (board->reg_type & ni_reg_67xx_mask) | |
1174 | devpriv->is_67xx = 1; | |
1175 | if (board->reg_type == ni_reg_6711) | |
1176 | devpriv->is_6711 = 1; | |
1177 | if (board->reg_type == ni_reg_6713) | |
1178 | devpriv->is_6713 = 1; | |
17733219 | 1179 | |
3bb7c3ab HS |
1180 | ret = mite_setup(dev, devpriv->mite); |
1181 | if (ret < 0) | |
c4beb34e | 1182 | return ret; |
7fc465b1 | 1183 | |
c4beb34e | 1184 | devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite); |
9bacea57 | 1185 | if (!devpriv->ai_mite_ring) |
c4beb34e DS |
1186 | return -ENOMEM; |
1187 | devpriv->ao_mite_ring = mite_alloc_ring(devpriv->mite); | |
9bacea57 | 1188 | if (!devpriv->ao_mite_ring) |
c4beb34e DS |
1189 | return -ENOMEM; |
1190 | devpriv->cdo_mite_ring = mite_alloc_ring(devpriv->mite); | |
9bacea57 | 1191 | if (!devpriv->cdo_mite_ring) |
c4beb34e DS |
1192 | return -ENOMEM; |
1193 | devpriv->gpct_mite_ring[0] = mite_alloc_ring(devpriv->mite); | |
9bacea57 | 1194 | if (!devpriv->gpct_mite_ring[0]) |
c4beb34e DS |
1195 | return -ENOMEM; |
1196 | devpriv->gpct_mite_ring[1] = mite_alloc_ring(devpriv->mite); | |
9bacea57 | 1197 | if (!devpriv->gpct_mite_ring[1]) |
c4beb34e DS |
1198 | return -ENOMEM; |
1199 | ||
17733219 | 1200 | if (devpriv->is_m_series) |
c4beb34e | 1201 | m_series_init_eeprom_buffer(dev); |
a52b53e4 | 1202 | if (devpriv->is_6143) |
c4beb34e DS |
1203 | init_6143(dev); |
1204 | ||
ba9d29fe | 1205 | irq = pcidev->irq; |
c108a5e0 | 1206 | if (irq) { |
32d878a2 | 1207 | ret = request_irq(irq, ni_E_interrupt, IRQF_SHARED, |
c108a5e0 HS |
1208 | dev->board_name, dev); |
1209 | if (ret == 0) | |
1210 | dev->irq = irq; | |
c4beb34e DS |
1211 | } |
1212 | ||
1fa955ba | 1213 | ret = ni_E_init(dev, 0, 1); |
c4beb34e DS |
1214 | if (ret < 0) |
1215 | return ret; | |
1216 | ||
1217 | dev->subdevices[NI_AI_SUBDEV].buf_change = &pcimio_ai_change; | |
1218 | dev->subdevices[NI_AO_SUBDEV].buf_change = &pcimio_ao_change; | |
1219 | dev->subdevices[NI_GPCT_SUBDEV(0)].buf_change = &pcimio_gpct0_change; | |
1220 | dev->subdevices[NI_GPCT_SUBDEV(1)].buf_change = &pcimio_gpct1_change; | |
1221 | dev->subdevices[NI_DIO_SUBDEV].buf_change = &pcimio_dio_change; | |
1222 | ||
fb780d21 | 1223 | return 0; |
c4beb34e DS |
1224 | } |
1225 | ||
95f18c0c HS |
1226 | static struct comedi_driver ni_pcimio_driver = { |
1227 | .driver_name = "ni_pcimio", | |
1228 | .module = THIS_MODULE, | |
750af5e5 | 1229 | .auto_attach = pcimio_auto_attach, |
95f18c0c HS |
1230 | .detach = pcimio_detach, |
1231 | }; | |
1232 | ||
a690b7e5 | 1233 | static int ni_pcimio_pci_probe(struct pci_dev *dev, |
b8f4ac23 | 1234 | const struct pci_device_id *id) |
95f18c0c | 1235 | { |
b8f4ac23 | 1236 | return comedi_pci_auto_config(dev, &ni_pcimio_driver, id->driver_data); |
95f18c0c HS |
1237 | } |
1238 | ||
41e043fc | 1239 | static const struct pci_device_id ni_pcimio_pci_table[] = { |
a25a701a HS |
1240 | { PCI_VDEVICE(NI, 0x0162), BOARD_PCIMIO_16XE_50 }, /* 0x1620? */ |
1241 | { PCI_VDEVICE(NI, 0x1170), BOARD_PCIMIO_16XE_10 }, | |
1242 | { PCI_VDEVICE(NI, 0x1180), BOARD_PCIMIO_16E_1 }, | |
1243 | { PCI_VDEVICE(NI, 0x1190), BOARD_PCIMIO_16E_4 }, | |
1244 | { PCI_VDEVICE(NI, 0x11b0), BOARD_PXI6070E }, | |
1245 | { PCI_VDEVICE(NI, 0x11c0), BOARD_PXI6040E }, | |
1246 | { PCI_VDEVICE(NI, 0x11d0), BOARD_PXI6030E }, | |
1247 | { PCI_VDEVICE(NI, 0x1270), BOARD_PCI6032E }, | |
1248 | { PCI_VDEVICE(NI, 0x1330), BOARD_PCI6031E }, | |
1249 | { PCI_VDEVICE(NI, 0x1340), BOARD_PCI6033E }, | |
1250 | { PCI_VDEVICE(NI, 0x1350), BOARD_PCI6071E }, | |
1251 | { PCI_VDEVICE(NI, 0x14e0), BOARD_PCI6110 }, | |
1252 | { PCI_VDEVICE(NI, 0x14f0), BOARD_PCI6111 }, | |
1253 | { PCI_VDEVICE(NI, 0x1580), BOARD_PXI6031E }, | |
1254 | { PCI_VDEVICE(NI, 0x15b0), BOARD_PXI6071E }, | |
1255 | { PCI_VDEVICE(NI, 0x1880), BOARD_PCI6711 }, | |
1256 | { PCI_VDEVICE(NI, 0x1870), BOARD_PCI6713 }, | |
1257 | { PCI_VDEVICE(NI, 0x18b0), BOARD_PCI6052E }, | |
1258 | { PCI_VDEVICE(NI, 0x18c0), BOARD_PXI6052E }, | |
1259 | { PCI_VDEVICE(NI, 0x2410), BOARD_PCI6733 }, | |
1260 | { PCI_VDEVICE(NI, 0x2420), BOARD_PXI6733 }, | |
1261 | { PCI_VDEVICE(NI, 0x2430), BOARD_PCI6731 }, | |
1262 | { PCI_VDEVICE(NI, 0x2890), BOARD_PCI6036E }, | |
1263 | { PCI_VDEVICE(NI, 0x28c0), BOARD_PCI6014 }, | |
1264 | { PCI_VDEVICE(NI, 0x2a60), BOARD_PCI6023E }, | |
1265 | { PCI_VDEVICE(NI, 0x2a70), BOARD_PCI6024E }, | |
1266 | { PCI_VDEVICE(NI, 0x2a80), BOARD_PCI6025E }, | |
1267 | { PCI_VDEVICE(NI, 0x2ab0), BOARD_PXI6025E }, | |
1268 | { PCI_VDEVICE(NI, 0x2b80), BOARD_PXI6713 }, | |
1269 | { PCI_VDEVICE(NI, 0x2b90), BOARD_PXI6711 }, | |
1270 | { PCI_VDEVICE(NI, 0x2c80), BOARD_PCI6035E }, | |
1271 | { PCI_VDEVICE(NI, 0x2ca0), BOARD_PCI6034E }, | |
1272 | { PCI_VDEVICE(NI, 0x70aa), BOARD_PCI6229 }, | |
1273 | { PCI_VDEVICE(NI, 0x70ab), BOARD_PCI6259 }, | |
1274 | { PCI_VDEVICE(NI, 0x70ac), BOARD_PCI6289 }, | |
1275 | { PCI_VDEVICE(NI, 0x70af), BOARD_PCI6221 }, | |
1276 | { PCI_VDEVICE(NI, 0x70b0), BOARD_PCI6220 }, | |
1277 | { PCI_VDEVICE(NI, 0x70b4), BOARD_PCI6250 }, | |
1278 | { PCI_VDEVICE(NI, 0x70b6), BOARD_PCI6280 }, | |
1279 | { PCI_VDEVICE(NI, 0x70b7), BOARD_PCI6254 }, | |
1280 | { PCI_VDEVICE(NI, 0x70b8), BOARD_PCI6251 }, | |
1281 | { PCI_VDEVICE(NI, 0x70bc), BOARD_PCI6284 }, | |
1282 | { PCI_VDEVICE(NI, 0x70bd), BOARD_PCI6281 }, | |
1283 | { PCI_VDEVICE(NI, 0x70bf), BOARD_PXI6281 }, | |
1284 | { PCI_VDEVICE(NI, 0x70c0), BOARD_PCI6143 }, | |
1285 | { PCI_VDEVICE(NI, 0x70f2), BOARD_PCI6224 }, | |
1286 | { PCI_VDEVICE(NI, 0x70f3), BOARD_PXI6224 }, | |
1287 | { PCI_VDEVICE(NI, 0x710d), BOARD_PXI6143 }, | |
1288 | { PCI_VDEVICE(NI, 0x716c), BOARD_PCI6225 }, | |
1289 | { PCI_VDEVICE(NI, 0x716d), BOARD_PXI6225 }, | |
1290 | { PCI_VDEVICE(NI, 0x717f), BOARD_PCIE6259 }, | |
1291 | { PCI_VDEVICE(NI, 0x71bc), BOARD_PCI6221_37PIN }, | |
1292 | { PCI_VDEVICE(NI, 0x717d), BOARD_PCIE6251 }, | |
1293 | { PCI_VDEVICE(NI, 0x72e8), BOARD_PXIE6251 }, | |
95f18c0c HS |
1294 | { 0 } |
1295 | }; | |
1296 | MODULE_DEVICE_TABLE(pci, ni_pcimio_pci_table); | |
1297 | ||
1298 | static struct pci_driver ni_pcimio_pci_driver = { | |
1299 | .name = "ni_pcimio", | |
1300 | .id_table = ni_pcimio_pci_table, | |
1301 | .probe = ni_pcimio_pci_probe, | |
9901a4d7 | 1302 | .remove = comedi_pci_auto_unconfig, |
95f18c0c | 1303 | }; |
9c4aef95 | 1304 | module_comedi_pci_driver(ni_pcimio_driver, ni_pcimio_pci_driver); |
95f18c0c | 1305 | |
3c323c01 IA |
1306 | MODULE_AUTHOR("Comedi http://www.comedi.org"); |
1307 | MODULE_DESCRIPTION("Comedi low-level driver"); | |
1308 | MODULE_LICENSE("GPL"); |