[mirror_ubuntu-artful-kernel.git] / drivers / staging / fbtft / fb_tls8204.c

/*
 * FB driver for the TLS8204 LCD Controller
 *
 * The display is monochrome and the video memory is RGB565.
 * Any pixel value except 0 turns the pixel on.
 *
 * Copyright (C) 2013 Noralf Tronnes
 * Copyright (C) 2014 Michael Hope (adapted for the TLS8204)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/spi/spi.h>
#include <linux/delay.h>

#include "fbtft.h"

#define DRVNAME		"fb_tls8204"
#define WIDTH		84
#define HEIGHT		48
#define TXBUFLEN	WIDTH

/* gamma is used to control contrast in this driver */
#define DEFAULT_GAMMA	"40"

static unsigned int bs = 4;
module_param(bs, uint, 0000);
MODULE_PARM_DESC(bs, "BS[2:0] Bias voltage level: 0-7 (default: 4)");

static int init_display(struct fbtft_par *par)
{
	par->fbtftops.reset(par);

	/* Enter extended command mode */
	write_reg(par, 0x21);	/* 5:1  1
				 * 2:0  PD - Powerdown control: chip is active
				 * 1:0  V  - Entry mode: horizontal addressing
				 * 0:1  H  - Extended instruction set control:
				 *	     extended
				 */

	/* H=1 Bias system */
	write_reg(par, 0x10 | (bs & 0x7));
				/* 4:1  1
				 * 3:0  0
				 * 2:x  BS2 - Bias System
				 * 1:x  BS1
				 * 0:x  BS0
				 */

	/* Set the address of the first display line. */
	write_reg(par, 0x04 | (64 >> 6));
	write_reg(par, 0x40 | (64 & 0x3F));

	/* Enter H=0 standard command mode */
	write_reg(par, 0x20);

	/* H=0 Display control */
	write_reg(par, 0x08 | 4);
				/* 3:1  1
				 * 2:1  D - DE: 10=normal mode
				 * 1:0  0
				 * 0:0  E
				 */

	return 0;
}

static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
	/* H=0 Set X address of RAM */
	write_reg(par, 0x80);	/* 7:1  1
				 * 6-0: X[6:0] - 0x00
				 */

	/* H=0 Set Y address of RAM */
	write_reg(par, 0x40);	/* 7:0  0
				 * 6:1  1
				 * 2-0: Y[2:0] - 0x0
				 */
}

static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
{
	u16 *vmem16 = (u16 *)par->info->screen_buffer;
	int x, y, i;
	int ret = 0;

	for (y = 0; y < HEIGHT / 8; y++) {
		u8 *buf = par->txbuf.buf;
		/* The display is 102x68 but the LCD is 84x48.
		 * Set the write pointer at the start of each row.
		 */
		gpio_set_value(par->gpio.dc, 0);
		write_reg(par, 0x80 | 0);
		write_reg(par, 0x40 | y);

		for (x = 0; x < WIDTH; x++) {
			u8 ch = 0;

			for (i = 0; i < 8 * WIDTH; i += WIDTH) {
				ch >>= 1;
				if (vmem16[(y * 8 * WIDTH) + i + x])
					ch |= 0x80;
			}
			*buf++ = ch;
		}
		/* Write the row */
		gpio_set_value(par->gpio.dc, 1);
		ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH);
		if (ret < 0) {
			dev_err(par->info->device,
				"write failed and returned: %d\n", ret);
			break;
		}
	}

	return ret;
}

static int set_gamma(struct fbtft_par *par, u32 *curves)
{
	/* apply mask */
	curves[0] &= 0x7F;

	write_reg(par, 0x21); /* turn on extended instruction set */
	write_reg(par, 0x80 | curves[0]);
	write_reg(par, 0x20); /* turn off extended instruction set */

	return 0;
}

static struct fbtft_display display = {
	.regwidth = 8,
	.width = WIDTH,
	.height = HEIGHT,
	.txbuflen = TXBUFLEN,
	.gamma_num = 1,
	.gamma_len = 1,
	.gamma = DEFAULT_GAMMA,
	.fbtftops = {
		.init_display = init_display,
		.set_addr_win = set_addr_win,
		.write_vmem = write_vmem,
		.set_gamma = set_gamma,
	},
	.backlight = 1,
};

FBTFT_REGISTER_DRIVER(DRVNAME, "teralane,tls8204", &display);

MODULE_ALIAS("spi:" DRVNAME);
MODULE_ALIAS("spi:tls8204");

MODULE_DESCRIPTION("FB driver for the TLS8204 LCD Controller");
MODULE_AUTHOR("Michael Hope");
MODULE_LICENSE("GPL");
Commit	Line	Data
9518dbc0 TP	1	/*
	2	* FB driver for the TLS8204 LCD Controller
	3	*
	4	* The display is monochrome and the video memory is RGB565.
	5	* Any pixel value except 0 turns the pixel on.
	6	*
	7	* Copyright (C) 2013 Noralf Tronnes
	8	* Copyright (C) 2014 Michael Hope (adapted for the TLS8204)
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
9518dbc0 TP	19	*/
	20
	21	#include <linux/module.h>
	22	#include <linux/kernel.h>
	23	#include <linux/init.h>
	24	#include <linux/gpio.h>
	25	#include <linux/spi/spi.h>
	26	#include <linux/delay.h>
	27
	28	#include "fbtft.h"
	29
	30	#define DRVNAME "fb_tls8204"
	31	#define WIDTH 84
	32	#define HEIGHT 48
	33	#define TXBUFLEN WIDTH
3c588452 AG	34
	35	/* gamma is used to control contrast in this driver */
	36	#define DEFAULT_GAMMA "40"
9518dbc0	37
1c41494a	38	static unsigned int bs = 4;
ced04842	39	module_param(bs, uint, 0000);
9518dbc0 TP	40	MODULE_PARM_DESC(bs, "BS[2:0] Bias voltage level: 0-7 (default: 4)");
	41
	42	static int init_display(struct fbtft_par *par)
	43	{
9518dbc0 TP	44	par->fbtftops.reset(par);
	45
	46	/* Enter extended command mode */
7bba53e9 AJ	47	write_reg(par, 0x21); /* 5:1 1
	48	* 2:0 PD - Powerdown control: chip is active
	49	* 1:0 V - Entry mode: horizontal addressing
	50	* 0:1 H - Extended instruction set control:
	51	* extended
	52	*/
9518dbc0 TP	53
9518dbc0 TP	54	/* H=1 Bias system */
7bba53e9 AJ	55	write_reg(par, 0x10 \| (bs & 0x7));
	56	/* 4:1 1
	57	* 3:0 0
	58	* 2:x BS2 - Bias System
	59	* 1:x BS1
	60	* 0:x BS0
	61	*/
9518dbc0 TP	62
	63	/* Set the address of the first display line. */
	64	write_reg(par, 0x04 \| (64 >> 6));
	65	write_reg(par, 0x40 \| (64 & 0x3F));
	66
	67	/* Enter H=0 standard command mode */
	68	write_reg(par, 0x20);
	69
	70	/* H=0 Display control */
7bba53e9 AJ	71	write_reg(par, 0x08 \| 4);
	72	/* 3:1 1
	73	* 2:1 D - DE: 10=normal mode
	74	* 1:0 0
	75	* 0:0 E
	76	*/
9518dbc0 TP	77
	78	return 0;
	79	}
	80
	81	static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
	82	{
9518dbc0	83	/* H=0 Set X address of RAM */
7bba53e9 AJ	84	write_reg(par, 0x80); /* 7:1 1
	85	* 6-0: X[6:0] - 0x00
	86	*/
9518dbc0 TP	87
9518dbc0 TP	88	/* H=0 Set Y address of RAM */
7bba53e9 AJ	89	write_reg(par, 0x40); /* 7:0 0
	90	* 6:1 1
	91	* 2-0: Y[2:0] - 0x0
	92	*/
9518dbc0 TP	93	}
	94
	95	static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
	96	{
4b6dc179	97	u16 vmem16 = (u16 )par->info->screen_buffer;
9518dbc0 TP	98	int x, y, i;
	99	int ret = 0;
	100
94c0a544	101	for (y = 0; y < HEIGHT / 8; y++) {
9518dbc0	102	u8 *buf = par->txbuf.buf;
7bba53e9 AJ	103	/* The display is 102x68 but the LCD is 84x48.
	104	* Set the write pointer at the start of each row.
	105	*/
9518dbc0 TP	106	gpio_set_value(par->gpio.dc, 0);
	107	write_reg(par, 0x80 \| 0);
	108	write_reg(par, 0x40 \| y);
	109
	110	for (x = 0; x < WIDTH; x++) {
	111	u8 ch = 0;
a94ac159	112
94c0a544	113	for (i = 0; i < 8 * WIDTH; i += WIDTH) {
9518dbc0	114	ch >>= 1;
94c0a544	115	if (vmem16[(y * 8 * WIDTH) + i + x])
9518dbc0 TP	116	ch \|= 0x80;
	117	}
	118	*buf++ = ch;
	119	}
	120	/* Write the row */
	121	gpio_set_value(par->gpio.dc, 1);
	122	ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH);
	123	if (ret < 0) {
	124	dev_err(par->info->device,
aed1c72e	125	"write failed and returned: %d\n", ret);
9518dbc0 TP	126	break;
	127	}
	128	}
	129
	130	return ret;
	131	}
	132
22eb36b8	133	static int set_gamma(struct fbtft_par par, u32 curves)
9518dbc0	134	{
9518dbc0 TP	135	/* apply mask */
	136	curves[0] &= 0x7F;
	137
	138	write_reg(par, 0x21); /* turn on extended instruction set */
	139	write_reg(par, 0x80 \| curves[0]);
	140	write_reg(par, 0x20); /* turn off extended instruction set */
	141
	142	return 0;
	143	}
	144
9518dbc0 TP	145	static struct fbtft_display display = {
	146	.regwidth = 8,
	147	.width = WIDTH,
	148	.height = HEIGHT,
	149	.txbuflen = TXBUFLEN,
	150	.gamma_num = 1,
	151	.gamma_len = 1,
	152	.gamma = DEFAULT_GAMMA,
	153	.fbtftops = {
	154	.init_display = init_display,
	155	.set_addr_win = set_addr_win,
	156	.write_vmem = write_vmem,
	157	.set_gamma = set_gamma,
	158	},
	159	.backlight = 1,
	160	};
1014c2ce	161
9518dbc0 TP	162	FBTFT_REGISTER_DRIVER(DRVNAME, "teralane,tls8204", &display);
	163
	164	MODULE_ALIAS("spi:" DRVNAME);
	165	MODULE_ALIAS("spi:tls8204");
	166
	167	MODULE_DESCRIPTION("FB driver for the TLS8204 LCD Controller");
	168	MODULE_AUTHOR("Michael Hope");
	169	MODULE_LICENSE("GPL");