[mirror_ubuntu-bionic-kernel.git] / drivers / staging / ft1000 / ft1000-usb / ft1000_usb.h

#ifndef _FT1000_USB_H_
#define _FT1000_USB_H_

/*Jim*/
#include "ft1000_ioctl.h"
#define FT1000_DRV_VER      0x01010403

#define  MODESZ              2
#define  MAX_NUM_APP         6
#define  MAX_MSG_LIMIT       200
#define  NUM_OF_FREE_BUFFERS 1500

// Driver message types
#define MEDIA_STATE        0x0010
#define DSP_PROVISION      0x0030
#define DSP_INIT_MSG       0x0050
#define DSP_STORE_INFO       0x0070
#define DSP_GET_INFO         0x0071
#define GET_DRV_ERR_RPT_MSG  0x0073
#define RSP_DRV_ERR_RPT_MSG  0x0074


// Size of DPRAM Command
#define MAX_CMD_SQSIZE          1780
#define SLOWQ_TYPE              0
#define PSEUDOSZ                16
#define DSP_QID_OFFSET          4


// MEMORY MAP FOR ELECTRABUZZ ASIC
#define	FT1000_REG_DFIFO_STAT	0x0008	// Downlink FIFO status register
#define	FT1000_REG_DPRAM_DATA	0x000C	// DPRAM VALUE in DPRAM ADDR

#define FT1000_DSP_LED          0xFFA  // dsp led status for PAD device

#define FT1000_MAG_DSP_LED               0x3FE   // dsp led status for PAD device
#define FT1000_MAG_DSP_LED_INDX          0x1     // dsp led status for PAD device

#define  SUCCESS             0x00


#define DRIVERID                0x00

// Driver Error Messages for DSP
#define DSP_CONDRESET_INFO   0x7ef2
#define DSP_HB_INFO          0x7ef0

// Magnemite specific defines
#define hi_mag                  0x6968  // Byte swap hi to avoid additional system call
#define ho_mag                  0x6f68  // Byte swap ho to avoid additional system call


struct media_msg {
	struct pseudo_hdr pseudo;
	u16 type;
	u16 length;
	u16 state;
	u32 ip_addr;
        u32 net_mask;
	u32 gateway;
	u32 dns_1;
	u32 dns_2;
} __attribute__ ((packed));

struct dsp_init_msg {
	struct pseudo_hdr pseudo;
	u16 type;
	u16 length;
	u8 DspVer[DSPVERSZ];        // DSP version number
	u8 HwSerNum[HWSERNUMSZ];    // Hardware Serial Number
	u8 Sku[SKUSZ];              // SKU
	u8 eui64[EUISZ];            // EUI64
	u8 ProductMode[MODESZ];     // Product Mode (Market/Production)
	u8 RfCalVer[CALVERSZ];      // Rf Calibration version
	u8 RfCalDate[CALDATESZ];    // Rf Calibration date
} __attribute__ ((packed));


struct app_info_block {
	u32 nTxMsg;                    // DPRAM msg sent to DSP with app_id
	u32 nRxMsg;                    // DPRAM msg rcv from dsp with app_id
	u32 nTxMsgReject;              // DPRAM msg rejected due to DSP doorbell set
	u32 nRxMsgMiss;                // DPRAM msg dropped due to overflow
	struct fown_struct *fileobject;// Application's file object
	u16 app_id;                    // Application id
	int DspBCMsgFlag;
	int NumOfMsg;                   // number of messages queued up
	wait_queue_head_t wait_dpram_msg;
	struct list_head app_sqlist;   // link list of msgs for applicaton on slow queue
} __attribute__((packed));

struct prov_record {
	struct list_head list;
	u8 *pprov_data;
};

/*end of Jim*/
#define DEBUG(args...) printk(KERN_INFO args)

#define FALSE           0
#define TRUE            1

#define STATUS_SUCCESS  0
#define STATUS_FAILURE   0x1001

#define FT1000_STATUS_CLOSING  0x01

#define LARGE_TIMEOUT   5000

#define MAX_DSP_SESS_REC        1024

#define MAX_NUM_CARDS        32

#define DSPVERSZ                4
#define HWSERNUMSZ              16
#define SKUSZ                   20
#define EUISZ                   8
#define CALVERSZ                2
#define CALDATESZ               6
#define MODESZ                  2

#define DSPID                   0x20
#define HOSTID                  0x10

#define DSPOAM                  0x80
#define DSPAIRID                0x90

#define DRIVERID                0x00
#define FMM                     0x10
#define NETWORKID               0x20
#define AUTOLNCHID              0x30
#define DSPLPBKID               0x40

#define DSPBCMSGID              0x10

#define ENET_MAX_SIZE           1514
#define ENET_HEADER_SIZE        14


#define CIS_NET_ADDR_OFFSET 0xff0

// MAGNEMITE specific

#define FT1000_REG_MAG_UFDR 		0x0000	// Uplink FIFO Data Register.

#define FT1000_REG_MAG_UFDRL		0x0000	// Uplink FIFO Data Register low-word.

#define FT1000_REG_MAG_UFDRH		0x0002  // Uplink FIFO Data Register high-word.

#define FT1000_REG_MAG_UFER			0x0004  // Uplink FIFO End Register

#define FT1000_REG_MAG_UFSR			0x0006  // Uplink FIFO Status Register

#define FT1000_REG_MAG_DFR			0x0008	// Downlink FIFO Register

#define FT1000_REG_MAG_DFRL			0x0008	// Downlink FIFO Register low-word

#define FT1000_REG_MAG_DFRH			0x000a  // Downlink FIFO Register high-word

#define FT1000_REG_MAG_DFSR			0x000c  // Downlink FIFO Status Register

#define FT1000_REG_MAG_DPDATA		0x0010  // Dual Port RAM Indirect Data Register

#define FT1000_REG_MAG_DPDATAL		0x0010  // Dual Port RAM Indirect Data Register low-word

#define FT1000_REG_MAG_DPDATAH		0x0012  // Dual Port RAM Indirect Data Register high-word

#define	FT1000_REG_MAG_WATERMARK	0x002c	// Supv. Control Reg.			LLC register

#define FT1000_REG_MAG_VERSION		0x0030	// LLC Version					LLC register


// Common

#define	FT1000_REG_DPRAM_ADDR	0x000E	// DPRAM ADDRESS when card in IO mode

#define	FT1000_REG_SUP_CTRL		0x0020	// Supv. Control Reg.			LLC register

#define	FT1000_REG_SUP_STAT		0x0022	// Supv. Status Reg				LLC register

#define	FT1000_REG_RESET		0x0024	// Reset Reg					LLC register

#define	FT1000_REG_SUP_ISR		0x0026	// Supv ISR						LLC register

#define	FT1000_REG_SUP_IMASK	0x0028	// Supervisor Interrupt Mask	LLC register

#define	FT1000_REG_DOORBELL		0x002a	// Door Bell Reg				LLC register

#define FT1000_REG_ASIC_ID      0x002e  // ASIC Identification Number

										// (Electrabuzz=0 Magnemite=TBD)


// DSP doorbells

#define FT1000_DB_DPRAM_RX		0x0001	// this value indicates that DSP has

                                        //      data for host in DPRAM SlowQ

#define FT1000_DB_DNLD_RX       0x0002  // Downloader handshake doorbell

#define FT1000_ASIC_RESET_REQ   0x0004

#define FT1000_DSP_ASIC_RESET   0x0008


#define FT1000_DB_COND_RESET    0x0010


// Host doorbells

#define FT1000_DB_DPRAM_TX		0x0100	// this value indicates that host has

                                        //      data for DSP in DPRAM.

#define FT1000_DB_DNLD_TX       0x0200  // Downloader handshake doorbell

#define FT1000_ASIC_RESET_DSP   0x0400

#define FT1000_DB_HB            0x1000  // this value indicates that supervisor


// Electrabuzz specific DPRAM mapping                                        //      has a heartbeat message for DSP.

#define FT1000_DPRAM_BASE		0x1000	//  0x0000 to 0x07FF	DPRAM	2Kx16 - R/W from PCMCIA or DSP

#define FT1000_DPRAM_TX_BASE	0x1002	//  TX AREA (SlowQ)

#define FT1000_DPRAM_RX_BASE	0x1800	//  RX AREA (SlowQ)

#define FT1000_DPRAM_SIZE       0x1000  //  4K bytes


#define FT1000_DRV_DEBUG        0x17E0  // Debug area for driver

#define FT1000_FIFO_LEN         0x17FC  // total length for DSP FIFO tracking

#define FT1000_HI_HO            0x17FE  // heartbeat with HI/HO

#define FT1000_DSP_STATUS       0x1FFE  // dsp status - non-zero is a request to reset dsp


#define FT1000_DSP_CON_STATE    0x1FF8  // DSP Connection Status Info

#define FT1000_DSP_LEDS         0x1FFA  // DSP LEDS for rcv pwr strength, Rx data, Tx data

#define DSP_TIMESTAMP           0x1FFC  // dsp timestamp

#define DSP_TIMESTAMP_DIFF      0x1FFA  // difference of dsp timestamp in DPRAM and Pseudo header.


#define FT1000_DPRAM_FEFE    	0x1002	// Dsp Downloader handshake location


#define FT1000_DSP_TIMER0       0x1FF0

#define FT1000_DSP_TIMER1       0x1FF2

#define FT1000_DSP_TIMER2       0x1FF4

#define FT1000_DSP_TIMER3       0x1FF6


// MEMORY MAP FOR MAGNEMITE

#define FT1000_DPRAM_MAG_TX_BASE	 	 0x0000	 //  TX AREA (SlowQ)

#define FT1000_DPRAM_MAG_RX_BASE		 0x0200	 //  RX AREA (SlowQ)


#define FT1000_MAG_FIFO_LEN              0x1FF   // total length for DSP FIFO tracking

#define FT1000_MAG_FIFO_LEN_INDX         0x1     // low-word index

#define FT1000_MAG_HI_HO                 0x1FF   // heartbeat with HI/HO

#define FT1000_MAG_HI_HO_INDX            0x0     // high-word index

#define FT1000_MAG_DSP_LEDS              0x3FE   // dsp led status for PAD device

#define FT1000_MAG_DSP_LEDS_INDX         0x1     // dsp led status for PAD device


#define FT1000_MAG_DSP_CON_STATE         0x3FE   // DSP Connection Status Info

#define FT1000_MAG_DSP_CON_STATE_INDX    0x0     // DSP Connection Status Info


#define FT1000_MAG_DPRAM_FEFE            0x000   // location for dsp ready indicator

#define FT1000_MAG_DPRAM_FEFE_INDX       0x0     // location for dsp ready indicator


#define FT1000_MAG_DSP_TIMER0            0x3FC

#define FT1000_MAG_DSP_TIMER0_INDX       0x1


#define FT1000_MAG_DSP_TIMER1            0x3FC

#define FT1000_MAG_DSP_TIMER1_INDX       0x0


#define FT1000_MAG_DSP_TIMER2            0x3FD

#define FT1000_MAG_DSP_TIMER2_INDX       0x1


#define FT1000_MAG_DSP_TIMER3            0x3FD

#define FT1000_MAG_DSP_TIMER3_INDX       0x0


#define FT1000_MAG_TOTAL_LEN             0x200

#define FT1000_MAG_TOTAL_LEN_INDX        0x1


#define FT1000_MAG_PH_LEN                0x200

#define FT1000_MAG_PH_LEN_INDX           0x0


#define FT1000_MAG_PORT_ID               0x201

#define FT1000_MAG_PORT_ID_INDX          0x0


//

// Constants for the FT1000_REG_SUP_ISR

//

// Indicate the cause of an interrupt.

//

// SUPERVISOR ISR BIT MAPS


#define ISR_EMPTY			(u8)0x00 	 // no bits set in ISR

#define ISR_DOORBELL_ACK	(u8)0x01		 //  the doorbell i sent has been received.

#define ISR_DOORBELL_PEND	(u8)0x02 	 //  doorbell for me

#define ISR_RCV				(u8)0x04 	 // packet received with no errors

#define ISR_WATERMARK		(u8)0x08 	 //


// Interrupt mask register defines

// note these are different from the ISR BIT MAPS.

#define ISR_MASK_NONE			0x0000

#define ISR_MASK_DOORBELL_ACK	0x0001

#define ISR_MASK_DOORBELL_PEND	0x0002

#define ISR_MASK_RCV			0x0004

#define ISR_MASK_WATERMARK		0x0008 	  // Normally we will only mask the watermark interrupt when we want to enable interrupts.

#define ISR_MASK_ALL			0xffff


#define HOST_INTF_LE            0x0000    // Host interface little endian

#define HOST_INTF_BE            0x0001    // Host interface big endian


#define ISR_DEFAULT_MASK		0x7ff9


#define hi                      0x6869

#define ho                      0x686f


#define FT1000_ASIC_RESET       0x80     // COR value for soft reset to PCMCIA core

#define FT1000_ASIC_BITS        0x51     // Bits set in COR register under normal operation

#define FT1000_ASIC_MAG_BITS    0x55     // Bits set in COR register under normal operation


#define FT1000_COR_OFFSET       0x100


#define ELECTRABUZZ_ID			0        // ASIC ID for ELECTRABUZZ

#define MAGNEMITE_ID			0x1a01   // ASIC ID for MAGNEMITE


// Maximum times trying to get ASIC out of reset

#define MAX_ASIC_RESET_CNT      20


#define DSP_RESET_BIT           0x1

#define ASIC_RESET_BIT          0x2

#define DSP_UNENCRYPTED         0x4

#define DSP_ENCRYPTED           0x8

#define EFUSE_MEM_DISABLE       0x0040


#define MAX_BUF_SIZE            4096

struct drv_msg {
	struct pseudo_hdr pseudo;
	u16 type;
	u16 length;
	u8  data[0];
} __attribute__ ((packed));

struct ft1000_device
{
	struct usb_device *dev;
	struct net_device *net;

	u32 status;

	struct urb *rx_urb;
	struct urb *tx_urb;

	u8 tx_buf[MAX_BUF_SIZE];
	u8 rx_buf[MAX_BUF_SIZE];

	u8 bulk_in_endpointAddr;
	u8 bulk_out_endpointAddr;

	//struct ft1000_ethernet_configuration configuration;

//	struct net_device_stats stats; //mbelian
} __attribute__ ((packed));

struct ft1000_debug_dirs {
	struct list_head list;
	struct dentry *dent;
	struct dentry *file;
	int int_number;
};

struct ft1000_info {
    struct ft1000_device *pFt1000Dev;
    struct net_device_stats stats;

    struct task_struct *pPollThread;

    unsigned char fcodeldr;
    unsigned char bootmode;
	unsigned char usbboot;
    unsigned short dspalive;
    u16 ASIC_ID;
    bool fProvComplete;
    bool fCondResetPend;
    bool fAppMsgPend;
    char *pfwimg;
    int fwimgsz;
    u16 DrvErrNum;
    u8  *pTestImage;
    u16 AsicID;
    unsigned long TestImageIndx;
    unsigned long TestImageSz;
    u8  TestImageEnable;
    u8  TestImageReady;
    int ASICResetNum;
    int DspAsicReset;
    int PktIntfErr;
    int DSPResetNum;
    int NumIOCTLBufs;
    int IOCTLBufLvl;
    int DeviceCreated;
    int CardReady;
    int NetDevRegDone;
    u8 CardNumber;
    u8 DeviceName[15];
    struct ft1000_debug_dirs nodes;
    int registered;
    int mediastate;
    int dhcpflg;
    u16 packetseqnum;
    u8 squeseqnum;                 // sequence number on slow queue
    spinlock_t dpram_lock;
    spinlock_t fifo_lock;
    u16 CurrentInterruptEnableMask;
    int InterruptsEnabled;
    u16 fifo_cnt;
    u8 DspVer[DSPVERSZ];        // DSP version number
    u8 HwSerNum[HWSERNUMSZ];    // Hardware Serial Number
    u8 Sku[SKUSZ];              // SKU
    u8 eui64[EUISZ];            // EUI64
    time_t ConTm;               // Connection Time
    u8 ProductMode[MODESZ];
    u8 RfCalVer[CALVERSZ];
    u8 RfCalDate[CALDATESZ];
    u16 DSP_TIME[4];
    u16 ProgSnr;
    u16 LedStat;	//mbelian
    u16 ConStat;	//mbelian
    u16 ProgConStat;
    struct list_head prov_list;
    int appcnt;
	struct app_info_block app_info[MAX_NUM_APP];
    u16 DSPInfoBlklen;
    u16 DrvMsgPend;
    int (*ft1000_reset)(struct net_device *dev);
    u16 DSPInfoBlk[MAX_DSP_SESS_REC];
    union {
        u16 Rec[MAX_DSP_SESS_REC];
        u32 MagRec[MAX_DSP_SESS_REC/2];
    } DSPSess;
	unsigned short tempbuf[32];
	char netdevname[IFNAMSIZ];
	struct proc_dir_entry *ft1000_proc_dir; //mbelian
};


struct dpram_blk {
    struct list_head list;
    u16 *pbuffer;
} __attribute__ ((packed));

int ft1000_read_register(struct ft1000_device *ft1000dev, u16* Data, u16 nRegIndx);
int ft1000_write_register(struct ft1000_device *ft1000dev, u16 value, u16 nRegIndx);
int ft1000_read_dpram32(struct ft1000_device *ft1000dev, u16 indx, u8 *buffer, u16 cnt);
int ft1000_write_dpram32(struct ft1000_device *ft1000dev, u16 indx, u8 *buffer, u16 cnt);
int ft1000_read_dpram16(struct ft1000_device *ft1000dev, u16 indx, u8 *buffer, u8 highlow);
int ft1000_write_dpram16(struct ft1000_device *ft1000dev, u16 indx, u16 value, u8 highlow);
int fix_ft1000_read_dpram32(struct ft1000_device *ft1000dev, u16 indx, u8 *buffer);
int fix_ft1000_write_dpram32(struct ft1000_device *ft1000dev, u16 indx, u8 *buffer);

extern void *pFileStart;
extern size_t FileLength;
extern int numofmsgbuf;

int ft1000_close (struct net_device *dev);
u16 scram_dnldr(struct ft1000_device *ft1000dev, void *pFileStart, u32  FileLength);

extern struct list_head freercvpool;
extern spinlock_t free_buff_lock;   // lock to arbitrate free buffer list for receive command data

int ft1000_create_dev(struct ft1000_device *dev);
void ft1000_destroy_dev(struct net_device *dev);
extern void card_send_command(struct ft1000_device *ft1000dev, void *ptempbuffer, int size);

struct dpram_blk *ft1000_get_buffer(struct list_head *bufflist);
void ft1000_free_buffer(struct dpram_blk *pdpram_blk, struct list_head *plist);

char *getfw (char *fn, size_t *pimgsz);

int dsp_reload(struct ft1000_device *ft1000dev);
int init_ft1000_netdev(struct ft1000_device *ft1000dev);
struct usb_interface;
int reg_ft1000_netdev(struct ft1000_device *ft1000dev, struct usb_interface *intf);
int ft1000_poll(void* dev_id);

int ft1000_init_proc(struct net_device *dev);
void ft1000_cleanup_proc(struct ft1000_info *info);


#endif
Commit	Line	Data
f7c1be0c MB	1	#ifndef _FT1000_USB_H_
	2	#define _FT1000_USB_H_
	3
	4	/Jim/
	5	#include "ft1000_ioctl.h"
	6	#define FT1000_DRV_VER 0x01010403
	7
	8	#define MODESZ 2
	9	#define MAX_NUM_APP 6
	10	#define MAX_MSG_LIMIT 200
	11	#define NUM_OF_FREE_BUFFERS 1500
	12
	13	// Driver message types
	14	#define MEDIA_STATE 0x0010
	15	#define DSP_PROVISION 0x0030
	16	#define DSP_INIT_MSG 0x0050
	17	#define DSP_STORE_INFO 0x0070
	18	#define DSP_GET_INFO 0x0071
	19	#define GET_DRV_ERR_RPT_MSG 0x0073
	20	#define RSP_DRV_ERR_RPT_MSG 0x0074
	21
	22
	23	// Size of DPRAM Command
	24	#define MAX_CMD_SQSIZE 1780
	25	#define SLOWQ_TYPE 0
	26	#define PSEUDOSZ 16
bf3146c8	27	#define DSP_QID_OFFSET 4
f7c1be0c MB	28
	29
	30	// MEMORY MAP FOR ELECTRABUZZ ASIC
	31	#define FT1000_REG_DFIFO_STAT 0x0008 // Downlink FIFO status register
	32	#define FT1000_REG_DPRAM_DATA 0x000C // DPRAM VALUE in DPRAM ADDR
	33
	34	#define FT1000_DSP_LED 0xFFA // dsp led status for PAD device
	35
	36	#define FT1000_MAG_DSP_LED 0x3FE // dsp led status for PAD device
	37	#define FT1000_MAG_DSP_LED_INDX 0x1 // dsp led status for PAD device
	38
	39	#define SUCCESS 0x00
	40
	41
	42	#define DRIVERID 0x00
	43
	44	// Driver Error Messages for DSP
	45	#define DSP_CONDRESET_INFO 0x7ef2
	46	#define DSP_HB_INFO 0x7ef0
	47
	48	// Magnemite specific defines
	49	#define hi_mag 0x6968 // Byte swap hi to avoid additional system call
	50	#define ho_mag 0x6f68 // Byte swap ho to avoid additional system call
	51
	52
	53
1b8a3012	54	struct media_msg {
b13e39b2	55	struct pseudo_hdr pseudo;
f7c1be0c MB	56	u16 type;
	57	u16 length;
	58	u16 state;
	59	u32 ip_addr;
	60	u32 net_mask;
bf3146c8	61	u32 gateway;
f7c1be0c MB	62	u32 dns_1;
f7c1be0c MB	63	u32 dns_2;
1b8a3012	64	} __attribute__ ((packed));
f7c1be0c	65
369e857e	66	struct dsp_init_msg {
b13e39b2	67	struct pseudo_hdr pseudo;
369e857e MB	68	u16 type;
	69	u16 length;
	70	u8 DspVer[DSPVERSZ]; // DSP version number
	71	u8 HwSerNum[HWSERNUMSZ]; // Hardware Serial Number
	72	u8 Sku[SKUSZ]; // SKU
	73	u8 eui64[EUISZ]; // EUI64
	74	u8 ProductMode[MODESZ]; // Product Mode (Market/Production)
	75	u8 RfCalVer[CALVERSZ]; // Rf Calibration version
	76	u8 RfCalDate[CALDATESZ]; // Rf Calibration date
	77	} __attribute__ ((packed));
f7c1be0c MB	78
f7c1be0c MB	79
151adba7 MB	80	struct app_info_block {
	81	u32 nTxMsg; // DPRAM msg sent to DSP with app_id
	82	u32 nRxMsg; // DPRAM msg rcv from dsp with app_id
	83	u32 nTxMsgReject; // DPRAM msg rejected due to DSP doorbell set
	84	u32 nRxMsgMiss; // DPRAM msg dropped due to overflow
	85	struct fown_struct *fileobject;// Application's file object
	86	u16 app_id; // Application id
	87	int DspBCMsgFlag;
	88	int NumOfMsg; // number of messages queued up
	89	wait_queue_head_t wait_dpram_msg;
	90	struct list_head app_sqlist; // link list of msgs for applicaton on slow queue
	91	} __attribute__((packed));
f7c1be0c	92
e27d96dd MB	93	struct prov_record {
	94	struct list_head list;
	95	u8 *pprov_data;
	96	};
f7c1be0c MB	97
f7c1be0c MB	98	/end of Jim/
f7c1be0c MB	99	#define DEBUG(args...) printk(KERN_INFO args)
f7c1be0c MB	100
f7c1be0c MB	101	#define FALSE 0
	102	#define TRUE 1
	103
	104	#define STATUS_SUCCESS 0
	105	#define STATUS_FAILURE 0x1001
	106
	107	#define FT1000_STATUS_CLOSING 0x01
	108
	109	#define LARGE_TIMEOUT 5000
	110
	111	#define MAX_DSP_SESS_REC 1024
	112
	113	#define MAX_NUM_CARDS 32
	114
	115	#define DSPVERSZ 4
	116	#define HWSERNUMSZ 16
	117	#define SKUSZ 20
	118	#define EUISZ 8
	119	#define CALVERSZ 2
	120	#define CALDATESZ 6
	121	#define MODESZ 2
	122
	123	#define DSPID 0x20
	124	#define HOSTID 0x10
	125
	126	#define DSPOAM 0x80
	127	#define DSPAIRID 0x90
	128
	129	#define DRIVERID 0x00
	130	#define FMM 0x10
	131	#define NETWORKID 0x20
	132	#define AUTOLNCHID 0x30
	133	#define DSPLPBKID 0x40
	134
	135	#define DSPBCMSGID 0x10
	136
	137	#define ENET_MAX_SIZE 1514
	138	#define ENET_HEADER_SIZE 14
	139
	140
	141	#define CIS_NET_ADDR_OFFSET 0xff0
	142
f7c1be0c MB	143	// MAGNEMITE specific
	144
	145	#define FT1000_REG_MAG_UFDR 0x0000 // Uplink FIFO Data Register.
	146
	147	#define FT1000_REG_MAG_UFDRL 0x0000 // Uplink FIFO Data Register low-word.
	148
	149	#define FT1000_REG_MAG_UFDRH 0x0002 // Uplink FIFO Data Register high-word.
	150
	151	#define FT1000_REG_MAG_UFER 0x0004 // Uplink FIFO End Register
	152
	153	#define FT1000_REG_MAG_UFSR 0x0006 // Uplink FIFO Status Register
	154
	155	#define FT1000_REG_MAG_DFR 0x0008 // Downlink FIFO Register
	156
	157	#define FT1000_REG_MAG_DFRL 0x0008 // Downlink FIFO Register low-word
	158
	159	#define FT1000_REG_MAG_DFRH 0x000a // Downlink FIFO Register high-word
	160
	161	#define FT1000_REG_MAG_DFSR 0x000c // Downlink FIFO Status Register
	162
	163	#define FT1000_REG_MAG_DPDATA 0x0010 // Dual Port RAM Indirect Data Register
	164
	165	#define FT1000_REG_MAG_DPDATAL 0x0010 // Dual Port RAM Indirect Data Register low-word
	166
	167	#define FT1000_REG_MAG_DPDATAH 0x0012 // Dual Port RAM Indirect Data Register high-word
	168
	169	#define FT1000_REG_MAG_WATERMARK 0x002c // Supv. Control Reg. LLC register
	170
	171	#define FT1000_REG_MAG_VERSION 0x0030 // LLC Version LLC register
	172
	173
	174
	175	// Common
	176
	177	#define FT1000_REG_DPRAM_ADDR 0x000E // DPRAM ADDRESS when card in IO mode
	178
	179	#define FT1000_REG_SUP_CTRL 0x0020 // Supv. Control Reg. LLC register
	180
	181	#define FT1000_REG_SUP_STAT 0x0022 // Supv. Status Reg LLC register
	182
	183	#define FT1000_REG_RESET 0x0024 // Reset Reg LLC register
	184
	185	#define FT1000_REG_SUP_ISR 0x0026 // Supv ISR LLC register
	186
	187	#define FT1000_REG_SUP_IMASK 0x0028 // Supervisor Interrupt Mask LLC register
	188
	189	#define FT1000_REG_DOORBELL 0x002a // Door Bell Reg LLC register
	190
	191	#define FT1000_REG_ASIC_ID 0x002e // ASIC Identification Number
	192
	193	// (Electrabuzz=0 Magnemite=TBD)
	194
	195
	196
	197	// DSP doorbells
	198
bf3146c8	199	#define FT1000_DB_DPRAM_RX 0x0001 // this value indicates that DSP has
f7c1be0c MB	200
	201	// data for host in DPRAM SlowQ
	202
	203	#define FT1000_DB_DNLD_RX 0x0002 // Downloader handshake doorbell
	204
	205	#define FT1000_ASIC_RESET_REQ 0x0004
	206
	207	#define FT1000_DSP_ASIC_RESET 0x0008
	208
	209
	210
	211	#define FT1000_DB_COND_RESET 0x0010
	212
	213
	214
	215	// Host doorbells
	216
bf3146c8	217	#define FT1000_DB_DPRAM_TX 0x0100 // this value indicates that host has
f7c1be0c	218
bf3146c8	219	// data for DSP in DPRAM.
f7c1be0c MB	220
	221	#define FT1000_DB_DNLD_TX 0x0200 // Downloader handshake doorbell
	222
	223	#define FT1000_ASIC_RESET_DSP 0x0400
	224
bf3146c8	225	#define FT1000_DB_HB 0x1000 // this value indicates that supervisor
f7c1be0c MB	226
	227
	228
	229	// Electrabuzz specific DPRAM mapping // has a heartbeat message for DSP.
	230
	231	#define FT1000_DPRAM_BASE 0x1000 // 0x0000 to 0x07FF DPRAM 2Kx16 - R/W from PCMCIA or DSP
	232
	233	#define FT1000_DPRAM_TX_BASE 0x1002 // TX AREA (SlowQ)
	234
	235	#define FT1000_DPRAM_RX_BASE 0x1800 // RX AREA (SlowQ)
	236
	237	#define FT1000_DPRAM_SIZE 0x1000 // 4K bytes
	238
	239
	240
	241	#define FT1000_DRV_DEBUG 0x17E0 // Debug area for driver
	242
	243	#define FT1000_FIFO_LEN 0x17FC // total length for DSP FIFO tracking
	244
	245	#define FT1000_HI_HO 0x17FE // heartbeat with HI/HO
	246
	247	#define FT1000_DSP_STATUS 0x1FFE // dsp status - non-zero is a request to reset dsp
	248
	249
	250
	251	#define FT1000_DSP_CON_STATE 0x1FF8 // DSP Connection Status Info
	252
	253	#define FT1000_DSP_LEDS 0x1FFA // DSP LEDS for rcv pwr strength, Rx data, Tx data
	254
	255	#define DSP_TIMESTAMP 0x1FFC // dsp timestamp
	256
bf3146c8	257	#define DSP_TIMESTAMP_DIFF 0x1FFA // difference of dsp timestamp in DPRAM and Pseudo header.
f7c1be0c MB	258
	259
	260
	261	#define FT1000_DPRAM_FEFE 0x1002 // Dsp Downloader handshake location
	262
	263
	264
	265	#define FT1000_DSP_TIMER0 0x1FF0
	266
	267	#define FT1000_DSP_TIMER1 0x1FF2
	268
	269	#define FT1000_DSP_TIMER2 0x1FF4
	270
	271	#define FT1000_DSP_TIMER3 0x1FF6
	272
	273
	274
	275	// MEMORY MAP FOR MAGNEMITE
	276
	277	#define FT1000_DPRAM_MAG_TX_BASE 0x0000 // TX AREA (SlowQ)
	278
	279	#define FT1000_DPRAM_MAG_RX_BASE 0x0200 // RX AREA (SlowQ)
	280
	281
	282
	283	#define FT1000_MAG_FIFO_LEN 0x1FF // total length for DSP FIFO tracking
	284
bf3146c8	285	#define FT1000_MAG_FIFO_LEN_INDX 0x1 // low-word index
f7c1be0c MB	286
	287	#define FT1000_MAG_HI_HO 0x1FF // heartbeat with HI/HO
	288
	289	#define FT1000_MAG_HI_HO_INDX 0x0 // high-word index
	290
	291	#define FT1000_MAG_DSP_LEDS 0x3FE // dsp led status for PAD device
	292
	293	#define FT1000_MAG_DSP_LEDS_INDX 0x1 // dsp led status for PAD device
	294
	295
	296
	297	#define FT1000_MAG_DSP_CON_STATE 0x3FE // DSP Connection Status Info
	298
	299	#define FT1000_MAG_DSP_CON_STATE_INDX 0x0 // DSP Connection Status Info
	300
	301
	302
	303	#define FT1000_MAG_DPRAM_FEFE 0x000 // location for dsp ready indicator
	304
	305	#define FT1000_MAG_DPRAM_FEFE_INDX 0x0 // location for dsp ready indicator
	306
	307
	308
	309	#define FT1000_MAG_DSP_TIMER0 0x3FC
	310
	311	#define FT1000_MAG_DSP_TIMER0_INDX 0x1
	312
	313
	314
	315	#define FT1000_MAG_DSP_TIMER1 0x3FC
	316
	317	#define FT1000_MAG_DSP_TIMER1_INDX 0x0
	318
	319
	320
	321	#define FT1000_MAG_DSP_TIMER2 0x3FD
	322
	323	#define FT1000_MAG_DSP_TIMER2_INDX 0x1
	324
	325
	326
	327	#define FT1000_MAG_DSP_TIMER3 0x3FD
	328
	329	#define FT1000_MAG_DSP_TIMER3_INDX 0x0
	330
	331
	332
	333	#define FT1000_MAG_TOTAL_LEN 0x200
	334
bf3146c8	335	#define FT1000_MAG_TOTAL_LEN_INDX 0x1
f7c1be0c MB	336
	337
	338
	339	#define FT1000_MAG_PH_LEN 0x200
	340
	341	#define FT1000_MAG_PH_LEN_INDX 0x0
	342
	343
	344
	345	#define FT1000_MAG_PORT_ID 0x201
	346
	347	#define FT1000_MAG_PORT_ID_INDX 0x0
	348
	349
	350
	351	//
	352
	353	// Constants for the FT1000_REG_SUP_ISR
	354
	355	//
	356
	357	// Indicate the cause of an interrupt.
	358
	359	//
	360
	361	// SUPERVISOR ISR BIT MAPS
	362
	363
	364
c8f775c8	365	#define ISR_EMPTY (u8)0x00 // no bits set in ISR
f7c1be0c	366
25985edc	367	#define ISR_DOORBELL_ACK (u8)0x01 // the doorbell i sent has been received.
f7c1be0c	368
c8f775c8	369	#define ISR_DOORBELL_PEND (u8)0x02 // doorbell for me
f7c1be0c	370
c8f775c8	371	#define ISR_RCV (u8)0x04 // packet received with no errors
f7c1be0c	372
c8f775c8	373	#define ISR_WATERMARK (u8)0x08 //
f7c1be0c MB	374
	375
	376
	377	// Interrupt mask register defines
	378
	379	// note these are different from the ISR BIT MAPS.
	380
bf3146c8	381	#define ISR_MASK_NONE 0x0000
f7c1be0c	382
bf3146c8	383	#define ISR_MASK_DOORBELL_ACK 0x0001
f7c1be0c	384
bf3146c8	385	#define ISR_MASK_DOORBELL_PEND 0x0002
f7c1be0c	386
bf3146c8	387	#define ISR_MASK_RCV 0x0004
f7c1be0c	388
bf3146c8	389	#define ISR_MASK_WATERMARK 0x0008 // Normally we will only mask the watermark interrupt when we want to enable interrupts.
f7c1be0c MB	390
	391	#define ISR_MASK_ALL 0xffff
	392
	393
	394
	395	#define HOST_INTF_LE 0x0000 // Host interface little endian
	396
	397	#define HOST_INTF_BE 0x0001 // Host interface big endian
	398
	399
	400
bf3146c8	401	#define ISR_DEFAULT_MASK 0x7ff9
f7c1be0c MB	402
	403
	404
	405	#define hi 0x6869
	406
	407	#define ho 0x686f
	408
	409
	410
	411	#define FT1000_ASIC_RESET 0x80 // COR value for soft reset to PCMCIA core
	412
	413	#define FT1000_ASIC_BITS 0x51 // Bits set in COR register under normal operation
	414
	415	#define FT1000_ASIC_MAG_BITS 0x55 // Bits set in COR register under normal operation
	416
	417
	418
	419	#define FT1000_COR_OFFSET 0x100
	420
	421
	422
	423	#define ELECTRABUZZ_ID 0 // ASIC ID for ELECTRABUZZ
	424
	425	#define MAGNEMITE_ID 0x1a01 // ASIC ID for MAGNEMITE
	426
	427
	428
	429	// Maximum times trying to get ASIC out of reset
	430
	431	#define MAX_ASIC_RESET_CNT 20
	432
	433
	434
	435	#define DSP_RESET_BIT 0x1
	436
	437	#define ASIC_RESET_BIT 0x2
	438
	439	#define DSP_UNENCRYPTED 0x4
	440
	441	#define DSP_ENCRYPTED 0x8
	442
	443	#define EFUSE_MEM_DISABLE 0x0040
	444
	445
	446	#define MAX_BUF_SIZE 4096
	447
e09aee2a	448	struct drv_msg {
b13e39b2	449	struct pseudo_hdr pseudo;
e09aee2a MB	450	u16 type;
	451	u16 length;
	452	u8 data[0];
	453	} __attribute__ ((packed));
f7c1be0c MB	454
	455	struct ft1000_device
	456	{
	457	struct usb_device *dev;
	458	struct net_device *net;
f7c1be0c MB	459
	460	u32 status;
	461
f7c1be0c MB	462	struct urb *rx_urb;
	463	struct urb *tx_urb;
	464
	465	u8 tx_buf[MAX_BUF_SIZE];
	466	u8 rx_buf[MAX_BUF_SIZE];
bf3146c8	467
f7c1be0c MB	468	u8 bulk_in_endpointAddr;
	469	u8 bulk_out_endpointAddr;
	470
	471	//struct ft1000_ethernet_configuration configuration;
	472
	473	// struct net_device_stats stats; //mbelian
	474	} __attribute__ ((packed));
	475
9119dee1 MB	476	struct ft1000_debug_dirs {
	477	struct list_head list;
	478	struct dentry *dent;
	479	struct dentry *file;
	480	int int_number;
	481	};
	482
1a88a068	483	struct ft1000_info {
f7c1be0c MB	484	struct ft1000_device *pFt1000Dev;
f7c1be0c MB	485	struct net_device_stats stats;
bf3146c8	486
f7c1be0c	487	struct task_struct *pPollThread;
bf3146c8 GKH	488
bf3146c8 GKH	489	unsigned char fcodeldr;
f7c1be0c MB	490	unsigned char bootmode;
	491	unsigned char usbboot;
	492	unsigned short dspalive;
	493	u16 ASIC_ID;
81584137 MB	494	bool fProvComplete;
	495	bool fCondResetPend;
	496	bool fAppMsgPend;
bf3146c8	497	char *pfwimg;
f7c1be0c MB	498	int fwimgsz;
	499	u16 DrvErrNum;
	500	u8 *pTestImage;
	501	u16 AsicID;
	502	unsigned long TestImageIndx;
	503	unsigned long TestImageSz;
	504	u8 TestImageEnable;
	505	u8 TestImageReady;
	506	int ASICResetNum;
	507	int DspAsicReset;
	508	int PktIntfErr;
	509	int DSPResetNum;
	510	int NumIOCTLBufs;
	511	int IOCTLBufLvl;
	512	int DeviceCreated;
	513	int CardReady;
f7c1be0c MB	514	int NetDevRegDone;
	515	u8 CardNumber;
	516	u8 DeviceName[15];
9119dee1	517	struct ft1000_debug_dirs nodes;
f7c1be0c MB	518	int registered;
	519	int mediastate;
	520	int dhcpflg;
	521	u16 packetseqnum;
	522	u8 squeseqnum; // sequence number on slow queue
	523	spinlock_t dpram_lock;
	524	spinlock_t fifo_lock;
	525	u16 CurrentInterruptEnableMask;
	526	int InterruptsEnabled;
	527	u16 fifo_cnt;
	528	u8 DspVer[DSPVERSZ]; // DSP version number
	529	u8 HwSerNum[HWSERNUMSZ]; // Hardware Serial Number
	530	u8 Sku[SKUSZ]; // SKU
	531	u8 eui64[EUISZ]; // EUI64
	532	time_t ConTm; // Connection Time
	533	u8 ProductMode[MODESZ];
	534	u8 RfCalVer[CALVERSZ];
	535	u8 RfCalDate[CALDATESZ];
	536	u16 DSP_TIME[4];
	537	u16 ProgSnr;
	538	u16 LedStat; //mbelian
	539	u16 ConStat; //mbelian
	540	u16 ProgConStat;
	541	struct list_head prov_list;
	542	int appcnt;
151adba7	543	struct app_info_block app_info[MAX_NUM_APP];
f7c1be0c MB	544	u16 DSPInfoBlklen;
	545	u16 DrvMsgPend;
	546	int (ft1000_reset)(struct net_device dev);
	547	u16 DSPInfoBlk[MAX_DSP_SESS_REC];
	548	union {
	549	u16 Rec[MAX_DSP_SESS_REC];
	550	u32 MagRec[MAX_DSP_SESS_REC/2];
	551	} DSPSess;
	552	unsigned short tempbuf[32];
	553	char netdevname[IFNAMSIZ];
	554	struct proc_dir_entry *ft1000_proc_dir; //mbelian
1a88a068	555	};
f7c1be0c MB	556
f7c1be0c MB	557
29437ab0	558	struct dpram_blk {
f7c1be0c MB	559	struct list_head list;
f7c1be0c MB	560	u16 *pbuffer;
29437ab0	561	} __attribute__ ((packed));
f7c1be0c	562
4a526fca MB	563	int ft1000_read_register(struct ft1000_device ft1000dev, u16 Data, u16 nRegIndx);
	564	int ft1000_write_register(struct ft1000_device *ft1000dev, u16 value, u16 nRegIndx);
	565	int ft1000_read_dpram32(struct ft1000_device ft1000dev, u16 indx, u8 buffer, u16 cnt);
	566	int ft1000_write_dpram32(struct ft1000_device ft1000dev, u16 indx, u8 buffer, u16 cnt);
	567	int ft1000_read_dpram16(struct ft1000_device ft1000dev, u16 indx, u8 buffer, u8 highlow);
	568	int ft1000_write_dpram16(struct ft1000_device *ft1000dev, u16 indx, u16 value, u8 highlow);
	569	int fix_ft1000_read_dpram32(struct ft1000_device ft1000dev, u16 indx, u8 buffer);
	570	int fix_ft1000_write_dpram32(struct ft1000_device ft1000dev, u16 indx, u8 buffer);
2a953cfd AB	571
	572	extern void *pFileStart;
	573	extern size_t FileLength;
	574	extern int numofmsgbuf;
	575
	576	int ft1000_close (struct net_device *dev);
84b7801d	577	u16 scram_dnldr(struct ft1000_device ft1000dev, void pFileStart, u32 FileLength);
2a953cfd AB	578
	579	extern struct list_head freercvpool;
	580	extern spinlock_t free_buff_lock; // lock to arbitrate free buffer list for receive command data
	581
4d791234 MB	582	int ft1000_create_dev(struct ft1000_device *dev);
4d791234 MB	583	void ft1000_destroy_dev(struct net_device *dev);
a209efad	584	extern void card_send_command(struct ft1000_device ft1000dev, void ptempbuffer, int size);
2a953cfd	585
29437ab0 MB	586	struct dpram_blk ft1000_get_buffer(struct list_head bufflist);
29437ab0 MB	587	void ft1000_free_buffer(struct dpram_blk pdpram_blk, struct list_head plist);
2a953cfd AB	588
	589	char getfw (char fn, size_t *pimgsz);
	590
5cb9954a	591	int dsp_reload(struct ft1000_device *ft1000dev);
f135da03	592	int init_ft1000_netdev(struct ft1000_device *ft1000dev);
2a953cfd	593	struct usb_interface;
aaf0885c	594	int reg_ft1000_netdev(struct ft1000_device ft1000dev, struct usb_interface intf);
2a953cfd AB	595	int ft1000_poll(void* dev_id);
2a953cfd AB	596
dab56ffe MB	597	int ft1000_init_proc(struct net_device *dev);
dab56ffe MB	598	void ft1000_cleanup_proc(struct ft1000_info *info);
2a953cfd AB	599
2a953cfd AB	600
f7c1be0c MB	601
f7c1be0c MB	602	#endif