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1/*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * jim liu <jim.liu@intel.com>
25 * Jackie Li<yaodong.li@intel.com>
26 */
27
28#ifndef __MDFLD_DSI_DBI_H__
29#define __MDFLD_DSI_DBI_H__
30
31#include <linux/backlight.h>
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32#include <drm/drmP.h>
33#include <drm/drm.h>
34#include <drm/drm_crtc.h>
35#include <drm/drm_edid.h>
36
37#include "psb_drv.h"
38#include "psb_intel_drv.h"
39#include "psb_intel_reg.h"
4bc59253 40#include "power.h"
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41
42#include "mdfld_dsi_output.h"
43#include "mdfld_output.h"
44
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45/*
46 * DBI encoder which inherits from mdfld_dsi_encoder
47 */
48struct mdfld_dsi_dbi_output {
49 struct mdfld_dsi_encoder base;
50 struct drm_display_mode *panel_fixed_mode;
51 u8 last_cmd;
52 u8 lane_count;
53 u8 channel_num;
54 struct drm_device *dev;
55
56 /* Backlight operations */
57
58 /* DSR timer */
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59 u32 dsr_idle_count;
60 bool dsr_fb_update_done;
61
62 /* Mode setting flags */
63 u32 mode_flags;
64
65 /* Panel status */
66 bool dbi_panel_on;
67 bool first_boot;
68 struct panel_funcs *p_funcs;
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69
70 /* DPU */
71 u32 *dbi_cb_addr;
72 u32 dbi_cb_phy;
73 spinlock_t cb_lock;
74 u32 cb_write;
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75};
76
77#define MDFLD_DSI_DBI_OUTPUT(dsi_encoder) \
78 container_of(dsi_encoder, struct mdfld_dsi_dbi_output, base)
79
80struct mdfld_dbi_dsr_info {
81 int dbi_output_num;
82 struct mdfld_dsi_dbi_output *dbi_outputs[2];
83
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84 u32 dsr_idle_count;
85};
86
87#define DBI_CB_TIMEOUT_COUNT 0xffff
88
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89/* Offsets */
90#define CMD_MEM_ADDR_OFFSET 0
91
92#define CMD_DATA_SRC_SYSTEM_MEM 0
93#define CMD_DATA_SRC_PIPE 1
94
95static inline int mdfld_dsi_dbi_fifo_ready(struct mdfld_dsi_dbi_output *dbi_output)
96{
97 struct drm_device *dev = dbi_output->dev;
98 u32 retry = DBI_CB_TIMEOUT_COUNT;
99 int reg_offset = (dbi_output->channel_num == 1) ? MIPIC_REG_OFFSET : 0;
100 int ret = 0;
101
102 /* Query the dbi fifo status*/
103 while (retry--) {
104 if (REG_READ(MIPIA_GEN_FIFO_STAT_REG + reg_offset) & (1 << 27))
105 break;
106 }
107
108 if (!retry) {
109 DRM_ERROR("Timeout waiting for DBI FIFO empty\n");
110 ret = -EAGAIN;
111 }
112 return ret;
113}
114
115static inline int mdfld_dsi_dbi_cmd_sent(struct mdfld_dsi_dbi_output *dbi_output)
116{
117 struct drm_device *dev = dbi_output->dev;
118 u32 retry = DBI_CB_TIMEOUT_COUNT;
119 int reg_offset = (dbi_output->channel_num == 1) ? MIPIC_REG_OFFSET : 0;
120 int ret = 0;
121
122 /* Query the command execution status */
123 while (retry--)
3caa89e9 124 if (!(REG_READ(MIPIA_CMD_ADD_REG + reg_offset) & (1 << 0)))
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125 break;
126
127 if (!retry) {
128 DRM_ERROR("Timeout waiting for DBI command status\n");
129 ret = -EAGAIN;
130 }
131
132 return ret;
133}
134
135static inline int mdfld_dsi_dbi_cb_ready(struct mdfld_dsi_dbi_output *dbi_output)
136{
137 int ret = 0;
138
139 /* Query the command execution status*/
140 ret = mdfld_dsi_dbi_cmd_sent(dbi_output);
141 if (ret) {
142 DRM_ERROR("Peripheral is busy\n");
143 ret = -EAGAIN;
144 }
145 /* Query the dbi fifo status*/
146 ret = mdfld_dsi_dbi_fifo_ready(dbi_output);
147 if (ret) {
148 DRM_ERROR("DBI FIFO is not empty\n");
149 ret = -EAGAIN;
150 }
151 return ret;
152}
153
154extern void mdfld_dsi_dbi_output_init(struct drm_device *dev,
155 struct psb_intel_mode_device *mode_dev, int pipe);
3caa89e9 156extern void mdfld_dsi_dbi_exit_dsr(struct drm_device *dev, u32 update_src);
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157extern void mdfld_dsi_dbi_enter_dsr(struct mdfld_dsi_dbi_output *dbi_output,
158 int pipe);
159extern int mdfld_dbi_dsr_init(struct drm_device *dev);
160extern void mdfld_dbi_dsr_exit(struct drm_device *dev);
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161extern struct mdfld_dsi_encoder *mdfld_dsi_dbi_init(struct drm_device *dev,
162 struct mdfld_dsi_connector *dsi_connector,
163 struct panel_funcs *p_funcs);
164extern int mdfld_dsi_dbi_send_dcs(struct mdfld_dsi_dbi_output *dbi_output,
165 u8 dcs, u8 *param, u32 num, u8 data_src);
166extern int mdfld_dsi_dbi_update_area(struct mdfld_dsi_dbi_output *dbi_output,
167 u16 x1, u16 y1, u16 x2, u16 y2);
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168extern int mdfld_dsi_dbi_update_power(struct mdfld_dsi_dbi_output *dbi_output,
169 int mode);
170extern void mdfld_dsi_controller_dbi_init(struct mdfld_dsi_config *dsi_config,
171 int pipe);
172
173#endif /*__MDFLD_DSI_DBI_H__*/