]>
Commit | Line | Data |
---|---|---|
574fb258 JC |
1 | /* |
2 | * sca3000_core.c -- support VTI sca3000 series accelerometers via SPI | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License version 2 as published by | |
6 | * the Free Software Foundation. | |
7 | * | |
0f8c9620 | 8 | * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org> |
574fb258 JC |
9 | * |
10 | * See industrialio/accels/sca3000.h for comments. | |
11 | */ | |
12 | ||
13 | #include <linux/interrupt.h> | |
574fb258 JC |
14 | #include <linux/fs.h> |
15 | #include <linux/device.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
574fb258 JC |
17 | #include <linux/kernel.h> |
18 | #include <linux/spi/spi.h> | |
19 | #include <linux/sysfs.h> | |
99c97852 | 20 | #include <linux/module.h> |
06458e27 JC |
21 | #include <linux/iio/iio.h> |
22 | #include <linux/iio/sysfs.h> | |
23 | #include <linux/iio/events.h> | |
24 | #include <linux/iio/buffer.h> | |
574fb258 | 25 | |
574fb258 JC |
26 | #include "sca3000.h" |
27 | ||
28 | enum sca3000_variant { | |
29 | d01, | |
574fb258 JC |
30 | e02, |
31 | e04, | |
32 | e05, | |
574fb258 JC |
33 | }; |
34 | ||
5262d8fd PM |
35 | /* |
36 | * Note where option modes are not defined, the chip simply does not | |
574fb258 JC |
37 | * support any. |
38 | * Other chips in the sca3000 series use i2c and are not included here. | |
39 | * | |
40 | * Some of these devices are only listed in the family data sheet and | |
41 | * do not actually appear to be available. | |
42 | */ | |
43 | static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = { | |
845bd12a | 44 | [d01] = { |
25888dc5 | 45 | .scale = 7357, |
574fb258 JC |
46 | .temp_output = true, |
47 | .measurement_mode_freq = 250, | |
48 | .option_mode_1 = SCA3000_OP_MODE_BYPASS, | |
49 | .option_mode_1_freq = 250, | |
25888dc5 JC |
50 | .mot_det_mult_xz = {50, 100, 200, 350, 650, 1300}, |
51 | .mot_det_mult_y = {50, 100, 150, 250, 450, 850, 1750}, | |
845bd12a JC |
52 | }, |
53 | [e02] = { | |
25888dc5 | 54 | .scale = 9810, |
574fb258 JC |
55 | .measurement_mode_freq = 125, |
56 | .option_mode_1 = SCA3000_OP_MODE_NARROW, | |
57 | .option_mode_1_freq = 63, | |
25888dc5 JC |
58 | .mot_det_mult_xz = {100, 150, 300, 550, 1050, 2050}, |
59 | .mot_det_mult_y = {50, 100, 200, 350, 700, 1350, 2700}, | |
845bd12a JC |
60 | }, |
61 | [e04] = { | |
25888dc5 | 62 | .scale = 19620, |
574fb258 JC |
63 | .measurement_mode_freq = 100, |
64 | .option_mode_1 = SCA3000_OP_MODE_NARROW, | |
65 | .option_mode_1_freq = 50, | |
66 | .option_mode_2 = SCA3000_OP_MODE_WIDE, | |
67 | .option_mode_2_freq = 400, | |
25888dc5 JC |
68 | .mot_det_mult_xz = {200, 300, 600, 1100, 2100, 4100}, |
69 | .mot_det_mult_y = {100, 200, 400, 7000, 1400, 2700, 54000}, | |
845bd12a JC |
70 | }, |
71 | [e05] = { | |
25888dc5 | 72 | .scale = 61313, |
574fb258 JC |
73 | .measurement_mode_freq = 200, |
74 | .option_mode_1 = SCA3000_OP_MODE_NARROW, | |
75 | .option_mode_1_freq = 50, | |
76 | .option_mode_2 = SCA3000_OP_MODE_WIDE, | |
77 | .option_mode_2_freq = 400, | |
25888dc5 JC |
78 | .mot_det_mult_xz = {600, 900, 1700, 3200, 6100, 11900}, |
79 | .mot_det_mult_y = {300, 600, 1200, 2000, 4100, 7800, 15600}, | |
574fb258 JC |
80 | }, |
81 | }; | |
82 | ||
574fb258 JC |
83 | int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val) |
84 | { | |
574fb258 JC |
85 | st->tx[0] = SCA3000_WRITE_REG(address); |
86 | st->tx[1] = val; | |
25888dc5 | 87 | return spi_write(st->us, st->tx, 2); |
574fb258 JC |
88 | } |
89 | ||
25888dc5 | 90 | int sca3000_read_data_short(struct sca3000_state *st, |
89ea25c7 | 91 | u8 reg_address_high, |
25888dc5 | 92 | int len) |
574fb258 | 93 | { |
25888dc5 JC |
94 | struct spi_transfer xfer[2] = { |
95 | { | |
96 | .len = 1, | |
97 | .tx_buf = st->tx, | |
98 | }, { | |
99 | .len = len, | |
100 | .rx_buf = st->rx, | |
101 | } | |
574fb258 | 102 | }; |
574fb258 | 103 | st->tx[0] = SCA3000_READ_REG(reg_address_high); |
574fb258 | 104 | |
ad6c46b0 | 105 | return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); |
574fb258 | 106 | } |
25888dc5 | 107 | |
574fb258 JC |
108 | /** |
109 | * sca3000_reg_lock_on() test if the ctrl register lock is on | |
110 | * | |
111 | * Lock must be held. | |
112 | **/ | |
113 | static int sca3000_reg_lock_on(struct sca3000_state *st) | |
114 | { | |
574fb258 JC |
115 | int ret; |
116 | ||
25888dc5 | 117 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_STATUS, 1); |
574fb258 JC |
118 | if (ret < 0) |
119 | return ret; | |
574fb258 | 120 | |
25888dc5 | 121 | return !(st->rx[0] & SCA3000_LOCKED); |
574fb258 JC |
122 | } |
123 | ||
124 | /** | |
125 | * __sca3000_unlock_reg_lock() unlock the control registers | |
126 | * | |
127 | * Note the device does not appear to support doing this in a single transfer. | |
128 | * This should only ever be used as part of ctrl reg read. | |
129 | * Lock must be held before calling this | |
130 | **/ | |
131 | static int __sca3000_unlock_reg_lock(struct sca3000_state *st) | |
132 | { | |
574fb258 JC |
133 | struct spi_transfer xfer[3] = { |
134 | { | |
574fb258 JC |
135 | .len = 2, |
136 | .cs_change = 1, | |
137 | .tx_buf = st->tx, | |
138 | }, { | |
574fb258 JC |
139 | .len = 2, |
140 | .cs_change = 1, | |
141 | .tx_buf = st->tx + 2, | |
142 | }, { | |
574fb258 | 143 | .len = 2, |
574fb258 JC |
144 | .tx_buf = st->tx + 4, |
145 | }, | |
146 | }; | |
147 | st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK); | |
148 | st->tx[1] = 0x00; | |
149 | st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK); | |
150 | st->tx[3] = 0x50; | |
151 | st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK); | |
152 | st->tx[5] = 0xA0; | |
574fb258 | 153 | |
ad6c46b0 | 154 | return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); |
574fb258 JC |
155 | } |
156 | ||
157 | /** | |
158 | * sca3000_write_ctrl_reg() write to a lock protect ctrl register | |
159 | * @sel: selects which registers we wish to write to | |
160 | * @val: the value to be written | |
161 | * | |
162 | * Certain control registers are protected against overwriting by the lock | |
163 | * register and use a shared write address. This function allows writing of | |
164 | * these registers. | |
165 | * Lock must be held. | |
166 | **/ | |
167 | static int sca3000_write_ctrl_reg(struct sca3000_state *st, | |
89ea25c7 | 168 | u8 sel, |
574fb258 JC |
169 | uint8_t val) |
170 | { | |
574fb258 JC |
171 | int ret; |
172 | ||
173 | ret = sca3000_reg_lock_on(st); | |
174 | if (ret < 0) | |
175 | goto error_ret; | |
176 | if (ret) { | |
177 | ret = __sca3000_unlock_reg_lock(st); | |
178 | if (ret) | |
179 | goto error_ret; | |
180 | } | |
181 | ||
182 | /* Set the control select register */ | |
183 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, sel); | |
184 | if (ret) | |
185 | goto error_ret; | |
186 | ||
187 | /* Write the actual value into the register */ | |
188 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_DATA, val); | |
189 | ||
190 | error_ret: | |
191 | return ret; | |
192 | } | |
193 | ||
574fb258 JC |
194 | /** |
195 | * sca3000_read_ctrl_reg() read from lock protected control register. | |
196 | * | |
197 | * Lock must be held. | |
198 | **/ | |
199 | static int sca3000_read_ctrl_reg(struct sca3000_state *st, | |
25888dc5 | 200 | u8 ctrl_reg) |
574fb258 JC |
201 | { |
202 | int ret; | |
203 | ||
204 | ret = sca3000_reg_lock_on(st); | |
205 | if (ret < 0) | |
206 | goto error_ret; | |
207 | if (ret) { | |
208 | ret = __sca3000_unlock_reg_lock(st); | |
209 | if (ret) | |
210 | goto error_ret; | |
211 | } | |
212 | /* Set the control select register */ | |
213 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, ctrl_reg); | |
214 | if (ret) | |
215 | goto error_ret; | |
25888dc5 JC |
216 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_CTRL_DATA, 1); |
217 | if (ret) | |
218 | goto error_ret; | |
911568be | 219 | return st->rx[0]; |
574fb258 JC |
220 | error_ret: |
221 | return ret; | |
222 | } | |
223 | ||
574fb258 | 224 | /** |
e6869759 | 225 | * sca3000_show_rev() - sysfs interface to read the chip revision number |
574fb258 JC |
226 | **/ |
227 | static ssize_t sca3000_show_rev(struct device *dev, | |
228 | struct device_attribute *attr, | |
229 | char *buf) | |
230 | { | |
231 | int len = 0, ret; | |
4b522ce7 | 232 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
2579a0df | 233 | struct sca3000_state *st = iio_priv(indio_dev); |
574fb258 | 234 | |
574fb258 | 235 | mutex_lock(&st->lock); |
25888dc5 | 236 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_REVID, 1); |
574fb258 JC |
237 | if (ret < 0) |
238 | goto error_ret; | |
239 | len += sprintf(buf + len, | |
240 | "major=%d, minor=%d\n", | |
25888dc5 JC |
241 | st->rx[0] & SCA3000_REVID_MAJOR_MASK, |
242 | st->rx[0] & SCA3000_REVID_MINOR_MASK); | |
574fb258 JC |
243 | error_ret: |
244 | mutex_unlock(&st->lock); | |
245 | ||
246 | return ret ? ret : len; | |
247 | } | |
248 | ||
249 | /** | |
250 | * sca3000_show_available_measurement_modes() display available modes | |
251 | * | |
252 | * This is all read from chip specific data in the driver. Not all | |
253 | * of the sca3000 series support modes other than normal. | |
254 | **/ | |
255 | static ssize_t | |
256 | sca3000_show_available_measurement_modes(struct device *dev, | |
257 | struct device_attribute *attr, | |
258 | char *buf) | |
259 | { | |
4b522ce7 | 260 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
2579a0df | 261 | struct sca3000_state *st = iio_priv(indio_dev); |
574fb258 JC |
262 | int len = 0; |
263 | ||
264 | len += sprintf(buf + len, "0 - normal mode"); | |
265 | switch (st->info->option_mode_1) { | |
266 | case SCA3000_OP_MODE_NARROW: | |
267 | len += sprintf(buf + len, ", 1 - narrow mode"); | |
268 | break; | |
269 | case SCA3000_OP_MODE_BYPASS: | |
270 | len += sprintf(buf + len, ", 1 - bypass mode"); | |
271 | break; | |
c608cb01 | 272 | } |
574fb258 JC |
273 | switch (st->info->option_mode_2) { |
274 | case SCA3000_OP_MODE_WIDE: | |
275 | len += sprintf(buf + len, ", 2 - wide mode"); | |
276 | break; | |
277 | } | |
278 | /* always supported */ | |
26de7208 | 279 | len += sprintf(buf + len, " 3 - motion detection\n"); |
574fb258 JC |
280 | |
281 | return len; | |
282 | } | |
283 | ||
284 | /** | |
e6869759 | 285 | * sca3000_show_measurement_mode() sysfs read of current mode |
574fb258 JC |
286 | **/ |
287 | static ssize_t | |
288 | sca3000_show_measurement_mode(struct device *dev, | |
289 | struct device_attribute *attr, | |
290 | char *buf) | |
291 | { | |
4b522ce7 | 292 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
2579a0df | 293 | struct sca3000_state *st = iio_priv(indio_dev); |
574fb258 | 294 | int len = 0, ret; |
574fb258 JC |
295 | |
296 | mutex_lock(&st->lock); | |
25888dc5 | 297 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
574fb258 JC |
298 | if (ret) |
299 | goto error_ret; | |
300 | /* mask bottom 2 bits - only ones that are relevant */ | |
25888dc5 JC |
301 | st->rx[0] &= 0x03; |
302 | switch (st->rx[0]) { | |
574fb258 JC |
303 | case SCA3000_MEAS_MODE_NORMAL: |
304 | len += sprintf(buf + len, "0 - normal mode\n"); | |
305 | break; | |
306 | case SCA3000_MEAS_MODE_MOT_DET: | |
307 | len += sprintf(buf + len, "3 - motion detection\n"); | |
308 | break; | |
309 | case SCA3000_MEAS_MODE_OP_1: | |
310 | switch (st->info->option_mode_1) { | |
311 | case SCA3000_OP_MODE_NARROW: | |
312 | len += sprintf(buf + len, "1 - narrow mode\n"); | |
313 | break; | |
314 | case SCA3000_OP_MODE_BYPASS: | |
315 | len += sprintf(buf + len, "1 - bypass mode\n"); | |
316 | break; | |
c608cb01 | 317 | } |
574fb258 JC |
318 | break; |
319 | case SCA3000_MEAS_MODE_OP_2: | |
320 | switch (st->info->option_mode_2) { | |
321 | case SCA3000_OP_MODE_WIDE: | |
322 | len += sprintf(buf + len, "2 - wide mode\n"); | |
323 | break; | |
324 | } | |
325 | break; | |
c608cb01 | 326 | } |
574fb258 JC |
327 | |
328 | error_ret: | |
329 | mutex_unlock(&st->lock); | |
330 | ||
331 | return ret ? ret : len; | |
332 | } | |
333 | ||
334 | /** | |
335 | * sca3000_store_measurement_mode() set the current mode | |
336 | **/ | |
337 | static ssize_t | |
338 | sca3000_store_measurement_mode(struct device *dev, | |
339 | struct device_attribute *attr, | |
340 | const char *buf, | |
341 | size_t len) | |
342 | { | |
4b522ce7 | 343 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
2579a0df | 344 | struct sca3000_state *st = iio_priv(indio_dev); |
574fb258 | 345 | int ret; |
bba42776 | 346 | u8 mask = 0x03; |
3b724ca1 | 347 | u8 val; |
574fb258 JC |
348 | |
349 | mutex_lock(&st->lock); | |
3b724ca1 | 350 | ret = kstrtou8(buf, 10, &val); |
574fb258 JC |
351 | if (ret) |
352 | goto error_ret; | |
d666c0d4 AR |
353 | if (val > 3) { |
354 | ret = -EINVAL; | |
355 | goto error_ret; | |
356 | } | |
25888dc5 | 357 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
574fb258 JC |
358 | if (ret) |
359 | goto error_ret; | |
25888dc5 JC |
360 | st->rx[0] &= ~mask; |
361 | st->rx[0] |= (val & mask); | |
362 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, st->rx[0]); | |
574fb258 | 363 | if (ret) |
25888dc5 | 364 | goto error_ret; |
574fb258 JC |
365 | mutex_unlock(&st->lock); |
366 | ||
367 | return len; | |
368 | ||
574fb258 JC |
369 | error_ret: |
370 | mutex_unlock(&st->lock); | |
371 | ||
372 | return ret; | |
373 | } | |
374 | ||
5262d8fd PM |
375 | /* |
376 | * Not even vaguely standard attributes so defined here rather than | |
574fb258 JC |
377 | * in the relevant IIO core headers |
378 | */ | |
f3fb0011 | 379 | static IIO_DEVICE_ATTR(measurement_mode_available, S_IRUGO, |
574fb258 JC |
380 | sca3000_show_available_measurement_modes, |
381 | NULL, 0); | |
382 | ||
383 | static IIO_DEVICE_ATTR(measurement_mode, S_IRUGO | S_IWUSR, | |
384 | sca3000_show_measurement_mode, | |
385 | sca3000_store_measurement_mode, | |
386 | 0); | |
387 | ||
388 | /* More standard attributes */ | |
389 | ||
355e25c1 | 390 | static IIO_DEVICE_ATTR(revision, S_IRUGO, sca3000_show_rev, NULL, 0); |
574fb258 | 391 | |
129c3f61 LPC |
392 | static const struct iio_event_spec sca3000_event = { |
393 | .type = IIO_EV_TYPE_MAG, | |
394 | .dir = IIO_EV_DIR_RISING, | |
395 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE), | |
396 | }; | |
25888dc5 | 397 | |
691a4ca1 JC |
398 | #define SCA3000_CHAN(index, mod) \ |
399 | { \ | |
400 | .type = IIO_ACCEL, \ | |
401 | .modified = 1, \ | |
402 | .channel2 = mod, \ | |
a8b21c5c JC |
403 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
404 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ | |
e0f3fc9b | 405 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ |
691a4ca1 JC |
406 | .address = index, \ |
407 | .scan_index = index, \ | |
408 | .scan_type = { \ | |
409 | .sign = 's', \ | |
410 | .realbits = 11, \ | |
411 | .storagebits = 16, \ | |
412 | .shift = 5, \ | |
413 | }, \ | |
129c3f61 LPC |
414 | .event_spec = &sca3000_event, \ |
415 | .num_event_specs = 1, \ | |
a5211b0d | 416 | } |
691a4ca1 | 417 | |
f4e4b955 | 418 | static const struct iio_chan_spec sca3000_channels[] = { |
691a4ca1 JC |
419 | SCA3000_CHAN(0, IIO_MOD_X), |
420 | SCA3000_CHAN(1, IIO_MOD_Y), | |
421 | SCA3000_CHAN(2, IIO_MOD_Z), | |
25888dc5 | 422 | }; |
574fb258 | 423 | |
bb0090e9 PM |
424 | static const struct iio_chan_spec sca3000_channels_with_temp[] = { |
425 | SCA3000_CHAN(0, IIO_MOD_X), | |
426 | SCA3000_CHAN(1, IIO_MOD_Y), | |
427 | SCA3000_CHAN(2, IIO_MOD_Z), | |
428 | { | |
429 | .type = IIO_TEMP, | |
430 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | |
431 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | | |
432 | BIT(IIO_CHAN_INFO_OFFSET), | |
131e97d3 LPC |
433 | /* No buffer support */ |
434 | .scan_index = -1, | |
bb0090e9 PM |
435 | }, |
436 | }; | |
437 | ||
25888dc5 JC |
438 | static u8 sca3000_addresses[3][3] = { |
439 | [0] = {SCA3000_REG_ADDR_X_MSB, SCA3000_REG_CTRL_SEL_MD_X_TH, | |
440 | SCA3000_MD_CTRL_OR_X}, | |
441 | [1] = {SCA3000_REG_ADDR_Y_MSB, SCA3000_REG_CTRL_SEL_MD_Y_TH, | |
442 | SCA3000_MD_CTRL_OR_Y}, | |
443 | [2] = {SCA3000_REG_ADDR_Z_MSB, SCA3000_REG_CTRL_SEL_MD_Z_TH, | |
444 | SCA3000_MD_CTRL_OR_Z}, | |
445 | }; | |
446 | ||
e0f3fc9b ID |
447 | /** |
448 | * __sca3000_get_base_freq() obtain mode specific base frequency | |
449 | * | |
450 | * lock must be held | |
451 | **/ | |
452 | static inline int __sca3000_get_base_freq(struct sca3000_state *st, | |
453 | const struct sca3000_chip_info *info, | |
454 | int *base_freq) | |
455 | { | |
456 | int ret; | |
457 | ||
458 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); | |
459 | if (ret) | |
460 | goto error_ret; | |
461 | switch (0x03 & st->rx[0]) { | |
462 | case SCA3000_MEAS_MODE_NORMAL: | |
463 | *base_freq = info->measurement_mode_freq; | |
464 | break; | |
465 | case SCA3000_MEAS_MODE_OP_1: | |
466 | *base_freq = info->option_mode_1_freq; | |
467 | break; | |
468 | case SCA3000_MEAS_MODE_OP_2: | |
469 | *base_freq = info->option_mode_2_freq; | |
470 | break; | |
471 | } | |
472 | error_ret: | |
473 | return ret; | |
474 | } | |
475 | ||
476 | /** | |
477 | * read_raw handler for IIO_CHAN_INFO_SAMP_FREQ | |
478 | * | |
479 | * lock must be held | |
480 | **/ | |
481 | static int read_raw_samp_freq(struct sca3000_state *st, int *val) | |
482 | { | |
483 | int ret; | |
484 | ||
485 | ret = __sca3000_get_base_freq(st, st->info, val); | |
486 | if (ret) | |
487 | return ret; | |
488 | ||
489 | ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); | |
490 | if (ret < 0) | |
491 | return ret; | |
492 | ||
493 | if (*val > 0) { | |
494 | ret &= SCA3000_OUT_CTRL_BUF_DIV_MASK; | |
495 | switch (ret) { | |
496 | case SCA3000_OUT_CTRL_BUF_DIV_2: | |
497 | *val /= 2; | |
498 | break; | |
499 | case SCA3000_OUT_CTRL_BUF_DIV_4: | |
500 | *val /= 4; | |
501 | break; | |
502 | } | |
503 | } | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
508 | /** | |
509 | * write_raw handler for IIO_CHAN_INFO_SAMP_FREQ | |
510 | * | |
511 | * lock must be held | |
512 | **/ | |
513 | static int write_raw_samp_freq(struct sca3000_state *st, int val) | |
514 | { | |
515 | int ret, base_freq, ctrlval; | |
516 | ||
517 | ret = __sca3000_get_base_freq(st, st->info, &base_freq); | |
518 | if (ret) | |
519 | return ret; | |
520 | ||
521 | ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); | |
522 | if (ret < 0) | |
523 | return ret; | |
524 | ||
525 | ctrlval = ret & ~SCA3000_OUT_CTRL_BUF_DIV_MASK; | |
526 | ||
527 | if (val == base_freq / 2) | |
528 | ctrlval |= SCA3000_OUT_CTRL_BUF_DIV_2; | |
529 | if (val == base_freq / 4) | |
530 | ctrlval |= SCA3000_OUT_CTRL_BUF_DIV_4; | |
531 | else if (val != base_freq) | |
532 | return -EINVAL; | |
533 | ||
534 | return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL, | |
535 | ctrlval); | |
536 | } | |
537 | ||
25888dc5 JC |
538 | static int sca3000_read_raw(struct iio_dev *indio_dev, |
539 | struct iio_chan_spec const *chan, | |
540 | int *val, | |
541 | int *val2, | |
542 | long mask) | |
543 | { | |
83f0422d | 544 | struct sca3000_state *st = iio_priv(indio_dev); |
25888dc5 JC |
545 | int ret; |
546 | u8 address; | |
547 | ||
548 | switch (mask) { | |
31313fc6 | 549 | case IIO_CHAN_INFO_RAW: |
25888dc5 | 550 | mutex_lock(&st->lock); |
bb0090e9 PM |
551 | if (chan->type == IIO_ACCEL) { |
552 | if (st->mo_det_use_count) { | |
553 | mutex_unlock(&st->lock); | |
554 | return -EBUSY; | |
555 | } | |
556 | address = sca3000_addresses[chan->address][0]; | |
557 | ret = sca3000_read_data_short(st, address, 2); | |
558 | if (ret < 0) { | |
559 | mutex_unlock(&st->lock); | |
560 | return ret; | |
561 | } | |
562 | *val = (be16_to_cpup((__be16 *)st->rx) >> 3) & 0x1FFF; | |
1abe0c9a IC |
563 | *val = ((*val) << (sizeof(*val) * 8 - 13)) >> |
564 | (sizeof(*val) * 8 - 13); | |
bb0090e9 PM |
565 | } else { |
566 | /* get the temperature when available */ | |
567 | ret = sca3000_read_data_short(st, | |
252b1d84 IC |
568 | SCA3000_REG_ADDR_TEMP_MSB, |
569 | 2); | |
bb0090e9 PM |
570 | if (ret < 0) { |
571 | mutex_unlock(&st->lock); | |
572 | return ret; | |
573 | } | |
2f29c168 MOA |
574 | *val = ((st->rx[0] & 0x3F) << 3) | |
575 | ((st->rx[1] & 0xE0) >> 5); | |
25888dc5 | 576 | } |
25888dc5 JC |
577 | mutex_unlock(&st->lock); |
578 | return IIO_VAL_INT; | |
c8a9f805 | 579 | case IIO_CHAN_INFO_SCALE: |
25888dc5 JC |
580 | *val = 0; |
581 | if (chan->type == IIO_ACCEL) | |
582 | *val2 = st->info->scale; | |
583 | else /* temperature */ | |
584 | *val2 = 555556; | |
585 | return IIO_VAL_INT_PLUS_MICRO; | |
bb0090e9 PM |
586 | case IIO_CHAN_INFO_OFFSET: |
587 | *val = -214; | |
588 | *val2 = 600000; | |
589 | return IIO_VAL_INT_PLUS_MICRO; | |
e0f3fc9b ID |
590 | case IIO_CHAN_INFO_SAMP_FREQ: |
591 | mutex_lock(&st->lock); | |
592 | ret = read_raw_samp_freq(st, val); | |
593 | mutex_unlock(&st->lock); | |
594 | return ret ? ret : IIO_VAL_INT; | |
595 | default: | |
596 | return -EINVAL; | |
597 | } | |
598 | } | |
599 | ||
600 | static int sca3000_write_raw(struct iio_dev *indio_dev, | |
601 | struct iio_chan_spec const *chan, | |
602 | int val, int val2, long mask) | |
603 | { | |
604 | struct sca3000_state *st = iio_priv(indio_dev); | |
605 | int ret; | |
606 | ||
607 | switch (mask) { | |
608 | case IIO_CHAN_INFO_SAMP_FREQ: | |
609 | if (val2) | |
610 | return -EINVAL; | |
611 | mutex_lock(&st->lock); | |
612 | ret = write_raw_samp_freq(st, val); | |
613 | mutex_unlock(&st->lock); | |
614 | return ret; | |
25888dc5 JC |
615 | default: |
616 | return -EINVAL; | |
617 | } | |
e0f3fc9b ID |
618 | |
619 | return ret; | |
25888dc5 | 620 | } |
574fb258 JC |
621 | |
622 | /** | |
623 | * sca3000_read_av_freq() sysfs function to get available frequencies | |
624 | * | |
625 | * The later modes are only relevant to the ring buffer - and depend on current | |
626 | * mode. Note that data sheet gives rather wide tolerances for these so integer | |
627 | * division will give good enough answer and not all chips have them specified | |
628 | * at all. | |
629 | **/ | |
630 | static ssize_t sca3000_read_av_freq(struct device *dev, | |
252b1d84 IC |
631 | struct device_attribute *attr, |
632 | char *buf) | |
574fb258 | 633 | { |
4b522ce7 | 634 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
83f0422d | 635 | struct sca3000_state *st = iio_priv(indio_dev); |
25888dc5 JC |
636 | int len = 0, ret, val; |
637 | ||
574fb258 | 638 | mutex_lock(&st->lock); |
25888dc5 JC |
639 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
640 | val = st->rx[0]; | |
574fb258 JC |
641 | mutex_unlock(&st->lock); |
642 | if (ret) | |
643 | goto error_ret; | |
25888dc5 JC |
644 | |
645 | switch (val & 0x03) { | |
574fb258 JC |
646 | case SCA3000_MEAS_MODE_NORMAL: |
647 | len += sprintf(buf + len, "%d %d %d\n", | |
648 | st->info->measurement_mode_freq, | |
1abe0c9a IC |
649 | st->info->measurement_mode_freq / 2, |
650 | st->info->measurement_mode_freq / 4); | |
574fb258 JC |
651 | break; |
652 | case SCA3000_MEAS_MODE_OP_1: | |
653 | len += sprintf(buf + len, "%d %d %d\n", | |
654 | st->info->option_mode_1_freq, | |
1abe0c9a IC |
655 | st->info->option_mode_1_freq / 2, |
656 | st->info->option_mode_1_freq / 4); | |
574fb258 JC |
657 | break; |
658 | case SCA3000_MEAS_MODE_OP_2: | |
659 | len += sprintf(buf + len, "%d %d %d\n", | |
660 | st->info->option_mode_2_freq, | |
1abe0c9a IC |
661 | st->info->option_mode_2_freq / 2, |
662 | st->info->option_mode_2_freq / 4); | |
574fb258 | 663 | break; |
c608cb01 | 664 | } |
574fb258 JC |
665 | return len; |
666 | error_ret: | |
667 | return ret; | |
668 | } | |
4a613ad4 | 669 | |
5262d8fd PM |
670 | /* |
671 | * Should only really be registered if ring buffer support is compiled in. | |
574fb258 JC |
672 | * Does no harm however and doing it right would add a fair bit of complexity |
673 | */ | |
f3fb0011 | 674 | static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq); |
574fb258 | 675 | |
574fb258 | 676 | /** |
25888dc5 | 677 | * sca3000_read_thresh() - query of a threshold |
574fb258 | 678 | **/ |
25888dc5 | 679 | static int sca3000_read_thresh(struct iio_dev *indio_dev, |
129c3f61 LPC |
680 | const struct iio_chan_spec *chan, |
681 | enum iio_event_type type, | |
682 | enum iio_event_direction dir, | |
683 | enum iio_event_info info, | |
684 | int *val, int *val2) | |
574fb258 | 685 | { |
25888dc5 | 686 | int ret, i; |
83f0422d | 687 | struct sca3000_state *st = iio_priv(indio_dev); |
129c3f61 | 688 | int num = chan->channel2; |
d7b79519 | 689 | |
574fb258 | 690 | mutex_lock(&st->lock); |
25888dc5 | 691 | ret = sca3000_read_ctrl_reg(st, sca3000_addresses[num][1]); |
574fb258 | 692 | mutex_unlock(&st->lock); |
25888dc5 | 693 | if (ret < 0) |
574fb258 | 694 | return ret; |
25888dc5 JC |
695 | *val = 0; |
696 | if (num == 1) | |
697 | for_each_set_bit(i, (unsigned long *)&ret, | |
698 | ARRAY_SIZE(st->info->mot_det_mult_y)) | |
699 | *val += st->info->mot_det_mult_y[i]; | |
700 | else | |
701 | for_each_set_bit(i, (unsigned long *)&ret, | |
702 | ARRAY_SIZE(st->info->mot_det_mult_xz)) | |
703 | *val += st->info->mot_det_mult_xz[i]; | |
574fb258 | 704 | |
129c3f61 | 705 | return IIO_VAL_INT; |
574fb258 JC |
706 | } |
707 | ||
708 | /** | |
25888dc5 | 709 | * sca3000_write_thresh() control of threshold |
574fb258 | 710 | **/ |
25888dc5 | 711 | static int sca3000_write_thresh(struct iio_dev *indio_dev, |
129c3f61 LPC |
712 | const struct iio_chan_spec *chan, |
713 | enum iio_event_type type, | |
714 | enum iio_event_direction dir, | |
715 | enum iio_event_info info, | |
716 | int val, int val2) | |
574fb258 | 717 | { |
83f0422d | 718 | struct sca3000_state *st = iio_priv(indio_dev); |
129c3f61 | 719 | int num = chan->channel2; |
574fb258 | 720 | int ret; |
25888dc5 JC |
721 | int i; |
722 | u8 nonlinear = 0; | |
723 | ||
724 | if (num == 1) { | |
725 | i = ARRAY_SIZE(st->info->mot_det_mult_y); | |
726 | while (i > 0) | |
727 | if (val >= st->info->mot_det_mult_y[--i]) { | |
728 | nonlinear |= (1 << i); | |
729 | val -= st->info->mot_det_mult_y[i]; | |
730 | } | |
731 | } else { | |
732 | i = ARRAY_SIZE(st->info->mot_det_mult_xz); | |
733 | while (i > 0) | |
734 | if (val >= st->info->mot_det_mult_xz[--i]) { | |
735 | nonlinear |= (1 << i); | |
736 | val -= st->info->mot_det_mult_xz[i]; | |
737 | } | |
738 | } | |
574fb258 | 739 | |
574fb258 | 740 | mutex_lock(&st->lock); |
25888dc5 | 741 | ret = sca3000_write_ctrl_reg(st, sca3000_addresses[num][1], nonlinear); |
574fb258 JC |
742 | mutex_unlock(&st->lock); |
743 | ||
25888dc5 | 744 | return ret; |
574fb258 JC |
745 | } |
746 | ||
574fb258 | 747 | static struct attribute *sca3000_attributes[] = { |
574fb258 | 748 | &iio_dev_attr_revision.dev_attr.attr, |
f3fb0011 | 749 | &iio_dev_attr_measurement_mode_available.dev_attr.attr, |
574fb258 | 750 | &iio_dev_attr_measurement_mode.dev_attr.attr, |
f3fb0011 | 751 | &iio_dev_attr_sampling_frequency_available.dev_attr.attr, |
574fb258 JC |
752 | NULL, |
753 | }; | |
754 | ||
574fb258 JC |
755 | static const struct attribute_group sca3000_attribute_group = { |
756 | .attrs = sca3000_attributes, | |
757 | }; | |
758 | ||
574fb258 | 759 | /** |
25888dc5 | 760 | * sca3000_event_handler() - handling ring and non ring events |
574fb258 | 761 | * |
5262d8fd PM |
762 | * Ring related interrupt handler. Depending on event, push to |
763 | * the ring buffer event chrdev or the event one. | |
764 | * | |
574fb258 JC |
765 | * This function is complicated by the fact that the devices can signify ring |
766 | * and non ring events via the same interrupt line and they can only | |
767 | * be distinguished via a read of the relevant status register. | |
768 | **/ | |
25888dc5 | 769 | static irqreturn_t sca3000_event_handler(int irq, void *private) |
574fb258 | 770 | { |
25888dc5 | 771 | struct iio_dev *indio_dev = private; |
83f0422d | 772 | struct sca3000_state *st = iio_priv(indio_dev); |
25888dc5 | 773 | int ret, val; |
bc2b7dab | 774 | s64 last_timestamp = iio_get_time_ns(indio_dev); |
574fb258 | 775 | |
5262d8fd PM |
776 | /* |
777 | * Could lead if badly timed to an extra read of status reg, | |
574fb258 JC |
778 | * but ensures no interrupt is missed. |
779 | */ | |
574fb258 | 780 | mutex_lock(&st->lock); |
25888dc5 JC |
781 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_STATUS, 1); |
782 | val = st->rx[0]; | |
574fb258 JC |
783 | mutex_unlock(&st->lock); |
784 | if (ret) | |
785 | goto done; | |
786 | ||
14555b14 | 787 | sca3000_ring_int_process(val, indio_dev->buffer); |
574fb258 | 788 | |
25888dc5 | 789 | if (val & SCA3000_INT_STATUS_FREE_FALL) |
5aa96188 | 790 | iio_push_event(indio_dev, |
c4b14d99 | 791 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
de9fe32a | 792 | 0, |
c4b14d99 | 793 | IIO_MOD_X_AND_Y_AND_Z, |
de9fe32a JC |
794 | IIO_EV_TYPE_MAG, |
795 | IIO_EV_DIR_FALLING), | |
25888dc5 | 796 | last_timestamp); |
574fb258 | 797 | |
25888dc5 | 798 | if (val & SCA3000_INT_STATUS_Y_TRIGGER) |
5aa96188 | 799 | iio_push_event(indio_dev, |
c4b14d99 | 800 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
de9fe32a | 801 | 0, |
c4b14d99 | 802 | IIO_MOD_Y, |
de9fe32a JC |
803 | IIO_EV_TYPE_MAG, |
804 | IIO_EV_DIR_RISING), | |
25888dc5 | 805 | last_timestamp); |
574fb258 | 806 | |
25888dc5 | 807 | if (val & SCA3000_INT_STATUS_X_TRIGGER) |
5aa96188 | 808 | iio_push_event(indio_dev, |
c4b14d99 | 809 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
de9fe32a | 810 | 0, |
c4b14d99 | 811 | IIO_MOD_X, |
de9fe32a JC |
812 | IIO_EV_TYPE_MAG, |
813 | IIO_EV_DIR_RISING), | |
25888dc5 | 814 | last_timestamp); |
574fb258 | 815 | |
25888dc5 | 816 | if (val & SCA3000_INT_STATUS_Z_TRIGGER) |
5aa96188 | 817 | iio_push_event(indio_dev, |
c4b14d99 | 818 | IIO_MOD_EVENT_CODE(IIO_ACCEL, |
de9fe32a | 819 | 0, |
c4b14d99 | 820 | IIO_MOD_Z, |
de9fe32a JC |
821 | IIO_EV_TYPE_MAG, |
822 | IIO_EV_DIR_RISING), | |
25888dc5 | 823 | last_timestamp); |
574fb258 JC |
824 | |
825 | done: | |
25888dc5 | 826 | return IRQ_HANDLED; |
574fb258 JC |
827 | } |
828 | ||
829 | /** | |
25888dc5 | 830 | * sca3000_read_event_config() what events are enabled |
574fb258 | 831 | **/ |
25888dc5 | 832 | static int sca3000_read_event_config(struct iio_dev *indio_dev, |
129c3f61 LPC |
833 | const struct iio_chan_spec *chan, |
834 | enum iio_event_type type, | |
835 | enum iio_event_direction dir) | |
574fb258 | 836 | { |
83f0422d | 837 | struct sca3000_state *st = iio_priv(indio_dev); |
25888dc5 | 838 | int ret; |
574fb258 | 839 | u8 protect_mask = 0x03; |
129c3f61 | 840 | int num = chan->channel2; |
574fb258 JC |
841 | |
842 | /* read current value of mode register */ | |
843 | mutex_lock(&st->lock); | |
25888dc5 | 844 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
574fb258 JC |
845 | if (ret) |
846 | goto error_ret; | |
847 | ||
806535b6 | 848 | if ((st->rx[0] & protect_mask) != SCA3000_MEAS_MODE_MOT_DET) { |
25888dc5 | 849 | ret = 0; |
806535b6 | 850 | } else { |
25888dc5 JC |
851 | ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); |
852 | if (ret < 0) | |
574fb258 JC |
853 | goto error_ret; |
854 | /* only supporting logical or's for now */ | |
25888dc5 | 855 | ret = !!(ret & sca3000_addresses[num][2]); |
574fb258 | 856 | } |
574fb258 JC |
857 | error_ret: |
858 | mutex_unlock(&st->lock); | |
859 | ||
25888dc5 | 860 | return ret; |
574fb258 | 861 | } |
4a613ad4 | 862 | |
574fb258 JC |
863 | /** |
864 | * sca3000_query_free_fall_mode() is free fall mode enabled | |
865 | **/ | |
866 | static ssize_t sca3000_query_free_fall_mode(struct device *dev, | |
867 | struct device_attribute *attr, | |
868 | char *buf) | |
869 | { | |
3194e14d | 870 | int ret; |
4b522ce7 | 871 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
83f0422d | 872 | struct sca3000_state *st = iio_priv(indio_dev); |
25888dc5 | 873 | int val; |
574fb258 JC |
874 | |
875 | mutex_lock(&st->lock); | |
25888dc5 JC |
876 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
877 | val = st->rx[0]; | |
574fb258 | 878 | mutex_unlock(&st->lock); |
25888dc5 | 879 | if (ret < 0) |
574fb258 | 880 | return ret; |
3194e14d | 881 | return sprintf(buf, "%d\n", !!(val & SCA3000_FREE_FALL_DETECT)); |
574fb258 | 882 | } |
574fb258 JC |
883 | |
884 | /** | |
885 | * sca3000_set_free_fall_mode() simple on off control for free fall int | |
886 | * | |
887 | * In these chips the free fall detector should send an interrupt if | |
888 | * the device falls more than 25cm. This has not been tested due | |
889 | * to fragile wiring. | |
890 | **/ | |
574fb258 JC |
891 | static ssize_t sca3000_set_free_fall_mode(struct device *dev, |
892 | struct device_attribute *attr, | |
893 | const char *buf, | |
894 | size_t len) | |
895 | { | |
4b522ce7 | 896 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
83f0422d | 897 | struct sca3000_state *st = iio_priv(indio_dev); |
e5e26dd5 | 898 | u8 val; |
574fb258 | 899 | int ret; |
574fb258 JC |
900 | u8 protect_mask = SCA3000_FREE_FALL_DETECT; |
901 | ||
902 | mutex_lock(&st->lock); | |
e5e26dd5 | 903 | ret = kstrtou8(buf, 10, &val); |
574fb258 JC |
904 | if (ret) |
905 | goto error_ret; | |
906 | ||
907 | /* read current value of mode register */ | |
25888dc5 | 908 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
574fb258 JC |
909 | if (ret) |
910 | goto error_ret; | |
911 | ||
5262d8fd | 912 | /* if off and should be on */ |
25888dc5 | 913 | if (val && !(st->rx[0] & protect_mask)) |
574fb258 | 914 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, |
25888dc5 | 915 | (st->rx[0] | SCA3000_FREE_FALL_DETECT)); |
574fb258 | 916 | /* if on and should be off */ |
25888dc5 | 917 | else if (!val && (st->rx[0] & protect_mask)) |
574fb258 | 918 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, |
25888dc5 | 919 | (st->rx[0] & ~protect_mask)); |
574fb258 JC |
920 | error_ret: |
921 | mutex_unlock(&st->lock); | |
922 | ||
923 | return ret ? ret : len; | |
924 | } | |
925 | ||
926 | /** | |
e6869759 | 927 | * sca3000_write_event_config() simple on off control for motion detector |
574fb258 JC |
928 | * |
929 | * This is a per axis control, but enabling any will result in the | |
930 | * motion detector unit being enabled. | |
931 | * N.B. enabling motion detector stops normal data acquisition. | |
932 | * There is a complexity in knowing which mode to return to when | |
933 | * this mode is disabled. Currently normal mode is assumed. | |
934 | **/ | |
25888dc5 | 935 | static int sca3000_write_event_config(struct iio_dev *indio_dev, |
129c3f61 LPC |
936 | const struct iio_chan_spec *chan, |
937 | enum iio_event_type type, | |
938 | enum iio_event_direction dir, | |
25888dc5 | 939 | int state) |
574fb258 | 940 | { |
83f0422d | 941 | struct sca3000_state *st = iio_priv(indio_dev); |
25888dc5 | 942 | int ret, ctrlval; |
574fb258 | 943 | u8 protect_mask = 0x03; |
129c3f61 | 944 | int num = chan->channel2; |
574fb258 JC |
945 | |
946 | mutex_lock(&st->lock); | |
5262d8fd PM |
947 | /* |
948 | * First read the motion detector config to find out if | |
949 | * this axis is on | |
950 | */ | |
25888dc5 JC |
951 | ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); |
952 | if (ret < 0) | |
574fb258 | 953 | goto exit_point; |
25888dc5 | 954 | ctrlval = ret; |
5262d8fd | 955 | /* if off and should be on */ |
25888dc5 | 956 | if (state && !(ctrlval & sca3000_addresses[num][2])) { |
574fb258 JC |
957 | ret = sca3000_write_ctrl_reg(st, |
958 | SCA3000_REG_CTRL_SEL_MD_CTRL, | |
25888dc5 JC |
959 | ctrlval | |
960 | sca3000_addresses[num][2]); | |
574fb258 | 961 | if (ret) |
25888dc5 | 962 | goto exit_point; |
574fb258 | 963 | st->mo_det_use_count++; |
25888dc5 | 964 | } else if (!state && (ctrlval & sca3000_addresses[num][2])) { |
574fb258 JC |
965 | ret = sca3000_write_ctrl_reg(st, |
966 | SCA3000_REG_CTRL_SEL_MD_CTRL, | |
25888dc5 JC |
967 | ctrlval & |
968 | ~(sca3000_addresses[num][2])); | |
574fb258 | 969 | if (ret) |
25888dc5 | 970 | goto exit_point; |
574fb258 | 971 | st->mo_det_use_count--; |
25888dc5 JC |
972 | } |
973 | ||
574fb258 | 974 | /* read current value of mode register */ |
25888dc5 | 975 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
574fb258 JC |
976 | if (ret) |
977 | goto exit_point; | |
5262d8fd | 978 | /* if off and should be on */ |
48948abe IC |
979 | if ((st->mo_det_use_count) && |
980 | ((st->rx[0] & protect_mask) != SCA3000_MEAS_MODE_MOT_DET)) | |
574fb258 | 981 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, |
25888dc5 | 982 | (st->rx[0] & ~protect_mask) |
574fb258 JC |
983 | | SCA3000_MEAS_MODE_MOT_DET); |
984 | /* if on and should be off */ | |
48948abe IC |
985 | else if (!(st->mo_det_use_count) && |
986 | ((st->rx[0] & protect_mask) == SCA3000_MEAS_MODE_MOT_DET)) | |
574fb258 | 987 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, |
25888dc5 | 988 | (st->rx[0] & ~protect_mask)); |
574fb258 JC |
989 | exit_point: |
990 | mutex_unlock(&st->lock); | |
991 | ||
25888dc5 | 992 | return ret; |
574fb258 JC |
993 | } |
994 | ||
574fb258 | 995 | /* Free fall detector related event attribute */ |
aaf370db | 996 | static IIO_DEVICE_ATTR_NAMED(accel_xayaz_mag_falling_en, |
1abe0c9a | 997 | in_accel_x & y & z_mag_falling_en, |
aaf370db JC |
998 | S_IRUGO | S_IWUSR, |
999 | sca3000_query_free_fall_mode, | |
1000 | sca3000_set_free_fall_mode, | |
1001 | 0); | |
fc5d0e42 | 1002 | |
25888dc5 | 1003 | static IIO_CONST_ATTR_NAMED(accel_xayaz_mag_falling_period, |
1abe0c9a | 1004 | in_accel_x & y & z_mag_falling_period, |
25888dc5 | 1005 | "0.226"); |
574fb258 JC |
1006 | |
1007 | static struct attribute *sca3000_event_attributes[] = { | |
aaf370db | 1008 | &iio_dev_attr_accel_xayaz_mag_falling_en.dev_attr.attr, |
fc5d0e42 | 1009 | &iio_const_attr_accel_xayaz_mag_falling_period.dev_attr.attr, |
574fb258 JC |
1010 | NULL, |
1011 | }; | |
1012 | ||
1013 | static struct attribute_group sca3000_event_attribute_group = { | |
1014 | .attrs = sca3000_event_attributes, | |
8e7d9672 | 1015 | .name = "events", |
574fb258 JC |
1016 | }; |
1017 | ||
1018 | /** | |
1019 | * sca3000_clean_setup() get the device into a predictable state | |
1020 | * | |
1021 | * Devices use flash memory to store many of the register values | |
1022 | * and hence can come up in somewhat unpredictable states. | |
1023 | * Hence reset everything on driver load. | |
5262d8fd | 1024 | **/ |
574fb258 JC |
1025 | static int sca3000_clean_setup(struct sca3000_state *st) |
1026 | { | |
1027 | int ret; | |
574fb258 JC |
1028 | |
1029 | mutex_lock(&st->lock); | |
1030 | /* Ensure all interrupts have been acknowledged */ | |
25888dc5 | 1031 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_STATUS, 1); |
574fb258 JC |
1032 | if (ret) |
1033 | goto error_ret; | |
574fb258 JC |
1034 | |
1035 | /* Turn off all motion detection channels */ | |
25888dc5 JC |
1036 | ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); |
1037 | if (ret < 0) | |
574fb258 | 1038 | goto error_ret; |
25888dc5 JC |
1039 | ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL, |
1040 | ret & SCA3000_MD_CTRL_PROT_MASK); | |
574fb258 JC |
1041 | if (ret) |
1042 | goto error_ret; | |
1043 | ||
1044 | /* Disable ring buffer */ | |
25888dc5 | 1045 | ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); |
aea7b1dc LB |
1046 | if (ret < 0) |
1047 | goto error_ret; | |
25888dc5 JC |
1048 | ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL, |
1049 | (ret & SCA3000_OUT_CTRL_PROT_MASK) | |
574fb258 JC |
1050 | | SCA3000_OUT_CTRL_BUF_X_EN |
1051 | | SCA3000_OUT_CTRL_BUF_Y_EN | |
1052 | | SCA3000_OUT_CTRL_BUF_Z_EN | |
1053 | | SCA3000_OUT_CTRL_BUF_DIV_4); | |
574fb258 JC |
1054 | if (ret) |
1055 | goto error_ret; | |
1056 | /* Enable interrupts, relevant to mode and set up as active low */ | |
25888dc5 | 1057 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1); |
574fb258 JC |
1058 | if (ret) |
1059 | goto error_ret; | |
1060 | ret = sca3000_write_reg(st, | |
1061 | SCA3000_REG_ADDR_INT_MASK, | |
25888dc5 | 1062 | (ret & SCA3000_INT_MASK_PROT_MASK) |
574fb258 | 1063 | | SCA3000_INT_MASK_ACTIVE_LOW); |
574fb258 JC |
1064 | if (ret) |
1065 | goto error_ret; | |
5262d8fd PM |
1066 | /* |
1067 | * Select normal measurement mode, free fall off, ring off | |
1068 | * Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5 | |
1069 | * as that occurs in one of the example on the datasheet | |
1070 | */ | |
25888dc5 | 1071 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); |
574fb258 JC |
1072 | if (ret) |
1073 | goto error_ret; | |
25888dc5 JC |
1074 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, |
1075 | (st->rx[0] & SCA3000_MODE_PROT_MASK)); | |
574fb258 JC |
1076 | st->bpse = 11; |
1077 | ||
1078 | error_ret: | |
1079 | mutex_unlock(&st->lock); | |
1080 | return ret; | |
1081 | } | |
1082 | ||
6fe8135f JC |
1083 | static const struct iio_info sca3000_info = { |
1084 | .attrs = &sca3000_attribute_group, | |
1085 | .read_raw = &sca3000_read_raw, | |
e0f3fc9b | 1086 | .write_raw = &sca3000_write_raw, |
6fe8135f | 1087 | .event_attrs = &sca3000_event_attribute_group, |
cb955852 LPC |
1088 | .read_event_value = &sca3000_read_thresh, |
1089 | .write_event_value = &sca3000_write_thresh, | |
1090 | .read_event_config = &sca3000_read_event_config, | |
1091 | .write_event_config = &sca3000_write_event_config, | |
6fe8135f JC |
1092 | .driver_module = THIS_MODULE, |
1093 | }; | |
1094 | ||
4ae1c61f | 1095 | static int sca3000_probe(struct spi_device *spi) |
574fb258 | 1096 | { |
d2fffd6c | 1097 | int ret; |
574fb258 | 1098 | struct sca3000_state *st; |
83f0422d | 1099 | struct iio_dev *indio_dev; |
574fb258 | 1100 | |
0189d93f SK |
1101 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); |
1102 | if (!indio_dev) | |
1103 | return -ENOMEM; | |
574fb258 | 1104 | |
03bda05d | 1105 | st = iio_priv(indio_dev); |
83f0422d | 1106 | spi_set_drvdata(spi, indio_dev); |
574fb258 JC |
1107 | st->us = spi; |
1108 | mutex_init(&st->lock); | |
25888dc5 JC |
1109 | st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi) |
1110 | ->driver_data]; | |
574fb258 | 1111 | |
83f0422d JC |
1112 | indio_dev->dev.parent = &spi->dev; |
1113 | indio_dev->name = spi_get_device_id(spi)->name; | |
bb0090e9 PM |
1114 | indio_dev->info = &sca3000_info; |
1115 | if (st->info->temp_output) { | |
1116 | indio_dev->channels = sca3000_channels_with_temp; | |
1117 | indio_dev->num_channels = | |
1118 | ARRAY_SIZE(sca3000_channels_with_temp); | |
1119 | } else { | |
1120 | indio_dev->channels = sca3000_channels; | |
1121 | indio_dev->num_channels = ARRAY_SIZE(sca3000_channels); | |
1122 | } | |
83f0422d | 1123 | indio_dev->modes = INDIO_DIRECT_MODE; |
574fb258 | 1124 | |
83f0422d JC |
1125 | sca3000_configure_ring(indio_dev); |
1126 | ret = iio_device_register(indio_dev); | |
574fb258 | 1127 | if (ret < 0) |
0189d93f | 1128 | return ret; |
d2fffd6c | 1129 | |
3e2c96ea | 1130 | if (spi->irq) { |
25888dc5 JC |
1131 | ret = request_threaded_irq(spi->irq, |
1132 | NULL, | |
1133 | &sca3000_event_handler, | |
a91aff1c | 1134 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
25888dc5 | 1135 | "sca3000", |
83f0422d | 1136 | indio_dev); |
574fb258 | 1137 | if (ret) |
3e1b6c95 | 1138 | goto error_unregister_dev; |
574fb258 | 1139 | } |
83f0422d | 1140 | sca3000_register_ring_funcs(indio_dev); |
574fb258 JC |
1141 | ret = sca3000_clean_setup(st); |
1142 | if (ret) | |
25888dc5 | 1143 | goto error_free_irq; |
574fb258 JC |
1144 | return 0; |
1145 | ||
25888dc5 | 1146 | error_free_irq: |
3e2c96ea | 1147 | if (spi->irq) |
83f0422d | 1148 | free_irq(spi->irq, indio_dev); |
574fb258 | 1149 | error_unregister_dev: |
d2fffd6c | 1150 | iio_device_unregister(indio_dev); |
574fb258 JC |
1151 | return ret; |
1152 | } | |
1153 | ||
1154 | static int sca3000_stop_all_interrupts(struct sca3000_state *st) | |
1155 | { | |
1156 | int ret; | |
574fb258 JC |
1157 | |
1158 | mutex_lock(&st->lock); | |
25888dc5 | 1159 | ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1); |
574fb258 JC |
1160 | if (ret) |
1161 | goto error_ret; | |
1162 | ret = sca3000_write_reg(st, SCA3000_REG_ADDR_INT_MASK, | |
25888dc5 JC |
1163 | (st->rx[0] & |
1164 | ~(SCA3000_INT_MASK_RING_THREE_QUARTER | | |
1165 | SCA3000_INT_MASK_RING_HALF | | |
1166 | SCA3000_INT_MASK_ALL_INTS))); | |
574fb258 | 1167 | error_ret: |
25888dc5 | 1168 | mutex_unlock(&st->lock); |
574fb258 | 1169 | return ret; |
574fb258 JC |
1170 | } |
1171 | ||
447d4f29 | 1172 | static int sca3000_remove(struct spi_device *spi) |
574fb258 | 1173 | { |
83f0422d JC |
1174 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
1175 | struct sca3000_state *st = iio_priv(indio_dev); | |
67ad4e08 | 1176 | |
5262d8fd | 1177 | /* Must ensure no interrupts can be generated after this! */ |
67ad4e08 | 1178 | sca3000_stop_all_interrupts(st); |
3e2c96ea | 1179 | if (spi->irq) |
25888dc5 | 1180 | free_irq(spi->irq, indio_dev); |
d2fffd6c | 1181 | iio_device_unregister(indio_dev); |
574fb258 | 1182 | sca3000_unconfigure_ring(indio_dev); |
574fb258 | 1183 | |
574fb258 JC |
1184 | return 0; |
1185 | } | |
1186 | ||
25888dc5 JC |
1187 | static const struct spi_device_id sca3000_id[] = { |
1188 | {"sca3000_d01", d01}, | |
1189 | {"sca3000_e02", e02}, | |
1190 | {"sca3000_e04", e04}, | |
1191 | {"sca3000_e05", e05}, | |
1192 | {} | |
1193 | }; | |
55e4390c | 1194 | MODULE_DEVICE_TABLE(spi, sca3000_id); |
574fb258 | 1195 | |
25888dc5 JC |
1196 | static struct spi_driver sca3000_driver = { |
1197 | .driver = { | |
1198 | .name = "sca3000", | |
25888dc5 JC |
1199 | }, |
1200 | .probe = sca3000_probe, | |
e543acf0 | 1201 | .remove = sca3000_remove, |
25888dc5 JC |
1202 | .id_table = sca3000_id, |
1203 | }; | |
ae6ae6fe | 1204 | module_spi_driver(sca3000_driver); |
574fb258 | 1205 | |
0f8c9620 | 1206 | MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>"); |
574fb258 JC |
1207 | MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver"); |
1208 | MODULE_LICENSE("GPL v2"); |