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[mirror_ubuntu-jammy-kernel.git] / drivers / staging / iio / adc / ad799x_core.c
CommitLineData
985dbe77
MH
1/*
2 * iio/adc/ad799x.c
d22fd9c5 3 * Copyright (C) 2010-1011 Michael Hennerich, Analog Devices Inc.
985dbe77
MH
4 *
5 * based on iio/adc/max1363
6 * Copyright (C) 2008-2010 Jonathan Cameron
7 *
8 * based on linux/drivers/i2c/chips/max123x
9 * Copyright (C) 2002-2004 Stefan Eletzhofer
10 *
11 * based on linux/drivers/acron/char/pcf8583.c
12 * Copyright (C) 2000 Russell King
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 * ad799x.c
19 *
20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
21 * ad7998 and similar chips.
22 *
23 */
24
25#include <linux/interrupt.h>
985dbe77
MH
26#include <linux/device.h>
27#include <linux/kernel.h>
28#include <linux/sysfs.h>
985dbe77
MH
29#include <linux/i2c.h>
30#include <linux/regulator/consumer.h>
31#include <linux/slab.h>
32#include <linux/types.h>
33#include <linux/err.h>
99c97852 34#include <linux/module.h>
985dbe77 35
06458e27
JC
36#include <linux/iio/iio.h>
37#include <linux/iio/sysfs.h>
38#include <linux/iio/events.h>
39#include <linux/iio/buffer.h>
cdf38709 40
985dbe77
MH
41#include "ad799x.h"
42
43/*
44 * ad799x register access by I2C
45 */
46static int ad799x_i2c_read16(struct ad799x_state *st, u8 reg, u16 *data)
47{
48 struct i2c_client *client = st->client;
49 int ret = 0;
50
34244cec 51 ret = i2c_smbus_read_word_swapped(client, reg);
985dbe77
MH
52 if (ret < 0) {
53 dev_err(&client->dev, "I2C read error\n");
54 return ret;
55 }
56
34244cec 57 *data = (u16)ret;
985dbe77
MH
58
59 return 0;
60}
61
62static int ad799x_i2c_read8(struct ad799x_state *st, u8 reg, u8 *data)
63{
64 struct i2c_client *client = st->client;
65 int ret = 0;
66
aecac191 67 ret = i2c_smbus_read_byte_data(client, reg);
985dbe77
MH
68 if (ret < 0) {
69 dev_err(&client->dev, "I2C read error\n");
70 return ret;
71 }
72
aecac191 73 *data = (u8)ret;
985dbe77
MH
74
75 return 0;
76}
77
78static int ad799x_i2c_write16(struct ad799x_state *st, u8 reg, u16 data)
79{
80 struct i2c_client *client = st->client;
81 int ret = 0;
82
34244cec 83 ret = i2c_smbus_write_word_swapped(client, reg, data);
985dbe77
MH
84 if (ret < 0)
85 dev_err(&client->dev, "I2C write error\n");
86
87 return ret;
88}
89
90static int ad799x_i2c_write8(struct ad799x_state *st, u8 reg, u8 data)
91{
92 struct i2c_client *client = st->client;
93 int ret = 0;
94
95 ret = i2c_smbus_write_byte_data(client, reg, data);
96 if (ret < 0)
97 dev_err(&client->dev, "I2C write error\n");
98
99 return ret;
100}
101
ae3805c3
LPC
102static int ad7997_8_update_scan_mode(struct iio_dev *indio_dev,
103 const unsigned long *scan_mask)
985dbe77 104{
ae3805c3
LPC
105 struct ad799x_state *st = iio_priv(indio_dev);
106
d8dca330
LPC
107 kfree(st->rx_buf);
108 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
109 if (!st->rx_buf)
110 return -ENOMEM;
111
112 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
113
ae3805c3
LPC
114 switch (st->id) {
115 case ad7997:
116 case ad7998:
117 return ad799x_i2c_write16(st, AD7998_CONF_REG,
118 st->config | (*scan_mask << AD799X_CHANNEL_SHIFT));
119 default:
120 break;
121 }
122
123 return 0;
985dbe77
MH
124}
125
d22fd9c5 126static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
985dbe77 127{
d22fd9c5
MH
128 u16 rxbuf;
129 u8 cmd;
985dbe77
MH
130 int ret;
131
d22fd9c5
MH
132 switch (st->id) {
133 case ad7991:
134 case ad7995:
135 case ad7999:
136 cmd = st->config | ((1 << ch) << AD799X_CHANNEL_SHIFT);
137 break;
138 case ad7992:
139 case ad7993:
140 case ad7994:
141 cmd = (1 << ch) << AD799X_CHANNEL_SHIFT;
142 break;
143 case ad7997:
144 case ad7998:
145 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
146 break;
147 default:
148 return -EINVAL;
985dbe77
MH
149 }
150
d22fd9c5
MH
151 ret = ad799x_i2c_read16(st, cmd, &rxbuf);
152 if (ret < 0)
153 return ret;
154
155 return rxbuf;
985dbe77
MH
156}
157
84f79ecb 158static int ad799x_read_raw(struct iio_dev *indio_dev,
d22fd9c5
MH
159 struct iio_chan_spec const *chan,
160 int *val,
161 int *val2,
162 long m)
985dbe77 163{
d22fd9c5 164 int ret;
84f79ecb 165 struct ad799x_state *st = iio_priv(indio_dev);
d22fd9c5
MH
166
167 switch (m) {
b11f98ff 168 case IIO_CHAN_INFO_RAW:
84f79ecb
JC
169 mutex_lock(&indio_dev->mlock);
170 if (iio_buffer_enabled(indio_dev))
729bbf54 171 ret = -EBUSY;
d22fd9c5 172 else
58dffaed 173 ret = ad799x_scan_direct(st, chan->scan_index);
84f79ecb 174 mutex_unlock(&indio_dev->mlock);
985dbe77 175
985dbe77 176 if (ret < 0)
d22fd9c5 177 return ret;
5357ba3d
JC
178 *val = (ret >> chan->scan_type.shift) &
179 RES_MASK(chan->scan_type.realbits);
d22fd9c5 180 return IIO_VAL_INT;
c8a9f805 181 case IIO_CHAN_INFO_SCALE:
b740f48a
LPC
182 *val = st->int_vref_mv;
183 *val2 = chan->scan_type.realbits;
184 return IIO_VAL_FRACTIONAL_LOG2;
985dbe77 185 }
d22fd9c5 186 return -EINVAL;
985dbe77 187}
24cba406
JC
188static const unsigned int ad7998_frequencies[] = {
189 [AD7998_CYC_DIS] = 0,
190 [AD7998_CYC_TCONF_32] = 15625,
191 [AD7998_CYC_TCONF_64] = 7812,
192 [AD7998_CYC_TCONF_128] = 3906,
193 [AD7998_CYC_TCONF_512] = 976,
194 [AD7998_CYC_TCONF_1024] = 488,
195 [AD7998_CYC_TCONF_2048] = 244,
196};
985dbe77
MH
197static ssize_t ad799x_read_frequency(struct device *dev,
198 struct device_attribute *attr,
199 char *buf)
200{
62c51839 201 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
84f79ecb 202 struct ad799x_state *st = iio_priv(indio_dev);
985dbe77 203
24cba406 204 int ret;
985dbe77
MH
205 u8 val;
206 ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &val);
207 if (ret)
208 return ret;
209
210 val &= AD7998_CYC_MASK;
211
24cba406 212 return sprintf(buf, "%u\n", ad7998_frequencies[val]);
985dbe77
MH
213}
214
215static ssize_t ad799x_write_frequency(struct device *dev,
216 struct device_attribute *attr,
217 const char *buf,
218 size_t len)
219{
62c51839 220 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
84f79ecb 221 struct ad799x_state *st = iio_priv(indio_dev);
985dbe77
MH
222
223 long val;
24cba406 224 int ret, i;
985dbe77
MH
225 u8 t;
226
f86f8362 227 ret = kstrtol(buf, 10, &val);
985dbe77
MH
228 if (ret)
229 return ret;
230
84f79ecb 231 mutex_lock(&indio_dev->mlock);
985dbe77
MH
232 ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &t);
233 if (ret)
234 goto error_ret_mutex;
235 /* Wipe the bits clean */
236 t &= ~AD7998_CYC_MASK;
237
24cba406
JC
238 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
239 if (val == ad7998_frequencies[i])
240 break;
241 if (i == ARRAY_SIZE(ad7998_frequencies)) {
985dbe77
MH
242 ret = -EINVAL;
243 goto error_ret_mutex;
244 }
24cba406 245 t |= i;
985dbe77
MH
246 ret = ad799x_i2c_write8(st, AD7998_CYCLE_TMR_REG, t);
247
248error_ret_mutex:
84f79ecb 249 mutex_unlock(&indio_dev->mlock);
985dbe77
MH
250
251 return ret ? ret : len;
252}
253
84f79ecb 254static int ad799x_read_event_config(struct iio_dev *indio_dev,
5b9e048a
LPC
255 const struct iio_chan_spec *chan,
256 enum iio_event_type type,
257 enum iio_event_direction dir)
231c5c3b
JC
258{
259 return 1;
260}
261
ba1d7961
LPC
262static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
263 enum iio_event_direction dir,
264 enum iio_event_info info)
69582b88 265{
ba1d7961
LPC
266 switch (info) {
267 case IIO_EV_INFO_VALUE:
268 if (dir == IIO_EV_DIR_FALLING)
269 return AD7998_DATALOW_REG(chan->channel);
270 else
271 return AD7998_DATAHIGH_REG(chan->channel);
272 case IIO_EV_INFO_HYSTERESIS:
273 return AD7998_HYST_REG(chan->channel);
274 default:
275 return -EINVAL;
276 }
277
278 return 0;
69582b88 279}
231c5c3b
JC
280
281static int ad799x_write_event_value(struct iio_dev *indio_dev,
5b9e048a
LPC
282 const struct iio_chan_spec *chan,
283 enum iio_event_type type,
284 enum iio_event_direction dir,
285 enum iio_event_info info,
286 int val, int val2)
231c5c3b
JC
287{
288 int ret;
289 struct ad799x_state *st = iio_priv(indio_dev);
231c5c3b
JC
290
291 mutex_lock(&indio_dev->mlock);
ba1d7961
LPC
292 ret = ad799x_i2c_write16(st, ad799x_threshold_reg(chan, dir, info),
293 val);
231c5c3b
JC
294 mutex_unlock(&indio_dev->mlock);
295
296 return ret;
297}
298
299static int ad799x_read_event_value(struct iio_dev *indio_dev,
5b9e048a
LPC
300 const struct iio_chan_spec *chan,
301 enum iio_event_type type,
302 enum iio_event_direction dir,
303 enum iio_event_info info,
304 int *val, int *val2)
231c5c3b
JC
305{
306 int ret;
307 struct ad799x_state *st = iio_priv(indio_dev);
231c5c3b
JC
308 u16 valin;
309
310 mutex_lock(&indio_dev->mlock);
ba1d7961
LPC
311 ret = ad799x_i2c_read16(st, ad799x_threshold_reg(chan, dir, info),
312 &valin);
231c5c3b
JC
313 mutex_unlock(&indio_dev->mlock);
314 if (ret < 0)
315 return ret;
316 *val = valin;
317
5b9e048a 318 return IIO_VAL_INT;
231c5c3b
JC
319}
320
72148f6e 321static irqreturn_t ad799x_event_handler(int irq, void *private)
985dbe77 322{
72148f6e 323 struct iio_dev *indio_dev = private;
d8aea29b 324 struct ad799x_state *st = iio_priv(private);
985dbe77 325 u8 status;
72148f6e 326 int i, ret;
985dbe77 327
72148f6e
JC
328 ret = ad799x_i2c_read8(st, AD7998_ALERT_STAT_REG, &status);
329 if (ret)
f654a7e2 330 goto done;
985dbe77
MH
331
332 if (!status)
f654a7e2 333 goto done;
985dbe77
MH
334
335 ad799x_i2c_write8(st, AD7998_ALERT_STAT_REG, AD7998_ALERT_STAT_CLEAR);
336
337 for (i = 0; i < 8; i++) {
338 if (status & (1 << i))
5aa96188 339 iio_push_event(indio_dev,
72148f6e 340 i & 0x1 ?
6835cb6b 341 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
cdf38709
JC
342 (i >> 1),
343 IIO_EV_TYPE_THRESH,
344 IIO_EV_DIR_RISING) :
6835cb6b 345 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
cdf38709
JC
346 (i >> 1),
347 IIO_EV_TYPE_THRESH,
348 IIO_EV_DIR_FALLING),
72148f6e 349 iio_get_time_ns());
985dbe77
MH
350 }
351
f654a7e2 352done:
72148f6e 353 return IRQ_HANDLED;
985dbe77
MH
354}
355
985dbe77
MH
356static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
357 ad799x_read_frequency,
358 ad799x_write_frequency);
359static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
360
ba1d7961 361static struct attribute *ad799x_event_attributes[] = {
985dbe77
MH
362 &iio_dev_attr_sampling_frequency.dev_attr.attr,
363 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
364 NULL,
365};
366
ba1d7961
LPC
367static struct attribute_group ad799x_event_attrs_group = {
368 .attrs = ad799x_event_attributes,
8e7d9672 369 .name = "events",
985dbe77
MH
370};
371
6fe8135f
JC
372static const struct iio_info ad7991_info = {
373 .read_raw = &ad799x_read_raw,
374 .driver_module = THIS_MODULE,
375};
376
6fe8135f
JC
377static const struct iio_info ad7993_4_7_8_info = {
378 .read_raw = &ad799x_read_raw,
ba1d7961 379 .event_attrs = &ad799x_event_attrs_group,
cb955852
LPC
380 .read_event_config = &ad799x_read_event_config,
381 .read_event_value = &ad799x_read_event_value,
382 .write_event_value = &ad799x_write_event_value,
6fe8135f 383 .driver_module = THIS_MODULE,
ae3805c3 384 .update_scan_mode = ad7997_8_update_scan_mode,
6fe8135f
JC
385};
386
5b9e048a
LPC
387static const struct iio_event_spec ad799x_events[] = {
388 {
389 .type = IIO_EV_TYPE_THRESH,
390 .dir = IIO_EV_DIR_RISING,
391 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
392 BIT(IIO_EV_INFO_ENABLE),
393 }, {
394 .type = IIO_EV_TYPE_THRESH,
395 .dir = IIO_EV_DIR_FALLING,
d180371d 396 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
5b9e048a 397 BIT(IIO_EV_INFO_ENABLE),
ba1d7961
LPC
398 }, {
399 .type = IIO_EV_TYPE_THRESH,
400 .dir = IIO_EV_DIR_EITHER,
401 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
5b9e048a
LPC
402 },
403};
231c5c3b 404
5b9e048a 405#define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
ae6d6489
LPC
406 .type = IIO_VOLTAGE, \
407 .indexed = 1, \
408 .channel = (_index), \
409 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
d00698df 410 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
ae6d6489 411 .scan_index = (_index), \
83d5f324
JC
412 .scan_type = { \
413 .sign = 'u', \
414 .realbits = (_realbits), \
415 .storagebits = 16, \
416 .shift = 12 - (_realbits), \
417 .endianness = IIO_BE, \
418 }, \
5b9e048a
LPC
419 .event_spec = _ev_spec, \
420 .num_event_specs = _num_ev_spec, \
ae6d6489
LPC
421}
422
5b9e048a
LPC
423#define AD799X_CHANNEL(_index, _realbits) \
424 _AD799X_CHANNEL(_index, _realbits, NULL, 0)
425
426#define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
427 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
428 ARRAY_SIZE(ad799x_events))
429
985dbe77
MH
430static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
431 [ad7991] = {
7c626f58 432 .channel = {
5b9e048a
LPC
433 AD799X_CHANNEL(0, 12),
434 AD799X_CHANNEL(1, 12),
435 AD799X_CHANNEL(2, 12),
436 AD799X_CHANNEL(3, 12),
ae6d6489 437 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 438 },
d22fd9c5 439 .num_channels = 5,
6fe8135f 440 .info = &ad7991_info,
985dbe77
MH
441 },
442 [ad7995] = {
7c626f58 443 .channel = {
5b9e048a
LPC
444 AD799X_CHANNEL(0, 10),
445 AD799X_CHANNEL(1, 10),
446 AD799X_CHANNEL(2, 10),
447 AD799X_CHANNEL(3, 10),
ae6d6489 448 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 449 },
d22fd9c5 450 .num_channels = 5,
6fe8135f 451 .info = &ad7991_info,
985dbe77
MH
452 },
453 [ad7999] = {
7c626f58 454 .channel = {
5b9e048a
LPC
455 AD799X_CHANNEL(0, 8),
456 AD799X_CHANNEL(1, 8),
457 AD799X_CHANNEL(2, 8),
458 AD799X_CHANNEL(3, 8),
ae6d6489 459 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 460 },
d22fd9c5 461 .num_channels = 5,
6fe8135f 462 .info = &ad7991_info,
985dbe77
MH
463 },
464 [ad7992] = {
7c626f58 465 .channel = {
5b9e048a
LPC
466 AD799X_CHANNEL_WITH_EVENTS(0, 12),
467 AD799X_CHANNEL_WITH_EVENTS(1, 12),
ae6d6489 468 IIO_CHAN_SOFT_TIMESTAMP(3),
7c626f58 469 },
d22fd9c5 470 .num_channels = 3,
985dbe77 471 .default_config = AD7998_ALERT_EN,
ba1d7961 472 .info = &ad7993_4_7_8_info,
985dbe77
MH
473 },
474 [ad7993] = {
7c626f58 475 .channel = {
5b9e048a
LPC
476 AD799X_CHANNEL_WITH_EVENTS(0, 10),
477 AD799X_CHANNEL_WITH_EVENTS(1, 10),
478 AD799X_CHANNEL_WITH_EVENTS(2, 10),
479 AD799X_CHANNEL_WITH_EVENTS(3, 10),
ae6d6489 480 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 481 },
d22fd9c5 482 .num_channels = 5,
985dbe77 483 .default_config = AD7998_ALERT_EN,
6fe8135f 484 .info = &ad7993_4_7_8_info,
985dbe77
MH
485 },
486 [ad7994] = {
7c626f58 487 .channel = {
5b9e048a
LPC
488 AD799X_CHANNEL_WITH_EVENTS(0, 12),
489 AD799X_CHANNEL_WITH_EVENTS(1, 12),
490 AD799X_CHANNEL_WITH_EVENTS(2, 12),
491 AD799X_CHANNEL_WITH_EVENTS(3, 12),
ae6d6489 492 IIO_CHAN_SOFT_TIMESTAMP(4),
7c626f58 493 },
d22fd9c5 494 .num_channels = 5,
985dbe77 495 .default_config = AD7998_ALERT_EN,
6fe8135f 496 .info = &ad7993_4_7_8_info,
985dbe77
MH
497 },
498 [ad7997] = {
7c626f58 499 .channel = {
5b9e048a
LPC
500 AD799X_CHANNEL_WITH_EVENTS(0, 10),
501 AD799X_CHANNEL_WITH_EVENTS(1, 10),
502 AD799X_CHANNEL_WITH_EVENTS(2, 10),
503 AD799X_CHANNEL_WITH_EVENTS(3, 10),
504 AD799X_CHANNEL(4, 10),
505 AD799X_CHANNEL(5, 10),
506 AD799X_CHANNEL(6, 10),
507 AD799X_CHANNEL(7, 10),
ae6d6489 508 IIO_CHAN_SOFT_TIMESTAMP(8),
7c626f58 509 },
d22fd9c5 510 .num_channels = 9,
985dbe77 511 .default_config = AD7998_ALERT_EN,
6fe8135f 512 .info = &ad7993_4_7_8_info,
985dbe77
MH
513 },
514 [ad7998] = {
7c626f58 515 .channel = {
5b9e048a
LPC
516 AD799X_CHANNEL_WITH_EVENTS(0, 12),
517 AD799X_CHANNEL_WITH_EVENTS(1, 12),
518 AD799X_CHANNEL_WITH_EVENTS(2, 12),
519 AD799X_CHANNEL_WITH_EVENTS(3, 12),
520 AD799X_CHANNEL(4, 12),
521 AD799X_CHANNEL(5, 12),
522 AD799X_CHANNEL(6, 12),
523 AD799X_CHANNEL(7, 12),
ae6d6489 524 IIO_CHAN_SOFT_TIMESTAMP(8),
7c626f58 525 },
d22fd9c5 526 .num_channels = 9,
985dbe77 527 .default_config = AD7998_ALERT_EN,
6fe8135f 528 .info = &ad7993_4_7_8_info,
985dbe77
MH
529 },
530};
531
4ae1c61f 532static int ad799x_probe(struct i2c_client *client,
985dbe77
MH
533 const struct i2c_device_id *id)
534{
26d25ae3 535 int ret;
985dbe77 536 struct ad799x_platform_data *pdata = client->dev.platform_data;
1bf7ac76 537 struct ad799x_state *st;
6a88fa48 538 struct iio_dev *indio_dev;
1bf7ac76 539
6a88fa48 540 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
1bf7ac76
MH
541 if (indio_dev == NULL)
542 return -ENOMEM;
985dbe77 543
1bf7ac76 544 st = iio_priv(indio_dev);
985dbe77 545 /* this is only used for device removal purposes */
1bf7ac76 546 i2c_set_clientdata(client, indio_dev);
985dbe77 547
985dbe77
MH
548 st->id = id->driver_data;
549 st->chip_info = &ad799x_chip_info_tbl[st->id];
550 st->config = st->chip_info->default_config;
551
552 /* TODO: Add pdata options for filtering and bit delay */
553
8c7e8627
LPC
554 if (!pdata)
555 return -EINVAL;
556
557 st->int_vref_mv = pdata->vref_mv;
985dbe77 558
6a88fa48 559 st->reg = devm_regulator_get(&client->dev, "vcc");
985dbe77
MH
560 if (!IS_ERR(st->reg)) {
561 ret = regulator_enable(st->reg);
562 if (ret)
6a88fa48 563 return ret;
985dbe77
MH
564 }
565 st->client = client;
566
1bf7ac76
MH
567 indio_dev->dev.parent = &client->dev;
568 indio_dev->name = id->name;
6fe8135f 569 indio_dev->info = st->chip_info->info;
6fe8135f 570
1bf7ac76 571 indio_dev->modes = INDIO_DIRECT_MODE;
1bf7ac76
MH
572 indio_dev->channels = st->chip_info->channel;
573 indio_dev->num_channels = st->chip_info->num_channels;
1bf7ac76
MH
574
575 ret = ad799x_register_ring_funcs_and_init(indio_dev);
985dbe77 576 if (ret)
1bf7ac76 577 goto error_disable_reg;
985dbe77 578
6fe8135f 579 if (client->irq > 0) {
72148f6e
JC
580 ret = request_threaded_irq(client->irq,
581 NULL,
582 ad799x_event_handler,
583 IRQF_TRIGGER_FALLING |
584 IRQF_ONESHOT,
585 client->name,
1bf7ac76 586 indio_dev);
985dbe77
MH
587 if (ret)
588 goto error_cleanup_ring;
985dbe77 589 }
26d25ae3
JC
590 ret = iio_device_register(indio_dev);
591 if (ret)
592 goto error_free_irq;
985dbe77
MH
593
594 return 0;
1bf7ac76 595
26d25ae3 596error_free_irq:
38408d05
HK
597 if (client->irq > 0)
598 free_irq(client->irq, indio_dev);
985dbe77 599error_cleanup_ring:
1bf7ac76 600 ad799x_ring_cleanup(indio_dev);
985dbe77
MH
601error_disable_reg:
602 if (!IS_ERR(st->reg))
603 regulator_disable(st->reg);
1bf7ac76 604
985dbe77
MH
605 return ret;
606}
607
447d4f29 608static int ad799x_remove(struct i2c_client *client)
985dbe77 609{
1bf7ac76
MH
610 struct iio_dev *indio_dev = i2c_get_clientdata(client);
611 struct ad799x_state *st = iio_priv(indio_dev);
985dbe77 612
d2fffd6c 613 iio_device_unregister(indio_dev);
6fe8135f 614 if (client->irq > 0)
72148f6e 615 free_irq(client->irq, indio_dev);
985dbe77 616
985dbe77 617 ad799x_ring_cleanup(indio_dev);
6a88fa48 618 if (!IS_ERR(st->reg))
985dbe77 619 regulator_disable(st->reg);
d8dca330 620 kfree(st->rx_buf);
985dbe77
MH
621
622 return 0;
623}
624
625static const struct i2c_device_id ad799x_id[] = {
626 { "ad7991", ad7991 },
627 { "ad7995", ad7995 },
628 { "ad7999", ad7999 },
629 { "ad7992", ad7992 },
630 { "ad7993", ad7993 },
631 { "ad7994", ad7994 },
632 { "ad7997", ad7997 },
633 { "ad7998", ad7998 },
634 {}
635};
636
637MODULE_DEVICE_TABLE(i2c, ad799x_id);
638
639static struct i2c_driver ad799x_driver = {
640 .driver = {
641 .name = "ad799x",
642 },
643 .probe = ad799x_probe,
e543acf0 644 .remove = ad799x_remove,
985dbe77
MH
645 .id_table = ad799x_id,
646};
6e5af184 647module_i2c_driver(ad799x_driver);
985dbe77
MH
648
649MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
650MODULE_DESCRIPTION("Analog Devices AD799x ADC");
651MODULE_LICENSE("GPL v2");