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Commit | Line | Data |
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985dbe77 MH |
1 | /* |
2 | * iio/adc/ad799x.c | |
d22fd9c5 | 3 | * Copyright (C) 2010-1011 Michael Hennerich, Analog Devices Inc. |
985dbe77 MH |
4 | * |
5 | * based on iio/adc/max1363 | |
6 | * Copyright (C) 2008-2010 Jonathan Cameron | |
7 | * | |
8 | * based on linux/drivers/i2c/chips/max123x | |
9 | * Copyright (C) 2002-2004 Stefan Eletzhofer | |
10 | * | |
11 | * based on linux/drivers/acron/char/pcf8583.c | |
12 | * Copyright (C) 2000 Russell King | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | * | |
18 | * ad799x.c | |
19 | * | |
20 | * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997, | |
21 | * ad7998 and similar chips. | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/interrupt.h> | |
985dbe77 MH |
26 | #include <linux/device.h> |
27 | #include <linux/kernel.h> | |
28 | #include <linux/sysfs.h> | |
985dbe77 MH |
29 | #include <linux/i2c.h> |
30 | #include <linux/regulator/consumer.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/types.h> | |
33 | #include <linux/err.h> | |
99c97852 | 34 | #include <linux/module.h> |
985dbe77 | 35 | |
06458e27 JC |
36 | #include <linux/iio/iio.h> |
37 | #include <linux/iio/sysfs.h> | |
38 | #include <linux/iio/events.h> | |
39 | #include <linux/iio/buffer.h> | |
cdf38709 | 40 | |
985dbe77 MH |
41 | #include "ad799x.h" |
42 | ||
43 | /* | |
44 | * ad799x register access by I2C | |
45 | */ | |
46 | static int ad799x_i2c_read16(struct ad799x_state *st, u8 reg, u16 *data) | |
47 | { | |
48 | struct i2c_client *client = st->client; | |
49 | int ret = 0; | |
50 | ||
34244cec | 51 | ret = i2c_smbus_read_word_swapped(client, reg); |
985dbe77 MH |
52 | if (ret < 0) { |
53 | dev_err(&client->dev, "I2C read error\n"); | |
54 | return ret; | |
55 | } | |
56 | ||
34244cec | 57 | *data = (u16)ret; |
985dbe77 MH |
58 | |
59 | return 0; | |
60 | } | |
61 | ||
62 | static int ad799x_i2c_read8(struct ad799x_state *st, u8 reg, u8 *data) | |
63 | { | |
64 | struct i2c_client *client = st->client; | |
65 | int ret = 0; | |
66 | ||
aecac191 | 67 | ret = i2c_smbus_read_byte_data(client, reg); |
985dbe77 MH |
68 | if (ret < 0) { |
69 | dev_err(&client->dev, "I2C read error\n"); | |
70 | return ret; | |
71 | } | |
72 | ||
aecac191 | 73 | *data = (u8)ret; |
985dbe77 MH |
74 | |
75 | return 0; | |
76 | } | |
77 | ||
78 | static int ad799x_i2c_write16(struct ad799x_state *st, u8 reg, u16 data) | |
79 | { | |
80 | struct i2c_client *client = st->client; | |
81 | int ret = 0; | |
82 | ||
34244cec | 83 | ret = i2c_smbus_write_word_swapped(client, reg, data); |
985dbe77 MH |
84 | if (ret < 0) |
85 | dev_err(&client->dev, "I2C write error\n"); | |
86 | ||
87 | return ret; | |
88 | } | |
89 | ||
90 | static int ad799x_i2c_write8(struct ad799x_state *st, u8 reg, u8 data) | |
91 | { | |
92 | struct i2c_client *client = st->client; | |
93 | int ret = 0; | |
94 | ||
95 | ret = i2c_smbus_write_byte_data(client, reg, data); | |
96 | if (ret < 0) | |
97 | dev_err(&client->dev, "I2C write error\n"); | |
98 | ||
99 | return ret; | |
100 | } | |
101 | ||
ae3805c3 LPC |
102 | static int ad7997_8_update_scan_mode(struct iio_dev *indio_dev, |
103 | const unsigned long *scan_mask) | |
985dbe77 | 104 | { |
ae3805c3 LPC |
105 | struct ad799x_state *st = iio_priv(indio_dev); |
106 | ||
d8dca330 LPC |
107 | kfree(st->rx_buf); |
108 | st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL); | |
109 | if (!st->rx_buf) | |
110 | return -ENOMEM; | |
111 | ||
112 | st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2; | |
113 | ||
ae3805c3 LPC |
114 | switch (st->id) { |
115 | case ad7997: | |
116 | case ad7998: | |
117 | return ad799x_i2c_write16(st, AD7998_CONF_REG, | |
118 | st->config | (*scan_mask << AD799X_CHANNEL_SHIFT)); | |
119 | default: | |
120 | break; | |
121 | } | |
122 | ||
123 | return 0; | |
985dbe77 MH |
124 | } |
125 | ||
d22fd9c5 | 126 | static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch) |
985dbe77 | 127 | { |
d22fd9c5 MH |
128 | u16 rxbuf; |
129 | u8 cmd; | |
985dbe77 MH |
130 | int ret; |
131 | ||
d22fd9c5 MH |
132 | switch (st->id) { |
133 | case ad7991: | |
134 | case ad7995: | |
135 | case ad7999: | |
136 | cmd = st->config | ((1 << ch) << AD799X_CHANNEL_SHIFT); | |
137 | break; | |
138 | case ad7992: | |
139 | case ad7993: | |
140 | case ad7994: | |
141 | cmd = (1 << ch) << AD799X_CHANNEL_SHIFT; | |
142 | break; | |
143 | case ad7997: | |
144 | case ad7998: | |
145 | cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE; | |
146 | break; | |
147 | default: | |
148 | return -EINVAL; | |
985dbe77 MH |
149 | } |
150 | ||
d22fd9c5 MH |
151 | ret = ad799x_i2c_read16(st, cmd, &rxbuf); |
152 | if (ret < 0) | |
153 | return ret; | |
154 | ||
155 | return rxbuf; | |
985dbe77 MH |
156 | } |
157 | ||
84f79ecb | 158 | static int ad799x_read_raw(struct iio_dev *indio_dev, |
d22fd9c5 MH |
159 | struct iio_chan_spec const *chan, |
160 | int *val, | |
161 | int *val2, | |
162 | long m) | |
985dbe77 | 163 | { |
d22fd9c5 | 164 | int ret; |
84f79ecb | 165 | struct ad799x_state *st = iio_priv(indio_dev); |
d22fd9c5 MH |
166 | |
167 | switch (m) { | |
b11f98ff | 168 | case IIO_CHAN_INFO_RAW: |
84f79ecb JC |
169 | mutex_lock(&indio_dev->mlock); |
170 | if (iio_buffer_enabled(indio_dev)) | |
729bbf54 | 171 | ret = -EBUSY; |
d22fd9c5 | 172 | else |
58dffaed | 173 | ret = ad799x_scan_direct(st, chan->scan_index); |
84f79ecb | 174 | mutex_unlock(&indio_dev->mlock); |
985dbe77 | 175 | |
985dbe77 | 176 | if (ret < 0) |
d22fd9c5 | 177 | return ret; |
5357ba3d JC |
178 | *val = (ret >> chan->scan_type.shift) & |
179 | RES_MASK(chan->scan_type.realbits); | |
d22fd9c5 | 180 | return IIO_VAL_INT; |
c8a9f805 | 181 | case IIO_CHAN_INFO_SCALE: |
b740f48a LPC |
182 | *val = st->int_vref_mv; |
183 | *val2 = chan->scan_type.realbits; | |
184 | return IIO_VAL_FRACTIONAL_LOG2; | |
985dbe77 | 185 | } |
d22fd9c5 | 186 | return -EINVAL; |
985dbe77 | 187 | } |
24cba406 JC |
188 | static const unsigned int ad7998_frequencies[] = { |
189 | [AD7998_CYC_DIS] = 0, | |
190 | [AD7998_CYC_TCONF_32] = 15625, | |
191 | [AD7998_CYC_TCONF_64] = 7812, | |
192 | [AD7998_CYC_TCONF_128] = 3906, | |
193 | [AD7998_CYC_TCONF_512] = 976, | |
194 | [AD7998_CYC_TCONF_1024] = 488, | |
195 | [AD7998_CYC_TCONF_2048] = 244, | |
196 | }; | |
985dbe77 MH |
197 | static ssize_t ad799x_read_frequency(struct device *dev, |
198 | struct device_attribute *attr, | |
199 | char *buf) | |
200 | { | |
62c51839 | 201 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
84f79ecb | 202 | struct ad799x_state *st = iio_priv(indio_dev); |
985dbe77 | 203 | |
24cba406 | 204 | int ret; |
985dbe77 MH |
205 | u8 val; |
206 | ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &val); | |
207 | if (ret) | |
208 | return ret; | |
209 | ||
210 | val &= AD7998_CYC_MASK; | |
211 | ||
24cba406 | 212 | return sprintf(buf, "%u\n", ad7998_frequencies[val]); |
985dbe77 MH |
213 | } |
214 | ||
215 | static ssize_t ad799x_write_frequency(struct device *dev, | |
216 | struct device_attribute *attr, | |
217 | const char *buf, | |
218 | size_t len) | |
219 | { | |
62c51839 | 220 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
84f79ecb | 221 | struct ad799x_state *st = iio_priv(indio_dev); |
985dbe77 MH |
222 | |
223 | long val; | |
24cba406 | 224 | int ret, i; |
985dbe77 MH |
225 | u8 t; |
226 | ||
f86f8362 | 227 | ret = kstrtol(buf, 10, &val); |
985dbe77 MH |
228 | if (ret) |
229 | return ret; | |
230 | ||
84f79ecb | 231 | mutex_lock(&indio_dev->mlock); |
985dbe77 MH |
232 | ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &t); |
233 | if (ret) | |
234 | goto error_ret_mutex; | |
235 | /* Wipe the bits clean */ | |
236 | t &= ~AD7998_CYC_MASK; | |
237 | ||
24cba406 JC |
238 | for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++) |
239 | if (val == ad7998_frequencies[i]) | |
240 | break; | |
241 | if (i == ARRAY_SIZE(ad7998_frequencies)) { | |
985dbe77 MH |
242 | ret = -EINVAL; |
243 | goto error_ret_mutex; | |
244 | } | |
24cba406 | 245 | t |= i; |
985dbe77 MH |
246 | ret = ad799x_i2c_write8(st, AD7998_CYCLE_TMR_REG, t); |
247 | ||
248 | error_ret_mutex: | |
84f79ecb | 249 | mutex_unlock(&indio_dev->mlock); |
985dbe77 MH |
250 | |
251 | return ret ? ret : len; | |
252 | } | |
253 | ||
84f79ecb | 254 | static int ad799x_read_event_config(struct iio_dev *indio_dev, |
5b9e048a LPC |
255 | const struct iio_chan_spec *chan, |
256 | enum iio_event_type type, | |
257 | enum iio_event_direction dir) | |
231c5c3b JC |
258 | { |
259 | return 1; | |
260 | } | |
261 | ||
262 | static const u8 ad799x_threshold_addresses[][2] = { | |
263 | { AD7998_DATALOW_CH1_REG, AD7998_DATAHIGH_CH1_REG }, | |
264 | { AD7998_DATALOW_CH2_REG, AD7998_DATAHIGH_CH2_REG }, | |
265 | { AD7998_DATALOW_CH3_REG, AD7998_DATAHIGH_CH3_REG }, | |
266 | { AD7998_DATALOW_CH4_REG, AD7998_DATAHIGH_CH4_REG }, | |
267 | }; | |
268 | ||
269 | static int ad799x_write_event_value(struct iio_dev *indio_dev, | |
5b9e048a LPC |
270 | const struct iio_chan_spec *chan, |
271 | enum iio_event_type type, | |
272 | enum iio_event_direction dir, | |
273 | enum iio_event_info info, | |
274 | int val, int val2) | |
231c5c3b JC |
275 | { |
276 | int ret; | |
277 | struct ad799x_state *st = iio_priv(indio_dev); | |
5b9e048a LPC |
278 | int direction = dir == IIO_EV_DIR_FALLING; |
279 | int number = chan->channel; | |
231c5c3b JC |
280 | |
281 | mutex_lock(&indio_dev->mlock); | |
282 | ret = ad799x_i2c_write16(st, | |
283 | ad799x_threshold_addresses[number][direction], | |
284 | val); | |
285 | mutex_unlock(&indio_dev->mlock); | |
286 | ||
287 | return ret; | |
288 | } | |
289 | ||
290 | static int ad799x_read_event_value(struct iio_dev *indio_dev, | |
5b9e048a LPC |
291 | const struct iio_chan_spec *chan, |
292 | enum iio_event_type type, | |
293 | enum iio_event_direction dir, | |
294 | enum iio_event_info info, | |
295 | int *val, int *val2) | |
231c5c3b JC |
296 | { |
297 | int ret; | |
298 | struct ad799x_state *st = iio_priv(indio_dev); | |
5b9e048a LPC |
299 | int direction = dir == IIO_EV_DIR_FALLING; |
300 | int number = chan->channel; | |
231c5c3b JC |
301 | u16 valin; |
302 | ||
303 | mutex_lock(&indio_dev->mlock); | |
304 | ret = ad799x_i2c_read16(st, | |
305 | ad799x_threshold_addresses[number][direction], | |
306 | &valin); | |
307 | mutex_unlock(&indio_dev->mlock); | |
308 | if (ret < 0) | |
309 | return ret; | |
310 | *val = valin; | |
311 | ||
5b9e048a | 312 | return IIO_VAL_INT; |
231c5c3b JC |
313 | } |
314 | ||
985dbe77 MH |
315 | static ssize_t ad799x_read_channel_config(struct device *dev, |
316 | struct device_attribute *attr, | |
317 | char *buf) | |
318 | { | |
62c51839 | 319 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
84f79ecb | 320 | struct ad799x_state *st = iio_priv(indio_dev); |
72148f6e | 321 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
985dbe77 MH |
322 | |
323 | int ret; | |
324 | u16 val; | |
72148f6e | 325 | ret = ad799x_i2c_read16(st, this_attr->address, &val); |
985dbe77 MH |
326 | if (ret) |
327 | return ret; | |
328 | ||
329 | return sprintf(buf, "%d\n", val); | |
330 | } | |
331 | ||
332 | static ssize_t ad799x_write_channel_config(struct device *dev, | |
333 | struct device_attribute *attr, | |
334 | const char *buf, | |
335 | size_t len) | |
336 | { | |
62c51839 | 337 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
84f79ecb | 338 | struct ad799x_state *st = iio_priv(indio_dev); |
72148f6e | 339 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
985dbe77 MH |
340 | |
341 | long val; | |
342 | int ret; | |
343 | ||
f86f8362 | 344 | ret = kstrtol(buf, 10, &val); |
985dbe77 MH |
345 | if (ret) |
346 | return ret; | |
347 | ||
84f79ecb | 348 | mutex_lock(&indio_dev->mlock); |
72148f6e | 349 | ret = ad799x_i2c_write16(st, this_attr->address, val); |
84f79ecb | 350 | mutex_unlock(&indio_dev->mlock); |
985dbe77 MH |
351 | |
352 | return ret ? ret : len; | |
353 | } | |
354 | ||
72148f6e | 355 | static irqreturn_t ad799x_event_handler(int irq, void *private) |
985dbe77 | 356 | { |
72148f6e | 357 | struct iio_dev *indio_dev = private; |
d8aea29b | 358 | struct ad799x_state *st = iio_priv(private); |
985dbe77 | 359 | u8 status; |
72148f6e | 360 | int i, ret; |
985dbe77 | 361 | |
72148f6e JC |
362 | ret = ad799x_i2c_read8(st, AD7998_ALERT_STAT_REG, &status); |
363 | if (ret) | |
f654a7e2 | 364 | goto done; |
985dbe77 MH |
365 | |
366 | if (!status) | |
f654a7e2 | 367 | goto done; |
985dbe77 MH |
368 | |
369 | ad799x_i2c_write8(st, AD7998_ALERT_STAT_REG, AD7998_ALERT_STAT_CLEAR); | |
370 | ||
371 | for (i = 0; i < 8; i++) { | |
372 | if (status & (1 << i)) | |
5aa96188 | 373 | iio_push_event(indio_dev, |
72148f6e | 374 | i & 0x1 ? |
6835cb6b | 375 | IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, |
cdf38709 JC |
376 | (i >> 1), |
377 | IIO_EV_TYPE_THRESH, | |
378 | IIO_EV_DIR_RISING) : | |
6835cb6b | 379 | IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, |
cdf38709 JC |
380 | (i >> 1), |
381 | IIO_EV_TYPE_THRESH, | |
382 | IIO_EV_DIR_FALLING), | |
72148f6e | 383 | iio_get_time_ns()); |
985dbe77 MH |
384 | } |
385 | ||
f654a7e2 | 386 | done: |
72148f6e | 387 | return IRQ_HANDLED; |
985dbe77 MH |
388 | } |
389 | ||
322c9563 | 390 | static IIO_DEVICE_ATTR(in_voltage0_thresh_both_hyst_raw, |
72148f6e JC |
391 | S_IRUGO | S_IWUSR, |
392 | ad799x_read_channel_config, | |
393 | ad799x_write_channel_config, | |
394 | AD7998_HYST_CH1_REG); | |
395 | ||
322c9563 | 396 | static IIO_DEVICE_ATTR(in_voltage1_thresh_both_hyst_raw, |
72148f6e JC |
397 | S_IRUGO | S_IWUSR, |
398 | ad799x_read_channel_config, | |
399 | ad799x_write_channel_config, | |
400 | AD7998_HYST_CH2_REG); | |
401 | ||
322c9563 | 402 | static IIO_DEVICE_ATTR(in_voltage2_thresh_both_hyst_raw, |
72148f6e JC |
403 | S_IRUGO | S_IWUSR, |
404 | ad799x_read_channel_config, | |
405 | ad799x_write_channel_config, | |
406 | AD7998_HYST_CH3_REG); | |
407 | ||
322c9563 | 408 | static IIO_DEVICE_ATTR(in_voltage3_thresh_both_hyst_raw, |
72148f6e JC |
409 | S_IRUGO | S_IWUSR, |
410 | ad799x_read_channel_config, | |
411 | ad799x_write_channel_config, | |
412 | AD7998_HYST_CH4_REG); | |
985dbe77 MH |
413 | |
414 | static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, | |
415 | ad799x_read_frequency, | |
416 | ad799x_write_frequency); | |
417 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0"); | |
418 | ||
419 | static struct attribute *ad7993_4_7_8_event_attributes[] = { | |
322c9563 | 420 | &iio_dev_attr_in_voltage0_thresh_both_hyst_raw.dev_attr.attr, |
322c9563 | 421 | &iio_dev_attr_in_voltage1_thresh_both_hyst_raw.dev_attr.attr, |
322c9563 | 422 | &iio_dev_attr_in_voltage2_thresh_both_hyst_raw.dev_attr.attr, |
322c9563 | 423 | &iio_dev_attr_in_voltage3_thresh_both_hyst_raw.dev_attr.attr, |
985dbe77 MH |
424 | &iio_dev_attr_sampling_frequency.dev_attr.attr, |
425 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
426 | NULL, | |
427 | }; | |
428 | ||
429 | static struct attribute_group ad7993_4_7_8_event_attrs_group = { | |
430 | .attrs = ad7993_4_7_8_event_attributes, | |
8e7d9672 | 431 | .name = "events", |
985dbe77 MH |
432 | }; |
433 | ||
434 | static struct attribute *ad7992_event_attributes[] = { | |
322c9563 | 435 | &iio_dev_attr_in_voltage0_thresh_both_hyst_raw.dev_attr.attr, |
322c9563 | 436 | &iio_dev_attr_in_voltage1_thresh_both_hyst_raw.dev_attr.attr, |
985dbe77 MH |
437 | &iio_dev_attr_sampling_frequency.dev_attr.attr, |
438 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
439 | NULL, | |
440 | }; | |
441 | ||
442 | static struct attribute_group ad7992_event_attrs_group = { | |
443 | .attrs = ad7992_event_attributes, | |
8e7d9672 | 444 | .name = "events", |
985dbe77 MH |
445 | }; |
446 | ||
6fe8135f JC |
447 | static const struct iio_info ad7991_info = { |
448 | .read_raw = &ad799x_read_raw, | |
449 | .driver_module = THIS_MODULE, | |
450 | }; | |
451 | ||
452 | static const struct iio_info ad7992_info = { | |
453 | .read_raw = &ad799x_read_raw, | |
6fe8135f | 454 | .event_attrs = &ad7992_event_attrs_group, |
5b9e048a LPC |
455 | .read_event_config_new = &ad799x_read_event_config, |
456 | .read_event_value_new = &ad799x_read_event_value, | |
457 | .write_event_value_new = &ad799x_write_event_value, | |
6fe8135f JC |
458 | .driver_module = THIS_MODULE, |
459 | }; | |
460 | ||
461 | static const struct iio_info ad7993_4_7_8_info = { | |
462 | .read_raw = &ad799x_read_raw, | |
6fe8135f | 463 | .event_attrs = &ad7993_4_7_8_event_attrs_group, |
5b9e048a LPC |
464 | .read_event_config_new = &ad799x_read_event_config, |
465 | .read_event_value_new = &ad799x_read_event_value, | |
466 | .write_event_value_new = &ad799x_write_event_value, | |
6fe8135f | 467 | .driver_module = THIS_MODULE, |
ae3805c3 | 468 | .update_scan_mode = ad7997_8_update_scan_mode, |
6fe8135f JC |
469 | }; |
470 | ||
5b9e048a LPC |
471 | static const struct iio_event_spec ad799x_events[] = { |
472 | { | |
473 | .type = IIO_EV_TYPE_THRESH, | |
474 | .dir = IIO_EV_DIR_RISING, | |
475 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | | |
476 | BIT(IIO_EV_INFO_ENABLE), | |
477 | }, { | |
478 | .type = IIO_EV_TYPE_THRESH, | |
479 | .dir = IIO_EV_DIR_FALLING, | |
480 | .mask_separate = BIT(IIO_EV_INFO_VALUE), | |
481 | BIT(IIO_EV_INFO_ENABLE), | |
482 | }, | |
483 | }; | |
231c5c3b | 484 | |
5b9e048a | 485 | #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \ |
ae6d6489 LPC |
486 | .type = IIO_VOLTAGE, \ |
487 | .indexed = 1, \ | |
488 | .channel = (_index), \ | |
489 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
d00698df | 490 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
ae6d6489 LPC |
491 | .scan_index = (_index), \ |
492 | .scan_type = IIO_ST('u', _realbits, 16, 12 - (_realbits)), \ | |
5b9e048a LPC |
493 | .event_spec = _ev_spec, \ |
494 | .num_event_specs = _num_ev_spec, \ | |
ae6d6489 LPC |
495 | } |
496 | ||
5b9e048a LPC |
497 | #define AD799X_CHANNEL(_index, _realbits) \ |
498 | _AD799X_CHANNEL(_index, _realbits, NULL, 0) | |
499 | ||
500 | #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \ | |
501 | _AD799X_CHANNEL(_index, _realbits, ad799x_events, \ | |
502 | ARRAY_SIZE(ad799x_events)) | |
503 | ||
985dbe77 MH |
504 | static const struct ad799x_chip_info ad799x_chip_info_tbl[] = { |
505 | [ad7991] = { | |
7c626f58 | 506 | .channel = { |
5b9e048a LPC |
507 | AD799X_CHANNEL(0, 12), |
508 | AD799X_CHANNEL(1, 12), | |
509 | AD799X_CHANNEL(2, 12), | |
510 | AD799X_CHANNEL(3, 12), | |
ae6d6489 | 511 | IIO_CHAN_SOFT_TIMESTAMP(4), |
7c626f58 | 512 | }, |
d22fd9c5 | 513 | .num_channels = 5, |
6fe8135f | 514 | .info = &ad7991_info, |
985dbe77 MH |
515 | }, |
516 | [ad7995] = { | |
7c626f58 | 517 | .channel = { |
5b9e048a LPC |
518 | AD799X_CHANNEL(0, 10), |
519 | AD799X_CHANNEL(1, 10), | |
520 | AD799X_CHANNEL(2, 10), | |
521 | AD799X_CHANNEL(3, 10), | |
ae6d6489 | 522 | IIO_CHAN_SOFT_TIMESTAMP(4), |
7c626f58 | 523 | }, |
d22fd9c5 | 524 | .num_channels = 5, |
6fe8135f | 525 | .info = &ad7991_info, |
985dbe77 MH |
526 | }, |
527 | [ad7999] = { | |
7c626f58 | 528 | .channel = { |
5b9e048a LPC |
529 | AD799X_CHANNEL(0, 8), |
530 | AD799X_CHANNEL(1, 8), | |
531 | AD799X_CHANNEL(2, 8), | |
532 | AD799X_CHANNEL(3, 8), | |
ae6d6489 | 533 | IIO_CHAN_SOFT_TIMESTAMP(4), |
7c626f58 | 534 | }, |
d22fd9c5 | 535 | .num_channels = 5, |
6fe8135f | 536 | .info = &ad7991_info, |
985dbe77 MH |
537 | }, |
538 | [ad7992] = { | |
7c626f58 | 539 | .channel = { |
5b9e048a LPC |
540 | AD799X_CHANNEL_WITH_EVENTS(0, 12), |
541 | AD799X_CHANNEL_WITH_EVENTS(1, 12), | |
ae6d6489 | 542 | IIO_CHAN_SOFT_TIMESTAMP(3), |
7c626f58 | 543 | }, |
d22fd9c5 | 544 | .num_channels = 3, |
985dbe77 | 545 | .default_config = AD7998_ALERT_EN, |
6fe8135f | 546 | .info = &ad7992_info, |
985dbe77 MH |
547 | }, |
548 | [ad7993] = { | |
7c626f58 | 549 | .channel = { |
5b9e048a LPC |
550 | AD799X_CHANNEL_WITH_EVENTS(0, 10), |
551 | AD799X_CHANNEL_WITH_EVENTS(1, 10), | |
552 | AD799X_CHANNEL_WITH_EVENTS(2, 10), | |
553 | AD799X_CHANNEL_WITH_EVENTS(3, 10), | |
ae6d6489 | 554 | IIO_CHAN_SOFT_TIMESTAMP(4), |
7c626f58 | 555 | }, |
d22fd9c5 | 556 | .num_channels = 5, |
985dbe77 | 557 | .default_config = AD7998_ALERT_EN, |
6fe8135f | 558 | .info = &ad7993_4_7_8_info, |
985dbe77 MH |
559 | }, |
560 | [ad7994] = { | |
7c626f58 | 561 | .channel = { |
5b9e048a LPC |
562 | AD799X_CHANNEL_WITH_EVENTS(0, 12), |
563 | AD799X_CHANNEL_WITH_EVENTS(1, 12), | |
564 | AD799X_CHANNEL_WITH_EVENTS(2, 12), | |
565 | AD799X_CHANNEL_WITH_EVENTS(3, 12), | |
ae6d6489 | 566 | IIO_CHAN_SOFT_TIMESTAMP(4), |
7c626f58 | 567 | }, |
d22fd9c5 | 568 | .num_channels = 5, |
985dbe77 | 569 | .default_config = AD7998_ALERT_EN, |
6fe8135f | 570 | .info = &ad7993_4_7_8_info, |
985dbe77 MH |
571 | }, |
572 | [ad7997] = { | |
7c626f58 | 573 | .channel = { |
5b9e048a LPC |
574 | AD799X_CHANNEL_WITH_EVENTS(0, 10), |
575 | AD799X_CHANNEL_WITH_EVENTS(1, 10), | |
576 | AD799X_CHANNEL_WITH_EVENTS(2, 10), | |
577 | AD799X_CHANNEL_WITH_EVENTS(3, 10), | |
578 | AD799X_CHANNEL(4, 10), | |
579 | AD799X_CHANNEL(5, 10), | |
580 | AD799X_CHANNEL(6, 10), | |
581 | AD799X_CHANNEL(7, 10), | |
ae6d6489 | 582 | IIO_CHAN_SOFT_TIMESTAMP(8), |
7c626f58 | 583 | }, |
d22fd9c5 | 584 | .num_channels = 9, |
985dbe77 | 585 | .default_config = AD7998_ALERT_EN, |
6fe8135f | 586 | .info = &ad7993_4_7_8_info, |
985dbe77 MH |
587 | }, |
588 | [ad7998] = { | |
7c626f58 | 589 | .channel = { |
5b9e048a LPC |
590 | AD799X_CHANNEL_WITH_EVENTS(0, 12), |
591 | AD799X_CHANNEL_WITH_EVENTS(1, 12), | |
592 | AD799X_CHANNEL_WITH_EVENTS(2, 12), | |
593 | AD799X_CHANNEL_WITH_EVENTS(3, 12), | |
594 | AD799X_CHANNEL(4, 12), | |
595 | AD799X_CHANNEL(5, 12), | |
596 | AD799X_CHANNEL(6, 12), | |
597 | AD799X_CHANNEL(7, 12), | |
ae6d6489 | 598 | IIO_CHAN_SOFT_TIMESTAMP(8), |
7c626f58 | 599 | }, |
d22fd9c5 | 600 | .num_channels = 9, |
985dbe77 | 601 | .default_config = AD7998_ALERT_EN, |
6fe8135f | 602 | .info = &ad7993_4_7_8_info, |
985dbe77 MH |
603 | }, |
604 | }; | |
605 | ||
4ae1c61f | 606 | static int ad799x_probe(struct i2c_client *client, |
985dbe77 MH |
607 | const struct i2c_device_id *id) |
608 | { | |
26d25ae3 | 609 | int ret; |
985dbe77 | 610 | struct ad799x_platform_data *pdata = client->dev.platform_data; |
1bf7ac76 | 611 | struct ad799x_state *st; |
6a88fa48 | 612 | struct iio_dev *indio_dev; |
1bf7ac76 | 613 | |
6a88fa48 | 614 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); |
1bf7ac76 MH |
615 | if (indio_dev == NULL) |
616 | return -ENOMEM; | |
985dbe77 | 617 | |
1bf7ac76 | 618 | st = iio_priv(indio_dev); |
985dbe77 | 619 | /* this is only used for device removal purposes */ |
1bf7ac76 | 620 | i2c_set_clientdata(client, indio_dev); |
985dbe77 | 621 | |
985dbe77 MH |
622 | st->id = id->driver_data; |
623 | st->chip_info = &ad799x_chip_info_tbl[st->id]; | |
624 | st->config = st->chip_info->default_config; | |
625 | ||
626 | /* TODO: Add pdata options for filtering and bit delay */ | |
627 | ||
8c7e8627 LPC |
628 | if (!pdata) |
629 | return -EINVAL; | |
630 | ||
631 | st->int_vref_mv = pdata->vref_mv; | |
985dbe77 | 632 | |
6a88fa48 | 633 | st->reg = devm_regulator_get(&client->dev, "vcc"); |
985dbe77 MH |
634 | if (!IS_ERR(st->reg)) { |
635 | ret = regulator_enable(st->reg); | |
636 | if (ret) | |
6a88fa48 | 637 | return ret; |
985dbe77 MH |
638 | } |
639 | st->client = client; | |
640 | ||
1bf7ac76 MH |
641 | indio_dev->dev.parent = &client->dev; |
642 | indio_dev->name = id->name; | |
6fe8135f | 643 | indio_dev->info = st->chip_info->info; |
6fe8135f | 644 | |
1bf7ac76 | 645 | indio_dev->modes = INDIO_DIRECT_MODE; |
1bf7ac76 MH |
646 | indio_dev->channels = st->chip_info->channel; |
647 | indio_dev->num_channels = st->chip_info->num_channels; | |
1bf7ac76 MH |
648 | |
649 | ret = ad799x_register_ring_funcs_and_init(indio_dev); | |
985dbe77 | 650 | if (ret) |
1bf7ac76 | 651 | goto error_disable_reg; |
985dbe77 | 652 | |
6fe8135f | 653 | if (client->irq > 0) { |
72148f6e JC |
654 | ret = request_threaded_irq(client->irq, |
655 | NULL, | |
656 | ad799x_event_handler, | |
657 | IRQF_TRIGGER_FALLING | | |
658 | IRQF_ONESHOT, | |
659 | client->name, | |
1bf7ac76 | 660 | indio_dev); |
985dbe77 MH |
661 | if (ret) |
662 | goto error_cleanup_ring; | |
985dbe77 | 663 | } |
26d25ae3 JC |
664 | ret = iio_device_register(indio_dev); |
665 | if (ret) | |
666 | goto error_free_irq; | |
985dbe77 MH |
667 | |
668 | return 0; | |
1bf7ac76 | 669 | |
26d25ae3 JC |
670 | error_free_irq: |
671 | free_irq(client->irq, indio_dev); | |
985dbe77 | 672 | error_cleanup_ring: |
1bf7ac76 | 673 | ad799x_ring_cleanup(indio_dev); |
985dbe77 MH |
674 | error_disable_reg: |
675 | if (!IS_ERR(st->reg)) | |
676 | regulator_disable(st->reg); | |
1bf7ac76 | 677 | |
985dbe77 MH |
678 | return ret; |
679 | } | |
680 | ||
447d4f29 | 681 | static int ad799x_remove(struct i2c_client *client) |
985dbe77 | 682 | { |
1bf7ac76 MH |
683 | struct iio_dev *indio_dev = i2c_get_clientdata(client); |
684 | struct ad799x_state *st = iio_priv(indio_dev); | |
985dbe77 | 685 | |
d2fffd6c | 686 | iio_device_unregister(indio_dev); |
6fe8135f | 687 | if (client->irq > 0) |
72148f6e | 688 | free_irq(client->irq, indio_dev); |
985dbe77 | 689 | |
985dbe77 | 690 | ad799x_ring_cleanup(indio_dev); |
6a88fa48 | 691 | if (!IS_ERR(st->reg)) |
985dbe77 | 692 | regulator_disable(st->reg); |
d8dca330 | 693 | kfree(st->rx_buf); |
985dbe77 MH |
694 | |
695 | return 0; | |
696 | } | |
697 | ||
698 | static const struct i2c_device_id ad799x_id[] = { | |
699 | { "ad7991", ad7991 }, | |
700 | { "ad7995", ad7995 }, | |
701 | { "ad7999", ad7999 }, | |
702 | { "ad7992", ad7992 }, | |
703 | { "ad7993", ad7993 }, | |
704 | { "ad7994", ad7994 }, | |
705 | { "ad7997", ad7997 }, | |
706 | { "ad7998", ad7998 }, | |
707 | {} | |
708 | }; | |
709 | ||
710 | MODULE_DEVICE_TABLE(i2c, ad799x_id); | |
711 | ||
712 | static struct i2c_driver ad799x_driver = { | |
713 | .driver = { | |
714 | .name = "ad799x", | |
715 | }, | |
716 | .probe = ad799x_probe, | |
e543acf0 | 717 | .remove = ad799x_remove, |
985dbe77 MH |
718 | .id_table = ad799x_id, |
719 | }; | |
6e5af184 | 720 | module_i2c_driver(ad799x_driver); |
985dbe77 MH |
721 | |
722 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
723 | MODULE_DESCRIPTION("Analog Devices AD799x ADC"); | |
724 | MODULE_LICENSE("GPL v2"); |