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Fix common misspellings
[mirror_ubuntu-zesty-kernel.git] / drivers / staging / iio / adc / max1363_core.c
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d1325cf4 1 /*
82020b0e
JC		 2 * iio/adc/max1363.c
3 * Copyright (C) 2008-2010 Jonathan Cameron
4 *
5 * based on linux/drivers/i2c/chips/max123x
6 * Copyright (C) 2002-2004 Stefan Eletzhofer
7 *
8 * based on linux/drivers/acron/char/pcf8583.c
9 * Copyright (C) 2000 Russell King
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * max1363.c
16 *
17 * Partial support for max1363 and similar chips.
18 *
19 * Not currently implemented.
20 *
82020b0e
JC		 21 * - Control of internal reference.
22 */
d1325cf4
JC		 23
24#include <linux/interrupt.h>
d1325cf4
JC		 25#include <linux/workqueue.h>
26#include <linux/device.h>
27#include <linux/kernel.h>
28#include <linux/sysfs.h>
29#include <linux/list.h>
30#include <linux/i2c.h>
d1325cf4 31#include <linux/regulator/consumer.h>
5a0e3ad6 32#include <linux/slab.h>
c40ab874 33#include <linux/err.h>
d1325cf4
JC		 34
35#include "../iio.h"
36#include "../sysfs.h"
37
82020b0e
JC		 38#include "../ring_generic.h"
39#include "adc.h"
d1325cf4
JC		 40#include "max1363.h"
41
82020b0e
JC		 42/* Here we claim all are 16 bits. This currently does no harm and saves
43 * us a lot of scan element listings */
44
44f270de
JC		 45#define MAX1363_SCAN_EL(number) \
46 IIO_SCAN_EL_C(in##number, number, 0, NULL);
82020b0e 47#define MAX1363_SCAN_EL_D(p, n, number) \
44f270de 48 IIO_SCAN_NAMED_EL_C(in##p##m##in##n, in##p-in##n, number, 0, NULL);
82020b0e
JC		 49
50static MAX1363_SCAN_EL(0);
51static MAX1363_SCAN_EL(1);
52static MAX1363_SCAN_EL(2);
53static MAX1363_SCAN_EL(3);
54static MAX1363_SCAN_EL(4);
55static MAX1363_SCAN_EL(5);
56static MAX1363_SCAN_EL(6);
57static MAX1363_SCAN_EL(7);
58static MAX1363_SCAN_EL(8);
59static MAX1363_SCAN_EL(9);
60static MAX1363_SCAN_EL(10);
61static MAX1363_SCAN_EL(11);
62static MAX1363_SCAN_EL_D(0, 1, 12);
63static MAX1363_SCAN_EL_D(2, 3, 13);
64static MAX1363_SCAN_EL_D(4, 5, 14);
65static MAX1363_SCAN_EL_D(6, 7, 15);
66static MAX1363_SCAN_EL_D(8, 9, 16);
67static MAX1363_SCAN_EL_D(10, 11, 17);
68static MAX1363_SCAN_EL_D(1, 0, 18);
69static MAX1363_SCAN_EL_D(3, 2, 19);
70static MAX1363_SCAN_EL_D(5, 4, 20);
71static MAX1363_SCAN_EL_D(7, 6, 21);
72static MAX1363_SCAN_EL_D(9, 8, 22);
73static MAX1363_SCAN_EL_D(11, 10, 23);
74
75static const struct max1363_mode max1363_mode_table[] = {
76 /* All of the single channel options first */
77 MAX1363_MODE_SINGLE(0, 1 << 0),
78 MAX1363_MODE_SINGLE(1, 1 << 1),
79 MAX1363_MODE_SINGLE(2, 1 << 2),
80 MAX1363_MODE_SINGLE(3, 1 << 3),
81 MAX1363_MODE_SINGLE(4, 1 << 4),
82 MAX1363_MODE_SINGLE(5, 1 << 5),
83 MAX1363_MODE_SINGLE(6, 1 << 6),
84 MAX1363_MODE_SINGLE(7, 1 << 7),
85 MAX1363_MODE_SINGLE(8, 1 << 8),
86 MAX1363_MODE_SINGLE(9, 1 << 9),
87 MAX1363_MODE_SINGLE(10, 1 << 10),
88 MAX1363_MODE_SINGLE(11, 1 << 11),
89
90 MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
91 MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
92 MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
93 MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
94 MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
95 MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
96 MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
97 MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
98 MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
99 MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
100 MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
101 MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
102
103 /* The multichannel scans next */
104 MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
105 MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
106 MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
107 MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
108 MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
109 MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
110 MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
111 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
112 MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
113 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
114 MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
115 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
116 MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
117 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
118 MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
119 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
120 MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
121
122 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
123 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
124 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
125 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
126 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
127 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
128 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
129 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
130 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
131 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
132 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
133 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
134 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
135 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
d1325cf4
JC		 136};
137
82020b0e 138const struct max1363_mode
1b183e4b
GKH		 139*max1363_match_mode(u32 mask, const struct max1363_chip_info *ci)
140{
82020b0e
JC		 141 int i;
142 if (mask)
143 for (i = 0; i < ci->num_modes; i++)
1b183e4b 144 if (!((~max1363_mode_table[ci->mode_list[i]].modemask) &
82020b0e 145 mask))
1b183e4b
GKH		 146 return &max1363_mode_table[ci->mode_list[i]];
147 return NULL;
c608cb01 148}
82020b0e 149
8d9c636b 150static ssize_t max1363_show_precision_u(struct device *dev,
82020b0e
JC		 151 struct device_attribute *attr,
152 char *buf)
153{
a7861ff0
JC		 154 struct iio_ring_buffer *ring = dev_get_drvdata(dev);
155 struct iio_dev *dev_info = ring->indio_dev;
82020b0e 156 struct max1363_state *st = iio_dev_get_devdata(dev_info);
8d9c636b 157 return sprintf(buf, "u%d/16\n", st->chip_info->bits);
82020b0e
JC		 158}
159
8d9c636b
JC		 160static ssize_t max1363_show_precision_s(struct device *dev,
161 struct device_attribute *attr,
162 char *buf)
163{
a7861ff0
JC		 164 struct iio_ring_buffer *ring = dev_get_drvdata(dev);
165 struct iio_dev *dev_info = ring->indio_dev;
8d9c636b
JC		 166 struct max1363_state *st = iio_dev_get_devdata(dev_info);
167 return sprintf(buf, "s%d/16\n", st->chip_info->bits);
168}
169
170#define MAX1363_SCAN_TYPE(n) \
171 DEVICE_ATTR(in##n##_type, S_IRUGO, \
172 max1363_show_precision_u, NULL);
173#define MAX1363_SCAN_TYPE_D(p, n) \
174 struct device_attribute dev_attr_in##p##m##in##n##_type = \
175 __ATTR(in##p-in##n##_type, S_IRUGO, \
176 max1363_show_precision_s, NULL);
177
178static MAX1363_SCAN_TYPE(0);
179static MAX1363_SCAN_TYPE(1);
180static MAX1363_SCAN_TYPE(2);
181static MAX1363_SCAN_TYPE(3);
182static MAX1363_SCAN_TYPE(4);
183static MAX1363_SCAN_TYPE(5);
184static MAX1363_SCAN_TYPE(6);
185static MAX1363_SCAN_TYPE(7);
186static MAX1363_SCAN_TYPE(8);
187static MAX1363_SCAN_TYPE(9);
188static MAX1363_SCAN_TYPE(10);
189static MAX1363_SCAN_TYPE(11);
190
191static MAX1363_SCAN_TYPE_D(0, 1);
192static MAX1363_SCAN_TYPE_D(2, 3);
193static MAX1363_SCAN_TYPE_D(4, 5);
194static MAX1363_SCAN_TYPE_D(6, 7);
195static MAX1363_SCAN_TYPE_D(8, 9);
196static MAX1363_SCAN_TYPE_D(10, 11);
197static MAX1363_SCAN_TYPE_D(1, 0);
198static MAX1363_SCAN_TYPE_D(3, 2);
199static MAX1363_SCAN_TYPE_D(5, 4);
200static MAX1363_SCAN_TYPE_D(7, 6);
201static MAX1363_SCAN_TYPE_D(9, 8);
202static MAX1363_SCAN_TYPE_D(11, 10);
82020b0e
JC		 203
204static int max1363_write_basic_config(struct i2c_client *client,
205 unsigned char d1,
206 unsigned char d2)
207{
208 int ret;
c40ab874 209 u8 *tx_buf = kmalloc(2, GFP_KERNEL);
82020b0e
JC		 210
211 if (!tx_buf)
212 return -ENOMEM;
213 tx_buf[0] = d1;
214 tx_buf[1] = d2;
215
216 ret = i2c_master_send(client, tx_buf, 2);
217 kfree(tx_buf);
218
219 return (ret > 0) ? 0 : ret;
220}
221
222int max1363_set_scan_mode(struct max1363_state *st)
223{
224 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
225 | MAX1363_SCAN_MASK
226 | MAX1363_SE_DE_MASK);
227 st->configbyte |= st->current_mode->conf;
228
229 return max1363_write_basic_config(st->client,
230 st->setupbyte,
231 st->configbyte);
232}
233
234static ssize_t max1363_read_single_channel(struct device *dev,
235 struct device_attribute *attr,
236 char *buf)
237{
238 struct iio_dev *dev_info = dev_get_drvdata(dev);
239 struct max1363_state *st = iio_dev_get_devdata(dev_info);
240 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
241 struct i2c_client *client = st->client;
242 int ret = 0, len = 0;
243 s32 data ;
244 char rxbuf[2];
245 long mask;
246
247 mutex_lock(&dev_info->mlock);
440a5200
JC		 248 /*
249 * If monitor mode is enabled, the method for reading a single
250 * channel will have to be rather different and has not yet
251 * been implemented.
252 */
253 if (st->monitor_on) {
254 ret = -EBUSY;
255 goto error_ret;
256 }
257
25985edc 258 /* If ring buffer capture is occurring, query the buffer */
82020b0e
JC		 259 if (iio_ring_enabled(dev_info)) {
260 mask = max1363_mode_table[this_attr->address].modemask;
261 data = max1363_single_channel_from_ring(mask, st);
262 if (data < 0) {
263 ret = data;
264 goto error_ret;
265 }
266 } else {
267 /* Check to see if current scan mode is correct */
268 if (st->current_mode !=
269 &max1363_mode_table[this_attr->address]) {
270 /* Update scan mode if needed */
271 st->current_mode
272 = &max1363_mode_table[this_attr->address];
273 ret = max1363_set_scan_mode(st);
274 if (ret)
275 goto error_ret;
276 }
3bf877c1
JC		 277 if (st->chip_info->bits != 8) {
278 /* Get reading */
279 data = i2c_master_recv(client, rxbuf, 2);
280 if (data < 0) {
281 ret = data;
282 goto error_ret;
283 }
284
285 data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
286 } else {
287 /* Get reading */
288 data = i2c_master_recv(client, rxbuf, 1);
289 if (data < 0) {
290 ret = data;
291 goto error_ret;
292 }
293 data = rxbuf[0];
82020b0e 294 }
82020b0e
JC		 295 }
296 /* Pretty print the result */
297 len = sprintf(buf, "%u\n", data);
298
299error_ret:
300 mutex_unlock(&dev_info->mlock);
301 return ret ? ret : len;
302}
303
304/* Direct read attribtues */
305static IIO_DEV_ATTR_IN_RAW(0, max1363_read_single_channel, _s0);
306static IIO_DEV_ATTR_IN_RAW(1, max1363_read_single_channel, _s1);
307static IIO_DEV_ATTR_IN_RAW(2, max1363_read_single_channel, _s2);
308static IIO_DEV_ATTR_IN_RAW(3, max1363_read_single_channel, _s3);
309static IIO_DEV_ATTR_IN_RAW(4, max1363_read_single_channel, _s4);
310static IIO_DEV_ATTR_IN_RAW(5, max1363_read_single_channel, _s5);
311static IIO_DEV_ATTR_IN_RAW(6, max1363_read_single_channel, _s6);
312static IIO_DEV_ATTR_IN_RAW(7, max1363_read_single_channel, _s7);
313static IIO_DEV_ATTR_IN_RAW(8, max1363_read_single_channel, _s8);
314static IIO_DEV_ATTR_IN_RAW(9, max1363_read_single_channel, _s9);
315static IIO_DEV_ATTR_IN_RAW(10, max1363_read_single_channel, _s10);
316static IIO_DEV_ATTR_IN_RAW(11, max1363_read_single_channel, _s11);
317
318static IIO_DEV_ATTR_IN_DIFF_RAW(0, 1, max1363_read_single_channel, d0m1);
319static IIO_DEV_ATTR_IN_DIFF_RAW(2, 3, max1363_read_single_channel, d2m3);
320static IIO_DEV_ATTR_IN_DIFF_RAW(4, 5, max1363_read_single_channel, d4m5);
321static IIO_DEV_ATTR_IN_DIFF_RAW(6, 7, max1363_read_single_channel, d6m7);
322static IIO_DEV_ATTR_IN_DIFF_RAW(8, 9, max1363_read_single_channel, d8m9);
323static IIO_DEV_ATTR_IN_DIFF_RAW(10, 11, max1363_read_single_channel, d10m11);
324static IIO_DEV_ATTR_IN_DIFF_RAW(1, 0, max1363_read_single_channel, d1m0);
325static IIO_DEV_ATTR_IN_DIFF_RAW(3, 2, max1363_read_single_channel, d3m2);
326static IIO_DEV_ATTR_IN_DIFF_RAW(5, 4, max1363_read_single_channel, d5m4);
327static IIO_DEV_ATTR_IN_DIFF_RAW(7, 6, max1363_read_single_channel, d7m6);
328static IIO_DEV_ATTR_IN_DIFF_RAW(9, 8, max1363_read_single_channel, d9m8);
329static IIO_DEV_ATTR_IN_DIFF_RAW(11, 10, max1363_read_single_channel, d11m10);
330
331
332static ssize_t max1363_show_scale(struct device *dev,
333 struct device_attribute *attr,
334 char *buf)
335{
336 /* Driver currently only support internal vref */
337 struct iio_dev *dev_info = dev_get_drvdata(dev);
338 struct max1363_state *st = iio_dev_get_devdata(dev_info);
339 /* Corresponds to Vref / 2^(bits) */
340
341 if ((1 << (st->chip_info->bits + 1))
342 > st->chip_info->int_vref_mv)
343 return sprintf(buf, "0.5\n");
344 else
345 return sprintf(buf, "%d\n",
346 st->chip_info->int_vref_mv >> st->chip_info->bits);
347}
348
1b183e4b 349static IIO_DEVICE_ATTR(in_scale, S_IRUGO, max1363_show_scale, NULL, 0);
82020b0e
JC		 350
351static ssize_t max1363_show_name(struct device *dev,
352 struct device_attribute *attr,
353 char *buf)
354{
355 struct iio_dev *dev_info = dev_get_drvdata(dev);
356 struct max1363_state *st = iio_dev_get_devdata(dev_info);
962a4ccb 357 return sprintf(buf, "%s\n", st->client->name);
82020b0e
JC		 358}
359
1b183e4b 360static IIO_DEVICE_ATTR(name, S_IRUGO, max1363_show_name, NULL, 0);
82020b0e 361
d1325cf4
JC		 362/* Applies to max1363 */
363static const enum max1363_modes max1363_mode_list[] = {
364 _s0, _s1, _s2, _s3,
d1325cf4
JC		 365 s0to1, s0to2, s0to3,
366 d0m1, d2m3, d1m0, d3m2,
d1325cf4
JC		 367 d0m1to2m3, d1m0to3m2,
368};
369
82020b0e
JC		 370static struct attribute *max1363_device_attrs[] = {
371 &iio_dev_attr_in0_raw.dev_attr.attr,
372 &iio_dev_attr_in1_raw.dev_attr.attr,
373 &iio_dev_attr_in2_raw.dev_attr.attr,
374 &iio_dev_attr_in3_raw.dev_attr.attr,
375 &iio_dev_attr_in0min1_raw.dev_attr.attr,
376 &iio_dev_attr_in2min3_raw.dev_attr.attr,
377 &iio_dev_attr_in1min0_raw.dev_attr.attr,
378 &iio_dev_attr_in3min2_raw.dev_attr.attr,
379 &iio_dev_attr_name.dev_attr.attr,
380 &iio_dev_attr_in_scale.dev_attr.attr,
381 NULL
382};
383
384static struct attribute_group max1363_dev_attr_group = {
385 .attrs = max1363_device_attrs,
386};
387
388static struct attribute *max1363_scan_el_attrs[] = {
8d9c636b 389 &iio_scan_el_in0.dev_attr.attr, &dev_attr_in0_type.attr,
77b3d3fa 390 &iio_const_attr_in0_index.dev_attr.attr,
8d9c636b 391 &iio_scan_el_in1.dev_attr.attr, &dev_attr_in1_type.attr,
77b3d3fa 392 &iio_const_attr_in1_index.dev_attr.attr,
8d9c636b 393 &iio_scan_el_in2.dev_attr.attr, &dev_attr_in2_type.attr,
77b3d3fa 394 &iio_const_attr_in2_index.dev_attr.attr,
8d9c636b 395 &iio_scan_el_in3.dev_attr.attr, &dev_attr_in3_type.attr,
77b3d3fa 396 &iio_const_attr_in3_index.dev_attr.attr,
8d9c636b 397 &iio_scan_el_in0min1.dev_attr.attr, &dev_attr_in0min1_type.attr,
77b3d3fa 398 &iio_const_attr_in0min1_index.dev_attr.attr,
8d9c636b 399 &iio_scan_el_in2min3.dev_attr.attr, &dev_attr_in2min3_type.attr,
77b3d3fa 400 &iio_const_attr_in2min3_index.dev_attr.attr,
8d9c636b 401 &iio_scan_el_in1min0.dev_attr.attr, &dev_attr_in1min0_type.attr,
77b3d3fa 402 &iio_const_attr_in1min0_index.dev_attr.attr,
8d9c636b 403 &iio_scan_el_in3min2.dev_attr.attr, &dev_attr_in3min2_type.attr,
77b3d3fa 404 &iio_const_attr_in3min2_index.dev_attr.attr,
82020b0e
JC		 405 NULL,
406};
407
408static struct attribute_group max1363_scan_el_group = {
409 .name = "scan_elements",
410 .attrs = max1363_scan_el_attrs,
411};
412
d1325cf4
JC		 413/* Appies to max1236, max1237 */
414static const enum max1363_modes max1236_mode_list[] = {
415 _s0, _s1, _s2, _s3,
d1325cf4
JC		 416 s0to1, s0to2, s0to3,
417 d0m1, d2m3, d1m0, d3m2,
d1325cf4
JC		 418 d0m1to2m3, d1m0to3m2,
419 s2to3,
420};
421
422/* Applies to max1238, max1239 */
423static const enum max1363_modes max1238_mode_list[] = {
424 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
d1325cf4
JC		 425 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
426 s0to7, s0to8, s0to9, s0to10, s0to11,
427 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
428 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
d1325cf4
JC		 429 d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
430 d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
431 s6to7, s6to8, s6to9, s6to10, s6to11,
82020b0e 432 d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
d1325cf4
JC		 433};
434
82020b0e
JC		 435static struct attribute *max1238_device_attrs[] = {
436 &iio_dev_attr_in0_raw.dev_attr.attr,
437 &iio_dev_attr_in1_raw.dev_attr.attr,
438 &iio_dev_attr_in2_raw.dev_attr.attr,
439 &iio_dev_attr_in3_raw.dev_attr.attr,
440 &iio_dev_attr_in4_raw.dev_attr.attr,
441 &iio_dev_attr_in5_raw.dev_attr.attr,
442 &iio_dev_attr_in6_raw.dev_attr.attr,
443 &iio_dev_attr_in7_raw.dev_attr.attr,
444 &iio_dev_attr_in8_raw.dev_attr.attr,
445 &iio_dev_attr_in9_raw.dev_attr.attr,
446 &iio_dev_attr_in10_raw.dev_attr.attr,
447 &iio_dev_attr_in11_raw.dev_attr.attr,
448 &iio_dev_attr_in0min1_raw.dev_attr.attr,
449 &iio_dev_attr_in2min3_raw.dev_attr.attr,
450 &iio_dev_attr_in4min5_raw.dev_attr.attr,
451 &iio_dev_attr_in6min7_raw.dev_attr.attr,
452 &iio_dev_attr_in8min9_raw.dev_attr.attr,
453 &iio_dev_attr_in10min11_raw.dev_attr.attr,
454 &iio_dev_attr_in1min0_raw.dev_attr.attr,
455 &iio_dev_attr_in3min2_raw.dev_attr.attr,
456 &iio_dev_attr_in5min4_raw.dev_attr.attr,
457 &iio_dev_attr_in7min6_raw.dev_attr.attr,
458 &iio_dev_attr_in9min8_raw.dev_attr.attr,
459 &iio_dev_attr_in11min10_raw.dev_attr.attr,
460 &iio_dev_attr_name.dev_attr.attr,
461 &iio_dev_attr_in_scale.dev_attr.attr,
462 NULL
463};
464
465static struct attribute_group max1238_dev_attr_group = {
466 .attrs = max1238_device_attrs,
467};
468
469static struct attribute *max1238_scan_el_attrs[] = {
8d9c636b 470 &iio_scan_el_in0.dev_attr.attr, &dev_attr_in0_type.attr,
77b3d3fa 471 &iio_const_attr_in0_index.dev_attr.attr,
8d9c636b 472 &iio_scan_el_in1.dev_attr.attr, &dev_attr_in1_type.attr,
77b3d3fa 473 &iio_const_attr_in1_index.dev_attr.attr,
8d9c636b 474 &iio_scan_el_in2.dev_attr.attr, &dev_attr_in2_type.attr,
77b3d3fa 475 &iio_const_attr_in2_index.dev_attr.attr,
8d9c636b 476 &iio_scan_el_in3.dev_attr.attr, &dev_attr_in3_type.attr,
77b3d3fa 477 &iio_const_attr_in3_index.dev_attr.attr,
8d9c636b 478 &iio_scan_el_in4.dev_attr.attr, &dev_attr_in4_type.attr,
77b3d3fa 479 &iio_const_attr_in4_index.dev_attr.attr,
8d9c636b 480 &iio_scan_el_in5.dev_attr.attr, &dev_attr_in5_type.attr,
77b3d3fa 481 &iio_const_attr_in5_index.dev_attr.attr,
8d9c636b 482 &iio_scan_el_in6.dev_attr.attr, &dev_attr_in6_type.attr,
77b3d3fa 483 &iio_const_attr_in6_index.dev_attr.attr,
8d9c636b 484 &iio_scan_el_in7.dev_attr.attr, &dev_attr_in7_type.attr,
77b3d3fa 485 &iio_const_attr_in7_index.dev_attr.attr,
8d9c636b 486 &iio_scan_el_in8.dev_attr.attr, &dev_attr_in8_type.attr,
77b3d3fa 487 &iio_const_attr_in8_index.dev_attr.attr,
8d9c636b 488 &iio_scan_el_in9.dev_attr.attr, &dev_attr_in9_type.attr,
77b3d3fa 489 &iio_const_attr_in9_index.dev_attr.attr,
8d9c636b 490 &iio_scan_el_in10.dev_attr.attr, &dev_attr_in10_type.attr,
77b3d3fa 491 &iio_const_attr_in10_index.dev_attr.attr,
8d9c636b 492 &iio_scan_el_in11.dev_attr.attr, &dev_attr_in11_type.attr,
77b3d3fa 493 &iio_const_attr_in11_index.dev_attr.attr,
8d9c636b 494 &iio_scan_el_in0min1.dev_attr.attr, &dev_attr_in0min1_type.attr,
77b3d3fa 495 &iio_const_attr_in0min1_index.dev_attr.attr,
8d9c636b 496 &iio_scan_el_in2min3.dev_attr.attr, &dev_attr_in2min3_type.attr,
77b3d3fa 497 &iio_const_attr_in2min3_index.dev_attr.attr,
8d9c636b 498 &iio_scan_el_in4min5.dev_attr.attr, &dev_attr_in4min5_type.attr,
77b3d3fa 499 &iio_const_attr_in4min5_index.dev_attr.attr,
8d9c636b 500 &iio_scan_el_in6min7.dev_attr.attr, &dev_attr_in6min7_type.attr,
77b3d3fa 501 &iio_const_attr_in6min7_index.dev_attr.attr,
8d9c636b 502 &iio_scan_el_in8min9.dev_attr.attr, &dev_attr_in8min9_type.attr,
77b3d3fa 503 &iio_const_attr_in8min9_index.dev_attr.attr,
8d9c636b 504 &iio_scan_el_in10min11.dev_attr.attr, &dev_attr_in10min11_type.attr,
77b3d3fa 505 &iio_const_attr_in10min11_index.dev_attr.attr,
8d9c636b 506 &iio_scan_el_in1min0.dev_attr.attr, &dev_attr_in1min0_type.attr,
77b3d3fa 507 &iio_const_attr_in1min0_index.dev_attr.attr,
8d9c636b 508 &iio_scan_el_in3min2.dev_attr.attr, &dev_attr_in3min2_type.attr,
77b3d3fa 509 &iio_const_attr_in3min2_index.dev_attr.attr,
8d9c636b 510 &iio_scan_el_in5min4.dev_attr.attr, &dev_attr_in5min4_type.attr,
77b3d3fa 511 &iio_const_attr_in5min4_index.dev_attr.attr,
8d9c636b 512 &iio_scan_el_in7min6.dev_attr.attr, &dev_attr_in7min6_type.attr,
77b3d3fa 513 &iio_const_attr_in7min6_index.dev_attr.attr,
8d9c636b 514 &iio_scan_el_in9min8.dev_attr.attr, &dev_attr_in9min8_type.attr,
77b3d3fa 515 &iio_const_attr_in9min8_index.dev_attr.attr,
8d9c636b 516 &iio_scan_el_in11min10.dev_attr.attr, &dev_attr_in11min10_type.attr,
77b3d3fa 517 &iio_const_attr_in11min10_index.dev_attr.attr,
82020b0e
JC		 518 NULL,
519};
520
521static struct attribute_group max1238_scan_el_group = {
522 .name = "scan_elements",
523 .attrs = max1238_scan_el_attrs,
d1325cf4
JC		 524};
525
526
c3fa0fdd
JC		 527static const enum max1363_modes max11607_mode_list[] = {
528 _s0, _s1, _s2, _s3,
529 s0to1, s0to2, s0to3,
530 s2to3,
531 d0m1, d2m3, d1m0, d3m2,
532 d0m1to2m3, d1m0to3m2,
533};
534
535static const enum max1363_modes max11608_mode_list[] = {
536 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
537 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
538 s6to7,
539 d0m1, d2m3, d4m5, d6m7,
540 d1m0, d3m2, d5m4, d7m6,
541 d0m1to2m3, d0m1to4m5, d0m1to6m7,
542 d1m0to3m2, d1m0to5m4, d1m0to7m6,
543};
544
545static struct attribute *max11608_device_attrs[] = {
546 &iio_dev_attr_in0_raw.dev_attr.attr,
547 &iio_dev_attr_in1_raw.dev_attr.attr,
548 &iio_dev_attr_in2_raw.dev_attr.attr,
549 &iio_dev_attr_in3_raw.dev_attr.attr,
550 &iio_dev_attr_in4_raw.dev_attr.attr,
551 &iio_dev_attr_in5_raw.dev_attr.attr,
552 &iio_dev_attr_in6_raw.dev_attr.attr,
553 &iio_dev_attr_in7_raw.dev_attr.attr,
554 &iio_dev_attr_in0min1_raw.dev_attr.attr,
555 &iio_dev_attr_in2min3_raw.dev_attr.attr,
556 &iio_dev_attr_in4min5_raw.dev_attr.attr,
557 &iio_dev_attr_in6min7_raw.dev_attr.attr,
558 &iio_dev_attr_in1min0_raw.dev_attr.attr,
559 &iio_dev_attr_in3min2_raw.dev_attr.attr,
560 &iio_dev_attr_in5min4_raw.dev_attr.attr,
561 &iio_dev_attr_in7min6_raw.dev_attr.attr,
562 &iio_dev_attr_name.dev_attr.attr,
563 &iio_dev_attr_in_scale.dev_attr.attr,
564 NULL
565};
566
567static struct attribute_group max11608_dev_attr_group = {
568 .attrs = max11608_device_attrs,
569};
570
571static struct attribute *max11608_scan_el_attrs[] = {
8d9c636b 572 &iio_scan_el_in0.dev_attr.attr, &dev_attr_in0_type.attr,
77b3d3fa 573 &iio_const_attr_in0_index.dev_attr.attr,
8d9c636b 574 &iio_scan_el_in1.dev_attr.attr, &dev_attr_in1_type.attr,
77b3d3fa 575 &iio_const_attr_in1_index.dev_attr.attr,
8d9c636b 576 &iio_scan_el_in2.dev_attr.attr, &dev_attr_in2_type.attr,
77b3d3fa 577 &iio_const_attr_in2_index.dev_attr.attr,
8d9c636b 578 &iio_scan_el_in3.dev_attr.attr, &dev_attr_in3_type.attr,
77b3d3fa 579 &iio_const_attr_in3_index.dev_attr.attr,
8d9c636b 580 &iio_scan_el_in4.dev_attr.attr, &dev_attr_in4_type.attr,
77b3d3fa 581 &iio_const_attr_in4_index.dev_attr.attr,
8d9c636b 582 &iio_scan_el_in5.dev_attr.attr, &dev_attr_in5_type.attr,
77b3d3fa 583 &iio_const_attr_in5_index.dev_attr.attr,
8d9c636b 584 &iio_scan_el_in6.dev_attr.attr, &dev_attr_in6_type.attr,
77b3d3fa 585 &iio_const_attr_in6_index.dev_attr.attr,
8d9c636b 586 &iio_scan_el_in7.dev_attr.attr, &dev_attr_in7_type.attr,
77b3d3fa 587 &iio_const_attr_in7_index.dev_attr.attr,
8d9c636b 588 &iio_scan_el_in0min1.dev_attr.attr, &dev_attr_in0min1_type.attr,
77b3d3fa 589 &iio_const_attr_in0min1_index.dev_attr.attr,
8d9c636b 590 &iio_scan_el_in2min3.dev_attr.attr, &dev_attr_in2min3_type.attr,
77b3d3fa 591 &iio_const_attr_in2min3_index.dev_attr.attr,
8d9c636b 592 &iio_scan_el_in4min5.dev_attr.attr, &dev_attr_in4min5_type.attr,
77b3d3fa 593 &iio_const_attr_in4min5_index.dev_attr.attr,
8d9c636b 594 &iio_scan_el_in6min7.dev_attr.attr, &dev_attr_in6min7_type.attr,
77b3d3fa 595 &iio_const_attr_in6min7_index.dev_attr.attr,
8d9c636b 596 &iio_scan_el_in1min0.dev_attr.attr, &dev_attr_in1min0_type.attr,
77b3d3fa 597 &iio_const_attr_in1min0_index.dev_attr.attr,
8d9c636b 598 &iio_scan_el_in3min2.dev_attr.attr, &dev_attr_in3min2_type.attr,
77b3d3fa 599 &iio_const_attr_in3min2_index.dev_attr.attr,
8d9c636b 600 &iio_scan_el_in5min4.dev_attr.attr, &dev_attr_in5min4_type.attr,
77b3d3fa 601 &iio_const_attr_in5min4_index.dev_attr.attr,
8d9c636b 602 &iio_scan_el_in7min6.dev_attr.attr, &dev_attr_in7min6_type.attr,
77b3d3fa
JC		 603 &iio_const_attr_in7min6_index.dev_attr.attr,
604 NULL
c3fa0fdd
JC		 605};
606
607static struct attribute_group max11608_scan_el_group = {
608 .name = "scan_elements",
609 .attrs = max11608_scan_el_attrs,
610};
611
d1325cf4
JC		 612enum { max1361,
613 max1362,
614 max1363,
615 max1364,
3bf877c1
JC		 616 max1036,
617 max1037,
618 max1038,
619 max1039,
d1325cf4
JC		 620 max1136,
621 max1137,
622 max1138,
623 max1139,
624 max1236,
625 max1237,
626 max1238,
627 max1239,
3bf877c1
JC		 628 max11600,
629 max11601,
630 max11602,
631 max11603,
632 max11604,
633 max11605,
c3fa0fdd
JC		 634 max11606,
635 max11607,
636 max11608,
637 max11609,
638 max11610,
639 max11611,
640 max11612,
641 max11613,
642 max11614,
643 max11615,
644 max11616,
645 max11617,
d1325cf4
JC		 646};
647
648/* max1363 and max1368 tested - rest from data sheet */
649static const struct max1363_chip_info max1363_chip_info_tbl[] = {
962a4ccb 650 [max1361] = {
d1325cf4 651 .num_inputs = 4,
82020b0e
JC		 652 .bits = 10,
653 .int_vref_mv = 2048,
d1325cf4
JC		 654 .monitor_mode = 1,
655 .mode_list = max1363_mode_list,
656 .num_modes = ARRAY_SIZE(max1363_mode_list),
657 .default_mode = s0to3,
82020b0e
JC		 658 .dev_attrs = &max1363_dev_attr_group,
659 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 660 },
661 [max1362] = {
d1325cf4 662 .num_inputs = 4,
82020b0e
JC		 663 .bits = 10,
664 .int_vref_mv = 4096,
d1325cf4
JC		 665 .monitor_mode = 1,
666 .mode_list = max1363_mode_list,
667 .num_modes = ARRAY_SIZE(max1363_mode_list),
668 .default_mode = s0to3,
82020b0e
JC		 669 .dev_attrs = &max1363_dev_attr_group,
670 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 671 },
672 [max1363] = {
d1325cf4 673 .num_inputs = 4,
82020b0e
JC		 674 .bits = 12,
675 .int_vref_mv = 2048,
d1325cf4
JC		 676 .monitor_mode = 1,
677 .mode_list = max1363_mode_list,
678 .num_modes = ARRAY_SIZE(max1363_mode_list),
679 .default_mode = s0to3,
82020b0e
JC		 680 .dev_attrs = &max1363_dev_attr_group,
681 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 682 },
683 [max1364] = {
d1325cf4 684 .num_inputs = 4,
82020b0e
JC		 685 .bits = 12,
686 .int_vref_mv = 4096,
d1325cf4
JC		 687 .monitor_mode = 1,
688 .mode_list = max1363_mode_list,
689 .num_modes = ARRAY_SIZE(max1363_mode_list),
690 .default_mode = s0to3,
82020b0e
JC		 691 .dev_attrs = &max1363_dev_attr_group,
692 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 693 },
694 [max1036] = {
3bf877c1
JC		 695 .num_inputs = 4,
696 .bits = 8,
697 .int_vref_mv = 4096,
698 .mode_list = max1236_mode_list,
699 .num_modes = ARRAY_SIZE(max1236_mode_list),
700 .default_mode = s0to3,
701 .dev_attrs = &max1363_dev_attr_group,
702 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 703 },
704 [max1037] = {
3bf877c1
JC		 705 .num_inputs = 4,
706 .bits = 8,
707 .int_vref_mv = 2048,
708 .mode_list = max1236_mode_list,
709 .num_modes = ARRAY_SIZE(max1236_mode_list),
710 .default_mode = s0to3,
711 .dev_attrs = &max1363_dev_attr_group,
712 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 713 },
714 [max1038] = {
3bf877c1
JC		 715 .num_inputs = 12,
716 .bits = 8,
717 .int_vref_mv = 4096,
718 .mode_list = max1238_mode_list,
719 .num_modes = ARRAY_SIZE(max1238_mode_list),
720 .default_mode = s0to11,
721 .dev_attrs = &max1238_dev_attr_group,
722 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 723 },
724 [max1039] = {
3bf877c1
JC		 725 .num_inputs = 12,
726 .bits = 8,
727 .int_vref_mv = 2048,
728 .mode_list = max1238_mode_list,
729 .num_modes = ARRAY_SIZE(max1238_mode_list),
730 .default_mode = s0to11,
731 .dev_attrs = &max1238_dev_attr_group,
732 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 733 },
734 [max1136] = {
d1325cf4 735 .num_inputs = 4,
82020b0e 736 .bits = 10,
d1325cf4
JC		 737 .int_vref_mv = 4096,
738 .mode_list = max1236_mode_list,
739 .num_modes = ARRAY_SIZE(max1236_mode_list),
740 .default_mode = s0to3,
82020b0e
JC		 741 .dev_attrs = &max1363_dev_attr_group,
742 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 743 },
744 [max1137] = {
d1325cf4 745 .num_inputs = 4,
82020b0e 746 .bits = 10,
d1325cf4
JC		 747 .int_vref_mv = 2048,
748 .mode_list = max1236_mode_list,
749 .num_modes = ARRAY_SIZE(max1236_mode_list),
750 .default_mode = s0to3,
82020b0e
JC		 751 .dev_attrs = &max1363_dev_attr_group,
752 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 753 },
754 [max1138] = {
d1325cf4 755 .num_inputs = 12,
82020b0e 756 .bits = 10,
d1325cf4
JC		 757 .int_vref_mv = 4096,
758 .mode_list = max1238_mode_list,
759 .num_modes = ARRAY_SIZE(max1238_mode_list),
760 .default_mode = s0to11,
82020b0e
JC		 761 .dev_attrs = &max1238_dev_attr_group,
762 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 763 },
764 [max1139] = {
d1325cf4 765 .num_inputs = 12,
82020b0e 766 .bits = 10,
d1325cf4
JC		 767 .int_vref_mv = 2048,
768 .mode_list = max1238_mode_list,
769 .num_modes = ARRAY_SIZE(max1238_mode_list),
770 .default_mode = s0to11,
82020b0e
JC		 771 .dev_attrs = &max1238_dev_attr_group,
772 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 773 },
774 [max1236] = {
d1325cf4 775 .num_inputs = 4,
82020b0e 776 .bits = 12,
d1325cf4
JC		 777 .int_vref_mv = 4096,
778 .mode_list = max1236_mode_list,
779 .num_modes = ARRAY_SIZE(max1236_mode_list),
780 .default_mode = s0to3,
82020b0e
JC		 781 .dev_attrs = &max1363_dev_attr_group,
782 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 783 },
784 [max1237] = {
d1325cf4 785 .num_inputs = 4,
82020b0e 786 .bits = 12,
d1325cf4
JC		 787 .int_vref_mv = 2048,
788 .mode_list = max1236_mode_list,
789 .num_modes = ARRAY_SIZE(max1236_mode_list),
790 .default_mode = s0to3,
82020b0e
JC		 791 .dev_attrs = &max1363_dev_attr_group,
792 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 793 },
794 [max1238] = {
d1325cf4 795 .num_inputs = 12,
82020b0e 796 .bits = 12,
d1325cf4
JC		 797 .int_vref_mv = 4096,
798 .mode_list = max1238_mode_list,
799 .num_modes = ARRAY_SIZE(max1238_mode_list),
800 .default_mode = s0to11,
82020b0e
JC		 801 .dev_attrs = &max1238_dev_attr_group,
802 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 803 },
804 [max1239] = {
d1325cf4 805 .num_inputs = 12,
82020b0e 806 .bits = 12,
d1325cf4
JC		 807 .int_vref_mv = 2048,
808 .mode_list = max1238_mode_list,
809 .num_modes = ARRAY_SIZE(max1238_mode_list),
810 .default_mode = s0to11,
82020b0e
JC		 811 .dev_attrs = &max1238_dev_attr_group,
812 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 813 },
814 [max11600] = {
3bf877c1
JC		 815 .num_inputs = 4,
816 .bits = 8,
817 .int_vref_mv = 4096,
818 .mode_list = max11607_mode_list,
819 .num_modes = ARRAY_SIZE(max11607_mode_list),
820 .default_mode = s0to3,
821 .dev_attrs = &max1363_dev_attr_group,
822 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 823 },
824 [max11601] = {
3bf877c1
JC		 825 .num_inputs = 4,
826 .bits = 8,
827 .int_vref_mv = 2048,
828 .mode_list = max11607_mode_list,
829 .num_modes = ARRAY_SIZE(max11607_mode_list),
830 .default_mode = s0to3,
831 .dev_attrs = &max1363_dev_attr_group,
832 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 833 },
834 [max11602] = {
3bf877c1
JC		 835 .num_inputs = 8,
836 .bits = 8,
837 .int_vref_mv = 4096,
838 .mode_list = max11608_mode_list,
839 .num_modes = ARRAY_SIZE(max11608_mode_list),
840 .default_mode = s0to7,
841 .dev_attrs = &max11608_dev_attr_group,
842 .scan_attrs = &max11608_scan_el_group,
962a4ccb
JC		 843 },
844 [max11603] = {
3bf877c1
JC		 845 .num_inputs = 8,
846 .bits = 8,
847 .int_vref_mv = 2048,
848 .mode_list = max11608_mode_list,
849 .num_modes = ARRAY_SIZE(max11608_mode_list),
850 .default_mode = s0to7,
851 .dev_attrs = &max11608_dev_attr_group,
852 .scan_attrs = &max11608_scan_el_group,
962a4ccb
JC		 853 },
854 [max11604] = {
3bf877c1
JC		 855 .num_inputs = 12,
856 .bits = 8,
857 .int_vref_mv = 4098,
858 .mode_list = max1238_mode_list,
859 .num_modes = ARRAY_SIZE(max1238_mode_list),
860 .default_mode = s0to11,
861 .dev_attrs = &max1238_dev_attr_group,
862 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 863 },
864 [max11605] = {
3bf877c1
JC		 865 .num_inputs = 12,
866 .bits = 8,
867 .int_vref_mv = 2048,
868 .mode_list = max1238_mode_list,
869 .num_modes = ARRAY_SIZE(max1238_mode_list),
870 .default_mode = s0to11,
871 .dev_attrs = &max1238_dev_attr_group,
872 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 873 },
874 [max11606] = {
c3fa0fdd
JC		 875 .num_inputs = 4,
876 .bits = 10,
877 .int_vref_mv = 4096,
878 .mode_list = max11607_mode_list,
879 .num_modes = ARRAY_SIZE(max11607_mode_list),
880 .default_mode = s0to3,
881 .dev_attrs = &max1363_dev_attr_group,
882 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 883 },
884 [max11607] = {
c3fa0fdd
JC		 885 .num_inputs = 4,
886 .bits = 10,
887 .int_vref_mv = 2048,
888 .mode_list = max11607_mode_list,
889 .num_modes = ARRAY_SIZE(max11607_mode_list),
890 .default_mode = s0to3,
891 .dev_attrs = &max1363_dev_attr_group,
892 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 893 },
894 [max11608] = {
c3fa0fdd
JC		 895 .num_inputs = 8,
896 .bits = 10,
897 .int_vref_mv = 4096,
898 .mode_list = max11608_mode_list,
899 .num_modes = ARRAY_SIZE(max11608_mode_list),
900 .default_mode = s0to7,
901 .dev_attrs = &max11608_dev_attr_group,
902 .scan_attrs = &max11608_scan_el_group,
962a4ccb
JC		 903 },
904 [max11609] = {
c3fa0fdd
JC		 905 .num_inputs = 8,
906 .bits = 10,
907 .int_vref_mv = 2048,
908 .mode_list = max11608_mode_list,
909 .num_modes = ARRAY_SIZE(max11608_mode_list),
910 .default_mode = s0to7,
911 .dev_attrs = &max11608_dev_attr_group,
912 .scan_attrs = &max11608_scan_el_group,
962a4ccb
JC		 913 },
914 [max11610] = {
c3fa0fdd
JC		 915 .num_inputs = 12,
916 .bits = 10,
917 .int_vref_mv = 4098,
918 .mode_list = max1238_mode_list,
919 .num_modes = ARRAY_SIZE(max1238_mode_list),
920 .default_mode = s0to11,
921 .dev_attrs = &max1238_dev_attr_group,
922 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 923 },
924 [max11611] = {
c3fa0fdd
JC		 925 .num_inputs = 12,
926 .bits = 10,
927 .int_vref_mv = 2048,
928 .mode_list = max1238_mode_list,
929 .num_modes = ARRAY_SIZE(max1238_mode_list),
930 .default_mode = s0to11,
931 .dev_attrs = &max1238_dev_attr_group,
932 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 933 },
934 [max11612] = {
c3fa0fdd
JC		 935 .num_inputs = 4,
936 .bits = 12,
937 .int_vref_mv = 4096,
938 .mode_list = max11607_mode_list,
939 .num_modes = ARRAY_SIZE(max11607_mode_list),
940 .default_mode = s0to3,
941 .dev_attrs = &max1363_dev_attr_group,
942 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 943 },
944 [max11613] = {
c3fa0fdd
JC		 945 .num_inputs = 4,
946 .bits = 12,
947 .int_vref_mv = 2048,
948 .mode_list = max11607_mode_list,
949 .num_modes = ARRAY_SIZE(max11607_mode_list),
950 .default_mode = s0to3,
951 .dev_attrs = &max1363_dev_attr_group,
952 .scan_attrs = &max1363_scan_el_group,
962a4ccb
JC		 953 },
954 [max11614] = {
c3fa0fdd
JC		 955 .num_inputs = 8,
956 .bits = 12,
957 .int_vref_mv = 4096,
958 .mode_list = max11608_mode_list,
959 .num_modes = ARRAY_SIZE(max11608_mode_list),
960 .default_mode = s0to7,
961 .dev_attrs = &max11608_dev_attr_group,
962 .scan_attrs = &max11608_scan_el_group,
962a4ccb
JC		 963 },
964 [max11615] = {
c3fa0fdd
JC		 965 .num_inputs = 8,
966 .bits = 12,
967 .int_vref_mv = 2048,
968 .mode_list = max11608_mode_list,
969 .num_modes = ARRAY_SIZE(max11608_mode_list),
970 .default_mode = s0to7,
971 .dev_attrs = &max11608_dev_attr_group,
972 .scan_attrs = &max11608_scan_el_group,
962a4ccb
JC		 973 },
974 [max11616] = {
c3fa0fdd
JC		 975 .num_inputs = 12,
976 .bits = 12,
977 .int_vref_mv = 4098,
978 .mode_list = max1238_mode_list,
979 .num_modes = ARRAY_SIZE(max1238_mode_list),
980 .default_mode = s0to11,
981 .dev_attrs = &max1238_dev_attr_group,
982 .scan_attrs = &max1238_scan_el_group,
962a4ccb
JC		 983 },
984 [max11617] = {
c3fa0fdd
JC		 985 .num_inputs = 12,
986 .bits = 12,
987 .int_vref_mv = 2048,
988 .mode_list = max1238_mode_list,
989 .num_modes = ARRAY_SIZE(max1238_mode_list),
990 .default_mode = s0to11,
991 .dev_attrs = &max1238_dev_attr_group,
992 .scan_attrs = &max1238_scan_el_group,
993 }
d1325cf4
JC		 994};
995
440a5200
JC		 996static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,
997 8300, 4200, 2000, 1000 };
998
999static ssize_t max1363_monitor_show_freq(struct device *dev,
1000 struct device_attribute *attr,
1001 char *buf)
1002{
1003 struct iio_dev *dev_info = dev_get_drvdata(dev);
1004 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1005 return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);
1006}
1007
1008static ssize_t max1363_monitor_store_freq(struct device *dev,
1009 struct device_attribute *attr,
1010 const char *buf,
1011 size_t len)
1012{
1013 struct iio_dev *dev_info = dev_get_drvdata(dev);
1014 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1015 int i, ret;
1016 unsigned long val;
1017 bool found = false;
1018
1019 ret = strict_strtoul(buf, 10, &val);
1020 if (ret)
1021 return -EINVAL;
1022 for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)
1023 if (val == max1363_monitor_speeds[i]) {
1024 found = true;
1025 break;
1026 }
1027 if (!found)
1028 return -EINVAL;
1029
1030 mutex_lock(&dev_info->mlock);
1031 st->monitor_speed = i;
1032 mutex_unlock(&dev_info->mlock);
1033
1034 return 0;
1035}
1036
1037static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
1038 max1363_monitor_show_freq,
1039 max1363_monitor_store_freq);
1040
1041static IIO_CONST_ATTR(sampling_frequency_available,
1042 "133000 665000 33300 16600 8300 4200 2000 1000");
1043
1044static ssize_t max1363_show_thresh(struct device *dev,
1045 struct device_attribute *attr,
1046 char *buf,
1047 bool high)
1048{
1049 struct iio_dev *dev_info = dev_get_drvdata(dev);
1050 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1051 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1052
1053 if (high)
1054 return sprintf(buf, "%d\n",
1055 st->thresh_high[this_attr->address]);
1056 else
1057 return sprintf(buf, "%d\n",
1058 st->thresh_low[this_attr->address & 0x7]);
1059}
1060
1061static ssize_t max1363_show_thresh_low(struct device *dev,
1062 struct device_attribute *attr,
1063 char *buf)
1064{
1065 return max1363_show_thresh(dev, attr, buf, false);
1066}
1067
1068static ssize_t max1363_show_thresh_high(struct device *dev,
1069 struct device_attribute *attr,
1070 char *buf)
1071{
1072 return max1363_show_thresh(dev, attr, buf, true);
1073}
1074
1075static ssize_t max1363_store_thresh_unsigned(struct device *dev,
1076 struct device_attribute *attr,
1077 const char *buf,
1078 size_t len,
1079 bool high)
1080{
1081 struct iio_dev *dev_info = dev_get_drvdata(dev);
1082 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1083 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1084 unsigned long val;
1085 int ret;
1086
1087 ret = strict_strtoul(buf, 10, &val);
1088 if (ret)
1089 return -EINVAL;
1090 switch (st->chip_info->bits) {
1091 case 10:
1092 if (val > 0x3FF)
1093 return -EINVAL;
1094 break;
1095 case 12:
1096 if (val > 0xFFF)
1097 return -EINVAL;
1098 break;
1099 }
1100
1101 switch (high) {
1102 case 1:
1103 st->thresh_high[this_attr->address] = val;
1104 break;
1105 case 0:
1106 st->thresh_low[this_attr->address & 0x7] = val;
1107 break;
1108 }
1109
1110 return len;
1111}
1112
1113static ssize_t max1363_store_thresh_high_unsigned(struct device *dev,
1114 struct device_attribute *attr,
1115 const char *buf,
1116 size_t len)
1117{
1118 return max1363_store_thresh_unsigned(dev, attr, buf, len, true);
1119}
1120
1121static ssize_t max1363_store_thresh_low_unsigned(struct device *dev,
1122 struct device_attribute *attr,
1123 const char *buf,
1124 size_t len)
1125{
1126 return max1363_store_thresh_unsigned(dev, attr, buf, len, false);
1127}
1128
1129static ssize_t max1363_store_thresh_signed(struct device *dev,
1130 struct device_attribute *attr,
1131 const char *buf,
1132 size_t len,
1133 bool high)
1134{
1135 struct iio_dev *dev_info = dev_get_drvdata(dev);
1136 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1137 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1138 long val;
1139 int ret;
1140
1141 ret = strict_strtol(buf, 10, &val);
1142 if (ret)
1143 return -EINVAL;
1144 switch (st->chip_info->bits) {
1145 case 10:
1146 if (val < -512 || val > 511)
1147 return -EINVAL;
1148 break;
1149 case 12:
1150 if (val < -2048 || val > 2047)
1151 return -EINVAL;
1152 break;
1153 }
1154
1155 switch (high) {
1156 case 1:
1157 st->thresh_high[this_attr->address] = val;
1158 break;
1159 case 0:
1160 st->thresh_low[this_attr->address & 0x7] = val;
1161 break;
1162 }
1163
1164 return len;
1165}
1166
1167static ssize_t max1363_store_thresh_high_signed(struct device *dev,
1168 struct device_attribute *attr,
1169 const char *buf,
1170 size_t len)
1171{
1172 return max1363_store_thresh_signed(dev, attr, buf, len, true);
1173}
1174
1175static ssize_t max1363_store_thresh_low_signed(struct device *dev,
1176 struct device_attribute *attr,
1177 const char *buf,
1178 size_t len)
1179{
1180 return max1363_store_thresh_signed(dev, attr, buf, len, false);
1181}
1182
1183static IIO_DEVICE_ATTR(in0_thresh_high_value, S_IRUGO | S_IWUSR,
1184 max1363_show_thresh_high,
1185 max1363_store_thresh_high_unsigned, 0);
1186static IIO_DEVICE_ATTR(in0_thresh_low_value, S_IRUGO | S_IWUSR,
1187 max1363_show_thresh_low,
1188 max1363_store_thresh_low_unsigned, 0);
1189static IIO_DEVICE_ATTR(in1_thresh_high_value, S_IRUGO | S_IWUSR,
1190 max1363_show_thresh_high,
1191 max1363_store_thresh_high_unsigned, 1);
1192static IIO_DEVICE_ATTR(in1_thresh_low_value, S_IRUGO | S_IWUSR,
1193 max1363_show_thresh_low,
1194 max1363_store_thresh_low_unsigned, 1);
1195static IIO_DEVICE_ATTR(in2_thresh_high_value, S_IRUGO | S_IWUSR,
1196 max1363_show_thresh_high,
1197 max1363_store_thresh_high_unsigned, 2);
1198static IIO_DEVICE_ATTR(in2_thresh_low_value, S_IRUGO | S_IWUSR,
1199 max1363_show_thresh_low,
1200 max1363_store_thresh_low_unsigned, 2);
1201static IIO_DEVICE_ATTR(in3_thresh_high_value, S_IRUGO | S_IWUSR,
1202 max1363_show_thresh_high,
1203 max1363_store_thresh_high_unsigned, 3);
1204static IIO_DEVICE_ATTR(in3_thresh_low_value, S_IRUGO | S_IWUSR,
1205 max1363_show_thresh_low,
1206 max1363_store_thresh_low_unsigned, 3);
1207
1208static IIO_DEVICE_ATTR_NAMED(in0min1_thresh_high_value,
1209 in0-in1_thresh_high_value,
1210 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1211 max1363_store_thresh_high_signed, 4);
1212static IIO_DEVICE_ATTR_NAMED(in0min1_thresh_low_value,
1213 in0-in1_thresh_low_value,
1214 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1215 max1363_store_thresh_low_signed, 4);
1216static IIO_DEVICE_ATTR_NAMED(in2min3_thresh_high_value,
1217 in2-in3_thresh_high_value,
1218 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1219 max1363_store_thresh_high_signed, 5);
1220static IIO_DEVICE_ATTR_NAMED(in2min3_thresh_low_value,
1221 in2-in3_thresh_low_value,
1222 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1223 max1363_store_thresh_low_signed, 5);
1224static IIO_DEVICE_ATTR_NAMED(in1min0_thresh_high_value,
1225 in1-in0_thresh_high_value,
1226 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1227 max1363_store_thresh_high_signed, 6);
1228static IIO_DEVICE_ATTR_NAMED(in1min0_thresh_low_value,
1229 in1-in0_thresh_low_value,
1230 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1231 max1363_store_thresh_low_signed, 6);
1232static IIO_DEVICE_ATTR_NAMED(in3min2_thresh_high_value,
1233 in3-in2_thresh_high_value,
1234 S_IRUGO | S_IWUSR, max1363_show_thresh_high,
1235 max1363_store_thresh_high_signed, 7);
1236static IIO_DEVICE_ATTR_NAMED(in3min2_thresh_low_value,
1237 in3-in2_thresh_low_value,
1238 S_IRUGO | S_IWUSR, max1363_show_thresh_low,
1239 max1363_store_thresh_low_signed, 7);
1240
1241static int max1363_int_th(struct iio_dev *dev_info,
1242 int index,
1243 s64 timestamp,
1244 int not_test)
1245{
1246 struct max1363_state *st = dev_info->dev_data;
1247
1248 st->last_timestamp = timestamp;
1249 schedule_work(&st->thresh_work);
1250 return 0;
1251}
1252
1253static void max1363_thresh_handler_bh(struct work_struct *work_s)
1254{
1255 struct max1363_state *st = container_of(work_s, struct max1363_state,
1256 thresh_work);
1257 u8 rx;
1258 u8 tx[2] = { st->setupbyte,
1259 MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };
1260
1261 i2c_master_recv(st->client, &rx, 1);
1262 if (rx & (1 << 0))
1263 iio_push_event(st->indio_dev, 0,
1264 IIO_EVENT_CODE_IN_LOW_THRESH(3),
1265 st->last_timestamp);
1266 if (rx & (1 << 1))
1267 iio_push_event(st->indio_dev, 0,
1268 IIO_EVENT_CODE_IN_HIGH_THRESH(3),
1269 st->last_timestamp);
1270 if (rx & (1 << 2))
1271 iio_push_event(st->indio_dev, 0,
1272 IIO_EVENT_CODE_IN_LOW_THRESH(2),
1273 st->last_timestamp);
1274 if (rx & (1 << 3))
1275 iio_push_event(st->indio_dev, 0,
1276 IIO_EVENT_CODE_IN_HIGH_THRESH(2),
1277 st->last_timestamp);
1278 if (rx & (1 << 4))
1279 iio_push_event(st->indio_dev, 0,
1280 IIO_EVENT_CODE_IN_LOW_THRESH(1),
1281 st->last_timestamp);
1282 if (rx & (1 << 5))
1283 iio_push_event(st->indio_dev, 0,
1284 IIO_EVENT_CODE_IN_HIGH_THRESH(1),
1285 st->last_timestamp);
1286 if (rx & (1 << 6))
1287 iio_push_event(st->indio_dev, 0,
1288 IIO_EVENT_CODE_IN_LOW_THRESH(0),
1289 st->last_timestamp);
1290 if (rx & (1 << 7))
1291 iio_push_event(st->indio_dev, 0,
1292 IIO_EVENT_CODE_IN_HIGH_THRESH(0),
1293 st->last_timestamp);
1294 enable_irq(st->client->irq);
1295 i2c_master_send(st->client, tx, 2);
1296}
1297
1298static ssize_t max1363_read_interrupt_config(struct device *dev,
1299 struct device_attribute *attr,
1300 char *buf)
1301{
1302 struct iio_dev *dev_info = dev_get_drvdata(dev);
1303 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1304 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
1305 int val;
1306
1307 mutex_lock(&dev_info->mlock);
1308 if (this_attr->mask & 0x8)
1309 val = (1 << (this_attr->mask & 0x7)) & st->mask_low;
1310 else
1311 val = (1 << this_attr->mask) & st->mask_high;
1312 mutex_unlock(&dev_info->mlock);
1313
1314 return sprintf(buf, "%d\n", !!val);
1315}
1316
1317static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
1318{
1319 u8 *tx_buf;
1320 int ret, i = 3, j;
1321 unsigned long numelements;
1322 int len;
1323 long modemask;
1324
1325 if (!enabled) {
1326 /* transition to ring capture is not currently supported */
1327 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
1328 st->configbyte &= ~MAX1363_SCAN_MASK;
1329 st->monitor_on = false;
1330 return max1363_write_basic_config(st->client,
1331 st->setupbyte,
1332 st->configbyte);
1333 }
1334
1335 /* Ensure we are in the relevant mode */
1336 st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;
1337 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
1338 | MAX1363_SCAN_MASK
1339 | MAX1363_SE_DE_MASK);
1340 st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;
1341 if ((st->mask_low | st->mask_high) & 0x0F) {
1342 st->configbyte |= max1363_mode_table[s0to3].conf;
1343 modemask = max1363_mode_table[s0to3].modemask;
1344 } else if ((st->mask_low | st->mask_high) & 0x30) {
1345 st->configbyte |= max1363_mode_table[d0m1to2m3].conf;
1346 modemask = max1363_mode_table[d0m1to2m3].modemask;
1347 } else {
1348 st->configbyte |= max1363_mode_table[d1m0to3m2].conf;
1349 modemask = max1363_mode_table[d1m0to3m2].modemask;
1350 }
1351 numelements = hweight_long(modemask);
1352 len = 3 * numelements + 3;
1353 tx_buf = kmalloc(len, GFP_KERNEL);
1354 if (!tx_buf) {
1355 ret = -ENOMEM;
1356 goto error_ret;
1357 }
1358 tx_buf[0] = st->configbyte;
1359 tx_buf[1] = st->setupbyte;
1360 tx_buf[2] = (st->monitor_speed << 1);
1361
1362 /*
1363 * So we need to do yet another bit of nefarious scan mode
1364 * setup to match what we need.
1365 */
1366 for (j = 0; j < 8; j++)
1367 if (modemask & (1 << j)) {
1368 /* Establish the mode is in the scan */
1369 if (st->mask_low & (1 << j)) {
1370 tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;
1371 tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;
1372 } else if (j < 4) {
1373 tx_buf[i] = 0;
1374 tx_buf[i + 1] = 0;
1375 } else {
1376 tx_buf[i] = 0x80;
1377 tx_buf[i + 1] = 0;
1378 }
1379 if (st->mask_high & (1 << j)) {
1380 tx_buf[i + 1] |=
1381 (st->thresh_high[j] >> 8) & 0x0F;
1382 tx_buf[i + 2] = st->thresh_high[j] & 0xFF;
1383 } else if (j < 4) {
1384 tx_buf[i + 1] |= 0x0F;
1385 tx_buf[i + 2] = 0xFF;
1386 } else {
1387 tx_buf[i + 1] |= 0x07;
1388 tx_buf[i + 2] = 0xFF;
1389 }
1390 i += 3;
1391 }
1392
1393
1394 ret = i2c_master_send(st->client, tx_buf, len);
1395 if (ret < 0)
1396 goto error_ret;
1397 if (ret != len) {
1398 ret = -EIO;
1399 goto error_ret;
1400 }
1401
1402 /*
1403 * Now that we hopefully have sensible thresholds in place it is
1404 * time to turn the interrupts on.
1405 * It is unclear from the data sheet if this should be necessary
1406 * (i.e. whether monitor mode setup is atomic) but it appears to
1407 * be in practice.
1408 */
1409 tx_buf[0] = st->setupbyte;
1410 tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;
1411 ret = i2c_master_send(st->client, tx_buf, 2);
1412 if (ret < 0)
1413 goto error_ret;
1414 if (ret != 2) {
1415 ret = -EIO;
1416 goto error_ret;
1417 }
1418 ret = 0;
1419 st->monitor_on = true;
1420error_ret:
1421
1422 kfree(tx_buf);
1423
1424 return ret;
1425}
1426
1427/*
25985edc 1428 * To keep this manageable we always use one of 3 scan modes.
440a5200
JC		 1429 * Scan 0...3, 0-1,2-3 and 1-0,3-2
1430 */
1431static inline int __max1363_check_event_mask(int thismask, int checkmask)
1432{
1433 int ret = 0;
1434 /* Is it unipolar */
1435 if (thismask < 4) {
1436 if (checkmask & ~0x0F) {
1437 ret = -EBUSY;
1438 goto error_ret;
1439 }
1440 } else if (thismask < 6) {
1441 if (checkmask & ~0x30) {
1442 ret = -EBUSY;
1443 goto error_ret;
1444 }
1445 } else if (checkmask & ~0xC0)
1446 ret = -EBUSY;
1447error_ret:
1448 return ret;
1449}
1450
1451static ssize_t max1363_write_interrupt_config(struct device *dev,
1452 struct device_attribute *attr,
1453 const char *buf,
1454 size_t len)
1455{
1456 struct iio_dev *dev_info = dev_get_drvdata(dev);
1457 struct max1363_state *st = iio_dev_get_devdata(dev_info);
1458 struct iio_event_attr *this_attr = to_iio_event_attr(attr);
1459 unsigned long val;
1460 int ret;
1461 u16 unifiedmask;
1462 ret = strict_strtoul(buf, 10, &val);
1463 if (ret)
1464 return -EINVAL;
1465 mutex_lock(&st->indio_dev->mlock);
1466 unifiedmask = st->mask_low | st->mask_high;
1467 if (this_attr->mask & 0x08) {
1468 /* If we are disabling no need to test */
1469 if (val == 0)
1470 st->mask_low &= ~(1 << (this_attr->mask & 0x7));
1471 else {
1472 ret = __max1363_check_event_mask(this_attr->mask & 0x7,
1473 unifiedmask);
1474 if (ret)
1475 goto error_ret;
1476 st->mask_low |= (1 << (this_attr->mask & 0x7));
1477 }
1478 } else {
1479 if (val == 0)
1480 st->mask_high &= ~(1 << (this_attr->mask));
1481 else {
1482 ret = __max1363_check_event_mask(this_attr->mask,
1483 unifiedmask);
1484 if (ret)
1485 goto error_ret;
1486 st->mask_high |= (1 << this_attr->mask);
1487 }
1488 }
1489 if (st->monitor_on && !st->mask_high && !st->mask_low)
1490 iio_remove_event_from_list(this_attr->listel,
1491 &dev_info->interrupts[0]->ev_list);
1492 if (!st->monitor_on && val)
1493 iio_add_event_to_list(this_attr->listel,
1494 &dev_info->interrupts[0]->ev_list);
1495
1496 max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));
1497error_ret:
1498 mutex_unlock(&st->indio_dev->mlock);
1499
1500 return len;
1501}
1502
1503IIO_EVENT_SH(max1363_thresh, max1363_int_th);
1504
1505#define MAX1363_HIGH_THRESH(a) a
1506#define MAX1363_LOW_THRESH(a) (a | 0x8)
1507
1508IIO_EVENT_ATTR_SH(in0_thresh_high_en,
1509 iio_event_max1363_thresh,
1510 max1363_read_interrupt_config,
1511 max1363_write_interrupt_config,
1512 MAX1363_HIGH_THRESH(0));
1513
1514IIO_EVENT_ATTR_SH(in0_thresh_low_en,
1515 iio_event_max1363_thresh,
1516 max1363_read_interrupt_config,
1517 max1363_write_interrupt_config,
1518 MAX1363_LOW_THRESH(0));
1519
1520IIO_EVENT_ATTR_SH(in1_thresh_high_en,
1521 iio_event_max1363_thresh,
1522 max1363_read_interrupt_config,
1523 max1363_write_interrupt_config,
1524 MAX1363_HIGH_THRESH(1));
1525
1526IIO_EVENT_ATTR_SH(in1_thresh_low_en,
1527 iio_event_max1363_thresh,
1528 max1363_read_interrupt_config,
1529 max1363_write_interrupt_config,
1530 MAX1363_LOW_THRESH(1));
1531
1532IIO_EVENT_ATTR_SH(in2_thresh_high_en,
1533 iio_event_max1363_thresh,
1534 max1363_read_interrupt_config,
1535 max1363_write_interrupt_config,
1536 MAX1363_HIGH_THRESH(2));
1537
1538IIO_EVENT_ATTR_SH(in2_thresh_low_en,
1539 iio_event_max1363_thresh,
1540 max1363_read_interrupt_config,
1541 max1363_write_interrupt_config,
1542 MAX1363_LOW_THRESH(2));
1543
1544IIO_EVENT_ATTR_SH(in3_thresh_high_en,
1545 iio_event_max1363_thresh,
1546 max1363_read_interrupt_config,
1547 max1363_write_interrupt_config,
1548 MAX1363_HIGH_THRESH(3));
1549
1550IIO_EVENT_ATTR_SH(in3_thresh_low_en,
1551 iio_event_max1363_thresh,
1552 max1363_read_interrupt_config,
1553 max1363_write_interrupt_config,
1554 MAX1363_LOW_THRESH(3));
1555
1556IIO_EVENT_ATTR_NAMED_SH(in0min1_thresh_high_en,
1557 in0-in1_thresh_high_en,
1558 iio_event_max1363_thresh,
1559 max1363_read_interrupt_config,
1560 max1363_write_interrupt_config,
1561 MAX1363_HIGH_THRESH(4));
1562
1563IIO_EVENT_ATTR_NAMED_SH(in0min1_thresh_low_en,
1564 in0-in1_thresh_low_en,
1565 iio_event_max1363_thresh,
1566 max1363_read_interrupt_config,
1567 max1363_write_interrupt_config,
1568 MAX1363_LOW_THRESH(4));
1569
1570IIO_EVENT_ATTR_NAMED_SH(in3min2_thresh_high_en,
1571 in3-in2_thresh_high_en,
1572 iio_event_max1363_thresh,
1573 max1363_read_interrupt_config,
1574 max1363_write_interrupt_config,
1575 MAX1363_HIGH_THRESH(5));
1576
1577IIO_EVENT_ATTR_NAMED_SH(in3min2_thresh_low_en,
1578 in3-in2_thresh_low_en,
1579 iio_event_max1363_thresh,
1580 max1363_read_interrupt_config,
1581 max1363_write_interrupt_config,
1582 MAX1363_LOW_THRESH(5));
1583
1584IIO_EVENT_ATTR_NAMED_SH(in1min0_thresh_high_en,
1585 in1-in0_thresh_high_en,
1586 iio_event_max1363_thresh,
1587 max1363_read_interrupt_config,
1588 max1363_write_interrupt_config,
1589 MAX1363_HIGH_THRESH(6));
1590
1591IIO_EVENT_ATTR_NAMED_SH(in1min0_thresh_low_en,
1592 in1-in0_thresh_low_en,
1593 iio_event_max1363_thresh,
1594 max1363_read_interrupt_config,
1595 max1363_write_interrupt_config,
1596 MAX1363_LOW_THRESH(6));
1597
1598IIO_EVENT_ATTR_NAMED_SH(in2min3_thresh_high_en,
1599 in2-in3_thresh_high_en,
1600 iio_event_max1363_thresh,
1601 max1363_read_interrupt_config,
1602 max1363_write_interrupt_config,
1603 MAX1363_HIGH_THRESH(7));
1604
1605IIO_EVENT_ATTR_NAMED_SH(in2min3_thresh_low_en,
1606 in2-in3_thresh_low_en,
1607 iio_event_max1363_thresh,
1608 max1363_read_interrupt_config,
1609 max1363_write_interrupt_config,
1610 MAX1363_LOW_THRESH(7));
1611
1612/*
1613 * As with scan_elements, only certain sets of these can
1614 * be combined.
1615 */
1616static struct attribute *max1363_event_attributes[] = {
1617 &iio_dev_attr_in0_thresh_high_value.dev_attr.attr,
1618 &iio_dev_attr_in0_thresh_low_value.dev_attr.attr,
1619 &iio_dev_attr_in1_thresh_high_value.dev_attr.attr,
1620 &iio_dev_attr_in1_thresh_low_value.dev_attr.attr,
1621 &iio_dev_attr_in2_thresh_high_value.dev_attr.attr,
1622 &iio_dev_attr_in2_thresh_low_value.dev_attr.attr,
1623 &iio_dev_attr_in3_thresh_high_value.dev_attr.attr,
1624 &iio_dev_attr_in3_thresh_low_value.dev_attr.attr,
1625 &iio_dev_attr_in0min1_thresh_high_value.dev_attr.attr,
1626 &iio_dev_attr_in0min1_thresh_low_value.dev_attr.attr,
1627 &iio_dev_attr_in2min3_thresh_high_value.dev_attr.attr,
1628 &iio_dev_attr_in2min3_thresh_low_value.dev_attr.attr,
1629 &iio_dev_attr_in1min0_thresh_high_value.dev_attr.attr,
1630 &iio_dev_attr_in1min0_thresh_low_value.dev_attr.attr,
1631 &iio_dev_attr_in3min2_thresh_high_value.dev_attr.attr,
1632 &iio_dev_attr_in3min2_thresh_low_value.dev_attr.attr,
1633 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1634 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1635 &iio_event_attr_in0_thresh_high_en.dev_attr.attr,
1636 &iio_event_attr_in0_thresh_low_en.dev_attr.attr,
1637 &iio_event_attr_in1_thresh_high_en.dev_attr.attr,
1638 &iio_event_attr_in1_thresh_low_en.dev_attr.attr,
1639 &iio_event_attr_in2_thresh_high_en.dev_attr.attr,
1640 &iio_event_attr_in2_thresh_low_en.dev_attr.attr,
1641 &iio_event_attr_in3_thresh_high_en.dev_attr.attr,
1642 &iio_event_attr_in3_thresh_low_en.dev_attr.attr,
1643 &iio_event_attr_in0min1_thresh_high_en.dev_attr.attr,
1644 &iio_event_attr_in0min1_thresh_low_en.dev_attr.attr,
1645 &iio_event_attr_in3min2_thresh_high_en.dev_attr.attr,
1646 &iio_event_attr_in3min2_thresh_low_en.dev_attr.attr,
1647 &iio_event_attr_in1min0_thresh_high_en.dev_attr.attr,
1648 &iio_event_attr_in1min0_thresh_low_en.dev_attr.attr,
1649 &iio_event_attr_in2min3_thresh_high_en.dev_attr.attr,
1650 &iio_event_attr_in2min3_thresh_low_en.dev_attr.attr,
1651 NULL,
1652};
1653
1654static struct attribute_group max1363_event_attribute_group = {
1655 .attrs = max1363_event_attributes,
1656};
1657
d1325cf4
JC		 1658static int max1363_initial_setup(struct max1363_state *st)
1659{
1660 st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
1661 | MAX1363_SETUP_POWER_UP_INT_REF
1662 | MAX1363_SETUP_INT_CLOCK
1663 | MAX1363_SETUP_UNIPOLAR
1664 | MAX1363_SETUP_NORESET;
1665
1666 /* Set scan mode writes the config anyway so wait until then*/
1667 st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);
1668 st->current_mode = &max1363_mode_table[st->chip_info->default_mode];
1669 st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);
1670
1671 return max1363_set_scan_mode(st);
1672}
1673
d1325cf4
JC		 1674static int __devinit max1363_probe(struct i2c_client *client,
1675 const struct i2c_device_id *id)
1676{
1677 int ret, i, regdone = 0;
1678 struct max1363_state *st = kzalloc(sizeof(*st), GFP_KERNEL);
1679 if (st == NULL) {
1680 ret = -ENOMEM;
1681 goto error_ret;
1682 }
1683
1684 /* this is only used for device removal purposes */
1685 i2c_set_clientdata(client, st);
1686
1687 atomic_set(&st->protect_ring, 0);
1688
962a4ccb 1689 st->chip_info = &max1363_chip_info_tbl[id->driver_data];
d1325cf4
JC		 1690 st->reg = regulator_get(&client->dev, "vcc");
1691 if (!IS_ERR(st->reg)) {
1692 ret = regulator_enable(st->reg);
1693 if (ret)
1694 goto error_put_reg;
1695 }
1696 st->client = client;
1697
1698 st->indio_dev = iio_allocate_device();
1699 if (st->indio_dev == NULL) {
1700 ret = -ENOMEM;
1701 goto error_disable_reg;
1702 }
1703
82020b0e 1704 st->indio_dev->available_scan_masks
f03de82b
GKH		 1705 = kzalloc(sizeof(*st->indio_dev->available_scan_masks)*
1706 (st->chip_info->num_modes + 1), GFP_KERNEL);
82020b0e
JC		 1707 if (!st->indio_dev->available_scan_masks) {
1708 ret = -ENOMEM;
1709 goto error_free_device;
1710 }
1711
1712 for (i = 0; i < st->chip_info->num_modes; i++)
1713 st->indio_dev->available_scan_masks[i] =
1714 max1363_mode_table[st->chip_info->mode_list[i]]
1715 .modemask;
d1325cf4
JC		 1716 /* Estabilish that the iio_dev is a child of the i2c device */
1717 st->indio_dev->dev.parent = &client->dev;
82020b0e
JC		 1718 st->indio_dev->attrs = st->chip_info->dev_attrs;
1719
1720 /* Todo: this shouldn't be here. */
d1325cf4
JC		 1721 st->indio_dev->dev_data = (void *)(st);
1722 st->indio_dev->driver_module = THIS_MODULE;
1723 st->indio_dev->modes = INDIO_DIRECT_MODE;
440a5200
JC		 1724 if (st->chip_info->monitor_mode && client->irq) {
1725 st->indio_dev->num_interrupt_lines = 1;
1726 st->indio_dev->event_attrs
1727 = &max1363_event_attribute_group;
1728 }
d1325cf4
JC		 1729
1730 ret = max1363_initial_setup(st);
1731 if (ret)
82020b0e 1732 goto error_free_available_scan_masks;
d1325cf4
JC		 1733
1734 ret = max1363_register_ring_funcs_and_init(st->indio_dev);
1735 if (ret)
82020b0e 1736 goto error_free_available_scan_masks;
d1325cf4
JC		 1737
1738 ret = iio_device_register(st->indio_dev);
1739 if (ret)
1740 goto error_cleanup_ring;
1741 regdone = 1;
2662051e 1742 ret = iio_ring_buffer_register(st->indio_dev->ring, 0);
d1325cf4
JC		 1743 if (ret)
1744 goto error_cleanup_ring;
440a5200
JC		 1745
1746 if (st->chip_info->monitor_mode && client->irq) {
1747 ret = iio_register_interrupt_line(client->irq,
1748 st->indio_dev,
1749 0,
1750 IRQF_TRIGGER_RISING,
1751 client->name);
1752 if (ret)
1753 goto error_uninit_ring;
1754
1755 INIT_WORK(&st->thresh_work, max1363_thresh_handler_bh);
1756 }
1757
d1325cf4 1758 return 0;
440a5200 1759error_uninit_ring:
2662051e 1760 iio_ring_buffer_unregister(st->indio_dev->ring);
d1325cf4
JC		 1761error_cleanup_ring:
1762 max1363_ring_cleanup(st->indio_dev);
82020b0e
JC		 1763error_free_available_scan_masks:
1764 kfree(st->indio_dev->available_scan_masks);
d1325cf4
JC		 1765error_free_device:
1766 if (!regdone)
1767 iio_free_device(st->indio_dev);
1768 else
1769 iio_device_unregister(st->indio_dev);
1770error_disable_reg:
1771 if (!IS_ERR(st->reg))
1772 regulator_disable(st->reg);
1773error_put_reg:
1774 if (!IS_ERR(st->reg))
1775 regulator_put(st->reg);
d1325cf4
JC		 1776 kfree(st);
1777
1778error_ret:
1779 return ret;
1780}
1781
1782static int max1363_remove(struct i2c_client *client)
1783{
1784 struct max1363_state *st = i2c_get_clientdata(client);
1785 struct iio_dev *indio_dev = st->indio_dev;
440a5200
JC		 1786
1787 if (st->chip_info->monitor_mode && client->irq)
1788 iio_unregister_interrupt_line(st->indio_dev, 0);
2662051e 1789 iio_ring_buffer_unregister(indio_dev->ring);
d1325cf4 1790 max1363_ring_cleanup(indio_dev);
82020b0e 1791 kfree(st->indio_dev->available_scan_masks);
d1325cf4
JC		 1792 iio_device_unregister(indio_dev);
1793 if (!IS_ERR(st->reg)) {
1794 regulator_disable(st->reg);
1795 regulator_put(st->reg);
1796 }
1797 kfree(st);
1798
1799 return 0;
1800}
1801
1802static const struct i2c_device_id max1363_id[] = {
1803 { "max1361", max1361 },
1804 { "max1362", max1362 },
1805 { "max1363", max1363 },
1806 { "max1364", max1364 },
3bf877c1
JC		 1807 { "max1036", max1036 },
1808 { "max1037", max1037 },
1809 { "max1038", max1038 },
1810 { "max1039", max1039 },
d1325cf4
JC		 1811 { "max1136", max1136 },
1812 { "max1137", max1137 },
1813 { "max1138", max1138 },
1814 { "max1139", max1139 },
1815 { "max1236", max1236 },
1816 { "max1237", max1237 },
1817 { "max1238", max1238 },
1818 { "max1239", max1239 },
3bf877c1
JC		 1819 { "max11600", max11600 },
1820 { "max11601", max11601 },
1821 { "max11602", max11602 },
1822 { "max11603", max11603 },
1823 { "max11604", max11604 },
1824 { "max11605", max11605 },
c3fa0fdd
JC		 1825 { "max11606", max11606 },
1826 { "max11607", max11607 },
1827 { "max11608", max11608 },
1828 { "max11609", max11609 },
1829 { "max11610", max11610 },
1830 { "max11611", max11611 },
1831 { "max11612", max11612 },
1832 { "max11613", max11613 },
1833 { "max11614", max11614 },
1834 { "max11615", max11615 },
1835 { "max11616", max11616 },
1836 { "max11617", max11617 },
d1325cf4
JC		 1837 {}
1838};
1839
1840MODULE_DEVICE_TABLE(i2c, max1363_id);
1841
1842static struct i2c_driver max1363_driver = {
1843 .driver = {
1844 .name = "max1363",
1845 },
1846 .probe = max1363_probe,
1847 .remove = max1363_remove,
1848 .id_table = max1363_id,
1849};
1850
1851static __init int max1363_init(void)
1852{
1853 return i2c_add_driver(&max1363_driver);
1854}
1855
1856static __exit void max1363_exit(void)
1857{
1858 i2c_del_driver(&max1363_driver);
1859}
1860
1861MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>");
1862MODULE_DESCRIPTION("Maxim 1363 ADC");
1863MODULE_LICENSE("GPL v2");
1864
1865module_init(max1363_init);
1866module_exit(max1363_exit);
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