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CommitLineData
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MV
1/*
2 * Freescale i.MX28 LRADC driver
3 *
4 * Copyright (c) 2012 DENX Software Engineering, GmbH.
5 * Marek Vasut <marex@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
97f4be60 18#include <linux/err.h>
bc2c90c9
MV
19#include <linux/interrupt.h>
20#include <linux/device.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/sysfs.h>
26#include <linux/list.h>
27#include <linux/io.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/spinlock.h>
31#include <linux/wait.h>
32#include <linux/sched.h>
33#include <linux/stmp_device.h>
34#include <linux/bitops.h>
35#include <linux/completion.h>
06ddd353
MV
36#include <linux/delay.h>
37#include <linux/input.h>
18da755d 38#include <linux/clk.h>
bc2c90c9 39
bc2c90c9
MV
40#include <linux/iio/iio.h>
41#include <linux/iio/buffer.h>
42#include <linux/iio/trigger.h>
43#include <linux/iio/trigger_consumer.h>
44#include <linux/iio/triggered_buffer.h>
45
46#define DRIVER_NAME "mxs-lradc"
47
48#define LRADC_MAX_DELAY_CHANS 4
49#define LRADC_MAX_MAPPED_CHANS 8
50#define LRADC_MAX_TOTAL_CHANS 16
51
52#define LRADC_DELAY_TIMER_HZ 2000
53
54/*
55 * Make this runtime configurable if necessary. Currently, if the buffered mode
56 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
57 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
58 * seconds. The result is that the samples arrive every 500mS.
59 */
60#define LRADC_DELAY_TIMER_PER 200
61#define LRADC_DELAY_TIMER_LOOP 5
62
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MV
63/*
64 * Once the pen touches the touchscreen, the touchscreen switches from
65 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
66 * is realized by worker thread, which is called every 20 or so milliseconds.
67 * This gives the touchscreen enough fluence and does not strain the system
68 * too much.
69 */
70#define LRADC_TS_SAMPLE_DELAY_MS 5
71
72/*
73 * The LRADC reads the following amount of samples from each touchscreen
74 * channel and the driver then computes avarage of these.
75 */
76#define LRADC_TS_SAMPLE_AMOUNT 4
77
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MV
78enum mxs_lradc_id {
79 IMX23_LRADC,
80 IMX28_LRADC,
81};
82
83static const char * const mx23_lradc_irq_names[] = {
84 "mxs-lradc-touchscreen",
85 "mxs-lradc-channel0",
86 "mxs-lradc-channel1",
87 "mxs-lradc-channel2",
88 "mxs-lradc-channel3",
89 "mxs-lradc-channel4",
90 "mxs-lradc-channel5",
91 "mxs-lradc-channel6",
92 "mxs-lradc-channel7",
93};
94
95static const char * const mx28_lradc_irq_names[] = {
bc2c90c9
MV
96 "mxs-lradc-touchscreen",
97 "mxs-lradc-thresh0",
98 "mxs-lradc-thresh1",
99 "mxs-lradc-channel0",
100 "mxs-lradc-channel1",
101 "mxs-lradc-channel2",
102 "mxs-lradc-channel3",
103 "mxs-lradc-channel4",
104 "mxs-lradc-channel5",
105 "mxs-lradc-channel6",
106 "mxs-lradc-channel7",
107 "mxs-lradc-button0",
108 "mxs-lradc-button1",
109};
110
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MV
111struct mxs_lradc_of_config {
112 const int irq_count;
113 const char * const *irq_name;
114};
115
ad76fda7 116static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
5e1f9aca
MV
117 [IMX23_LRADC] = {
118 .irq_count = ARRAY_SIZE(mx23_lradc_irq_names),
119 .irq_name = mx23_lradc_irq_names,
120 },
121 [IMX28_LRADC] = {
122 .irq_count = ARRAY_SIZE(mx28_lradc_irq_names),
123 .irq_name = mx28_lradc_irq_names,
124 },
125};
126
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127enum mxs_lradc_ts {
128 MXS_LRADC_TOUCHSCREEN_NONE = 0,
129 MXS_LRADC_TOUCHSCREEN_4WIRE,
130 MXS_LRADC_TOUCHSCREEN_5WIRE,
bc2c90c9
MV
131};
132
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133/*
134 * Touchscreen handling
135 */
136enum lradc_ts_plate {
137 LRADC_TOUCH = 0,
138 LRADC_SAMPLE_X,
139 LRADC_SAMPLE_Y,
140 LRADC_SAMPLE_PRESSURE,
141 LRADC_SAMPLE_VALID,
142};
143
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144struct mxs_lradc {
145 struct device *dev;
146 void __iomem *base;
147 int irq[13];
148
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JB
149 struct clk *clk;
150
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MV
151 uint32_t *buffer;
152 struct iio_trigger *trig;
153
154 struct mutex lock;
155
bc2c90c9 156 struct completion completion;
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MV
157
158 /*
159 * Touchscreen LRADC channels receives a private slot in the CTRL4
160 * register, the slot #7. Therefore only 7 slots instead of 8 in the
161 * CTRL4 register can be mapped to LRADC channels when using the
162 * touchscreen.
163 *
164 * Furthermore, certain LRADC channels are shared between touchscreen
165 * and/or touch-buttons and generic LRADC block. Therefore when using
166 * either of these, these channels are not available for the regular
167 * sampling. The shared channels are as follows:
168 *
169 * CH0 -- Touch button #0
170 * CH1 -- Touch button #1
171 * CH2 -- Touch screen XPUL
172 * CH3 -- Touch screen YPLL
173 * CH4 -- Touch screen XNUL
174 * CH5 -- Touch screen YNLR
175 * CH6 -- Touch screen WIPER (5-wire only)
176 *
177 * The bitfields below represents which parts of the LRADC block are
178 * switched into special mode of operation. These channels can not
179 * be sampled as regular LRADC channels. The driver will refuse any
180 * attempt to sample these channels.
181 */
182#define CHAN_MASK_TOUCHBUTTON (0x3 << 0)
183#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
184#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
185 enum mxs_lradc_ts use_touchscreen;
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186 bool use_touchbutton;
187
188 struct input_dev *ts_input;
ccff5297
JB
189
190 enum mxs_lradc_id soc;
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191 enum lradc_ts_plate cur_plate; /* statemachine */
192 bool ts_valid;
193 unsigned ts_x_pos;
194 unsigned ts_y_pos;
195 unsigned ts_pressure;
196
197 /* handle touchscreen's physical behaviour */
198 /* samples per coordinate */
199 unsigned over_sample_cnt;
200 /* time clocks between samples */
201 unsigned over_sample_delay;
202 /* time in clocks to wait after the plates where switched */
203 unsigned settling_delay;
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MV
204};
205
206#define LRADC_CTRL0 0x00
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207# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE (1 << 23)
208# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE (1 << 22)
209# define LRADC_CTRL0_MX28_YNNSW /* YM */ (1 << 21)
210# define LRADC_CTRL0_MX28_YPNSW /* YP */ (1 << 20)
211# define LRADC_CTRL0_MX28_YPPSW /* YP */ (1 << 19)
212# define LRADC_CTRL0_MX28_XNNSW /* XM */ (1 << 18)
213# define LRADC_CTRL0_MX28_XNPSW /* XM */ (1 << 17)
214# define LRADC_CTRL0_MX28_XPPSW /* XP */ (1 << 16)
215
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216# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE (1 << 20)
217# define LRADC_CTRL0_MX23_YM (1 << 19)
218# define LRADC_CTRL0_MX23_XM (1 << 18)
219# define LRADC_CTRL0_MX23_YP (1 << 17)
220# define LRADC_CTRL0_MX23_XP (1 << 16)
221
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222# define LRADC_CTRL0_MX28_PLATE_MASK \
223 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
224 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
225 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
226 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
bc2c90c9 227
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228# define LRADC_CTRL0_MX23_PLATE_MASK \
229 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
230 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
231 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
232
bc2c90c9 233#define LRADC_CTRL1 0x10
06ddd353 234#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24)
bc2c90c9 235#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
7e4d4a6f 236#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
8c06f714 237#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
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238#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
239#define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8)
240#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
7e4d4a6f 241#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
8c06f714 242#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
06ddd353 243#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
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244
245#define LRADC_CTRL2 0x20
246#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
247
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248#define LRADC_STATUS 0x40
249#define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0)
250
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251#define LRADC_CH(n) (0x50 + (0x10 * (n)))
252#define LRADC_CH_ACCUMULATE (1 << 29)
253#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
254#define LRADC_CH_NUM_SAMPLES_OFFSET 24
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255#define LRADC_CH_NUM_SAMPLES(x) \
256 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
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257#define LRADC_CH_VALUE_MASK 0x3ffff
258#define LRADC_CH_VALUE_OFFSET 0
259
260#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
261#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
262#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
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263#define LRADC_DELAY_TRIGGER(x) \
264 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
265 LRADC_DELAY_TRIGGER_LRADCS_MASK)
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266#define LRADC_DELAY_KICK (1 << 20)
267#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
268#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
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269#define LRADC_DELAY_TRIGGER_DELAYS(x) \
270 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
271 LRADC_DELAY_TRIGGER_DELAYS_MASK)
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272#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
273#define LRADC_DELAY_LOOP_COUNT_OFFSET 11
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274#define LRADC_DELAY_LOOP(x) \
275 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
276 LRADC_DELAY_LOOP_COUNT_MASK)
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277#define LRADC_DELAY_DELAY_MASK 0x7ff
278#define LRADC_DELAY_DELAY_OFFSET 0
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279#define LRADC_DELAY_DELAY(x) \
280 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
281 LRADC_DELAY_DELAY_MASK)
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282
283#define LRADC_CTRL4 0x140
284#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
285#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
286
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287#define LRADC_RESOLUTION 12
288#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
289
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290static void mxs_lradc_reg_set(struct mxs_lradc *lradc, u32 val, u32 reg)
291{
292 writel(val, lradc->base + reg + STMP_OFFSET_REG_SET);
293}
294
295static void mxs_lradc_reg_clear(struct mxs_lradc *lradc, u32 val, u32 reg)
296{
297 writel(val, lradc->base + reg + STMP_OFFSET_REG_CLR);
298}
299
300static void mxs_lradc_reg_wrt(struct mxs_lradc *lradc, u32 val, u32 reg)
301{
302 writel(val, lradc->base + reg);
303}
304
305static u32 mxs_lradc_plate_mask(struct mxs_lradc *lradc)
306{
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307 if (lradc->soc == IMX23_LRADC)
308 return LRADC_CTRL0_MX23_PLATE_MASK;
309 else
310 return LRADC_CTRL0_MX28_PLATE_MASK;
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311}
312
313static u32 mxs_lradc_irq_en_mask(struct mxs_lradc *lradc)
314{
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315 if (lradc->soc == IMX23_LRADC)
316 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK;
317 else
318 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK;
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319}
320
321static u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)
322{
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323 if (lradc->soc == IMX23_LRADC)
324 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;
325 else
326 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;
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327}
328
329static u32 mxs_lradc_touch_detect_bit(struct mxs_lradc *lradc)
330{
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331 if (lradc->soc == IMX23_LRADC)
332 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE;
333 else
334 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE;
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335}
336
337static u32 mxs_lradc_drive_x_plate(struct mxs_lradc *lradc)
338{
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339 if (lradc->soc == IMX23_LRADC)
340 return LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM;
341 else
342 return LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW;
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343}
344
345static u32 mxs_lradc_drive_y_plate(struct mxs_lradc *lradc)
346{
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347 if (lradc->soc == IMX23_LRADC)
348 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM;
349 else
350 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW;
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351}
352
353static u32 mxs_lradc_drive_pressure(struct mxs_lradc *lradc)
354{
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355 if (lradc->soc == IMX23_LRADC)
356 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM;
357 else
358 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW;
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359}
360
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361static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc)
362{
363 return !!(readl(lradc->base + LRADC_STATUS) &
364 LRADC_STATUS_TOUCH_DETECT_RAW);
365}
366
367static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)
368{
369 /*
370 * prepare for oversampling conversion
371 *
372 * from the datasheet:
373 * "The ACCUMULATE bit in the appropriate channel register
374 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
375 * otherwise, the IRQs will not fire."
376 */
377 mxs_lradc_reg_wrt(lradc, LRADC_CH_ACCUMULATE |
378 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1),
379 LRADC_CH(ch));
380
381 /* from the datasheet:
382 * "Software must clear this register in preparation for a
383 * multi-cycle accumulation.
384 */
385 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch));
386
387 /* prepare the delay/loop unit according to the oversampling count */
388 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch) |
389 LRADC_DELAY_TRIGGER_DELAYS(0) |
390 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
391 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
392 LRADC_DELAY(3));
393
394 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(2) |
395 LRADC_CTRL1_LRADC_IRQ(3) | LRADC_CTRL1_LRADC_IRQ(4) |
396 LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1);
397
398 /* wake us again, when the complete conversion is done */
399 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(ch), LRADC_CTRL1);
400 /*
401 * after changing the touchscreen plates setting
402 * the signals need some initial time to settle. Start the
403 * SoC's delay unit and start the conversion later
404 * and automatically.
405 */
406 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
407 LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
408 LRADC_DELAY_KICK |
409 LRADC_DELAY_DELAY(lradc->settling_delay),
410 LRADC_DELAY(2));
411}
412
413/*
414 * Pressure detection is special:
415 * We want to do both required measurements for the pressure detection in
416 * one turn. Use the hardware features to chain both conversions and let the
417 * hardware report one interrupt if both conversions are done
418 */
419static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1,
420 unsigned ch2)
421{
422 u32 reg;
423
424 /*
425 * prepare for oversampling conversion
426 *
427 * from the datasheet:
428 * "The ACCUMULATE bit in the appropriate channel register
429 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;
430 * otherwise, the IRQs will not fire."
431 */
432 reg = LRADC_CH_ACCUMULATE |
433 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1);
434 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch1));
435 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch2));
436
437 /* from the datasheet:
438 * "Software must clear this register in preparation for a
439 * multi-cycle accumulation.
440 */
441 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch1));
442 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch2));
443
444 /* prepare the delay/loop unit according to the oversampling count */
445 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch1) |
446 LRADC_DELAY_TRIGGER(1 << ch2) | /* start both channels */
447 LRADC_DELAY_TRIGGER_DELAYS(0) |
448 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
449 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
450 LRADC_DELAY(3));
451
452 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(2) |
453 LRADC_CTRL1_LRADC_IRQ(3) | LRADC_CTRL1_LRADC_IRQ(4) |
454 LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1);
455
456 /* wake us again, when the conversions are done */
457 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(ch2), LRADC_CTRL1);
458 /*
459 * after changing the touchscreen plates setting
460 * the signals need some initial time to settle. Start the
461 * SoC's delay unit and start the conversion later
462 * and automatically.
463 */
464 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */
465 LRADC_DELAY_TRIGGER_DELAYS(1 << 3) | /* trigger DELAY unit#3 */
466 LRADC_DELAY_KICK |
467 LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2));
468}
469
470static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc *lradc,
471 unsigned channel)
472{
473 u32 reg;
474 unsigned num_samples, val;
475
476 reg = readl(lradc->base + LRADC_CH(channel));
477 if (reg & LRADC_CH_ACCUMULATE)
478 num_samples = lradc->over_sample_cnt;
479 else
480 num_samples = 1;
481
482 val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET;
483 return val / num_samples;
484}
485
486static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc,
487 unsigned ch1, unsigned ch2)
488{
489 u32 reg, mask;
490 unsigned pressure, m1, m2;
491
492 mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2);
493 reg = readl(lradc->base + LRADC_CTRL1) & mask;
494
495 while (reg != mask) {
496 reg = readl(lradc->base + LRADC_CTRL1) & mask;
497 dev_dbg(lradc->dev, "One channel is still busy: %X\n", reg);
498 }
499
500 m1 = mxs_lradc_read_raw_channel(lradc, ch1);
501 m2 = mxs_lradc_read_raw_channel(lradc, ch2);
502
503 if (m2 == 0) {
504 dev_warn(lradc->dev, "Cannot calculate pressure\n");
505 return 1 << (LRADC_RESOLUTION - 1);
506 }
507
508 /* simply scale the value from 0 ... max ADC resolution */
509 pressure = m1;
510 pressure *= (1 << LRADC_RESOLUTION);
511 pressure /= m2;
512
513 dev_dbg(lradc->dev, "Pressure = %u\n", pressure);
514 return pressure;
515}
516
517#define TS_CH_XP 2
518#define TS_CH_YP 3
519#define TS_CH_XM 4
520#define TS_CH_YM 5
521
522static int mxs_lradc_read_ts_channel(struct mxs_lradc *lradc)
523{
524 u32 reg;
525 int val;
526
527 reg = readl(lradc->base + LRADC_CTRL1);
528
529 /* only channels 3 to 5 are of interest here */
530 if (reg & LRADC_CTRL1_LRADC_IRQ(TS_CH_YP)) {
531 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_YP) |
532 LRADC_CTRL1_LRADC_IRQ(TS_CH_YP), LRADC_CTRL1);
533 val = mxs_lradc_read_raw_channel(lradc, TS_CH_YP);
534 } else if (reg & LRADC_CTRL1_LRADC_IRQ(TS_CH_XM)) {
535 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_XM) |
536 LRADC_CTRL1_LRADC_IRQ(TS_CH_XM), LRADC_CTRL1);
537 val = mxs_lradc_read_raw_channel(lradc, TS_CH_XM);
538 } else if (reg & LRADC_CTRL1_LRADC_IRQ(TS_CH_YM)) {
539 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_YM) |
540 LRADC_CTRL1_LRADC_IRQ(TS_CH_YM), LRADC_CTRL1);
541 val = mxs_lradc_read_raw_channel(lradc, TS_CH_YM);
542 } else {
543 return -EIO;
544 }
545
546 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
547 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
548
549 return val;
550}
551
552/*
553 * YP(open)--+-------------+
554 * | |--+
555 * | | |
556 * YM(-)--+-------------+ |
557 * +--------------+
558 * | |
559 * XP(weak+) XM(open)
560 *
561 * "weak+" means 200k Ohm VDDIO
562 * (-) means GND
563 */
564static void mxs_lradc_setup_touch_detection(struct mxs_lradc *lradc)
565{
566 /*
567 * In order to detect a touch event the 'touch detect enable' bit
568 * enables:
569 * - a weak pullup to the X+ connector
570 * - a strong ground at the Y- connector
571 */
572 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
573 mxs_lradc_reg_set(lradc, mxs_lradc_touch_detect_bit(lradc),
574 LRADC_CTRL0);
575}
576
577/*
578 * YP(meas)--+-------------+
579 * | |--+
580 * | | |
581 * YM(open)--+-------------+ |
582 * +--------------+
583 * | |
584 * XP(+) XM(-)
585 *
586 * (+) means here 1.85 V
587 * (-) means here GND
588 */
589static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc)
590{
591 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
592 mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0);
593
594 lradc->cur_plate = LRADC_SAMPLE_X;
595 mxs_lradc_setup_ts_channel(lradc, TS_CH_YP);
596}
597
598/*
599 * YP(+)--+-------------+
600 * | |--+
601 * | | |
602 * YM(-)--+-------------+ |
603 * +--------------+
604 * | |
605 * XP(open) XM(meas)
606 *
607 * (+) means here 1.85 V
608 * (-) means here GND
609 */
610static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc)
611{
612 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
613 mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0);
614
615 lradc->cur_plate = LRADC_SAMPLE_Y;
616 mxs_lradc_setup_ts_channel(lradc, TS_CH_XM);
617}
618
619/*
620 * YP(+)--+-------------+
621 * | |--+
622 * | | |
623 * YM(meas)--+-------------+ |
624 * +--------------+
625 * | |
626 * XP(meas) XM(-)
627 *
628 * (+) means here 1.85 V
629 * (-) means here GND
630 */
631static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc)
632{
633 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
634 mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0);
635
636 lradc->cur_plate = LRADC_SAMPLE_PRESSURE;
637 mxs_lradc_setup_ts_pressure(lradc, TS_CH_XP, TS_CH_YM);
638}
639
640static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)
641{
642 mxs_lradc_setup_touch_detection(lradc);
643
644 lradc->cur_plate = LRADC_TOUCH;
645 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
646 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
647 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
648}
649
650static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc)
651{
652 input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos);
653 input_report_abs(lradc->ts_input, ABS_Y, lradc->ts_y_pos);
654 input_report_abs(lradc->ts_input, ABS_PRESSURE, lradc->ts_pressure);
655 input_report_key(lradc->ts_input, BTN_TOUCH, 1);
656 input_sync(lradc->ts_input);
657}
658
659static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc)
660{
661 mxs_lradc_setup_touch_detection(lradc);
662 lradc->cur_plate = LRADC_SAMPLE_VALID;
663 /*
664 * start a dummy conversion to burn time to settle the signals
665 * note: we are not interested in the conversion's value
666 */
667 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(5));
668 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1);
669 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(5), LRADC_CTRL1);
670 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << 5) |
671 LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */
672 LRADC_DELAY(2));
673}
674
675/*
676 * in order to avoid false measurements, report only samples where
677 * the surface is still touched after the position measurement
678 */
679static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid)
680{
681 /* if it is still touched, report the sample */
682 if (valid && mxs_lradc_check_touch_event(lradc)) {
683 lradc->ts_valid = true;
684 mxs_lradc_report_ts_event(lradc);
685 }
686
687 /* if it is even still touched, continue with the next measurement */
688 if (mxs_lradc_check_touch_event(lradc)) {
689 mxs_lradc_prepare_y_pos(lradc);
690 return;
691 }
692
693 if (lradc->ts_valid) {
694 /* signal the release */
695 lradc->ts_valid = false;
696 input_report_key(lradc->ts_input, BTN_TOUCH, 0);
697 input_sync(lradc->ts_input);
698 }
699
700 /* if it is released, wait for the next touch via IRQ */
701 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ, LRADC_CTRL1);
702 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
703}
704
705/* touchscreen's state machine */
706static void mxs_lradc_handle_touch(struct mxs_lradc *lradc)
707{
708 int val;
709
710 switch (lradc->cur_plate) {
711 case LRADC_TOUCH:
712 /*
713 * start with the Y-pos, because it uses nearly the same plate
714 * settings like the touch detection
715 */
716 if (mxs_lradc_check_touch_event(lradc)) {
717 mxs_lradc_reg_clear(lradc,
718 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
719 LRADC_CTRL1);
720 mxs_lradc_prepare_y_pos(lradc);
721 }
722 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ,
723 LRADC_CTRL1);
724 return;
725
726 case LRADC_SAMPLE_Y:
727 val = mxs_lradc_read_ts_channel(lradc);
728 if (val < 0) {
729 mxs_lradc_enable_touch_detection(lradc); /* re-start */
730 return;
731 }
732 lradc->ts_y_pos = val;
733 mxs_lradc_prepare_x_pos(lradc);
734 return;
735
736 case LRADC_SAMPLE_X:
737 val = mxs_lradc_read_ts_channel(lradc);
738 if (val < 0) {
739 mxs_lradc_enable_touch_detection(lradc); /* re-start */
740 return;
741 }
742 lradc->ts_x_pos = val;
743 mxs_lradc_prepare_pressure(lradc);
744 return;
745
746 case LRADC_SAMPLE_PRESSURE:
747 lradc->ts_pressure =
748 mxs_lradc_read_ts_pressure(lradc, TS_CH_XP, TS_CH_YM);
749 mxs_lradc_complete_touch_event(lradc);
750 return;
751
752 case LRADC_SAMPLE_VALID:
753 val = mxs_lradc_read_ts_channel(lradc); /* ignore the value */
754 mxs_lradc_finish_touch_event(lradc, 1);
755 break;
756 }
757}
758
bc2c90c9
MV
759/*
760 * Raw I/O operations
761 */
c8231a9a 762static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val)
bc2c90c9
MV
763{
764 struct mxs_lradc *lradc = iio_priv(iio_dev);
765 int ret;
766
bc2c90c9
MV
767 /*
768 * See if there is no buffered operation in progess. If there is, simply
769 * bail out. This can be improved to support both buffered and raw IO at
770 * the same time, yet the code becomes horribly complicated. Therefore I
771 * applied KISS principle here.
772 */
773 ret = mutex_trylock(&lradc->lock);
774 if (!ret)
775 return -EBUSY;
776
16735d02 777 reinit_completion(&lradc->completion);
bc2c90c9
MV
778
779 /*
780 * No buffered operation in progress, map the channel and trigger it.
781 * Virtual channel 0 is always used here as the others are always not
782 * used if doing raw sampling.
783 */
8c06f714
JB
784 if (lradc->soc == IMX28_LRADC)
785 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK,
f0b83cc8
JB
786 LRADC_CTRL1);
787 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
bc2c90c9 788
06ddd353 789 /* Clean the slot's previous content, then set new one. */
f0b83cc8 790 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0), LRADC_CTRL4);
c8231a9a 791 mxs_lradc_reg_set(lradc, chan, LRADC_CTRL4);
06ddd353 792
f0b83cc8 793 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(0));
bc2c90c9
MV
794
795 /* Enable the IRQ and start sampling the channel. */
f0b83cc8
JB
796 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
797 mxs_lradc_reg_set(lradc, 1 << 0, LRADC_CTRL0);
bc2c90c9
MV
798
799 /* Wait for completion on the channel, 1 second max. */
800 ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
801 if (!ret)
802 ret = -ETIMEDOUT;
803 if (ret < 0)
804 goto err;
805
806 /* Read the data. */
807 *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
808 ret = IIO_VAL_INT;
809
810err:
f0b83cc8 811 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
bc2c90c9
MV
812
813 mutex_unlock(&lradc->lock);
814
815 return ret;
816}
817
c8231a9a
AB
818static int mxs_lradc_read_temp(struct iio_dev *iio_dev, int *val)
819{
820 int ret, min, max;
821
822 ret = mxs_lradc_read_single(iio_dev, 8, &min);
823 if (ret != IIO_VAL_INT)
824 return ret;
825
826 ret = mxs_lradc_read_single(iio_dev, 9, &max);
827 if (ret != IIO_VAL_INT)
828 return ret;
829
830 *val = max - min;
831
832 return IIO_VAL_INT;
833}
834
835static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
836 const struct iio_chan_spec *chan,
837 int *val, int *val2, long m)
838{
839 /* Check for invalid channel */
840 if (chan->channel > LRADC_MAX_TOTAL_CHANS)
841 return -EINVAL;
842
843 switch (m) {
844 case IIO_CHAN_INFO_RAW:
845 if (chan->type == IIO_TEMP)
846 return mxs_lradc_read_temp(iio_dev, val);
847
848 return mxs_lradc_read_single(iio_dev, chan->channel, val);
849
850 case IIO_CHAN_INFO_SCALE:
851 if (chan->type == IIO_TEMP) {
852 /* From the datasheet, we have to multiply by 1.012 and
853 * divide by 4
854 */
855 *val = 0;
856 *val2 = 253000;
857 return IIO_VAL_INT_PLUS_MICRO;
858 }
859
860 return -EINVAL;
861
862 case IIO_CHAN_INFO_OFFSET:
863 if (chan->type == IIO_TEMP) {
864 /* The calculated value from the ADC is in Kelvin, we
865 * want Celsius for hwmon so the offset is
866 * -272.15 * scale
867 */
868 *val = -1075;
869 *val2 = 691699;
870
871 return IIO_VAL_INT_PLUS_MICRO;
872 }
873
874 return -EINVAL;
875
876 default:
877 break;
878 }
879
880 return -EINVAL;
881}
882
bc2c90c9
MV
883static const struct iio_info mxs_lradc_iio_info = {
884 .driver_module = THIS_MODULE,
885 .read_raw = mxs_lradc_read_raw,
886};
887
06ddd353
MV
888static int mxs_lradc_ts_open(struct input_dev *dev)
889{
890 struct mxs_lradc *lradc = input_get_drvdata(dev);
891
06ddd353 892 /* Enable the touch-detect circuitry. */
dee05308 893 mxs_lradc_enable_touch_detection(lradc);
06ddd353
MV
894
895 return 0;
896}
897
dee05308 898static void mxs_lradc_disable_ts(struct mxs_lradc *lradc)
06ddd353 899{
dee05308
JB
900 /* stop all interrupts from firing */
901 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
902 LRADC_CTRL1_LRADC_IRQ_EN(2) | LRADC_CTRL1_LRADC_IRQ_EN(3) |
903 LRADC_CTRL1_LRADC_IRQ_EN(4) | LRADC_CTRL1_LRADC_IRQ_EN(5),
904 LRADC_CTRL1);
06ddd353 905
dee05308
JB
906 /* Power-down touchscreen touch-detect circuitry. */
907 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
908}
06ddd353 909
dee05308
JB
910static void mxs_lradc_ts_close(struct input_dev *dev)
911{
912 struct mxs_lradc *lradc = input_get_drvdata(dev);
06ddd353 913
dee05308 914 mxs_lradc_disable_ts(lradc);
06ddd353
MV
915}
916
917static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
918{
919 struct input_dev *input;
920 struct device *dev = lradc->dev;
921 int ret;
922
923 if (!lradc->use_touchscreen)
924 return 0;
925
926 input = input_allocate_device();
f99a92c3 927 if (!input)
06ddd353 928 return -ENOMEM;
06ddd353
MV
929
930 input->name = DRIVER_NAME;
931 input->id.bustype = BUS_HOST;
932 input->dev.parent = dev;
933 input->open = mxs_lradc_ts_open;
934 input->close = mxs_lradc_ts_close;
935
936 __set_bit(EV_ABS, input->evbit);
937 __set_bit(EV_KEY, input->evbit);
938 __set_bit(BTN_TOUCH, input->keybit);
1eb70a97
HP
939 input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
940 input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
941 input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK,
942 0, 0);
06ddd353
MV
943
944 lradc->ts_input = input;
945 input_set_drvdata(input, lradc);
946 ret = input_register_device(input);
947 if (ret)
948 input_free_device(lradc->ts_input);
949
950 return ret;
951}
952
953static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
954{
955 if (!lradc->use_touchscreen)
956 return;
957
dee05308 958 mxs_lradc_disable_ts(lradc);
06ddd353
MV
959 input_unregister_device(lradc->ts_input);
960}
961
bc2c90c9
MV
962/*
963 * IRQ Handling
964 */
965static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
966{
967 struct iio_dev *iio = data;
968 struct mxs_lradc *lradc = iio_priv(iio);
969 unsigned long reg = readl(lradc->base + LRADC_CTRL1);
06ddd353 970 const uint32_t ts_irq_mask =
dee05308
JB
971 LRADC_CTRL1_TOUCH_DETECT_IRQ |
972 LRADC_CTRL1_LRADC_IRQ(2) |
973 LRADC_CTRL1_LRADC_IRQ(3) |
974 LRADC_CTRL1_LRADC_IRQ(4) |
975 LRADC_CTRL1_LRADC_IRQ(5);
bc2c90c9 976
f0b83cc8 977 if (!(reg & mxs_lradc_irq_mask(lradc)))
bc2c90c9
MV
978 return IRQ_NONE;
979
dee05308
JB
980 if (lradc->use_touchscreen && (reg & ts_irq_mask))
981 mxs_lradc_handle_touch(lradc);
bc2c90c9
MV
982
983 if (iio_buffer_enabled(iio))
984 iio_trigger_poll(iio->trig, iio_get_time_ns());
985 else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
986 complete(&lradc->completion);
987
f0b83cc8 988 mxs_lradc_reg_clear(lradc, reg & mxs_lradc_irq_mask(lradc), LRADC_CTRL1);
bc2c90c9
MV
989
990 return IRQ_HANDLED;
991}
992
993/*
994 * Trigger handling
995 */
996static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
997{
998 struct iio_poll_func *pf = p;
999 struct iio_dev *iio = pf->indio_dev;
1000 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV
1001 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
1002 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
7b7a4efe 1003 unsigned int i, j = 0;
bc2c90c9 1004
f4914e5e 1005 for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
bc2c90c9 1006 lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
f0b83cc8 1007 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(j));
bc2c90c9
MV
1008 lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
1009 lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
1010 j++;
1011 }
1012
4fa10de6 1013 iio_push_to_buffers_with_timestamp(iio, lradc->buffer, pf->timestamp);
bc2c90c9
MV
1014
1015 iio_trigger_notify_done(iio->trig);
1016
1017 return IRQ_HANDLED;
1018}
1019
1020static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
1021{
1e9663c6 1022 struct iio_dev *iio = iio_trigger_get_drvdata(trig);
bc2c90c9
MV
1023 struct mxs_lradc *lradc = iio_priv(iio);
1024 const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
1025
f0b83cc8 1026 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_KICK, LRADC_DELAY(0) + st);
bc2c90c9
MV
1027
1028 return 0;
1029}
1030
1031static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
1032 .owner = THIS_MODULE,
1033 .set_trigger_state = &mxs_lradc_configure_trigger,
1034};
1035
1036static int mxs_lradc_trigger_init(struct iio_dev *iio)
1037{
1038 int ret;
1039 struct iio_trigger *trig;
e1b1fa66 1040 struct mxs_lradc *lradc = iio_priv(iio);
bc2c90c9
MV
1041
1042 trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
1043 if (trig == NULL)
1044 return -ENOMEM;
1045
e1b1fa66 1046 trig->dev.parent = lradc->dev;
1e9663c6 1047 iio_trigger_set_drvdata(trig, iio);
bc2c90c9
MV
1048 trig->ops = &mxs_lradc_trigger_ops;
1049
1050 ret = iio_trigger_register(trig);
1051 if (ret) {
1052 iio_trigger_free(trig);
1053 return ret;
1054 }
1055
e1b1fa66 1056 lradc->trig = trig;
bc2c90c9
MV
1057
1058 return 0;
1059}
1060
1061static void mxs_lradc_trigger_remove(struct iio_dev *iio)
1062{
e1b1fa66
MV
1063 struct mxs_lradc *lradc = iio_priv(iio);
1064
1065 iio_trigger_unregister(lradc->trig);
1066 iio_trigger_free(lradc->trig);
bc2c90c9
MV
1067}
1068
1069static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
1070{
1071 struct mxs_lradc *lradc = iio_priv(iio);
06ddd353
MV
1072 int ret = 0, chan, ofs = 0;
1073 unsigned long enable = 0;
1074 uint32_t ctrl4_set = 0;
1075 uint32_t ctrl4_clr = 0;
bc2c90c9
MV
1076 uint32_t ctrl1_irq = 0;
1077 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
1078 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
c80712c7 1079 const int len = bitmap_weight(iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS);
bc2c90c9
MV
1080
1081 if (!len)
1082 return -EINVAL;
1083
1084 /*
1085 * Lock the driver so raw access can not be done during buffered
1086 * operation. This simplifies the code a lot.
1087 */
1088 ret = mutex_trylock(&lradc->lock);
1089 if (!ret)
1090 return -EBUSY;
1091
1092 lradc->buffer = kmalloc(len * sizeof(*lradc->buffer), GFP_KERNEL);
1093 if (!lradc->buffer) {
1094 ret = -ENOMEM;
1095 goto err_mem;
1096 }
1097
8c06f714
JB
1098 if (lradc->soc == IMX28_LRADC)
1099 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK,
f0b83cc8
JB
1100 LRADC_CTRL1);
1101 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
bc2c90c9 1102
c80712c7 1103 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
06ddd353
MV
1104 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
1105 ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
bc2c90c9 1106 ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
f0b83cc8 1107 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(ofs));
06ddd353 1108 bitmap_set(&enable, ofs, 1);
bc2c90c9 1109 ofs++;
73327b4c 1110 }
bc2c90c9 1111
f0b83cc8
JB
1112 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1113 LRADC_DELAY_KICK, LRADC_DELAY(0));
1114 mxs_lradc_reg_clear(lradc, ctrl4_clr, LRADC_CTRL4);
1115 mxs_lradc_reg_set(lradc, ctrl4_set, LRADC_CTRL4);
1116 mxs_lradc_reg_set(lradc, ctrl1_irq, LRADC_CTRL1);
1117 mxs_lradc_reg_set(lradc, enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
1118 LRADC_DELAY(0));
bc2c90c9
MV
1119
1120 return 0;
1121
bc2c90c9
MV
1122err_mem:
1123 mutex_unlock(&lradc->lock);
1124 return ret;
1125}
1126
1127static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
1128{
1129 struct mxs_lradc *lradc = iio_priv(iio);
1130
f0b83cc8
JB
1131 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1132 LRADC_DELAY_KICK, LRADC_DELAY(0));
bc2c90c9 1133
f0b83cc8 1134 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
8c06f714
JB
1135 if (lradc->soc == IMX28_LRADC)
1136 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK,
f0b83cc8 1137 LRADC_CTRL1);
bc2c90c9
MV
1138
1139 kfree(lradc->buffer);
1140 mutex_unlock(&lradc->lock);
1141
1142 return 0;
1143}
1144
1145static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
1146 const unsigned long *mask)
1147{
06ddd353 1148 struct mxs_lradc *lradc = iio_priv(iio);
f4914e5e 1149 const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);
06ddd353
MV
1150 int rsvd_chans = 0;
1151 unsigned long rsvd_mask = 0;
1152
1153 if (lradc->use_touchbutton)
1154 rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
1155 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
1156 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
1157 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
1158 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;
1159
1160 if (lradc->use_touchbutton)
1161 rsvd_chans++;
1162 if (lradc->use_touchscreen)
1163 rsvd_chans++;
1164
1165 /* Test for attempts to map channels with special mode of operation. */
f4914e5e 1166 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))
06ddd353
MV
1167 return false;
1168
1169 /* Test for attempts to map more channels then available slots. */
1170 if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
1171 return false;
1172
1173 return true;
bc2c90c9
MV
1174}
1175
1176static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
1177 .preenable = &mxs_lradc_buffer_preenable,
1178 .postenable = &iio_triggered_buffer_postenable,
1179 .predisable = &iio_triggered_buffer_predisable,
1180 .postdisable = &mxs_lradc_buffer_postdisable,
1181 .validate_scan_mask = &mxs_lradc_validate_scan_mask,
1182};
1183
1184/*
1185 * Driver initialization
1186 */
1187
1188#define MXS_ADC_CHAN(idx, chan_type) { \
1189 .type = (chan_type), \
1190 .indexed = 1, \
1191 .scan_index = (idx), \
78a5fa67 1192 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
bc2c90c9
MV
1193 .channel = (idx), \
1194 .scan_type = { \
1195 .sign = 'u', \
1eb70a97 1196 .realbits = LRADC_RESOLUTION, \
bc2c90c9
MV
1197 .storagebits = 32, \
1198 }, \
1199}
1200
1201static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
1202 MXS_ADC_CHAN(0, IIO_VOLTAGE),
1203 MXS_ADC_CHAN(1, IIO_VOLTAGE),
1204 MXS_ADC_CHAN(2, IIO_VOLTAGE),
1205 MXS_ADC_CHAN(3, IIO_VOLTAGE),
1206 MXS_ADC_CHAN(4, IIO_VOLTAGE),
1207 MXS_ADC_CHAN(5, IIO_VOLTAGE),
1208 MXS_ADC_CHAN(6, IIO_VOLTAGE),
1209 MXS_ADC_CHAN(7, IIO_VOLTAGE), /* VBATT */
c8231a9a
AB
1210 /* Combined Temperature sensors */
1211 {
1212 .type = IIO_TEMP,
1213 .indexed = 1,
1214 .scan_index = 8,
1215 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1216 BIT(IIO_CHAN_INFO_OFFSET) |
1217 BIT(IIO_CHAN_INFO_SCALE),
1218 .channel = 8,
1219 .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},
1220 },
bc2c90c9
MV
1221 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */
1222 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */
1223 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */
1224 MXS_ADC_CHAN(13, IIO_VOLTAGE), /* VDDD */
1225 MXS_ADC_CHAN(14, IIO_VOLTAGE), /* VBG */
1226 MXS_ADC_CHAN(15, IIO_VOLTAGE), /* VDD5V */
1227};
1228
947123d5 1229static int mxs_lradc_hw_init(struct mxs_lradc *lradc)
bc2c90c9 1230{
06ddd353
MV
1231 /* The ADC always uses DELAY CHANNEL 0. */
1232 const uint32_t adc_cfg =
1233 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
bc2c90c9
MV
1234 (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);
1235
947123d5
FE
1236 int ret = stmp_reset_block(lradc->base);
1237 if (ret)
1238 return ret;
bc2c90c9 1239
06ddd353 1240 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */
f0b83cc8 1241 mxs_lradc_reg_wrt(lradc, adc_cfg, LRADC_DELAY(0));
06ddd353
MV
1242
1243 /* Disable remaining DELAY CHANNELs */
f0b83cc8
JB
1244 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(1));
1245 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
1246 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
06ddd353
MV
1247
1248 /* Configure the touchscreen type */
8c06f714
JB
1249 if (lradc->soc == IMX28_LRADC) {
1250 mxs_lradc_reg_clear(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
f0b83cc8 1251 LRADC_CTRL0);
06ddd353 1252
f0b83cc8
JB
1253 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
1254 mxs_lradc_reg_set(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
1255 LRADC_CTRL0);
06ddd353 1256 }
bc2c90c9
MV
1257
1258 /* Start internal temperature sensing. */
f0b83cc8 1259 mxs_lradc_reg_wrt(lradc, 0, LRADC_CTRL2);
947123d5
FE
1260
1261 return 0;
bc2c90c9
MV
1262}
1263
1264static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
1265{
1266 int i;
1267
f0b83cc8 1268 mxs_lradc_reg_clear(lradc, mxs_lradc_irq_en_mask(lradc), LRADC_CTRL1);
bc2c90c9
MV
1269
1270 for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
f0b83cc8 1271 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(i));
bc2c90c9
MV
1272}
1273
5e1f9aca
MV
1274static const struct of_device_id mxs_lradc_dt_ids[] = {
1275 { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
1276 { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
1277 { /* sentinel */ }
1278};
1279MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);
1280
dee05308
JB
1281static int mxs_lradc_probe_touchscreen(struct mxs_lradc *lradc,
1282 struct device_node *lradc_node)
1283{
e9c88fb5
JB
1284 int ret;
1285 u32 ts_wires = 0, adapt;
1286
1287 ret = of_property_read_u32(lradc_node, "fsl,lradc-touchscreen-wires",
1288 &ts_wires);
1289 if (ret)
1290 return -ENODEV; /* touchscreen feature disabled */
1291
1292 switch (ts_wires) {
1293 case 4:
1294 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
1295 break;
1296 case 5:
1297 if (lradc->soc == IMX28_LRADC) {
1298 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
1299 break;
1300 }
1301 /* fall through an error message for i.MX23 */
1302 default:
1303 dev_err(lradc->dev,
1304 "Unsupported number of touchscreen wires (%d)\n",
1305 ts_wires);
1306 return -EINVAL;
1307 }
1308
dee05308 1309 lradc->over_sample_cnt = 4;
e9c88fb5
JB
1310 ret = of_property_read_u32(lradc_node, "fsl,ave-ctrl", &adapt);
1311 if (ret == 0)
1312 lradc->over_sample_cnt = adapt;
1313
dee05308 1314 lradc->over_sample_delay = 2;
e9c88fb5
JB
1315 ret = of_property_read_u32(lradc_node, "fsl,ave-delay", &adapt);
1316 if (ret == 0)
1317 lradc->over_sample_delay = adapt;
1318
dee05308 1319 lradc->settling_delay = 10;
e9c88fb5
JB
1320 ret = of_property_read_u32(lradc_node, "fsl,settling", &adapt);
1321 if (ret == 0)
1322 lradc->settling_delay = adapt;
dee05308
JB
1323
1324 return 0;
1325}
1326
4ae1c61f 1327static int mxs_lradc_probe(struct platform_device *pdev)
bc2c90c9 1328{
5e1f9aca
MV
1329 const struct of_device_id *of_id =
1330 of_match_device(mxs_lradc_dt_ids, &pdev->dev);
1331 const struct mxs_lradc_of_config *of_cfg =
1332 &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
bc2c90c9 1333 struct device *dev = &pdev->dev;
06ddd353 1334 struct device_node *node = dev->of_node;
bc2c90c9
MV
1335 struct mxs_lradc *lradc;
1336 struct iio_dev *iio;
1337 struct resource *iores;
dee05308 1338 int ret = 0, touch_ret;
bc2c90c9
MV
1339 int i;
1340
1341 /* Allocate the IIO device. */
073c33d5 1342 iio = devm_iio_device_alloc(dev, sizeof(*lradc));
bc2c90c9
MV
1343 if (!iio) {
1344 dev_err(dev, "Failed to allocate IIO device\n");
1345 return -ENOMEM;
1346 }
1347
1348 lradc = iio_priv(iio);
ccff5297 1349 lradc->soc = (enum mxs_lradc_id)of_id->data;
bc2c90c9
MV
1350
1351 /* Grab the memory area */
1352 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1353 lradc->dev = &pdev->dev;
97f4be60 1354 lradc->base = devm_ioremap_resource(dev, iores);
073c33d5
SK
1355 if (IS_ERR(lradc->base))
1356 return PTR_ERR(lradc->base);
bc2c90c9 1357
18da755d
JB
1358 lradc->clk = devm_clk_get(&pdev->dev, NULL);
1359 if (IS_ERR(lradc->clk)) {
1360 dev_err(dev, "Failed to get the delay unit clock\n");
1361 return PTR_ERR(lradc->clk);
1362 }
1363 ret = clk_prepare_enable(lradc->clk);
1364 if (ret != 0) {
1365 dev_err(dev, "Failed to enable the delay unit clock\n");
1366 return ret;
1367 }
1368
dee05308 1369 touch_ret = mxs_lradc_probe_touchscreen(lradc, node);
06ddd353 1370
bc2c90c9 1371 /* Grab all IRQ sources */
5e1f9aca 1372 for (i = 0; i < of_cfg->irq_count; i++) {
bc2c90c9 1373 lradc->irq[i] = platform_get_irq(pdev, i);
073c33d5
SK
1374 if (lradc->irq[i] < 0)
1375 return -EINVAL;
bc2c90c9
MV
1376
1377 ret = devm_request_irq(dev, lradc->irq[i],
1378 mxs_lradc_handle_irq, 0,
5e1f9aca 1379 of_cfg->irq_name[i], iio);
bc2c90c9 1380 if (ret)
073c33d5 1381 return ret;
bc2c90c9
MV
1382 }
1383
1384 platform_set_drvdata(pdev, iio);
1385
1386 init_completion(&lradc->completion);
1387 mutex_init(&lradc->lock);
1388
1389 iio->name = pdev->name;
1390 iio->dev.parent = &pdev->dev;
1391 iio->info = &mxs_lradc_iio_info;
1392 iio->modes = INDIO_DIRECT_MODE;
1393 iio->channels = mxs_lradc_chan_spec;
1394 iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec);
f4914e5e 1395 iio->masklength = LRADC_MAX_TOTAL_CHANS;
bc2c90c9
MV
1396
1397 ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
1398 &mxs_lradc_trigger_handler,
1399 &mxs_lradc_buffer_ops);
1400 if (ret)
073c33d5 1401 return ret;
bc2c90c9
MV
1402
1403 ret = mxs_lradc_trigger_init(iio);
1404 if (ret)
1405 goto err_trig;
1406
f6e8a968 1407 /* Configure the hardware. */
947123d5
FE
1408 ret = mxs_lradc_hw_init(lradc);
1409 if (ret)
1410 goto err_dev;
f6e8a968 1411
06ddd353 1412 /* Register the touchscreen input device. */
dee05308
JB
1413 if (touch_ret == 0) {
1414 ret = mxs_lradc_ts_register(lradc);
1415 if (ret)
1416 goto err_ts_register;
1417 }
06ddd353 1418
bc2c90c9
MV
1419 /* Register IIO device. */
1420 ret = iio_device_register(iio);
1421 if (ret) {
1422 dev_err(dev, "Failed to register IIO device\n");
06ddd353 1423 goto err_ts;
bc2c90c9
MV
1424 }
1425
bc2c90c9
MV
1426 return 0;
1427
06ddd353
MV
1428err_ts:
1429 mxs_lradc_ts_unregister(lradc);
a0ef6db7
FE
1430err_ts_register:
1431 mxs_lradc_hw_stop(lradc);
bc2c90c9
MV
1432err_dev:
1433 mxs_lradc_trigger_remove(iio);
1434err_trig:
1435 iio_triggered_buffer_cleanup(iio);
bc2c90c9
MV
1436 return ret;
1437}
1438
447d4f29 1439static int mxs_lradc_remove(struct platform_device *pdev)
bc2c90c9
MV
1440{
1441 struct iio_dev *iio = platform_get_drvdata(pdev);
1442 struct mxs_lradc *lradc = iio_priv(iio);
1443
a0ef6db7 1444 iio_device_unregister(iio);
06ddd353 1445 mxs_lradc_ts_unregister(lradc);
bc2c90c9 1446 mxs_lradc_hw_stop(lradc);
bc2c90c9 1447 mxs_lradc_trigger_remove(iio);
a0ef6db7 1448 iio_triggered_buffer_cleanup(iio);
bc2c90c9 1449
18da755d 1450 clk_disable_unprepare(lradc->clk);
bc2c90c9
MV
1451 return 0;
1452}
1453
bc2c90c9
MV
1454static struct platform_driver mxs_lradc_driver = {
1455 .driver = {
1456 .name = DRIVER_NAME,
1457 .owner = THIS_MODULE,
1458 .of_match_table = mxs_lradc_dt_ids,
1459 },
1460 .probe = mxs_lradc_probe,
e543acf0 1461 .remove = mxs_lradc_remove,
bc2c90c9
MV
1462};
1463
1464module_platform_driver(mxs_lradc_driver);
1465
1466MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1467MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1468MODULE_LICENSE("GPL v2");
8c4a8c9d 1469MODULE_ALIAS("platform:" DRIVER_NAME);