]>
Commit | Line | Data |
---|---|---|
ee1f1fa4 AK |
1 | /* |
2 | * drivers/i2c/chips/tsl2563.c | |
3 | * | |
4 | * Copyright (C) 2008 Nokia Corporation | |
5 | * | |
6 | * Written by Timo O. Karjalainen <timo.o.karjalainen@nokia.com> | |
7 | * Contact: Amit Kucheria <amit.kucheria@verdurent.com> | |
8 | * | |
9 | * Converted to IIO driver | |
10 | * Amit Kucheria <amit.kucheria@verdurent.com> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * version 2 as published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
24 | * 02110-1301 USA | |
25 | */ | |
26 | ||
27 | #include <linux/module.h> | |
28 | #include <linux/i2c.h> | |
29 | #include <linux/interrupt.h> | |
388be488 | 30 | #include <linux/irq.h> |
ee1f1fa4 AK |
31 | #include <linux/sched.h> |
32 | #include <linux/mutex.h> | |
33 | #include <linux/delay.h> | |
ee1f1fa4 | 34 | #include <linux/pm.h> |
ee1f1fa4 | 35 | #include <linux/err.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
ee1f1fa4 | 37 | |
06458e27 JC |
38 | #include <linux/iio/iio.h> |
39 | #include <linux/iio/sysfs.h> | |
40 | #include <linux/iio/events.h> | |
ee1f1fa4 AK |
41 | #include "tsl2563.h" |
42 | ||
ee1f1fa4 AK |
43 | /* Use this many bits for fraction part. */ |
44 | #define ADC_FRAC_BITS (14) | |
45 | ||
46 | /* Given number of 1/10000's in ADC_FRAC_BITS precision. */ | |
47 | #define FRAC10K(f) (((f) * (1L << (ADC_FRAC_BITS))) / (10000)) | |
48 | ||
49 | /* Bits used for fraction in calibration coefficients.*/ | |
50 | #define CALIB_FRAC_BITS (10) | |
51 | /* 0.5 in CALIB_FRAC_BITS precision */ | |
52 | #define CALIB_FRAC_HALF (1 << (CALIB_FRAC_BITS - 1)) | |
53 | /* Make a fraction from a number n that was multiplied with b. */ | |
54 | #define CALIB_FRAC(n, b) (((n) << CALIB_FRAC_BITS) / (b)) | |
55 | /* Decimal 10^(digits in sysfs presentation) */ | |
56 | #define CALIB_BASE_SYSFS (1000) | |
57 | ||
58 | #define TSL2563_CMD (0x80) | |
59 | #define TSL2563_CLEARINT (0x40) | |
60 | ||
61 | #define TSL2563_REG_CTRL (0x00) | |
62 | #define TSL2563_REG_TIMING (0x01) | |
63 | #define TSL2563_REG_LOWLOW (0x02) /* data0 low threshold, 2 bytes */ | |
64 | #define TSL2563_REG_LOWHIGH (0x03) | |
65 | #define TSL2563_REG_HIGHLOW (0x04) /* data0 high threshold, 2 bytes */ | |
66 | #define TSL2563_REG_HIGHHIGH (0x05) | |
67 | #define TSL2563_REG_INT (0x06) | |
68 | #define TSL2563_REG_ID (0x0a) | |
69 | #define TSL2563_REG_DATA0LOW (0x0c) /* broadband sensor value, 2 bytes */ | |
70 | #define TSL2563_REG_DATA0HIGH (0x0d) | |
71 | #define TSL2563_REG_DATA1LOW (0x0e) /* infrared sensor value, 2 bytes */ | |
72 | #define TSL2563_REG_DATA1HIGH (0x0f) | |
73 | ||
74 | #define TSL2563_CMD_POWER_ON (0x03) | |
75 | #define TSL2563_CMD_POWER_OFF (0x00) | |
76 | #define TSL2563_CTRL_POWER_MASK (0x03) | |
77 | ||
78 | #define TSL2563_TIMING_13MS (0x00) | |
79 | #define TSL2563_TIMING_100MS (0x01) | |
80 | #define TSL2563_TIMING_400MS (0x02) | |
81 | #define TSL2563_TIMING_MASK (0x03) | |
82 | #define TSL2563_TIMING_GAIN16 (0x10) | |
83 | #define TSL2563_TIMING_GAIN1 (0x00) | |
84 | ||
85 | #define TSL2563_INT_DISBLED (0x00) | |
86 | #define TSL2563_INT_LEVEL (0x10) | |
87 | #define TSL2563_INT_PERSIST(n) ((n) & 0x0F) | |
88 | ||
89 | struct tsl2563_gainlevel_coeff { | |
90 | u8 gaintime; | |
91 | u16 min; | |
92 | u16 max; | |
93 | }; | |
94 | ||
1ff7e1d8 | 95 | static const struct tsl2563_gainlevel_coeff tsl2563_gainlevel_table[] = { |
ee1f1fa4 AK |
96 | { |
97 | .gaintime = TSL2563_TIMING_400MS | TSL2563_TIMING_GAIN16, | |
98 | .min = 0, | |
99 | .max = 65534, | |
100 | }, { | |
101 | .gaintime = TSL2563_TIMING_400MS | TSL2563_TIMING_GAIN1, | |
102 | .min = 2048, | |
103 | .max = 65534, | |
104 | }, { | |
105 | .gaintime = TSL2563_TIMING_100MS | TSL2563_TIMING_GAIN1, | |
106 | .min = 4095, | |
107 | .max = 37177, | |
108 | }, { | |
109 | .gaintime = TSL2563_TIMING_13MS | TSL2563_TIMING_GAIN1, | |
110 | .min = 3000, | |
111 | .max = 65535, | |
112 | }, | |
113 | }; | |
114 | ||
115 | struct tsl2563_chip { | |
116 | struct mutex lock; | |
117 | struct i2c_client *client; | |
ee1f1fa4 AK |
118 | struct delayed_work poweroff_work; |
119 | ||
120 | /* Remember state for suspend and resume functions */ | |
01788c53 | 121 | bool suspended; |
ee1f1fa4 | 122 | |
1ff7e1d8 | 123 | struct tsl2563_gainlevel_coeff const *gainlevel; |
ee1f1fa4 | 124 | |
ee1f1fa4 AK |
125 | u16 low_thres; |
126 | u16 high_thres; | |
127 | u8 intr; | |
388be488 | 128 | bool int_enabled; |
ee1f1fa4 AK |
129 | |
130 | /* Calibration coefficients */ | |
131 | u32 calib0; | |
132 | u32 calib1; | |
133 | int cover_comp_gain; | |
134 | ||
135 | /* Cache current values, to be returned while suspended */ | |
136 | u32 data0; | |
137 | u32 data1; | |
138 | }; | |
139 | ||
ee1f1fa4 AK |
140 | static int tsl2563_set_power(struct tsl2563_chip *chip, int on) |
141 | { | |
142 | struct i2c_client *client = chip->client; | |
143 | u8 cmd; | |
144 | ||
145 | cmd = on ? TSL2563_CMD_POWER_ON : TSL2563_CMD_POWER_OFF; | |
d9b42c01 BF |
146 | return i2c_smbus_write_byte_data(client, |
147 | TSL2563_CMD | TSL2563_REG_CTRL, cmd); | |
ee1f1fa4 AK |
148 | } |
149 | ||
150 | /* | |
151 | * Return value is 0 for off, 1 for on, or a negative error | |
152 | * code if reading failed. | |
153 | */ | |
154 | static int tsl2563_get_power(struct tsl2563_chip *chip) | |
155 | { | |
156 | struct i2c_client *client = chip->client; | |
157 | int ret; | |
ee1f1fa4 | 158 | |
d9b42c01 BF |
159 | ret = i2c_smbus_read_byte_data(client, TSL2563_CMD | TSL2563_REG_CTRL); |
160 | if (ret < 0) | |
ee1f1fa4 AK |
161 | return ret; |
162 | ||
d9b42c01 | 163 | return (ret & TSL2563_CTRL_POWER_MASK) == TSL2563_CMD_POWER_ON; |
ee1f1fa4 AK |
164 | } |
165 | ||
166 | static int tsl2563_configure(struct tsl2563_chip *chip) | |
167 | { | |
ee1f1fa4 AK |
168 | int ret; |
169 | ||
d9b42c01 BF |
170 | ret = i2c_smbus_write_byte_data(chip->client, |
171 | TSL2563_CMD | TSL2563_REG_TIMING, | |
ee1f1fa4 AK |
172 | chip->gainlevel->gaintime); |
173 | if (ret) | |
388be488 | 174 | goto error_ret; |
d9b42c01 BF |
175 | ret = i2c_smbus_write_byte_data(chip->client, |
176 | TSL2563_CMD | TSL2563_REG_HIGHLOW, | |
388be488 JC |
177 | chip->high_thres & 0xFF); |
178 | if (ret) | |
179 | goto error_ret; | |
d9b42c01 BF |
180 | ret = i2c_smbus_write_byte_data(chip->client, |
181 | TSL2563_CMD | TSL2563_REG_HIGHHIGH, | |
388be488 JC |
182 | (chip->high_thres >> 8) & 0xFF); |
183 | if (ret) | |
184 | goto error_ret; | |
d9b42c01 BF |
185 | ret = i2c_smbus_write_byte_data(chip->client, |
186 | TSL2563_CMD | TSL2563_REG_LOWLOW, | |
388be488 JC |
187 | chip->low_thres & 0xFF); |
188 | if (ret) | |
189 | goto error_ret; | |
d9b42c01 BF |
190 | ret = i2c_smbus_write_byte_data(chip->client, |
191 | TSL2563_CMD | TSL2563_REG_LOWHIGH, | |
388be488 JC |
192 | (chip->low_thres >> 8) & 0xFF); |
193 | /* Interrupt register is automatically written anyway if it is relevant | |
194 | so is not here */ | |
195 | error_ret: | |
ee1f1fa4 AK |
196 | return ret; |
197 | } | |
198 | ||
199 | static void tsl2563_poweroff_work(struct work_struct *work) | |
200 | { | |
201 | struct tsl2563_chip *chip = | |
202 | container_of(work, struct tsl2563_chip, poweroff_work.work); | |
203 | tsl2563_set_power(chip, 0); | |
204 | } | |
205 | ||
206 | static int tsl2563_detect(struct tsl2563_chip *chip) | |
207 | { | |
208 | int ret; | |
209 | ||
210 | ret = tsl2563_set_power(chip, 1); | |
211 | if (ret) | |
212 | return ret; | |
213 | ||
214 | ret = tsl2563_get_power(chip); | |
215 | if (ret < 0) | |
216 | return ret; | |
217 | ||
218 | return ret ? 0 : -ENODEV; | |
219 | } | |
220 | ||
221 | static int tsl2563_read_id(struct tsl2563_chip *chip, u8 *id) | |
222 | { | |
223 | struct i2c_client *client = chip->client; | |
224 | int ret; | |
225 | ||
d9b42c01 BF |
226 | ret = i2c_smbus_read_byte_data(client, TSL2563_CMD | TSL2563_REG_ID); |
227 | if (ret < 0) | |
ee1f1fa4 AK |
228 | return ret; |
229 | ||
22dc09ca MJ |
230 | *id = ret; |
231 | ||
ee1f1fa4 AK |
232 | return 0; |
233 | } | |
234 | ||
235 | /* | |
236 | * "Normalized" ADC value is one obtained with 400ms of integration time and | |
237 | * 16x gain. This function returns the number of bits of shift needed to | |
238 | * convert between normalized values and HW values obtained using given | |
239 | * timing and gain settings. | |
240 | */ | |
241 | static int adc_shiftbits(u8 timing) | |
242 | { | |
243 | int shift = 0; | |
244 | ||
245 | switch (timing & TSL2563_TIMING_MASK) { | |
246 | case TSL2563_TIMING_13MS: | |
247 | shift += 5; | |
248 | break; | |
249 | case TSL2563_TIMING_100MS: | |
250 | shift += 2; | |
251 | break; | |
252 | case TSL2563_TIMING_400MS: | |
253 | /* no-op */ | |
254 | break; | |
255 | } | |
256 | ||
257 | if (!(timing & TSL2563_TIMING_GAIN16)) | |
258 | shift += 4; | |
259 | ||
260 | return shift; | |
261 | } | |
262 | ||
263 | /* Convert a HW ADC value to normalized scale. */ | |
264 | static u32 normalize_adc(u16 adc, u8 timing) | |
265 | { | |
266 | return adc << adc_shiftbits(timing); | |
267 | } | |
268 | ||
269 | static void tsl2563_wait_adc(struct tsl2563_chip *chip) | |
270 | { | |
271 | unsigned int delay; | |
272 | ||
273 | switch (chip->gainlevel->gaintime & TSL2563_TIMING_MASK) { | |
274 | case TSL2563_TIMING_13MS: | |
275 | delay = 14; | |
276 | break; | |
277 | case TSL2563_TIMING_100MS: | |
278 | delay = 101; | |
279 | break; | |
280 | default: | |
281 | delay = 402; | |
282 | } | |
283 | /* | |
284 | * TODO: Make sure that we wait at least required delay but why we | |
285 | * have to extend it one tick more? | |
286 | */ | |
287 | schedule_timeout_interruptible(msecs_to_jiffies(delay) + 2); | |
288 | } | |
289 | ||
290 | static int tsl2563_adjust_gainlevel(struct tsl2563_chip *chip, u16 adc) | |
291 | { | |
292 | struct i2c_client *client = chip->client; | |
293 | ||
294 | if (adc > chip->gainlevel->max || adc < chip->gainlevel->min) { | |
295 | ||
296 | (adc > chip->gainlevel->max) ? | |
297 | chip->gainlevel++ : chip->gainlevel--; | |
298 | ||
d9b42c01 BF |
299 | i2c_smbus_write_byte_data(client, |
300 | TSL2563_CMD | TSL2563_REG_TIMING, | |
301 | chip->gainlevel->gaintime); | |
ee1f1fa4 AK |
302 | |
303 | tsl2563_wait_adc(chip); | |
304 | tsl2563_wait_adc(chip); | |
305 | ||
306 | return 1; | |
307 | } else | |
308 | return 0; | |
309 | } | |
310 | ||
311 | static int tsl2563_get_adc(struct tsl2563_chip *chip) | |
312 | { | |
313 | struct i2c_client *client = chip->client; | |
ee1f1fa4 AK |
314 | u16 adc0, adc1; |
315 | int retry = 1; | |
316 | int ret = 0; | |
317 | ||
01788c53 | 318 | if (chip->suspended) |
ee1f1fa4 AK |
319 | goto out; |
320 | ||
388be488 JC |
321 | if (!chip->int_enabled) { |
322 | cancel_delayed_work(&chip->poweroff_work); | |
323 | ||
324 | if (!tsl2563_get_power(chip)) { | |
325 | ret = tsl2563_set_power(chip, 1); | |
326 | if (ret) | |
327 | goto out; | |
328 | ret = tsl2563_configure(chip); | |
329 | if (ret) | |
330 | goto out; | |
331 | tsl2563_wait_adc(chip); | |
332 | } | |
ee1f1fa4 AK |
333 | } |
334 | ||
335 | while (retry) { | |
d9b42c01 BF |
336 | ret = i2c_smbus_read_word_data(client, |
337 | TSL2563_CMD | TSL2563_REG_DATA0LOW); | |
338 | if (ret < 0) | |
ee1f1fa4 | 339 | goto out; |
d9b42c01 | 340 | adc0 = ret; |
ee1f1fa4 | 341 | |
d9b42c01 BF |
342 | ret = i2c_smbus_read_word_data(client, |
343 | TSL2563_CMD | TSL2563_REG_DATA1LOW); | |
344 | if (ret < 0) | |
ee1f1fa4 | 345 | goto out; |
d9b42c01 | 346 | adc1 = ret; |
ee1f1fa4 AK |
347 | |
348 | retry = tsl2563_adjust_gainlevel(chip, adc0); | |
349 | } | |
350 | ||
351 | chip->data0 = normalize_adc(adc0, chip->gainlevel->gaintime); | |
352 | chip->data1 = normalize_adc(adc1, chip->gainlevel->gaintime); | |
353 | ||
388be488 JC |
354 | if (!chip->int_enabled) |
355 | schedule_delayed_work(&chip->poweroff_work, 5 * HZ); | |
ee1f1fa4 AK |
356 | |
357 | ret = 0; | |
358 | out: | |
359 | return ret; | |
360 | } | |
361 | ||
362 | static inline int calib_to_sysfs(u32 calib) | |
363 | { | |
364 | return (int) (((calib * CALIB_BASE_SYSFS) + | |
365 | CALIB_FRAC_HALF) >> CALIB_FRAC_BITS); | |
366 | } | |
367 | ||
368 | static inline u32 calib_from_sysfs(int value) | |
369 | { | |
370 | return (((u32) value) << CALIB_FRAC_BITS) / CALIB_BASE_SYSFS; | |
371 | } | |
372 | ||
373 | /* | |
374 | * Conversions between lux and ADC values. | |
375 | * | |
376 | * The basic formula is lux = c0 * adc0 - c1 * adc1, where c0 and c1 are | |
377 | * appropriate constants. Different constants are needed for different | |
378 | * kinds of light, determined by the ratio adc1/adc0 (basically the ratio | |
379 | * of the intensities in infrared and visible wavelengths). lux_table below | |
380 | * lists the upper threshold of the adc1/adc0 ratio and the corresponding | |
381 | * constants. | |
382 | */ | |
383 | ||
384 | struct tsl2563_lux_coeff { | |
385 | unsigned long ch_ratio; | |
386 | unsigned long ch0_coeff; | |
387 | unsigned long ch1_coeff; | |
388 | }; | |
389 | ||
390 | static const struct tsl2563_lux_coeff lux_table[] = { | |
391 | { | |
392 | .ch_ratio = FRAC10K(1300), | |
393 | .ch0_coeff = FRAC10K(315), | |
394 | .ch1_coeff = FRAC10K(262), | |
395 | }, { | |
396 | .ch_ratio = FRAC10K(2600), | |
397 | .ch0_coeff = FRAC10K(337), | |
398 | .ch1_coeff = FRAC10K(430), | |
399 | }, { | |
400 | .ch_ratio = FRAC10K(3900), | |
401 | .ch0_coeff = FRAC10K(363), | |
402 | .ch1_coeff = FRAC10K(529), | |
403 | }, { | |
404 | .ch_ratio = FRAC10K(5200), | |
405 | .ch0_coeff = FRAC10K(392), | |
406 | .ch1_coeff = FRAC10K(605), | |
407 | }, { | |
408 | .ch_ratio = FRAC10K(6500), | |
409 | .ch0_coeff = FRAC10K(229), | |
410 | .ch1_coeff = FRAC10K(291), | |
411 | }, { | |
412 | .ch_ratio = FRAC10K(8000), | |
413 | .ch0_coeff = FRAC10K(157), | |
414 | .ch1_coeff = FRAC10K(180), | |
415 | }, { | |
416 | .ch_ratio = FRAC10K(13000), | |
417 | .ch0_coeff = FRAC10K(34), | |
418 | .ch1_coeff = FRAC10K(26), | |
419 | }, { | |
420 | .ch_ratio = ULONG_MAX, | |
421 | .ch0_coeff = 0, | |
422 | .ch1_coeff = 0, | |
423 | }, | |
424 | }; | |
425 | ||
426 | /* | |
427 | * Convert normalized, scaled ADC values to lux. | |
428 | */ | |
429 | static unsigned int adc_to_lux(u32 adc0, u32 adc1) | |
430 | { | |
431 | const struct tsl2563_lux_coeff *lp = lux_table; | |
432 | unsigned long ratio, lux, ch0 = adc0, ch1 = adc1; | |
433 | ||
434 | ratio = ch0 ? ((ch1 << ADC_FRAC_BITS) / ch0) : ULONG_MAX; | |
435 | ||
436 | while (lp->ch_ratio < ratio) | |
437 | lp++; | |
438 | ||
439 | lux = ch0 * lp->ch0_coeff - ch1 * lp->ch1_coeff; | |
440 | ||
441 | return (unsigned int) (lux >> ADC_FRAC_BITS); | |
442 | } | |
443 | ||
444 | /*--------------------------------------------------------------*/ | |
445 | /* Sysfs interface */ | |
446 | /*--------------------------------------------------------------*/ | |
447 | ||
ee1f1fa4 AK |
448 | |
449 | /* Apply calibration coefficient to ADC count. */ | |
450 | static u32 calib_adc(u32 adc, u32 calib) | |
451 | { | |
452 | unsigned long scaled = adc; | |
453 | ||
454 | scaled *= calib; | |
455 | scaled >>= CALIB_FRAC_BITS; | |
456 | ||
457 | return (u32) scaled; | |
458 | } | |
459 | ||
cbcdf4dd JC |
460 | static int tsl2563_write_raw(struct iio_dev *indio_dev, |
461 | struct iio_chan_spec const *chan, | |
462 | int val, | |
463 | int val2, | |
464 | long mask) | |
ee1f1fa4 | 465 | { |
cbcdf4dd | 466 | struct tsl2563_chip *chip = iio_priv(indio_dev); |
ee1f1fa4 | 467 | |
fe3f8f87 | 468 | if (chan->channel == IIO_MOD_LIGHT_BOTH) |
cbcdf4dd JC |
469 | chip->calib0 = calib_from_sysfs(val); |
470 | else | |
471 | chip->calib1 = calib_from_sysfs(val); | |
ee1f1fa4 | 472 | |
cbcdf4dd | 473 | return 0; |
ee1f1fa4 AK |
474 | } |
475 | ||
cbcdf4dd JC |
476 | static int tsl2563_read_raw(struct iio_dev *indio_dev, |
477 | struct iio_chan_spec const *chan, | |
478 | int *val, | |
479 | int *val2, | |
480 | long m) | |
ee1f1fa4 | 481 | { |
cbcdf4dd JC |
482 | int ret = -EINVAL; |
483 | u32 calib0, calib1; | |
484 | struct tsl2563_chip *chip = iio_priv(indio_dev); | |
ee1f1fa4 AK |
485 | |
486 | mutex_lock(&chip->lock); | |
cbcdf4dd | 487 | switch (m) { |
90354d00 JC |
488 | case IIO_CHAN_INFO_RAW: |
489 | case IIO_CHAN_INFO_PROCESSED: | |
cbcdf4dd JC |
490 | switch (chan->type) { |
491 | case IIO_LIGHT: | |
492 | ret = tsl2563_get_adc(chip); | |
493 | if (ret) | |
494 | goto error_ret; | |
495 | calib0 = calib_adc(chip->data0, chip->calib0) * | |
496 | chip->cover_comp_gain; | |
497 | calib1 = calib_adc(chip->data1, chip->calib1) * | |
498 | chip->cover_comp_gain; | |
499 | *val = adc_to_lux(calib0, calib1); | |
500 | ret = IIO_VAL_INT; | |
501 | break; | |
502 | case IIO_INTENSITY: | |
503 | ret = tsl2563_get_adc(chip); | |
504 | if (ret) | |
505 | goto error_ret; | |
506 | if (chan->channel == 0) | |
507 | *val = chip->data0; | |
508 | else | |
509 | *val = chip->data1; | |
510 | ret = IIO_VAL_INT; | |
511 | break; | |
512 | default: | |
513 | break; | |
514 | } | |
388be488 | 515 | break; |
cbcdf4dd | 516 | |
c8a9f805 | 517 | case IIO_CHAN_INFO_CALIBSCALE: |
cbcdf4dd JC |
518 | if (chan->channel == 0) |
519 | *val = calib_to_sysfs(chip->calib0); | |
520 | else | |
521 | *val = calib_to_sysfs(chip->calib1); | |
522 | ret = IIO_VAL_INT; | |
388be488 JC |
523 | break; |
524 | default: | |
97d35f28 DC |
525 | ret = -EINVAL; |
526 | goto error_ret; | |
388be488 | 527 | } |
ee1f1fa4 | 528 | |
cbcdf4dd JC |
529 | error_ret: |
530 | mutex_unlock(&chip->lock); | |
531 | return ret; | |
e9124afa JC |
532 | } |
533 | ||
cbcdf4dd | 534 | static const struct iio_chan_spec tsl2563_channels[] = { |
79939061 JC |
535 | { |
536 | .type = IIO_LIGHT, | |
537 | .indexed = 1, | |
90354d00 | 538 | .info_mask = IIO_CHAN_INFO_PROCESSED_SEPARATE_BIT, |
79939061 JC |
539 | .channel = 0, |
540 | }, { | |
541 | .type = IIO_INTENSITY, | |
542 | .modified = 1, | |
543 | .channel2 = IIO_MOD_LIGHT_BOTH, | |
90354d00 JC |
544 | .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | |
545 | IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, | |
79939061 JC |
546 | .event_mask = (IIO_EV_BIT(IIO_EV_TYPE_THRESH, |
547 | IIO_EV_DIR_RISING) | | |
548 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, | |
549 | IIO_EV_DIR_FALLING)), | |
550 | }, { | |
551 | .type = IIO_INTENSITY, | |
552 | .modified = 1, | |
a7e3bd66 | 553 | .channel2 = IIO_MOD_LIGHT_IR, |
90354d00 JC |
554 | .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | |
555 | IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT, | |
79939061 | 556 | } |
ee1f1fa4 AK |
557 | }; |
558 | ||
cbcdf4dd | 559 | static int tsl2563_read_thresh(struct iio_dev *indio_dev, |
330c6c57 JC |
560 | u64 event_code, |
561 | int *val) | |
388be488 | 562 | { |
cbcdf4dd JC |
563 | struct tsl2563_chip *chip = iio_priv(indio_dev); |
564 | ||
565 | switch (IIO_EVENT_CODE_EXTRACT_DIR(event_code)) { | |
566 | case IIO_EV_DIR_RISING: | |
567 | *val = chip->high_thres; | |
388be488 | 568 | break; |
cbcdf4dd JC |
569 | case IIO_EV_DIR_FALLING: |
570 | *val = chip->low_thres; | |
388be488 | 571 | break; |
cbcdf4dd JC |
572 | default: |
573 | return -EINVAL; | |
388be488 | 574 | } |
cbcdf4dd JC |
575 | |
576 | return 0; | |
388be488 JC |
577 | } |
578 | ||
15fbc198 | 579 | static int tsl2563_write_thresh(struct iio_dev *indio_dev, |
330c6c57 | 580 | u64 event_code, |
cbcdf4dd | 581 | int val) |
388be488 | 582 | { |
cbcdf4dd | 583 | struct tsl2563_chip *chip = iio_priv(indio_dev); |
388be488 | 584 | int ret; |
cbcdf4dd | 585 | u8 address; |
388be488 | 586 | |
cbcdf4dd JC |
587 | if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_RISING) |
588 | address = TSL2563_REG_HIGHLOW; | |
589 | else | |
590 | address = TSL2563_REG_LOWLOW; | |
388be488 | 591 | mutex_lock(&chip->lock); |
d9b42c01 BF |
592 | ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | address, |
593 | val & 0xFF); | |
388be488 JC |
594 | if (ret) |
595 | goto error_ret; | |
d9b42c01 BF |
596 | ret = i2c_smbus_write_byte_data(chip->client, |
597 | TSL2563_CMD | (address + 1), | |
598 | (val >> 8) & 0xFF); | |
cbcdf4dd | 599 | if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_RISING) |
388be488 | 600 | chip->high_thres = val; |
cbcdf4dd | 601 | else |
388be488 | 602 | chip->low_thres = val; |
388be488 JC |
603 | |
604 | error_ret: | |
605 | mutex_unlock(&chip->lock); | |
606 | ||
cbcdf4dd | 607 | return ret; |
388be488 JC |
608 | } |
609 | ||
bdab1001 | 610 | static irqreturn_t tsl2563_event_handler(int irq, void *private) |
388be488 | 611 | { |
bdab1001 | 612 | struct iio_dev *dev_info = private; |
33789dce | 613 | struct tsl2563_chip *chip = iio_priv(dev_info); |
388be488 | 614 | |
5aa96188 | 615 | iio_push_event(dev_info, |
c4b14d99 | 616 | IIO_UNMOD_EVENT_CODE(IIO_LIGHT, |
da1d8b68 JC |
617 | 0, |
618 | IIO_EV_TYPE_THRESH, | |
619 | IIO_EV_DIR_EITHER), | |
bdab1001 | 620 | iio_get_time_ns()); |
388be488 | 621 | |
388be488 | 622 | /* clear the interrupt and push the event */ |
d9b42c01 | 623 | i2c_smbus_write_byte(chip->client, TSL2563_CMD | TSL2563_CLEARINT); |
bdab1001 | 624 | return IRQ_HANDLED; |
388be488 JC |
625 | } |
626 | ||
cbcdf4dd | 627 | static int tsl2563_write_interrupt_config(struct iio_dev *indio_dev, |
330c6c57 JC |
628 | u64 event_code, |
629 | int state) | |
388be488 | 630 | { |
33789dce | 631 | struct tsl2563_chip *chip = iio_priv(indio_dev); |
cbcdf4dd | 632 | int ret = 0; |
388be488 | 633 | |
388be488 | 634 | mutex_lock(&chip->lock); |
cbcdf4dd | 635 | if (state && !(chip->intr & 0x30)) { |
388be488 JC |
636 | chip->intr &= ~0x30; |
637 | chip->intr |= 0x10; | |
638 | /* ensure the chip is actually on */ | |
639 | cancel_delayed_work(&chip->poweroff_work); | |
640 | if (!tsl2563_get_power(chip)) { | |
641 | ret = tsl2563_set_power(chip, 1); | |
642 | if (ret) | |
643 | goto out; | |
644 | ret = tsl2563_configure(chip); | |
645 | if (ret) | |
646 | goto out; | |
647 | } | |
d9b42c01 BF |
648 | ret = i2c_smbus_write_byte_data(chip->client, |
649 | TSL2563_CMD | TSL2563_REG_INT, | |
650 | chip->intr); | |
388be488 JC |
651 | chip->int_enabled = true; |
652 | } | |
653 | ||
cbcdf4dd | 654 | if (!state && (chip->intr & 0x30)) { |
95273f89 | 655 | chip->intr &= ~0x30; |
d9b42c01 BF |
656 | ret = i2c_smbus_write_byte_data(chip->client, |
657 | TSL2563_CMD | TSL2563_REG_INT, | |
658 | chip->intr); | |
388be488 JC |
659 | chip->int_enabled = false; |
660 | /* now the interrupt is not enabled, we can go to sleep */ | |
661 | schedule_delayed_work(&chip->poweroff_work, 5 * HZ); | |
662 | } | |
663 | out: | |
664 | mutex_unlock(&chip->lock); | |
665 | ||
cbcdf4dd | 666 | return ret; |
388be488 JC |
667 | } |
668 | ||
cbcdf4dd | 669 | static int tsl2563_read_interrupt_config(struct iio_dev *indio_dev, |
330c6c57 | 670 | u64 event_code) |
388be488 | 671 | { |
cbcdf4dd | 672 | struct tsl2563_chip *chip = iio_priv(indio_dev); |
cbcdf4dd | 673 | int ret; |
388be488 JC |
674 | |
675 | mutex_lock(&chip->lock); | |
d9b42c01 BF |
676 | ret = i2c_smbus_read_byte_data(chip->client, |
677 | TSL2563_CMD | TSL2563_REG_INT); | |
388be488 JC |
678 | mutex_unlock(&chip->lock); |
679 | if (ret < 0) | |
680 | goto error_ret; | |
d9b42c01 | 681 | ret = !!(ret & 0x30); |
388be488 JC |
682 | error_ret: |
683 | ||
cbcdf4dd | 684 | return ret; |
388be488 | 685 | } |
388be488 | 686 | |
ee1f1fa4 AK |
687 | /*--------------------------------------------------------------*/ |
688 | /* Probe, Attach, Remove */ | |
689 | /*--------------------------------------------------------------*/ | |
690 | static struct i2c_driver tsl2563_i2c_driver; | |
691 | ||
6fe8135f JC |
692 | static const struct iio_info tsl2563_info_no_irq = { |
693 | .driver_module = THIS_MODULE, | |
9e4216fd BF |
694 | .read_raw = &tsl2563_read_raw, |
695 | .write_raw = &tsl2563_write_raw, | |
6fe8135f JC |
696 | }; |
697 | ||
698 | static const struct iio_info tsl2563_info = { | |
699 | .driver_module = THIS_MODULE, | |
6fe8135f JC |
700 | .read_raw = &tsl2563_read_raw, |
701 | .write_raw = &tsl2563_write_raw, | |
702 | .read_event_value = &tsl2563_read_thresh, | |
703 | .write_event_value = &tsl2563_write_thresh, | |
704 | .read_event_config = &tsl2563_read_interrupt_config, | |
705 | .write_event_config = &tsl2563_write_interrupt_config, | |
706 | }; | |
707 | ||
4ae1c61f | 708 | static int tsl2563_probe(struct i2c_client *client, |
ee1f1fa4 AK |
709 | const struct i2c_device_id *device_id) |
710 | { | |
33789dce | 711 | struct iio_dev *indio_dev; |
ee1f1fa4 AK |
712 | struct tsl2563_chip *chip; |
713 | struct tsl2563_platform_data *pdata = client->dev.platform_data; | |
714 | int err = 0; | |
deda386d | 715 | u8 id = 0; |
ee1f1fa4 | 716 | |
7cbb7537 | 717 | indio_dev = iio_device_alloc(sizeof(*chip)); |
33789dce | 718 | if (!indio_dev) |
ee1f1fa4 AK |
719 | return -ENOMEM; |
720 | ||
33789dce JC |
721 | chip = iio_priv(indio_dev); |
722 | ||
ee1f1fa4 AK |
723 | i2c_set_clientdata(client, chip); |
724 | chip->client = client; | |
725 | ||
726 | err = tsl2563_detect(chip); | |
727 | if (err) { | |
dbf717fd | 728 | dev_err(&client->dev, "detect error %d\n", -err); |
ee1f1fa4 AK |
729 | goto fail1; |
730 | } | |
731 | ||
732 | err = tsl2563_read_id(chip, &id); | |
dbf717fd GG |
733 | if (err) { |
734 | dev_err(&client->dev, "read id error %d\n", -err); | |
ee1f1fa4 | 735 | goto fail1; |
dbf717fd | 736 | } |
ee1f1fa4 AK |
737 | |
738 | mutex_init(&chip->lock); | |
739 | ||
740 | /* Default values used until userspace says otherwise */ | |
741 | chip->low_thres = 0x0; | |
742 | chip->high_thres = 0xffff; | |
743 | chip->gainlevel = tsl2563_gainlevel_table; | |
744 | chip->intr = TSL2563_INT_PERSIST(4); | |
745 | chip->calib0 = calib_from_sysfs(CALIB_BASE_SYSFS); | |
746 | chip->calib1 = calib_from_sysfs(CALIB_BASE_SYSFS); | |
747 | ||
748 | if (pdata) | |
749 | chip->cover_comp_gain = pdata->cover_comp_gain; | |
750 | else | |
751 | chip->cover_comp_gain = 1; | |
752 | ||
753 | dev_info(&client->dev, "model %d, rev. %d\n", id >> 4, id & 0x0f); | |
cbcdf4dd JC |
754 | indio_dev->name = client->name; |
755 | indio_dev->channels = tsl2563_channels; | |
756 | indio_dev->num_channels = ARRAY_SIZE(tsl2563_channels); | |
33789dce | 757 | indio_dev->dev.parent = &client->dev; |
33789dce | 758 | indio_dev->modes = INDIO_DIRECT_MODE; |
dbf717fd | 759 | |
cbcdf4dd | 760 | if (client->irq) |
6fe8135f JC |
761 | indio_dev->info = &tsl2563_info; |
762 | else | |
763 | indio_dev->info = &tsl2563_info_no_irq; | |
dbf717fd | 764 | |
388be488 | 765 | if (client->irq) { |
dbf717fd | 766 | err = request_threaded_irq(client->irq, |
bdab1001 JC |
767 | NULL, |
768 | &tsl2563_event_handler, | |
769 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | |
770 | "tsl2563_event", | |
771 | indio_dev); | |
dbf717fd GG |
772 | if (err) { |
773 | dev_err(&client->dev, "irq request error %d\n", -err); | |
774 | goto fail1; | |
775 | } | |
388be488 | 776 | } |
dbf717fd | 777 | |
ee1f1fa4 | 778 | err = tsl2563_configure(chip); |
dbf717fd GG |
779 | if (err) { |
780 | dev_err(&client->dev, "configure error %d\n", -err); | |
781 | goto fail2; | |
782 | } | |
ee1f1fa4 AK |
783 | |
784 | INIT_DELAYED_WORK(&chip->poweroff_work, tsl2563_poweroff_work); | |
dbf717fd | 785 | |
388be488 | 786 | /* The interrupt cannot yet be enabled so this is fine without lock */ |
ee1f1fa4 AK |
787 | schedule_delayed_work(&chip->poweroff_work, 5 * HZ); |
788 | ||
dbf717fd GG |
789 | err = iio_device_register(indio_dev); |
790 | if (err) { | |
791 | dev_err(&client->dev, "iio registration error %d\n", -err); | |
26d25ae3 | 792 | goto fail3; |
dbf717fd | 793 | } |
26d25ae3 | 794 | |
ee1f1fa4 | 795 | return 0; |
dbf717fd | 796 | |
388be488 | 797 | fail3: |
dbf717fd GG |
798 | cancel_delayed_work(&chip->poweroff_work); |
799 | flush_scheduled_work(); | |
800 | fail2: | |
388be488 | 801 | if (client->irq) |
bdab1001 | 802 | free_irq(client->irq, indio_dev); |
ee1f1fa4 | 803 | fail1: |
7cbb7537 | 804 | iio_device_free(indio_dev); |
ee1f1fa4 AK |
805 | return err; |
806 | } | |
807 | ||
447d4f29 | 808 | static int tsl2563_remove(struct i2c_client *client) |
ee1f1fa4 AK |
809 | { |
810 | struct tsl2563_chip *chip = i2c_get_clientdata(client); | |
33789dce | 811 | struct iio_dev *indio_dev = iio_priv_to_dev(chip); |
d2fffd6c JC |
812 | |
813 | iio_device_unregister(indio_dev); | |
388be488 JC |
814 | if (!chip->int_enabled) |
815 | cancel_delayed_work(&chip->poweroff_work); | |
816 | /* Ensure that interrupts are disabled - then flush any bottom halves */ | |
95273f89 | 817 | chip->intr &= ~0x30; |
d9b42c01 BF |
818 | i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT, |
819 | chip->intr); | |
388be488 JC |
820 | flush_scheduled_work(); |
821 | tsl2563_set_power(chip, 0); | |
822 | if (client->irq) | |
bdab1001 | 823 | free_irq(client->irq, indio_dev); |
d2fffd6c | 824 | |
7cbb7537 | 825 | iio_device_free(indio_dev); |
ee1f1fa4 | 826 | |
ee1f1fa4 AK |
827 | return 0; |
828 | } | |
829 | ||
01788c53 LPC |
830 | #ifdef CONFIG_PM_SLEEP |
831 | static int tsl2563_suspend(struct device *dev) | |
ee1f1fa4 | 832 | { |
01788c53 | 833 | struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); |
ee1f1fa4 AK |
834 | int ret; |
835 | ||
836 | mutex_lock(&chip->lock); | |
837 | ||
838 | ret = tsl2563_set_power(chip, 0); | |
839 | if (ret) | |
840 | goto out; | |
841 | ||
01788c53 | 842 | chip->suspended = true; |
ee1f1fa4 AK |
843 | |
844 | out: | |
845 | mutex_unlock(&chip->lock); | |
846 | return ret; | |
847 | } | |
848 | ||
01788c53 | 849 | static int tsl2563_resume(struct device *dev) |
ee1f1fa4 | 850 | { |
01788c53 | 851 | struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); |
ee1f1fa4 AK |
852 | int ret; |
853 | ||
854 | mutex_lock(&chip->lock); | |
855 | ||
856 | ret = tsl2563_set_power(chip, 1); | |
857 | if (ret) | |
858 | goto out; | |
859 | ||
860 | ret = tsl2563_configure(chip); | |
861 | if (ret) | |
862 | goto out; | |
863 | ||
01788c53 | 864 | chip->suspended = false; |
ee1f1fa4 AK |
865 | |
866 | out: | |
867 | mutex_unlock(&chip->lock); | |
868 | return ret; | |
869 | } | |
870 | ||
01788c53 LPC |
871 | static SIMPLE_DEV_PM_OPS(tsl2563_pm_ops, tsl2563_suspend, tsl2563_resume); |
872 | #define TSL2563_PM_OPS (&tsl2563_pm_ops) | |
873 | #else | |
874 | #define TSL2563_PM_OPS NULL | |
875 | #endif | |
876 | ||
ee1f1fa4 | 877 | static const struct i2c_device_id tsl2563_id[] = { |
dbd5d239 JC |
878 | { "tsl2560", 0 }, |
879 | { "tsl2561", 1 }, | |
880 | { "tsl2562", 2 }, | |
881 | { "tsl2563", 3 }, | |
882 | {} | |
ee1f1fa4 AK |
883 | }; |
884 | MODULE_DEVICE_TABLE(i2c, tsl2563_id); | |
885 | ||
886 | static struct i2c_driver tsl2563_i2c_driver = { | |
887 | .driver = { | |
dbd5d239 | 888 | .name = "tsl2563", |
01788c53 | 889 | .pm = TSL2563_PM_OPS, |
ee1f1fa4 | 890 | }, |
ee1f1fa4 | 891 | .probe = tsl2563_probe, |
e543acf0 | 892 | .remove = tsl2563_remove, |
ee1f1fa4 AK |
893 | .id_table = tsl2563_id, |
894 | }; | |
6e5af184 | 895 | module_i2c_driver(tsl2563_i2c_driver); |
ee1f1fa4 AK |
896 | |
897 | MODULE_AUTHOR("Nokia Corporation"); | |
898 | MODULE_DESCRIPTION("tsl2563 light sensor driver"); | |
899 | MODULE_LICENSE("GPL"); |