[mirror_ubuntu-zesty-kernel.git] / drivers / staging / iio / meter / ade7753.c

/*
 * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
 *
 * Copyright 2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include "meter.h"
#include "ade7753.h"

static int ade7753_spi_write_reg_8(struct device *dev,
				   u8 reg_address,
				   u8 val)
{
	int ret;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	st->tx[1] = val;

	ret = spi_write(st->us, st->tx, 2);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7753_spi_write_reg_16(struct device *dev,
		u8 reg_address,
		u16 value)
{
	int ret;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	st->tx[1] = (value >> 8) & 0xFF;
	st->tx[2] = value & 0xFF;
	ret = spi_write(st->us, st->tx, 3);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7753_spi_read_reg_8(struct device *dev,
		u8 reg_address,
		u8 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	ssize_t ret;

	ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
				reg_address);
		return ret;
	}
	*val = ret;

	return 0;
}

static int ade7753_spi_read_reg_16(struct device *dev,
		u8 reg_address,
		u16 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	ssize_t ret;

	ret = spi_w8r16be(st->us, ADE7753_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
			reg_address);
		return ret;
	}

	*val = ret;

	return 0;
}

static int ade7753_spi_read_reg_24(struct device *dev,
		u8 reg_address,
		u32 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	int ret;
	struct spi_transfer xfers[] = {
		{
			.tx_buf = st->tx,
			.bits_per_word = 8,
			.len = 1,
		}, {
			.rx_buf = st->tx,
			.bits_per_word = 8,
			.len = 3,
		}
	};

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7753_READ_REG(reg_address);

	ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
	if (ret) {
		dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
				reg_address);
		goto error_ret;
	}
	*val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];

error_ret:
	mutex_unlock(&st->buf_lock);
	return ret;
}

static ssize_t ade7753_read_8bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u8 val;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7753_read_16bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u16 val;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7753_read_24bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u32 val;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7753_write_8bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	u8 val;

	ret = kstrtou8(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static ssize_t ade7753_write_16bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	u16 val;

	ret = kstrtou16(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static int ade7753_reset(struct device *dev)
{
	u16 val;

	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
	val |= 1 << 6; /* Software Chip Reset */

	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
}

static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_CFDEN);
static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_CFNUM);
static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_PHCAL);
static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_APOS);
static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_SAGCYC);
static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_SAGLVL);
static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_LINECYC);
static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_WDIV);
static IIO_DEV_ATTR_IRMS(S_IWUSR | S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_IRMS);
static IIO_DEV_ATTR_VRMS(S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_VRMS);
static IIO_DEV_ATTR_IRMSOS(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_IRMSOS);
static IIO_DEV_ATTR_VRMSOS(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_VRMSOS);
static IIO_DEV_ATTR_WGAIN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_WGAIN);
static IIO_DEV_ATTR_VAGAIN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_VAGAIN);
static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_GAIN);
static IIO_DEV_ATTR_IPKLVL(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_IPKLVL);
static IIO_DEV_ATTR_VPKLVL(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_VPKLVL);
static IIO_DEV_ATTR_IPEAK(S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_IPEAK);
static IIO_DEV_ATTR_VPEAK(S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_VPEAK);
static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
		ade7753_read_16bit,
		NULL,
		ADE7753_PERIOD);
static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_CH1OS);
static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_CH2OS);

static int ade7753_set_irq(struct device *dev, bool enable)
{
	int ret;
	u8 irqen;

	ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
	if (ret)
		goto error_ret;

	if (enable)
		irqen |= 1 << 3; /* Enables an interrupt when a data is
				    present in the waveform register */
	else
		irqen &= ~(1 << 3);

	ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);

error_ret:
	return ret;
}

/* Power down the device */
static int ade7753_stop_device(struct device *dev)
{
	u16 val;

	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
	val |= 1 << 4;  /* AD converters can be turned off */

	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
}

static int ade7753_initial_setup(struct iio_dev *indio_dev)
{
	int ret;
	struct device *dev = &indio_dev->dev;
	struct ade7753_state *st = iio_priv(indio_dev);

	/* use low spi speed for init */
	st->us->mode = SPI_MODE_3;
	spi_setup(st->us);

	/* Disable IRQ */
	ret = ade7753_set_irq(dev, false);
	if (ret) {
		dev_err(dev, "disable irq failed");
		goto err_ret;
	}

	ade7753_reset(dev);
	msleep(ADE7753_STARTUP_DELAY);

err_ret:
	return ret;
}

static ssize_t ade7753_read_frequency(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u16 t;
	int sps;

	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
	if (ret)
		return ret;

	t = (t >> 11) & 0x3;
	sps = 27900 / (1 + t);

	return sprintf(buf, "%d\n", sps);
}

static ssize_t ade7753_write_frequency(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	u16 val;
	int ret;
	u16 reg, t;

	ret = kstrtou16(buf, 10, &val);
	if (ret)
		return ret;
	if (val == 0)
		return -EINVAL;

	mutex_lock(&indio_dev->mlock);

	t = 27900 / val;
	if (t > 0)
		t--;

	if (t > 1)
		st->us->max_speed_hz = ADE7753_SPI_SLOW;
	else
		st->us->max_speed_hz = ADE7753_SPI_FAST;

	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
	if (ret)
		goto out;

	reg &= ~(3 << 11);
	reg |= t << 11;

	ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);

out:
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}

static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
static IIO_CONST_ATTR(in_temp_offset, "-25 C");
static IIO_CONST_ATTR(in_temp_scale, "0.67 C");

static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
		ade7753_read_frequency,
		ade7753_write_frequency);

static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");

static struct attribute *ade7753_attributes[] = {
	&iio_dev_attr_in_temp_raw.dev_attr.attr,
	&iio_const_attr_in_temp_offset.dev_attr.attr,
	&iio_const_attr_in_temp_scale.dev_attr.attr,
	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	&iio_dev_attr_phcal.dev_attr.attr,
	&iio_dev_attr_cfden.dev_attr.attr,
	&iio_dev_attr_aenergy.dev_attr.attr,
	&iio_dev_attr_laenergy.dev_attr.attr,
	&iio_dev_attr_vaenergy.dev_attr.attr,
	&iio_dev_attr_lvaenergy.dev_attr.attr,
	&iio_dev_attr_cfnum.dev_attr.attr,
	&iio_dev_attr_apos.dev_attr.attr,
	&iio_dev_attr_sagcyc.dev_attr.attr,
	&iio_dev_attr_saglvl.dev_attr.attr,
	&iio_dev_attr_linecyc.dev_attr.attr,
	&iio_dev_attr_chksum.dev_attr.attr,
	&iio_dev_attr_pga_gain.dev_attr.attr,
	&iio_dev_attr_wgain.dev_attr.attr,
	&iio_dev_attr_choff_1.dev_attr.attr,
	&iio_dev_attr_choff_2.dev_attr.attr,
	&iio_dev_attr_wdiv.dev_attr.attr,
	&iio_dev_attr_irms.dev_attr.attr,
	&iio_dev_attr_vrms.dev_attr.attr,
	&iio_dev_attr_irmsos.dev_attr.attr,
	&iio_dev_attr_vrmsos.dev_attr.attr,
	&iio_dev_attr_vagain.dev_attr.attr,
	&iio_dev_attr_ipklvl.dev_attr.attr,
	&iio_dev_attr_vpklvl.dev_attr.attr,
	&iio_dev_attr_ipeak.dev_attr.attr,
	&iio_dev_attr_vpeak.dev_attr.attr,
	&iio_dev_attr_vperiod.dev_attr.attr,
	NULL,
};

static const struct attribute_group ade7753_attribute_group = {
	.attrs = ade7753_attributes,
};

static const struct iio_info ade7753_info = {
	.attrs = &ade7753_attribute_group,
	.driver_module = THIS_MODULE,
};

static int ade7753_probe(struct spi_device *spi)
{
	int ret;
	struct ade7753_state *st;
	struct iio_dev *indio_dev;

	/* setup the industrialio driver allocated elements */
	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	if (!indio_dev)
		return -ENOMEM;
	/* this is only used for removal purposes */
	spi_set_drvdata(spi, indio_dev);

	st = iio_priv(indio_dev);
	st->us = spi;
	mutex_init(&st->buf_lock);

	indio_dev->name = spi->dev.driver->name;
	indio_dev->dev.parent = &spi->dev;
	indio_dev->info = &ade7753_info;
	indio_dev->modes = INDIO_DIRECT_MODE;

	/* Get the device into a sane initial state */
	ret = ade7753_initial_setup(indio_dev);
	if (ret)
		return ret;

	return iio_device_register(indio_dev);
}

/* fixme, confirm ordering in this function */
static int ade7753_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);

	iio_device_unregister(indio_dev);
	ade7753_stop_device(&indio_dev->dev);

	return 0;
}

static struct spi_driver ade7753_driver = {
	.driver = {
		.name = "ade7753",
		.owner = THIS_MODULE,
	},
	.probe = ade7753_probe,
	.remove = ade7753_remove,
};
module_spi_driver(ade7753_driver);

MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:ade7753");
Commit	Line	Data
09434ef7	1	/*
72db6eb6	2	* ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
09434ef7 BS	3	*
	4	* Copyright 2010 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
	9	#include <linux/interrupt.h>
	10	#include <linux/irq.h>
09434ef7 BS	11	#include <linux/delay.h>
	12	#include <linux/mutex.h>
	13	#include <linux/device.h>
	14	#include <linux/kernel.h>
	15	#include <linux/spi/spi.h>
	16	#include <linux/slab.h>
	17	#include <linux/sysfs.h>
	18	#include <linux/list.h>
99c97852	19	#include <linux/module.h>
09434ef7	20
06458e27 JC	21	#include <linux/iio/iio.h>
06458e27 JC	22	#include <linux/iio/sysfs.h>
09434ef7 BS	23	#include "meter.h"
	24	#include "ade7753.h"
	25
72db6eb6 JC	26	static int ade7753_spi_write_reg_8(struct device *dev,
	27	u8 reg_address,
	28	u8 val)
09434ef7 BS	29	{
09434ef7 BS	30	int ret;
196b59c1	31	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	32	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	33
	34	mutex_lock(&st->buf_lock);
	35	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	36	st->tx[1] = val;
	37
	38	ret = spi_write(st->us, st->tx, 2);
	39	mutex_unlock(&st->buf_lock);
	40
	41	return ret;
	42	}
	43
	44	static int ade7753_spi_write_reg_16(struct device *dev,
	45	u8 reg_address,
	46	u16 value)
	47	{
	48	int ret;
196b59c1	49	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	50	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	51
	52	mutex_lock(&st->buf_lock);
	53	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	54	st->tx[1] = (value >> 8) & 0xFF;
	55	st->tx[2] = value & 0xFF;
72db6eb6	56	ret = spi_write(st->us, st->tx, 3);
09434ef7 BS	57	mutex_unlock(&st->buf_lock);
	58
	59	return ret;
	60	}
	61
	62	static int ade7753_spi_read_reg_8(struct device *dev,
	63	u8 reg_address,
	64	u8 *val)
	65	{
196b59c1	66	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	67	struct ade7753_state *st = iio_priv(indio_dev);
72db6eb6	68	ssize_t ret;
09434ef7	69
72db6eb6 JC	70	ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
72db6eb6 JC	71	if (ret < 0) {
09434ef7 BS	72	dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
09434ef7 BS	73	reg_address);
72db6eb6	74	return ret;
09434ef7	75	}
72db6eb6	76	*val = ret;
09434ef7	77
72db6eb6	78	return 0;
09434ef7 BS	79	}
	80
	81	static int ade7753_spi_read_reg_16(struct device *dev,
	82	u8 reg_address,
	83	u16 *val)
	84	{
196b59c1	85	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	86	struct ade7753_state *st = iio_priv(indio_dev);
72db6eb6	87	ssize_t ret;
09434ef7	88
23590742	89	ret = spi_w8r16be(st->us, ADE7753_READ_REG(reg_address));
72db6eb6	90	if (ret < 0) {
09434ef7	91	dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
72db6eb6 JC	92	reg_address);
72db6eb6 JC	93	return ret;
09434ef7	94	}
09434ef7	95
72db6eb6	96	*val = ret;
72db6eb6 JC	97
72db6eb6 JC	98	return 0;
09434ef7 BS	99	}
	100
	101	static int ade7753_spi_read_reg_24(struct device *dev,
	102	u8 reg_address,
	103	u32 *val)
	104	{
196b59c1	105	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	106	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	107	int ret;
	108	struct spi_transfer xfers[] = {
	109	{
	110	.tx_buf = st->tx,
09434ef7	111	.bits_per_word = 8,
72db6eb6 JC	112	.len = 1,
	113	}, {
	114	.rx_buf = st->tx,
	115	.bits_per_word = 8,
	116	.len = 3,
	117	}
09434ef7 BS	118	};
	119
	120	mutex_lock(&st->buf_lock);
	121	st->tx[0] = ADE7753_READ_REG(reg_address);
09434ef7	122
ad6c46b0	123	ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
09434ef7 BS	124	if (ret) {
	125	dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
	126	reg_address);
	127	goto error_ret;
	128	}
72db6eb6	129	*val = (st->rx[0] << 16) \| (st->rx[1] << 8) \| st->rx[2];
09434ef7 BS	130
	131	error_ret:
	132	mutex_unlock(&st->buf_lock);
	133	return ret;
	134	}
	135
	136	static ssize_t ade7753_read_8bit(struct device *dev,
	137	struct device_attribute *attr,
	138	char *buf)
	139	{
	140	int ret;
72db6eb6	141	u8 val;
09434ef7 BS	142	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	143
	144	ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
	145	if (ret)
	146	return ret;
	147
	148	return sprintf(buf, "%u\n", val);
	149	}
	150
	151	static ssize_t ade7753_read_16bit(struct device *dev,
	152	struct device_attribute *attr,
	153	char *buf)
	154	{
	155	int ret;
72db6eb6	156	u16 val;
09434ef7 BS	157	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	158
	159	ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
	160	if (ret)
	161	return ret;
	162
	163	return sprintf(buf, "%u\n", val);
	164	}
	165
	166	static ssize_t ade7753_read_24bit(struct device *dev,
	167	struct device_attribute *attr,
	168	char *buf)
	169	{
	170	int ret;
72db6eb6	171	u32 val;
09434ef7 BS	172	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	173
	174	ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
	175	if (ret)
	176	return ret;
	177
72db6eb6	178	return sprintf(buf, "%u\n", val);
09434ef7 BS	179	}
	180
	181	static ssize_t ade7753_write_8bit(struct device *dev,
	182	struct device_attribute *attr,
	183	const char *buf,
	184	size_t len)
	185	{
	186	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	187	int ret;
e5e26dd5	188	u8 val;
09434ef7	189
e5e26dd5	190	ret = kstrtou8(buf, 10, &val);
09434ef7 BS	191	if (ret)
	192	goto error_ret;
	193	ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);
	194
	195	error_ret:
	196	return ret ? ret : len;
	197	}
	198
	199	static ssize_t ade7753_write_16bit(struct device *dev,
	200	struct device_attribute *attr,
	201	const char *buf,
	202	size_t len)
	203	{
	204	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	205	int ret;
e5e26dd5	206	u16 val;
09434ef7	207
e5e26dd5	208	ret = kstrtou16(buf, 10, &val);
09434ef7 BS	209	if (ret)
	210	goto error_ret;
	211	ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);
	212
	213	error_ret:
	214	return ret ? ret : len;
	215	}
	216
	217	static int ade7753_reset(struct device *dev)
	218	{
09434ef7	219	u16 val;
72db6eb6 JC	220
72db6eb6 JC	221	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
09434ef7	222	val \|= 1 << 6; /* Software Chip Reset */
09434ef7	223
72db6eb6	224	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
09434ef7 BS	225	}
09434ef7 BS	226
09434ef7 BS	227	static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
	228	static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
	229	static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
	230	static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
	231	static IIO_DEV_ATTR_CFDEN(S_IWUSR \| S_IRUGO,
	232	ade7753_read_16bit,
	233	ade7753_write_16bit,
	234	ADE7753_CFDEN);
	235	static IIO_DEV_ATTR_CFNUM(S_IWUSR \| S_IRUGO,
	236	ade7753_read_8bit,
	237	ade7753_write_8bit,
	238	ADE7753_CFNUM);
	239	static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
	240	static IIO_DEV_ATTR_PHCAL(S_IWUSR \| S_IRUGO,
	241	ade7753_read_16bit,
	242	ade7753_write_16bit,
	243	ADE7753_PHCAL);
	244	static IIO_DEV_ATTR_APOS(S_IWUSR \| S_IRUGO,
	245	ade7753_read_16bit,
	246	ade7753_write_16bit,
	247	ADE7753_APOS);
	248	static IIO_DEV_ATTR_SAGCYC(S_IWUSR \| S_IRUGO,
	249	ade7753_read_8bit,
	250	ade7753_write_8bit,
	251	ADE7753_SAGCYC);
	252	static IIO_DEV_ATTR_SAGLVL(S_IWUSR \| S_IRUGO,
	253	ade7753_read_8bit,
	254	ade7753_write_8bit,
	255	ADE7753_SAGLVL);
	256	static IIO_DEV_ATTR_LINECYC(S_IWUSR \| S_IRUGO,
	257	ade7753_read_8bit,
	258	ade7753_write_8bit,
	259	ADE7753_LINECYC);
	260	static IIO_DEV_ATTR_WDIV(S_IWUSR \| S_IRUGO,
	261	ade7753_read_8bit,
	262	ade7753_write_8bit,
	263	ADE7753_WDIV);
	264	static IIO_DEV_ATTR_IRMS(S_IWUSR \| S_IRUGO,
	265	ade7753_read_24bit,
	266	NULL,
	267	ADE7753_IRMS);
	268	static IIO_DEV_ATTR_VRMS(S_IRUGO,
	269	ade7753_read_24bit,
	270	NULL,
	271	ADE7753_VRMS);
	272	static IIO_DEV_ATTR_IRMSOS(S_IWUSR \| S_IRUGO,
	273	ade7753_read_16bit,
	274	ade7753_write_16bit,
	275	ADE7753_IRMSOS);
	276	static IIO_DEV_ATTR_VRMSOS(S_IWUSR \| S_IRUGO,
	277	ade7753_read_16bit,
	278	ade7753_write_16bit,
	279	ADE7753_VRMSOS);
	280	static IIO_DEV_ATTR_WGAIN(S_IWUSR \| S_IRUGO,
	281	ade7753_read_16bit,
	282	ade7753_write_16bit,
	283	ADE7753_WGAIN);
	284	static IIO_DEV_ATTR_VAGAIN(S_IWUSR \| S_IRUGO,
	285	ade7753_read_16bit,
	286	ade7753_write_16bit,
	287	ADE7753_VAGAIN);
	288	static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR \| S_IRUGO,
	289	ade7753_read_16bit,
	290	ade7753_write_16bit,
291	ADE7753_GAIN);
292	static IIO_DEV_ATTR_IPKLVL(S_IWUSR \| S_IRUGO,
293	ade7753_read_8bit,
294	ade7753_write_8bit,
295	ADE7753_IPKLVL);
296	static IIO_DEV_ATTR_VPKLVL(S_IWUSR \| S_IRUGO,
297	ade7753_read_8bit,
298	ade7753_write_8bit,
299	ADE7753_VPKLVL);
300	static IIO_DEV_ATTR_IPEAK(S_IRUGO,
301	ade7753_read_24bit,
302	NULL,
303	ADE7753_IPEAK);
304	static IIO_DEV_ATTR_VPEAK(S_IRUGO,
305	ade7753_read_24bit,
306	NULL,
307	ADE7753_VPEAK);
308	static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
309	ade7753_read_16bit,
310	NULL,
311	ADE7753_PERIOD);
312	static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR \| S_IRUGO,
313	ade7753_read_8bit,
314	ade7753_write_8bit,
315	ADE7753_CH1OS);
316	static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR \| S_IRUGO,
317	ade7753_read_8bit,
318	ade7753_write_8bit,
319	ADE7753_CH2OS);
320
321	static int ade7753_set_irq(struct device *dev, bool enable)
322	{
323	int ret;
324	u8 irqen;
b581c3d9	325
09434ef7 BS	326	ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
	327	if (ret)
	328	goto error_ret;
	329
	330	if (enable)
	331	irqen \|= 1 << 3; /* Enables an interrupt when a data is
	332	present in the waveform register */
	333	else
	334	irqen &= ~(1 << 3);
	335
	336	ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
09434ef7 BS	337
	338	error_ret:
	339	return ret;
	340	}
	341
	342	/* Power down the device */
72db6eb6	343	static int ade7753_stop_device(struct device *dev)
09434ef7	344	{
09434ef7	345	u16 val;
72db6eb6 JC	346
72db6eb6 JC	347	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
09434ef7	348	val \|= 1 << 4; /* AD converters can be turned off */
09434ef7	349
72db6eb6	350	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
09434ef7 BS	351	}
09434ef7 BS	352
bfccd4fb	353	static int ade7753_initial_setup(struct iio_dev *indio_dev)
09434ef7 BS	354	{
09434ef7 BS	355	int ret;
bfccd4fb JC	356	struct device *dev = &indio_dev->dev;
bfccd4fb JC	357	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	358
	359	/* use low spi speed for init */
	360	st->us->mode = SPI_MODE_3;
	361	spi_setup(st->us);
	362
	363	/* Disable IRQ */
	364	ret = ade7753_set_irq(dev, false);
	365	if (ret) {
	366	dev_err(dev, "disable irq failed");
	367	goto err_ret;
	368	}
	369
	370	ade7753_reset(dev);
	371	msleep(ADE7753_STARTUP_DELAY);
	372
	373	err_ret:
	374	return ret;
	375	}
	376
	377	static ssize_t ade7753_read_frequency(struct device *dev,
	378	struct device_attribute *attr,
	379	char *buf)
	380	{
9034720a	381	int ret;
e1703b32	382	u16 t;
09434ef7	383	int sps;
b581c3d9	384
e1703b32	385	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
09434ef7 BS	386	if (ret)
	387	return ret;
	388
	389	t = (t >> 11) & 0x3;
	390	sps = 27900 / (1 + t);
	391
9034720a	392	return sprintf(buf, "%d\n", sps);
09434ef7 BS	393	}
	394
	395	static ssize_t ade7753_write_frequency(struct device *dev,
	396	struct device_attribute *attr,
	397	const char *buf,
	398	size_t len)
	399	{
196b59c1	400	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	401	struct ade7753_state *st = iio_priv(indio_dev);
e5e26dd5	402	u16 val;
09434ef7 BS	403	int ret;
	404	u16 reg, t;
	405
e5e26dd5	406	ret = kstrtou16(buf, 10, &val);
09434ef7 BS	407	if (ret)
09434ef7 BS	408	return ret;
50d4b306 DC	409	if (val == 0)
50d4b306 DC	410	return -EINVAL;
09434ef7 BS	411
	412	mutex_lock(&indio_dev->mlock);
	413
5db4851d	414	t = 27900 / val;
09434ef7 BS	415	if (t > 0)
	416	t--;
	417
	418	if (t > 1)
	419	st->us->max_speed_hz = ADE7753_SPI_SLOW;
	420	else
	421	st->us->max_speed_hz = ADE7753_SPI_FAST;
	422
72db6eb6	423	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
09434ef7 BS	424	if (ret)
	425	goto out;
	426
	427	reg &= ~(3 << 11);
	428	reg \|= t << 11;
	429
72db6eb6	430	ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);
09434ef7 BS	431
	432	out:
	433	mutex_unlock(&indio_dev->mlock);
	434
	435	return ret ? ret : len;
	436	}
72db6eb6	437
09434ef7	438	static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
322c9563 JC	439	static IIO_CONST_ATTR(in_temp_offset, "-25 C");
322c9563 JC	440	static IIO_CONST_ATTR(in_temp_scale, "0.67 C");
09434ef7 BS	441
	442	static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR \| S_IRUGO,
	443	ade7753_read_frequency,
	444	ade7753_write_frequency);
	445
09434ef7 BS	446	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
09434ef7 BS	447
09434ef7	448	static struct attribute *ade7753_attributes[] = {
322c9563 JC	449	&iio_dev_attr_in_temp_raw.dev_attr.attr,
	450	&iio_const_attr_in_temp_offset.dev_attr.attr,
	451	&iio_const_attr_in_temp_scale.dev_attr.attr,
09434ef7 BS	452	&iio_dev_attr_sampling_frequency.dev_attr.attr,
09434ef7 BS	453	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
09434ef7 BS	454	&iio_dev_attr_phcal.dev_attr.attr,
	455	&iio_dev_attr_cfden.dev_attr.attr,
	456	&iio_dev_attr_aenergy.dev_attr.attr,
	457	&iio_dev_attr_laenergy.dev_attr.attr,
	458	&iio_dev_attr_vaenergy.dev_attr.attr,
	459	&iio_dev_attr_lvaenergy.dev_attr.attr,
	460	&iio_dev_attr_cfnum.dev_attr.attr,
	461	&iio_dev_attr_apos.dev_attr.attr,
	462	&iio_dev_attr_sagcyc.dev_attr.attr,
	463	&iio_dev_attr_saglvl.dev_attr.attr,
	464	&iio_dev_attr_linecyc.dev_attr.attr,
	465	&iio_dev_attr_chksum.dev_attr.attr,
	466	&iio_dev_attr_pga_gain.dev_attr.attr,
	467	&iio_dev_attr_wgain.dev_attr.attr,
	468	&iio_dev_attr_choff_1.dev_attr.attr,
	469	&iio_dev_attr_choff_2.dev_attr.attr,
	470	&iio_dev_attr_wdiv.dev_attr.attr,
	471	&iio_dev_attr_irms.dev_attr.attr,
	472	&iio_dev_attr_vrms.dev_attr.attr,
	473	&iio_dev_attr_irmsos.dev_attr.attr,
	474	&iio_dev_attr_vrmsos.dev_attr.attr,
	475	&iio_dev_attr_vagain.dev_attr.attr,
	476	&iio_dev_attr_ipklvl.dev_attr.attr,
	477	&iio_dev_attr_vpklvl.dev_attr.attr,
	478	&iio_dev_attr_ipeak.dev_attr.attr,
	479	&iio_dev_attr_vpeak.dev_attr.attr,
	480	&iio_dev_attr_vperiod.dev_attr.attr,
	481	NULL,
	482	};
	483
	484	static const struct attribute_group ade7753_attribute_group = {
	485	.attrs = ade7753_attributes,
	486	};
	487
6fe8135f JC	488	static const struct iio_info ade7753_info = {
	489	.attrs = &ade7753_attribute_group,
	490	.driver_module = THIS_MODULE,
	491	};
	492
4ae1c61f	493	static int ade7753_probe(struct spi_device *spi)
09434ef7	494	{
26d25ae3	495	int ret;
bfccd4fb JC	496	struct ade7753_state *st;
	497	struct iio_dev *indio_dev;
	498
	499	/* setup the industrialio driver allocated elements */
e7d4eb0e SK	500	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	501	if (!indio_dev)
	502	return -ENOMEM;
09434ef7	503	/* this is only used for removal purposes */
bfccd4fb	504	spi_set_drvdata(spi, indio_dev);
09434ef7	505
bfccd4fb	506	st = iio_priv(indio_dev);
09434ef7 BS	507	st->us = spi;
09434ef7 BS	508	mutex_init(&st->buf_lock);
09434ef7	509
bfccd4fb JC	510	indio_dev->name = spi->dev.driver->name;
	511	indio_dev->dev.parent = &spi->dev;
	512	indio_dev->info = &ade7753_info;
	513	indio_dev->modes = INDIO_DIRECT_MODE;
09434ef7	514
26d25ae3 JC	515	/* Get the device into a sane initial state */
26d25ae3 JC	516	ret = ade7753_initial_setup(indio_dev);
09434ef7	517	if (ret)
e7d4eb0e	518	return ret;
09434ef7	519
da29461c	520	return iio_device_register(indio_dev);
09434ef7 BS	521	}
	522
	523	/* fixme, confirm ordering in this function */
447d4f29	524	static int ade7753_remove(struct spi_device *spi)
09434ef7	525	{
bfccd4fb	526	struct iio_dev *indio_dev = spi_get_drvdata(spi);
09434ef7	527
d2fffd6c	528	iio_device_unregister(indio_dev);
d576c755	529	ade7753_stop_device(&indio_dev->dev);
d576c755 LPC	530
d576c755 LPC	531	return 0;
09434ef7 BS	532	}
	533
	534	static struct spi_driver ade7753_driver = {
	535	.driver = {
	536	.name = "ade7753",
	537	.owner = THIS_MODULE,
	538	},
	539	.probe = ade7753_probe,
e543acf0	540	.remove = ade7753_remove,
09434ef7	541	};
ae6ae6fe	542	module_spi_driver(ade7753_driver);
09434ef7 BS	543
09434ef7 BS	544	MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
72db6eb6	545	MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
09434ef7	546	MODULE_LICENSE("GPL v2");
55e4390c	547	MODULE_ALIAS("spi:ade7753");