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[mirror_ubuntu-zesty-kernel.git] / drivers / staging / lirc / lirc_it87.c
CommitLineData
c147f907
JW		 1/*
2 * LIRC driver for ITE IT8712/IT8705 CIR port
3 *
4 * Copyright (C) 2001 Hans-Gunter Lutke Uphues <hg_lu@web.de>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
19 * USA
20 *
21 * ITE IT8705 and IT8712(not tested) and IT8720 CIR-port support for lirc based
22 * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula
23 *
24 * Attention: Sendmode only tested with debugging logs
25 *
26 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
27 * reimplemented read function
28 * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix,
29 * based on work of the following member of the Outertrack Digimatrix
30 * Forum: Art103 <r_tay@hotmail.com>
31 * 2009/12/24 James Edwards <jimbo-lirc@edwardsclan.net> implemeted support
32 * for ITE8704/ITE8718, on my machine, the DSDT reports 8704, but the
33 * chip identifies as 18.
34 */
35
36#include <linux/module.h>
37#include <linux/sched.h>
38#include <linux/errno.h>
39#include <linux/signal.h>
40#include <linux/fs.h>
41#include <linux/interrupt.h>
42#include <linux/ioport.h>
43#include <linux/kernel.h>
44#include <linux/time.h>
45#include <linux/string.h>
46#include <linux/types.h>
47#include <linux/wait.h>
48#include <linux/mm.h>
49#include <linux/delay.h>
50#include <linux/poll.h>
51#include <asm/system.h>
52#include <linux/io.h>
53#include <linux/irq.h>
54#include <linux/fcntl.h>
55
56#include <linux/timer.h>
57#include <linux/pnp.h>
58
59#include <media/lirc.h>
60#include <media/lirc_dev.h>
61
62#include "lirc_it87.h"
63
64#ifdef LIRC_IT87_DIGIMATRIX
65static int digimatrix = 1;
66static int it87_freq = 36; /* kHz */
67static int irq = 9;
68#else
69static int digimatrix;
70static int it87_freq = 38; /* kHz */
71static int irq = IT87_CIR_DEFAULT_IRQ;
72#endif
73
74static unsigned long it87_bits_in_byte_out;
75static unsigned long it87_send_counter;
76static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN;
77
78#define RBUF_LEN 1024
79
80#define LIRC_DRIVER_NAME "lirc_it87"
81
82/* timeout for sequences in jiffies (=5/100s) */
83/* must be longer than TIME_CONST */
84#define IT87_TIMEOUT (HZ*5/100)
85
86/* module parameters */
87static int debug;
88#define dprintk(fmt, args...) \
89 do { \
90 if (debug) \
91 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
92 fmt, ## args); \
93 } while (0)
94
95static int io = IT87_CIR_DEFAULT_IOBASE;
96/* receiver demodulator default: off */
97static int it87_enable_demodulator;
98
99static int timer_enabled;
100static DEFINE_SPINLOCK(timer_lock);
101static struct timer_list timerlist;
102/* time of last signal change detected */
103static struct timeval last_tv = {0, 0};
104/* time of last UART data ready interrupt */
105static struct timeval last_intr_tv = {0, 0};
106static int last_value;
107
108static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
109
110static DEFINE_SPINLOCK(hardware_lock);
111static DEFINE_SPINLOCK(dev_lock);
82ce67bf 112static bool device_open;
c147f907
JW		 113
114static int rx_buf[RBUF_LEN];
115unsigned int rx_tail, rx_head;
116
117static struct pnp_driver it87_pnp_driver;
118
119/* SECTION: Prototypes */
120
121/* Communication with user-space */
122static int lirc_open(struct inode *inode, struct file *file);
123static int lirc_close(struct inode *inode, struct file *file);
124static unsigned int lirc_poll(struct file *file, poll_table *wait);
125static ssize_t lirc_read(struct file *file, char *buf,
126 size_t count, loff_t *ppos);
127static ssize_t lirc_write(struct file *file, const char *buf,
128 size_t n, loff_t *pos);
129static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
130static void add_read_queue(int flag, unsigned long val);
131static int init_chrdev(void);
132static void drop_chrdev(void);
133/* Hardware */
134static irqreturn_t it87_interrupt(int irq, void *dev_id);
135static void send_space(unsigned long len);
136static void send_pulse(unsigned long len);
137static void init_send(void);
138static void terminate_send(unsigned long len);
139static int init_hardware(void);
140static void drop_hardware(void);
141/* Initialisation */
142static int init_port(void);
143static void drop_port(void);
144
145
146/* SECTION: Communication with user-space */
147
148static int lirc_open(struct inode *inode, struct file *file)
149{
150 spin_lock(&dev_lock);
82ce67bf 151 if (device_open) {
c147f907
JW		 152 spin_unlock(&dev_lock);
153 return -EBUSY;
154 }
82ce67bf 155 device_open = true;
c147f907
JW		 156 spin_unlock(&dev_lock);
157 return 0;
158}
159
160
161static int lirc_close(struct inode *inode, struct file *file)
162{
82ce67bf
JW		 163 spin_lock(&dev_lock);
164 device_open = false;
165 spin_unlock(&dev_lock);
c147f907
JW		 166 return 0;
167}
168
169
170static unsigned int lirc_poll(struct file *file, poll_table *wait)
171{
172 poll_wait(file, &lirc_read_queue, wait);
173 if (rx_head != rx_tail)
174 return POLLIN | POLLRDNORM;
175 return 0;
176}
177
178
179static ssize_t lirc_read(struct file *file, char *buf,
180 size_t count, loff_t *ppos)
181{
182 int n = 0;
183 int retval = 0;
184
185 while (n < count) {
186 if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) {
187 retval = -EAGAIN;
188 break;
189 }
190 retval = wait_event_interruptible(lirc_read_queue,
191 rx_head != rx_tail);
192 if (retval)
193 break;
194
195 if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head),
196 sizeof(int))) {
197 retval = -EFAULT;
198 break;
199 }
200 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
201 n += sizeof(int);
202 }
203 if (n)
204 return n;
205 return retval;
206}
207
208
209static ssize_t lirc_write(struct file *file, const char *buf,
210 size_t n, loff_t *pos)
211{
212 int i = 0;
213 int *tx_buf;
214
215 if (n % sizeof(int))
216 return -EINVAL;
217 tx_buf = memdup_user(buf, n);
218 if (IS_ERR(tx_buf))
219 return PTR_ERR(tx_buf);
220 n /= sizeof(int);
221 init_send();
222 while (1) {
223 if (i >= n)
224 break;
225 if (tx_buf[i])
226 send_pulse(tx_buf[i]);
227 i++;
228 if (i >= n)
229 break;
230 if (tx_buf[i])
231 send_space(tx_buf[i]);
232 i++;
233 }
234 terminate_send(tx_buf[i - 1]);
88914bdf 235 kfree(tx_buf);
c147f907
JW		 236 return n;
237}
238
239
240static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
241{
242 int retval = 0;
a1266818 243 __u32 value = 0;
c147f907
JW		 244 unsigned long hw_flags;
245
246 if (cmd == LIRC_GET_FEATURES)
247 value = LIRC_CAN_SEND_PULSE |
248 LIRC_CAN_SET_SEND_CARRIER |
249 LIRC_CAN_REC_MODE2;
250 else if (cmd == LIRC_GET_SEND_MODE)
251 value = LIRC_MODE_PULSE;
252 else if (cmd == LIRC_GET_REC_MODE)
253 value = LIRC_MODE_MODE2;
254
255 switch (cmd) {
256 case LIRC_GET_FEATURES:
257 case LIRC_GET_SEND_MODE:
258 case LIRC_GET_REC_MODE:
a1266818 259 retval = put_user(value, (__u32 *) arg);
c147f907
JW		 260 break;
261
262 case LIRC_SET_SEND_MODE:
263 case LIRC_SET_REC_MODE:
a1266818 264 retval = get_user(value, (__u32 *) arg);
c147f907
JW		 265 break;
266
267 case LIRC_SET_SEND_CARRIER:
a1266818 268 retval = get_user(value, (__u32 *) arg);
c147f907
JW		 269 if (retval)
270 return retval;
a1266818
JW		 271 value /= 1000;
272 if (value > IT87_CIR_FREQ_MAX ||
273 value < IT87_CIR_FREQ_MIN)
c147f907
JW		 274 return -EINVAL;
275
a1266818 276 it87_freq = value;
c147f907
JW		 277
278 spin_lock_irqsave(&hardware_lock, hw_flags);
279 outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) |
280 (it87_freq - IT87_CIR_FREQ_MIN) << 3),
281 io + IT87_CIR_TCR2);
282 spin_unlock_irqrestore(&hardware_lock, hw_flags);
283 dprintk("demodulation frequency: %d kHz\n", it87_freq);
284
285 break;
286
287 default:
288 retval = -EINVAL;
289 }
290
291 if (retval)
292 return retval;
293
294 if (cmd == LIRC_SET_REC_MODE) {
295 if (value != LIRC_MODE_MODE2)
296 retval = -ENOSYS;
297 } else if (cmd == LIRC_SET_SEND_MODE) {
298 if (value != LIRC_MODE_PULSE)
299 retval = -ENOSYS;
300 }
301 return retval;
302}
303
304static void add_read_queue(int flag, unsigned long val)
305{
306 unsigned int new_rx_tail;
307 int newval;
308
309 dprintk("add flag %d with val %lu\n", flag, val);
310
311 newval = val & PULSE_MASK;
312
313 /*
314 * statistically, pulses are ~TIME_CONST/2 too long. we could
315 * maybe make this more exact, but this is good enough
316 */
317 if (flag) {
318 /* pulse */
319 if (newval > TIME_CONST / 2)
320 newval -= TIME_CONST / 2;
321 else /* should not ever happen */
322 newval = 1;
323 newval |= PULSE_BIT;
324 } else
325 newval += TIME_CONST / 2;
326 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
327 if (new_rx_tail == rx_head) {
328 dprintk("Buffer overrun.\n");
329 return;
330 }
331 rx_buf[rx_tail] = newval;
332 rx_tail = new_rx_tail;
333 wake_up_interruptible(&lirc_read_queue);
334}
335
336
0f9313ad 337static const struct file_operations lirc_fops = {
c147f907
JW		 338 .owner = THIS_MODULE,
339 .read = lirc_read,
340 .write = lirc_write,
341 .poll = lirc_poll,
342 .unlocked_ioctl = lirc_ioctl,
8be292cc
JW		 343#ifdef CONFIG_COMPAT
344 .compat_ioctl = lirc_ioctl,
345#endif
c147f907
JW		 346 .open = lirc_open,
347 .release = lirc_close,
6038f373 348 .llseek = noop_llseek,
c147f907
JW		 349};
350
351static int set_use_inc(void *data)
352{
353 return 0;
354}
355
356static void set_use_dec(void *data)
357{
358}
359
360static struct lirc_driver driver = {
361 .name = LIRC_DRIVER_NAME,
362 .minor = -1,
363 .code_length = 1,
364 .sample_rate = 0,
365 .data = NULL,
366 .add_to_buf = NULL,
367 .set_use_inc = set_use_inc,
368 .set_use_dec = set_use_dec,
369 .fops = &lirc_fops,
370 .dev = NULL,
371 .owner = THIS_MODULE,
372};
373
374
c147f907
JW		 375static int init_chrdev(void)
376{
377 driver.minor = lirc_register_driver(&driver);
378
379 if (driver.minor < 0) {
380 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
381 return -EIO;
382 }
383 return 0;
384}
385
386
387static void drop_chrdev(void)
388{
389 lirc_unregister_driver(driver.minor);
390}
c147f907
JW		 391
392
393/* SECTION: Hardware */
394static long delta(struct timeval *tv1, struct timeval *tv2)
395{
396 unsigned long deltv;
397
398 deltv = tv2->tv_sec - tv1->tv_sec;
399 if (deltv > 15)
400 deltv = 0xFFFFFF;
401 else
402 deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec;
403 return deltv;
404}
405
406static void it87_timeout(unsigned long data)
407{
408 unsigned long flags;
409
410 /* avoid interference with interrupt */
411 spin_lock_irqsave(&timer_lock, flags);
412
413 if (digimatrix) {
414 /* We have timed out. Disable the RX mechanism. */
415
416 outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) |
417 IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR);
418 if (it87_RXEN_mask)
419 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
420 io + IT87_CIR_RCR);
421 dprintk(" TIMEOUT\n");
422 timer_enabled = 0;
423
424 /* fifo clear */
425 outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR,
426 io+IT87_CIR_TCR1);
427
428 } else {
429 /*
430 * if last received signal was a pulse, but receiving stopped
431 * within the 9 bit frame, we need to finish this pulse and
432 * simulate a signal change to from pulse to space. Otherwise
433 * upper layers will receive two sequences next time.
434 */
435
436 if (last_value) {
437 unsigned long pulse_end;
438
439 /* determine 'virtual' pulse end: */
440 pulse_end = delta(&last_tv, &last_intr_tv);
441 dprintk("timeout add %d for %lu usec\n",
442 last_value, pulse_end);
443 add_read_queue(last_value, pulse_end);
444 last_value = 0;
445 last_tv = last_intr_tv;
446 }
447 }
448 spin_unlock_irqrestore(&timer_lock, flags);
449}
450
451static irqreturn_t it87_interrupt(int irq, void *dev_id)
452{
453 unsigned char data;
454 struct timeval curr_tv;
455 static unsigned long deltv;
456 unsigned long deltintrtv;
457 unsigned long flags, hw_flags;
458 int iir, lsr;
459 int fifo = 0;
460 static char lastbit;
461 char bit;
462
463 /* Bit duration in microseconds */
464 const unsigned long bit_duration = 1000000ul /
465 (115200 / IT87_CIR_BAUDRATE_DIVISOR);
466
467
468 iir = inb(io + IT87_CIR_IIR);
469
470 switch (iir & IT87_CIR_IIR_IID) {
471 case 0x4:
472 case 0x6:
473 lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO |
474 IT87_CIR_RSR_RXFBC);
475 fifo = lsr & IT87_CIR_RSR_RXFBC;
476 dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr);
477
478 /* avoid interference with timer */
479 spin_lock_irqsave(&timer_lock, flags);
480 spin_lock_irqsave(&hardware_lock, hw_flags);
481 if (digimatrix) {
482 static unsigned long acc_pulse;
483 static unsigned long acc_space;
484
485 do {
486 data = inb(io + IT87_CIR_DR);
487 data = ~data;
488 fifo--;
489 if (data != 0x00) {
490 if (timer_enabled)
491 del_timer(&timerlist);
492 /*
493 * start timer for end of
494 * sequence detection
495 */
496 timerlist.expires = jiffies +
497 IT87_TIMEOUT;
498 add_timer(&timerlist);
499 timer_enabled = 1;
500 }
501 /* Loop through */
502 for (bit = 0; bit < 8; ++bit) {
503 if ((data >> bit) & 1) {
504 ++acc_pulse;
505 if (lastbit == 0) {
506 add_read_queue(0,
507 acc_space *
508 bit_duration);
509 acc_space = 0;
510 }
511 } else {
512 ++acc_space;
513 if (lastbit == 1) {
514 add_read_queue(1,
515 acc_pulse *
516 bit_duration);
517 acc_pulse = 0;
518 }
519 }
520 lastbit = (data >> bit) & 1;
521 }
522
523 } while (fifo != 0);
524 } else { /* Normal Operation */
525 do {
526 del_timer(&timerlist);
527 data = inb(io + IT87_CIR_DR);
528
529 dprintk("data=%02x\n", data);
530 do_gettimeofday(&curr_tv);
531 deltv = delta(&last_tv, &curr_tv);
532 deltintrtv = delta(&last_intr_tv, &curr_tv);
533
534 dprintk("t %lu , d %d\n",
535 deltintrtv, (int)data);
536
537 /*
538 * if nothing came in last 2 cycles,
539 * it was gap
540 */
541 if (deltintrtv > TIME_CONST * 2) {
542 if (last_value) {
543 dprintk("GAP\n");
544
545 /* simulate signal change */
546 add_read_queue(last_value,
547 deltv -
548 deltintrtv);
549 last_value = 0;
550 last_tv.tv_sec =
551 last_intr_tv.tv_sec;
552 last_tv.tv_usec =
553 last_intr_tv.tv_usec;
554 deltv = deltintrtv;
555 }
556 }
557 data = 1;
558 if (data ^ last_value) {
559 /*
560 * deltintrtv > 2*TIME_CONST,
561 * remember ? the other case is
562 * timeout
563 */
564 add_read_queue(last_value,
565 deltv-TIME_CONST);
566 last_value = data;
567 last_tv = curr_tv;
568 if (last_tv.tv_usec >= TIME_CONST)
569 last_tv.tv_usec -= TIME_CONST;
570 else {
571 last_tv.tv_sec--;
572 last_tv.tv_usec += 1000000 -
573 TIME_CONST;
574 }
575 }
576 last_intr_tv = curr_tv;
577 if (data) {
578 /*
579 * start timer for end of
580 * sequence detection
581 */
582 timerlist.expires =
583 jiffies + IT87_TIMEOUT;
584 add_timer(&timerlist);
585 }
586 outb((inb(io + IT87_CIR_RCR) &
587 ~IT87_CIR_RCR_RXEN) |
588 IT87_CIR_RCR_RXACT,
589 io + IT87_CIR_RCR);
590 if (it87_RXEN_mask)
591 outb(inb(io + IT87_CIR_RCR) |
592 IT87_CIR_RCR_RXEN,
593 io + IT87_CIR_RCR);
594 fifo--;
595 } while (fifo != 0);
596 }
597 spin_unlock_irqrestore(&hardware_lock, hw_flags);
598 spin_unlock_irqrestore(&timer_lock, flags);
599
600 return IRQ_RETVAL(IRQ_HANDLED);
601
602 default:
603 /* not our irq */
604 dprintk("unknown IRQ (shouldn't happen) !!\n");
605 return IRQ_RETVAL(IRQ_NONE);
606 }
607}
608
609
610static void send_it87(unsigned long len, unsigned long stime,
611 unsigned char send_byte, unsigned int count_bits)
612{
613 long count = len / stime;
614 long time_left = 0;
615 static unsigned char byte_out;
616 unsigned long hw_flags;
617
618 dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte);
619
620 time_left = (long)len - (long)count * (long)stime;
621 count += ((2 * time_left) / stime);
622 while (count) {
623 long i = 0;
624 for (i = 0; i < count_bits; i++) {
625 byte_out = (byte_out << 1) | (send_byte & 1);
626 it87_bits_in_byte_out++;
627 }
628 if (it87_bits_in_byte_out == 8) {
629 dprintk("out=0x%x, tsr_txfbc: 0x%x\n",
630 byte_out,
631 inb(io + IT87_CIR_TSR) &
632 IT87_CIR_TSR_TXFBC);
633
634 while ((inb(io + IT87_CIR_TSR) &
635 IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE)
636 ;
637
638 spin_lock_irqsave(&hardware_lock, hw_flags);
639 outb(byte_out, io + IT87_CIR_DR);
640 spin_unlock_irqrestore(&hardware_lock, hw_flags);
641
642 it87_bits_in_byte_out = 0;
643 it87_send_counter++;
644 byte_out = 0;
645 }
646 count--;
647 }
648}
649
650
651/*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */
652
653static void send_space(unsigned long len)
654{
655 send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR);
656}
657
658static void send_pulse(unsigned long len)
659{
660 send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR);
661}
662
663
664static void init_send()
665{
666 unsigned long flags;
667
668 spin_lock_irqsave(&hardware_lock, flags);
669 /* RXEN=0: receiver disable */
670 it87_RXEN_mask = 0;
671 outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN,
672 io + IT87_CIR_RCR);
673 spin_unlock_irqrestore(&hardware_lock, flags);
674 it87_bits_in_byte_out = 0;
675 it87_send_counter = 0;
676}
677
678
679static void terminate_send(unsigned long len)
680{
681 unsigned long flags;
682 unsigned long last = 0;
683
684 last = it87_send_counter;
685 /* make sure all necessary data has been sent */
686 while (last == it87_send_counter)
687 send_space(len);
688 /* wait until all data sent */
689 while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0)
690 ;
691 /* then re-enable receiver */
692 spin_lock_irqsave(&hardware_lock, flags);
693 it87_RXEN_mask = IT87_CIR_RCR_RXEN;
694 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
695 io + IT87_CIR_RCR);
696 spin_unlock_irqrestore(&hardware_lock, flags);
697}
698
699
700static int init_hardware(void)
701{
702 unsigned long flags;
703 unsigned char it87_rcr = 0;
704
705 spin_lock_irqsave(&hardware_lock, flags);
706 /* init cir-port */
707 /* enable r/w-access to Baudrate-Register */
708 outb(IT87_CIR_IER_BR, io + IT87_CIR_IER);
709 outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR);
710 outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR);
711 /* Baudrate Register off, define IRQs: Input only */
712 if (digimatrix) {
713 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER);
714 /* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */
715 } else {
716 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER);
717 /* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */
718 }
719 it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1;
720 if (it87_enable_demodulator)
721 it87_rcr |= IT87_CIR_RCR_RXEND;
722 outb(it87_rcr, io + IT87_CIR_RCR);
723 if (digimatrix) {
724 /* Set FIFO depth to 1 byte, and disable TX */
725 outb(inb(io + IT87_CIR_TCR1) | 0x00,
726 io + IT87_CIR_TCR1);
727
728 /*
729 * TX: it87_freq (36kHz), 'reserved' sensitivity
730 * setting (0x00)
731 */
732 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00,
733 io + IT87_CIR_TCR2);
734 } else {
735 /* TX: 38kHz, 13,3us (pulse-width) */
736 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06,
737 io + IT87_CIR_TCR2);
738 }
739 spin_unlock_irqrestore(&hardware_lock, flags);
740 return 0;
741}
742
743
744static void drop_hardware(void)
745{
746 unsigned long flags;
747
748 spin_lock_irqsave(&hardware_lock, flags);
749 disable_irq(irq);
750 /* receiver disable */
751 it87_RXEN_mask = 0;
752 outb(0x1, io + IT87_CIR_RCR);
753 /* turn off irqs */
754 outb(0, io + IT87_CIR_IER);
755 /* fifo clear */
756 outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1);
757 /* reset */
758 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
759 enable_irq(irq);
760 spin_unlock_irqrestore(&hardware_lock, flags);
761}
762
763
764static unsigned char it87_read(unsigned char port)
765{
766 outb(port, IT87_ADRPORT);
767 return inb(IT87_DATAPORT);
768}
769
770
771static void it87_write(unsigned char port, unsigned char data)
772{
773 outb(port, IT87_ADRPORT);
774 outb(data, IT87_DATAPORT);
775}
776
777
778/* SECTION: Initialisation */
779
780static int init_port(void)
781{
782 unsigned long hw_flags;
783 int retval = 0;
784
785 unsigned char init_bytes[4] = IT87_INIT;
786 unsigned char it87_chipid = 0;
787 unsigned char ldn = 0;
788 unsigned int it87_io = 0;
789 unsigned int it87_irq = 0;
790
791 /* Enter MB PnP Mode */
792 outb(init_bytes[0], IT87_ADRPORT);
793 outb(init_bytes[1], IT87_ADRPORT);
794 outb(init_bytes[2], IT87_ADRPORT);
795 outb(init_bytes[3], IT87_ADRPORT);
796
797 /* 8712 or 8705 ? */
798 it87_chipid = it87_read(IT87_CHIP_ID1);
799 if (it87_chipid != 0x87) {
800 retval = -ENXIO;
801 return retval;
802 }
803 it87_chipid = it87_read(IT87_CHIP_ID2);
804 if ((it87_chipid != 0x05) &&
805 (it87_chipid != 0x12) &&
806 (it87_chipid != 0x18) &&
807 (it87_chipid != 0x20)) {
808 printk(KERN_INFO LIRC_DRIVER_NAME
809 ": no IT8704/05/12/18/20 found (claimed IT87%02x), "
810 "exiting..\n", it87_chipid);
811 retval = -ENXIO;
812 return retval;
813 }
814 printk(KERN_INFO LIRC_DRIVER_NAME
815 ": found IT87%02x.\n",
816 it87_chipid);
817
818 /* get I/O-Port and IRQ */
819 if (it87_chipid == 0x12 || it87_chipid == 0x18)
820 ldn = IT8712_CIR_LDN;
821 else
822 ldn = IT8705_CIR_LDN;
823 it87_write(IT87_LDN, ldn);
824
825 it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 +
826 it87_read(IT87_CIR_BASE_LSB);
827 if (it87_io == 0) {
828 if (io == 0)
829 io = IT87_CIR_DEFAULT_IOBASE;
830 printk(KERN_INFO LIRC_DRIVER_NAME
831 ": set default io 0x%x\n",
832 io);
833 it87_write(IT87_CIR_BASE_MSB, io / 0x100);
834 it87_write(IT87_CIR_BASE_LSB, io % 0x100);
835 } else
836 io = it87_io;
837
838 it87_irq = it87_read(IT87_CIR_IRQ);
839 if (digimatrix || it87_irq == 0) {
840 if (irq == 0)
841 irq = IT87_CIR_DEFAULT_IRQ;
842 printk(KERN_INFO LIRC_DRIVER_NAME
843 ": set default irq 0x%x\n",
844 irq);
845 it87_write(IT87_CIR_IRQ, irq);
846 } else
847 irq = it87_irq;
848
849 spin_lock_irqsave(&hardware_lock, hw_flags);
850 /* reset */
851 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
852 /* fifo clear */
853 outb(IT87_CIR_TCR1_FIFOCLR |
854 /* IT87_CIR_TCR1_ILE | */
855 IT87_CIR_TCR1_TXRLE |
856 IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1);
857 spin_unlock_irqrestore(&hardware_lock, hw_flags);
858
859 /* get I/O port access and IRQ line */
860 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
861 printk(KERN_ERR LIRC_DRIVER_NAME
862 ": i/o port 0x%.4x already in use.\n", io);
863 /* Leaving MB PnP Mode */
864 it87_write(IT87_CFGCTRL, 0x2);
865 return -EBUSY;
866 }
867
868 /* activate CIR-Device */
869 it87_write(IT87_CIR_ACT, 0x1);
870
871 /* Leaving MB PnP Mode */
872 it87_write(IT87_CFGCTRL, 0x2);
873
874 retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/,
875 LIRC_DRIVER_NAME, NULL);
876 if (retval < 0) {
877 printk(KERN_ERR LIRC_DRIVER_NAME
878 ": IRQ %d already in use.\n",
879 irq);
880 release_region(io, 8);
881 return retval;
882 }
883
884 printk(KERN_INFO LIRC_DRIVER_NAME
885 ": I/O port 0x%.4x, IRQ %d.\n", io, irq);
886
887 init_timer(&timerlist);
888 timerlist.function = it87_timeout;
889 timerlist.data = 0xabadcafe;
890
891 return 0;
892}
893
894
895static void drop_port(void)
896{
897#if 0
898 unsigned char init_bytes[4] = IT87_INIT;
899
900 /* Enter MB PnP Mode */
901 outb(init_bytes[0], IT87_ADRPORT);
902 outb(init_bytes[1], IT87_ADRPORT);
903 outb(init_bytes[2], IT87_ADRPORT);
904 outb(init_bytes[3], IT87_ADRPORT);
905
906 /* deactivate CIR-Device */
907 it87_write(IT87_CIR_ACT, 0x0);
908
909 /* Leaving MB PnP Mode */
910 it87_write(IT87_CFGCTRL, 0x2);
911#endif
912
913 del_timer_sync(&timerlist);
914 free_irq(irq, NULL);
915 release_region(io, 8);
916}
917
918
919static int init_lirc_it87(void)
920{
921 int retval;
922
923 init_waitqueue_head(&lirc_read_queue);
924 retval = init_port();
925 if (retval < 0)
926 return retval;
927 init_hardware();
928 printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n");
929 return 0;
930}
931
932static int it87_probe(struct pnp_dev *pnp_dev,
933 const struct pnp_device_id *dev_id)
934{
935 int retval;
936
937 driver.dev = &pnp_dev->dev;
938
939 retval = init_chrdev();
940 if (retval < 0)
941 return retval;
942
943 retval = init_lirc_it87();
944 if (retval)
945 goto init_lirc_it87_failed;
946
947 return 0;
948
949init_lirc_it87_failed:
950 drop_chrdev();
951
952 return retval;
953}
954
955static int __init lirc_it87_init(void)
956{
957 return pnp_register_driver(&it87_pnp_driver);
958}
959
960
961static void __exit lirc_it87_exit(void)
962{
963 drop_hardware();
964 drop_chrdev();
965 drop_port();
966 pnp_unregister_driver(&it87_pnp_driver);
967 printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
968}
969
4c8fa381 970/* SECTION: PNP for ITE8704/13/18 */
c147f907
JW		 971
972static const struct pnp_device_id pnp_dev_table[] = {
973 {"ITE8704", 0},
4c8fa381 974 {"ITE8713", 0},
c147f907
JW		 975 {}
976};
977
978MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
979
980static struct pnp_driver it87_pnp_driver = {
981 .name = LIRC_DRIVER_NAME,
982 .id_table = pnp_dev_table,
983 .probe = it87_probe,
984};
985
986module_init(lirc_it87_init);
987module_exit(lirc_it87_exit);
988
989MODULE_DESCRIPTION("LIRC driver for ITE IT8704/05/12/18/20 CIR port");
990MODULE_AUTHOR("Hans-Gunter Lutke Uphues");
991MODULE_LICENSE("GPL");
992
993module_param(io, int, S_IRUGO);
994MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");
995
996module_param(irq, int, S_IRUGO);
997#ifdef LIRC_IT87_DIGIMATRIX
998MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)");
999#else
1000MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)");
1001#endif
1002
1003module_param(it87_enable_demodulator, bool, S_IRUGO);
1004MODULE_PARM_DESC(it87_enable_demodulator,
1005 "Receiver demodulator enable/disable (1/0), default: 0");
1006
1007module_param(debug, bool, S_IRUGO | S_IWUSR);
1008MODULE_PARM_DESC(debug, "Enable debugging messages");
1009
1010module_param(digimatrix, bool, S_IRUGO | S_IWUSR);
1011#ifdef LIRC_IT87_DIGIMATRIX
1012MODULE_PARM_DESC(digimatrix,
1013 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 1");
1014#else
1015MODULE_PARM_DESC(digimatrix,
1016 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 0");
1017#endif
1018
1019
1020module_param(it87_freq, int, S_IRUGO);
1021#ifdef LIRC_IT87_DIGIMATRIX
1022MODULE_PARM_DESC(it87_freq,
1023 "Carrier demodulator frequency (kHz), (default: 36)");
1024#else
1025MODULE_PARM_DESC(it87_freq,
1026 "Carrier demodulator frequency (kHz), (default: 38)");
1027#endif
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