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Merge tag 'powerpc-4.13-8' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[mirror_ubuntu-artful-kernel.git] / drivers / staging / media / atomisp / i2c / imx / imx.h
CommitLineData
a49d2536
AC		 1/*
2 * Support for Sony IMX camera sensor.
3 *
4 * Copyright (c) 2010 Intel Corporation. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301, USA.
19 *
20 */
21
22#ifndef __IMX_H__
23#define __IMX_H__
25016567
GKH		 24#include "../../include/linux/atomisp_platform.h"
25#include "../../include/linux/atomisp.h"
a49d2536
AC		 26#include <linux/delay.h>
27#include <linux/i2c.h>
28#include <linux/kernel.h>
29#include <linux/spinlock.h>
30#include <linux/types.h>
31#include <linux/videodev2.h>
32#include <linux/v4l2-mediabus.h>
33#include <media/media-entity.h>
34#include <media/v4l2-ctrls.h>
35#include <media/v4l2-device.h>
36#include <media/v4l2-subdev.h>
37#include "imx175.h"
38#include "imx135.h"
39#include "imx134.h"
40#include "imx132.h"
41#include "imx208.h"
42#include "imx219.h"
43#include "imx227.h"
44
45#define IMX_MCLK 192
46
47/* TODO - This should be added into include/linux/videodev2.h */
48#ifndef V4L2_IDENT_IMX
49#define V4L2_IDENT_IMX 8245
50#endif
51
52#define IMX_MAX_AE_LUT_LENGTH 5
53/*
54 * imx System control registers
55 */
56#define IMX_MASK_5BIT 0x1F
57#define IMX_MASK_4BIT 0xF
58#define IMX_MASK_3BIT 0x7
59#define IMX_MASK_2BIT 0x3
60#define IMX_MASK_8BIT 0xFF
61#define IMX_MASK_11BIT 0x7FF
62#define IMX_INTG_BUF_COUNT 2
63
64#define IMX_FINE_INTG_TIME 0x1E8
65
66#define IMX_VT_PIX_CLK_DIV 0x0301
67#define IMX_VT_SYS_CLK_DIV 0x0303
68#define IMX_PRE_PLL_CLK_DIV 0x0305
69#define IMX227_IOP_PRE_PLL_CLK_DIV 0x030D
70#define IMX227_PLL_MULTIPLIER 0x0306
71#define IMX227_IOP_PLL_MULTIPLIER 0x030E
72#define IMX227_PLL_MULTI_DRIVE 0x0310
73#define IMX227_OP_PIX_CLK_DIV 0x0309
74#define IMX227_OP_SYS_CLK_DIV 0x030B
75#define IMX_PLL_MULTIPLIER 0x030C
76#define IMX_OP_PIX_DIV 0x0309
77#define IMX_OP_SYS_DIV 0x030B
78#define IMX_FRAME_LENGTH_LINES 0x0340
79#define IMX_LINE_LENGTH_PIXELS 0x0342
80#define IMX_COARSE_INTG_TIME_MIN 0x1004
81#define IMX_COARSE_INTG_TIME_MAX 0x1006
82#define IMX_BINNING_ENABLE 0x0390
83#define IMX227_BINNING_ENABLE 0x0900
84#define IMX_BINNING_TYPE 0x0391
85#define IMX227_BINNING_TYPE 0x0901
86#define IMX_READ_MODE 0x0390
87#define IMX227_READ_MODE 0x0900
88
89#define IMX_HORIZONTAL_START_H 0x0344
90#define IMX_VERTICAL_START_H 0x0346
91#define IMX_HORIZONTAL_END_H 0x0348
92#define IMX_VERTICAL_END_H 0x034a
93#define IMX_HORIZONTAL_OUTPUT_SIZE_H 0x034c
94#define IMX_VERTICAL_OUTPUT_SIZE_H 0x034e
95
96/* Post Divider setting register for imx132 and imx208 */
97#define IMX132_208_VT_RGPLTD 0x30A4
98
99/* Multiplier setting register for imx132, imx208, and imx219 */
100#define IMX132_208_219_PLL_MULTIPLIER 0x0306
101
102#define IMX_COARSE_INTEGRATION_TIME 0x0202
103#define IMX_TEST_PATTERN_MODE 0x0600
104#define IMX_TEST_PATTERN_COLOR_R 0x0602
105#define IMX_TEST_PATTERN_COLOR_GR 0x0604
106#define IMX_TEST_PATTERN_COLOR_B 0x0606
107#define IMX_TEST_PATTERN_COLOR_GB 0x0608
108#define IMX_IMG_ORIENTATION 0x0101
109#define IMX_VFLIP_BIT 2
110#define IMX_HFLIP_BIT 1
111#define IMX_GLOBAL_GAIN 0x0205
112#define IMX_SHORT_AGC_GAIN 0x0233
113#define IMX_DGC_ADJ 0x020E
114#define IMX_DGC_LEN 10
115#define IMX227_DGC_LEN 4
116#define IMX_MAX_EXPOSURE_SUPPORTED 0xfffb
117#define IMX_MAX_GLOBAL_GAIN_SUPPORTED 0x00ff
118#define IMX_MAX_DIGITAL_GAIN_SUPPORTED 0x0fff
119
120#define MAX_FMTS 1
121#define IMX_OTP_DATA_SIZE 1280
122
123#define IMX_SUBDEV_PREFIX "imx"
124#define IMX_DRIVER "imx1x5"
125
126/* Sensor ids from identification register */
127#define IMX_NAME_134 "imx134"
128#define IMX_NAME_135 "imx135"
129#define IMX_NAME_175 "imx175"
130#define IMX_NAME_132 "imx132"
131#define IMX_NAME_208 "imx208"
132#define IMX_NAME_219 "imx219"
133#define IMX_NAME_227 "imx227"
134#define IMX175_ID 0x0175
135#define IMX135_ID 0x0135
136#define IMX134_ID 0x0134
137#define IMX132_ID 0x0132
138#define IMX208_ID 0x0208
139#define IMX219_ID 0x0219
140#define IMX227_ID 0x0227
141
142/* Sensor id based on i2c_device_id table
143 * (Fuji module can not be detected based on sensor registers) */
144#define IMX135_FUJI_ID 0x0136
145#define IMX_NAME_135_FUJI "imx135fuji"
146
147/* imx175 - use dw9714 vcm */
148#define IMX175_MERRFLD 0x175
149#define IMX175_VALLEYVIEW 0x176
150#define IMX135_SALTBAY 0x135
151#define IMX135_VICTORIABAY 0x136
152#define IMX132_SALTBAY 0x132
153#define IMX134_VALLEYVIEW 0x134
154#define IMX208_MOFD_PD2 0x208
155#define IMX219_MFV0_PRH 0x219
156#define IMX227_SAND 0x227
157
158/* otp - specific settings */
159#define E2PROM_ADDR 0xa0
160#define E2PROM_LITEON_12P1BA869D_ADDR 0xa0
161#define E2PROM_ABICO_SS89A839_ADDR 0xa8
162#define DEFAULT_OTP_SIZE 1280
163#define IMX135_OTP_SIZE 1280
164#define IMX219_OTP_SIZE 2048
165#define IMX227_OTP_SIZE 2560
166#define E2PROM_LITEON_12P1BA869D_SIZE 544
167
168#define IMX_ID_DEFAULT 0x0000
169#define IMX132_175_208_219_CHIP_ID 0x0000
170#define IMX134_135_CHIP_ID 0x0016
171#define IMX134_135_227_CHIP_ID 0x0016
172
173#define IMX175_RES_WIDTH_MAX 3280
174#define IMX175_RES_HEIGHT_MAX 2464
175#define IMX135_RES_WIDTH_MAX 4208
176#define IMX135_RES_HEIGHT_MAX 3120
177#define IMX132_RES_WIDTH_MAX 1936
178#define IMX132_RES_HEIGHT_MAX 1096
179#define IMX134_RES_WIDTH_MAX 3280
180#define IMX134_RES_HEIGHT_MAX 2464
181#define IMX208_RES_WIDTH_MAX 1936
182#define IMX208_RES_HEIGHT_MAX 1096
183#define IMX219_RES_WIDTH_MAX 3280
184#define IMX219_RES_HEIGHT_MAX 2464
185#define IMX227_RES_WIDTH_MAX 2400
186#define IMX227_RES_HEIGHT_MAX 2720
187
188/* Defines for lens/VCM */
189#define IMX_FOCAL_LENGTH_NUM 369 /*3.69mm*/
190#define IMX_FOCAL_LENGTH_DEM 100
191#define IMX_F_NUMBER_DEFAULT_NUM 22
192#define IMX_F_NUMBER_DEM 10
193#define IMX_INVALID_CONFIG 0xffffffff
194#define IMX_MAX_FOCUS_POS 1023
195#define IMX_MAX_FOCUS_NEG (-1023)
196#define IMX_VCM_SLEW_STEP_MAX 0x3f
197#define IMX_VCM_SLEW_TIME_MAX 0x1f
198
199#define IMX_BIN_FACTOR_MAX 4
200#define IMX_INTEGRATION_TIME_MARGIN 4
201/*
202 * focal length bits definition:
203 * bits 31-16: numerator, bits 15-0: denominator
204 */
205#define IMX_FOCAL_LENGTH_DEFAULT 0x1710064
206
207/*
208 * current f-number bits definition:
209 * bits 31-16: numerator, bits 15-0: denominator
210 */
211#define IMX_F_NUMBER_DEFAULT 0x16000a
212
213/*
214 * f-number range bits definition:
215 * bits 31-24: max f-number numerator
216 * bits 23-16: max f-number denominator
217 * bits 15-8: min f-number numerator
218 * bits 7-0: min f-number denominator
219 */
220#define IMX_F_NUMBER_RANGE 0x160a160a
221
222struct imx_vcm {
223 int (*power_up)(struct v4l2_subdev *sd);
224 int (*power_down)(struct v4l2_subdev *sd);
225 int (*init)(struct v4l2_subdev *sd);
226 int (*t_focus_vcm)(struct v4l2_subdev *sd, u16 val);
227 int (*t_focus_abs)(struct v4l2_subdev *sd, s32 value);
228 int (*t_focus_abs_init)(struct v4l2_subdev *sd);
229 int (*t_focus_rel)(struct v4l2_subdev *sd, s32 value);
230 int (*q_focus_status)(struct v4l2_subdev *sd, s32 *value);
231 int (*q_focus_abs)(struct v4l2_subdev *sd, s32 *value);
232 int (*t_vcm_slew)(struct v4l2_subdev *sd, s32 value);
233 int (*t_vcm_timing)(struct v4l2_subdev *sd, s32 value);
234};
235
236struct imx_otp {
237 void * (*otp_read)(struct v4l2_subdev *sd, u8 dev_addr,
238 u32 start_addr, u32 size);
239 u32 start_addr;
240 u32 size;
241 u8 dev_addr;
242};
243
244struct max_res {
245 int res_max_width;
246 int res_max_height;
247};
248
249struct max_res imx_max_res[] = {
250 [IMX175_ID] = {
251 .res_max_width = IMX175_RES_WIDTH_MAX,
252 .res_max_height = IMX175_RES_HEIGHT_MAX,
253 },
254 [IMX135_ID] = {
255 .res_max_width = IMX135_RES_WIDTH_MAX,
256 .res_max_height = IMX135_RES_HEIGHT_MAX,
257 },
258 [IMX132_ID] = {
259 .res_max_width = IMX132_RES_WIDTH_MAX,
260 .res_max_height = IMX132_RES_HEIGHT_MAX,
261 },
262 [IMX134_ID] = {
263 .res_max_width = IMX134_RES_WIDTH_MAX,
264 .res_max_height = IMX134_RES_HEIGHT_MAX,
265 },
266 [IMX208_ID] = {
267 .res_max_width = IMX208_RES_WIDTH_MAX,
268 .res_max_height = IMX208_RES_HEIGHT_MAX,
269 },
270 [IMX219_ID] = {
271 .res_max_width = IMX219_RES_WIDTH_MAX,
272 .res_max_height = IMX219_RES_HEIGHT_MAX,
273 },
274 [IMX227_ID] = {
275 .res_max_width = IMX227_RES_WIDTH_MAX,
276 .res_max_height = IMX227_RES_HEIGHT_MAX,
277 },
278};
279
280struct imx_settings {
281 struct imx_reg const *init_settings;
282 struct imx_resolution *res_preview;
283 struct imx_resolution *res_still;
284 struct imx_resolution *res_video;
285 int n_res_preview;
286 int n_res_still;
287 int n_res_video;
288};
289
290struct imx_settings imx_sets[] = {
291 [IMX175_MERRFLD] = {
292 .init_settings = imx175_init_settings,
293 .res_preview = imx175_res_preview,
294 .res_still = imx175_res_still,
295 .res_video = imx175_res_video,
296 .n_res_preview = ARRAY_SIZE(imx175_res_preview),
297 .n_res_still = ARRAY_SIZE(imx175_res_still),
298 .n_res_video = ARRAY_SIZE(imx175_res_video),
299 },
300 [IMX175_VALLEYVIEW] = {
301 .init_settings = imx175_init_settings,
302 .res_preview = imx175_res_preview,
303 .res_still = imx175_res_still,
304 .res_video = imx175_res_video,
305 .n_res_preview = ARRAY_SIZE(imx175_res_preview),
306 .n_res_still = ARRAY_SIZE(imx175_res_still),
307 .n_res_video = ARRAY_SIZE(imx175_res_video),
308 },
309 [IMX135_SALTBAY] = {
310 .init_settings = imx135_init_settings,
311 .res_preview = imx135_res_preview,
312 .res_still = imx135_res_still,
313 .res_video = imx135_res_video,
314 .n_res_preview = ARRAY_SIZE(imx135_res_preview),
315 .n_res_still = ARRAY_SIZE(imx135_res_still),
316 .n_res_video = ARRAY_SIZE(imx135_res_video),
317 },
318 [IMX135_VICTORIABAY] = {
319 .init_settings = imx135_init_settings,
320 .res_preview = imx135_res_preview_mofd,
321 .res_still = imx135_res_still_mofd,
322 .res_video = imx135_res_video,
323 .n_res_preview = ARRAY_SIZE(imx135_res_preview_mofd),
324 .n_res_still = ARRAY_SIZE(imx135_res_still_mofd),
325 .n_res_video = ARRAY_SIZE(imx135_res_video),
326 },
327 [IMX132_SALTBAY] = {
328 .init_settings = imx132_init_settings,
329 .res_preview = imx132_res_preview,
330 .res_still = imx132_res_still,
331 .res_video = imx132_res_video,
332 .n_res_preview = ARRAY_SIZE(imx132_res_preview),
333 .n_res_still = ARRAY_SIZE(imx132_res_still),
334 .n_res_video = ARRAY_SIZE(imx132_res_video),
335 },
336 [IMX134_VALLEYVIEW] = {
337 .init_settings = imx134_init_settings,
338 .res_preview = imx134_res_preview,
339 .res_still = imx134_res_still,
340 .res_video = imx134_res_video,
341 .n_res_preview = ARRAY_SIZE(imx134_res_preview),
342 .n_res_still = ARRAY_SIZE(imx134_res_still),
343 .n_res_video = ARRAY_SIZE(imx134_res_video),
344 },
345 [IMX208_MOFD_PD2] = {
346 .init_settings = imx208_init_settings,
347 .res_preview = imx208_res_preview,
348 .res_still = imx208_res_still,
349 .res_video = imx208_res_video,
350 .n_res_preview = ARRAY_SIZE(imx208_res_preview),
351 .n_res_still = ARRAY_SIZE(imx208_res_still),
352 .n_res_video = ARRAY_SIZE(imx208_res_video),
353 },
354 [IMX219_MFV0_PRH] = {
355 .init_settings = imx219_init_settings,
356 .res_preview = imx219_res_preview,
357 .res_still = imx219_res_still,
358 .res_video = imx219_res_video,
359 .n_res_preview = ARRAY_SIZE(imx219_res_preview),
360 .n_res_still = ARRAY_SIZE(imx219_res_still),
361 .n_res_video = ARRAY_SIZE(imx219_res_video),
362 },
363 [IMX227_SAND] = {
364 .init_settings = imx227_init_settings,
365 .res_preview = imx227_res_preview,
366 .res_still = imx227_res_still,
367 .res_video = imx227_res_video,
368 .n_res_preview = ARRAY_SIZE(imx227_res_preview),
369 .n_res_still = ARRAY_SIZE(imx227_res_still),
370 .n_res_video = ARRAY_SIZE(imx227_res_video),
371 },
372};
373
374struct imx_reg_addr {
375 u16 frame_length_lines;
376 u16 line_length_pixels;
377 u16 horizontal_start_h;
378 u16 vertical_start_h;
379 u16 horizontal_end_h;
380 u16 vertical_end_h;
381 u16 horizontal_output_size_h;
382 u16 vertical_output_size_h;
383 u16 coarse_integration_time;
384 u16 img_orientation;
385 u16 global_gain;
386 u16 dgc_adj;
387};
388
389struct imx_reg_addr imx_addr = {
390 IMX_FRAME_LENGTH_LINES,
391 IMX_LINE_LENGTH_PIXELS,
392 IMX_HORIZONTAL_START_H,
393 IMX_VERTICAL_START_H,
394 IMX_HORIZONTAL_END_H,
395 IMX_VERTICAL_END_H,
396 IMX_HORIZONTAL_OUTPUT_SIZE_H,
397 IMX_VERTICAL_OUTPUT_SIZE_H,
398 IMX_COARSE_INTEGRATION_TIME,
399 IMX_IMG_ORIENTATION,
400 IMX_GLOBAL_GAIN,
401 IMX_DGC_ADJ,
402};
403
404struct imx_reg_addr imx219_addr = {
405 IMX219_FRAME_LENGTH_LINES,
406 IMX219_LINE_LENGTH_PIXELS,
407 IMX219_HORIZONTAL_START_H,
408 IMX219_VERTICAL_START_H,
409 IMX219_HORIZONTAL_END_H,
410 IMX219_VERTICAL_END_H,
411 IMX219_HORIZONTAL_OUTPUT_SIZE_H,
412 IMX219_VERTICAL_OUTPUT_SIZE_H,
413 IMX219_COARSE_INTEGRATION_TIME,
414 IMX219_IMG_ORIENTATION,
415 IMX219_GLOBAL_GAIN,
416 IMX219_DGC_ADJ,
417};
418
419#define v4l2_format_capture_type_entry(_width, _height, \
420 _pixelformat, _bytesperline, _colorspace) \
421 {\
422 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,\
423 .fmt.pix.width = (_width),\
424 .fmt.pix.height = (_height),\
425 .fmt.pix.pixelformat = (_pixelformat),\
426 .fmt.pix.bytesperline = (_bytesperline),\
427 .fmt.pix.colorspace = (_colorspace),\
428 .fmt.pix.sizeimage = (_height)*(_bytesperline),\
429 }
430
431#define s_output_format_entry(_width, _height, _pixelformat, \
432 _bytesperline, _colorspace, _fps) \
433 {\
434 .v4l2_fmt = v4l2_format_capture_type_entry(_width, \
435 _height, _pixelformat, _bytesperline, \
436 _colorspace),\
437 .fps = (_fps),\
438 }
439
440#define s_output_format_reg_entry(_width, _height, _pixelformat, \
441 _bytesperline, _colorspace, _fps, _reg_setting) \
442 {\
443 .s_fmt = s_output_format_entry(_width, _height,\
444 _pixelformat, _bytesperline, \
445 _colorspace, _fps),\
446 .reg_setting = (_reg_setting),\
447 }
448
449/* imx device structure */
450struct imx_device {
451 struct v4l2_subdev sd;
452 struct media_pad pad;
453 struct v4l2_mbus_framefmt format;
454 struct camera_sensor_platform_data *platform_data;
455 struct mutex input_lock; /* serialize sensor's ioctl */
456 int fmt_idx;
457 int status;
458 int streaming;
459 int power;
460 int run_mode;
461 int vt_pix_clk_freq_mhz;
462 int fps_index;
463 u32 focus;
464 u16 sensor_id; /* Sensor id from registers */
465 u16 i2c_id; /* Sensor id from i2c_device_id */
466 u16 coarse_itg;
467 u16 fine_itg;
468 u16 digital_gain;
469 u16 gain;
470 u16 pixels_per_line;
471 u16 lines_per_frame;
472 u8 targetfps;
473 u8 fps;
474 const struct imx_reg *regs;
475 u8 res;
476 u8 type;
477 u8 sensor_revision;
478 u8 *otp_data;
479 struct imx_settings *mode_tables;
480 struct imx_vcm *vcm_driver;
481 struct imx_otp *otp_driver;
482 const struct imx_resolution *curr_res_table;
8033120f 483 unsigned long entries_curr_table;
a49d2536
AC		 484 const struct firmware *fw;
485 struct imx_reg_addr *reg_addr;
486 const struct imx_reg *param_hold;
487 const struct imx_reg *param_update;
488
489 /* used for h/b blank tuning */
490 struct v4l2_ctrl_handler ctrl_handler;
491 struct v4l2_ctrl *pixel_rate;
492 struct v4l2_ctrl *h_blank;
493 struct v4l2_ctrl *v_blank;
494 struct v4l2_ctrl *link_freq;
495 struct v4l2_ctrl *h_flip;
496 struct v4l2_ctrl *v_flip;
497
498 /* Test pattern control */
499 struct v4l2_ctrl *tp_mode;
500 struct v4l2_ctrl *tp_r;
501 struct v4l2_ctrl *tp_gr;
502 struct v4l2_ctrl *tp_gb;
503 struct v4l2_ctrl *tp_b;
504
505 /* FIXME! */
506 bool new_res_sel_method;
507};
508
509#define to_imx_sensor(x) container_of(x, struct imx_device, sd)
510
511#define IMX_MAX_WRITE_BUF_SIZE 32
512struct imx_write_buffer {
513 u16 addr;
514 u8 data[IMX_MAX_WRITE_BUF_SIZE];
515};
516
517struct imx_write_ctrl {
518 int index;
519 struct imx_write_buffer buffer;
520};
521
522static const struct imx_reg imx_soft_standby[] = {
523 {IMX_8BIT, 0x0100, 0x00},
524 {IMX_TOK_TERM, 0, 0}
525};
526
527static const struct imx_reg imx_streaming[] = {
528 {IMX_8BIT, 0x0100, 0x01},
529 {IMX_TOK_TERM, 0, 0}
530};
531
532static const struct imx_reg imx_param_hold[] = {
533 {IMX_8BIT, 0x0104, 0x01}, /* GROUPED_PARAMETER_HOLD */
534 {IMX_TOK_TERM, 0, 0}
535};
536
537static const struct imx_reg imx_param_update[] = {
538 {IMX_8BIT, 0x0104, 0x00}, /* GROUPED_PARAMETER_HOLD */
539 {IMX_TOK_TERM, 0, 0}
540};
541
542static const struct imx_reg imx219_param_hold[] = {
543 {IMX_TOK_TERM, 0, 0}
544};
545
546static const struct imx_reg imx219_param_update[] = {
547 {IMX_TOK_TERM, 0, 0}
548};
549
550extern int ad5816g_vcm_power_up(struct v4l2_subdev *sd);
551extern int ad5816g_vcm_power_down(struct v4l2_subdev *sd);
552extern int ad5816g_vcm_init(struct v4l2_subdev *sd);
553
554extern int ad5816g_t_focus_vcm(struct v4l2_subdev *sd, u16 val);
555extern int ad5816g_t_focus_abs(struct v4l2_subdev *sd, s32 value);
556extern int ad5816g_t_focus_rel(struct v4l2_subdev *sd, s32 value);
557extern int ad5816g_q_focus_status(struct v4l2_subdev *sd, s32 *value);
558extern int ad5816g_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
559extern int ad5816g_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
560extern int ad5816g_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
561
562extern int drv201_vcm_power_up(struct v4l2_subdev *sd);
563extern int drv201_vcm_power_down(struct v4l2_subdev *sd);
564extern int drv201_vcm_init(struct v4l2_subdev *sd);
565
566extern int drv201_t_focus_vcm(struct v4l2_subdev *sd, u16 val);
567extern int drv201_t_focus_abs(struct v4l2_subdev *sd, s32 value);
568extern int drv201_t_focus_rel(struct v4l2_subdev *sd, s32 value);
569extern int drv201_q_focus_status(struct v4l2_subdev *sd, s32 *value);
570extern int drv201_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
571extern int drv201_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
572extern int drv201_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
573
574extern int dw9714_vcm_power_up(struct v4l2_subdev *sd);
575extern int dw9714_vcm_power_down(struct v4l2_subdev *sd);
576extern int dw9714_vcm_init(struct v4l2_subdev *sd);
577
578extern int dw9714_t_focus_vcm(struct v4l2_subdev *sd, u16 val);
579extern int dw9714_t_focus_abs(struct v4l2_subdev *sd, s32 value);
580extern int dw9714_t_focus_abs_init(struct v4l2_subdev *sd);
581extern int dw9714_t_focus_rel(struct v4l2_subdev *sd, s32 value);
582extern int dw9714_q_focus_status(struct v4l2_subdev *sd, s32 *value);
583extern int dw9714_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
584extern int dw9714_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
585extern int dw9714_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
586
587extern int dw9719_vcm_power_up(struct v4l2_subdev *sd);
588extern int dw9719_vcm_power_down(struct v4l2_subdev *sd);
589extern int dw9719_vcm_init(struct v4l2_subdev *sd);
590
591extern int dw9719_t_focus_vcm(struct v4l2_subdev *sd, u16 val);
592extern int dw9719_t_focus_abs(struct v4l2_subdev *sd, s32 value);
593extern int dw9719_t_focus_rel(struct v4l2_subdev *sd, s32 value);
594extern int dw9719_q_focus_status(struct v4l2_subdev *sd, s32 *value);
595extern int dw9719_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
596extern int dw9719_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
597extern int dw9719_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
598
599extern int dw9718_vcm_power_up(struct v4l2_subdev *sd);
600extern int dw9718_vcm_power_down(struct v4l2_subdev *sd);
601extern int dw9718_vcm_init(struct v4l2_subdev *sd);
602
603extern int dw9718_t_focus_vcm(struct v4l2_subdev *sd, u16 val);
604extern int dw9718_t_focus_abs(struct v4l2_subdev *sd, s32 value);
605extern int dw9718_t_focus_rel(struct v4l2_subdev *sd, s32 value);
606extern int dw9718_q_focus_status(struct v4l2_subdev *sd, s32 *value);
607extern int dw9718_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
608extern int dw9718_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
609extern int dw9718_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
610
611extern int vcm_power_up(struct v4l2_subdev *sd);
612extern int vcm_power_down(struct v4l2_subdev *sd);
613
614struct imx_vcm imx_vcms[] = {
615 [IMX175_MERRFLD] = {
616 .power_up = drv201_vcm_power_up,
617 .power_down = drv201_vcm_power_down,
618 .init = drv201_vcm_init,
619 .t_focus_vcm = drv201_t_focus_vcm,
620 .t_focus_abs = drv201_t_focus_abs,
621 .t_focus_abs_init = NULL,
622 .t_focus_rel = drv201_t_focus_rel,
623 .q_focus_status = drv201_q_focus_status,
624 .q_focus_abs = drv201_q_focus_abs,
625 .t_vcm_slew = drv201_t_vcm_slew,
626 .t_vcm_timing = drv201_t_vcm_timing,
627 },
628 [IMX175_VALLEYVIEW] = {
629 .power_up = dw9714_vcm_power_up,
630 .power_down = dw9714_vcm_power_down,
631 .init = dw9714_vcm_init,
632 .t_focus_vcm = dw9714_t_focus_vcm,
633 .t_focus_abs = dw9714_t_focus_abs,
634 .t_focus_abs_init = NULL,
635 .t_focus_rel = dw9714_t_focus_rel,
636 .q_focus_status = dw9714_q_focus_status,
637 .q_focus_abs = dw9714_q_focus_abs,
638 .t_vcm_slew = dw9714_t_vcm_slew,
639 .t_vcm_timing = dw9714_t_vcm_timing,
640 },
641 [IMX135_SALTBAY] = {
642 .power_up = ad5816g_vcm_power_up,
643 .power_down = ad5816g_vcm_power_down,
644 .init = ad5816g_vcm_init,
645 .t_focus_vcm = ad5816g_t_focus_vcm,
646 .t_focus_abs = ad5816g_t_focus_abs,
647 .t_focus_abs_init = NULL,
648 .t_focus_rel = ad5816g_t_focus_rel,
649 .q_focus_status = ad5816g_q_focus_status,
650 .q_focus_abs = ad5816g_q_focus_abs,
651 .t_vcm_slew = ad5816g_t_vcm_slew,
652 .t_vcm_timing = ad5816g_t_vcm_timing,
653 },
654 [IMX135_VICTORIABAY] = {
655 .power_up = dw9719_vcm_power_up,
656 .power_down = dw9719_vcm_power_down,
657 .init = dw9719_vcm_init,
658 .t_focus_vcm = dw9719_t_focus_vcm,
659 .t_focus_abs = dw9719_t_focus_abs,
660 .t_focus_abs_init = NULL,
661 .t_focus_rel = dw9719_t_focus_rel,
662 .q_focus_status = dw9719_q_focus_status,
663 .q_focus_abs = dw9719_q_focus_abs,
664 .t_vcm_slew = dw9719_t_vcm_slew,
665 .t_vcm_timing = dw9719_t_vcm_timing,
666 },
667 [IMX134_VALLEYVIEW] = {
668 .power_up = dw9714_vcm_power_up,
669 .power_down = dw9714_vcm_power_down,
670 .init = dw9714_vcm_init,
671 .t_focus_vcm = dw9714_t_focus_vcm,
672 .t_focus_abs = dw9714_t_focus_abs,
673 .t_focus_abs_init = dw9714_t_focus_abs_init,
674 .t_focus_rel = dw9714_t_focus_rel,
675 .q_focus_status = dw9714_q_focus_status,
676 .q_focus_abs = dw9714_q_focus_abs,
677 .t_vcm_slew = dw9714_t_vcm_slew,
678 .t_vcm_timing = dw9714_t_vcm_timing,
679 },
680 [IMX219_MFV0_PRH] = {
681 .power_up = dw9718_vcm_power_up,
682 .power_down = dw9718_vcm_power_down,
683 .init = dw9718_vcm_init,
684 .t_focus_vcm = dw9718_t_focus_vcm,
685 .t_focus_abs = dw9718_t_focus_abs,
686 .t_focus_abs_init = NULL,
687 .t_focus_rel = dw9718_t_focus_rel,
688 .q_focus_status = dw9718_q_focus_status,
689 .q_focus_abs = dw9718_q_focus_abs,
690 .t_vcm_slew = dw9718_t_vcm_slew,
691 .t_vcm_timing = dw9718_t_vcm_timing,
692 },
693 [IMX_ID_DEFAULT] = {
694 .power_up = NULL,
695 .power_down = NULL,
696 .t_focus_abs_init = NULL,
697 },
698};
699
700extern void *dummy_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
701 u32 start_addr, u32 size);
702extern void *imx_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
703 u32 start_addr, u32 size);
704extern void *e2prom_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
705 u32 start_addr, u32 size);
706extern void *brcc064_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
707 u32 start_addr, u32 size);
708extern void *imx227_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
709 u32 start_addr, u32 size);
710extern void *e2prom_otp_read(struct v4l2_subdev *sd, u8 dev_addr,
711 u32 start_addr, u32 size);
712struct imx_otp imx_otps[] = {
713 [IMX175_MERRFLD] = {
714 .otp_read = imx_otp_read,
715 .dev_addr = E2PROM_ADDR,
716 .start_addr = 0,
717 .size = DEFAULT_OTP_SIZE,
718 },
719 [IMX175_VALLEYVIEW] = {
720 .otp_read = e2prom_otp_read,
721 .dev_addr = E2PROM_ABICO_SS89A839_ADDR,
722 .start_addr = E2PROM_2ADDR,
723 .size = DEFAULT_OTP_SIZE,
724 },
725 [IMX135_SALTBAY] = {
726 .otp_read = e2prom_otp_read,
727 .dev_addr = E2PROM_ADDR,
728 .start_addr = 0,
729 .size = DEFAULT_OTP_SIZE,
730 },
731 [IMX135_VICTORIABAY] = {
732 .otp_read = imx_otp_read,
733 .size = DEFAULT_OTP_SIZE,
734 },
735 [IMX134_VALLEYVIEW] = {
736 .otp_read = e2prom_otp_read,
737 .dev_addr = E2PROM_LITEON_12P1BA869D_ADDR,
738 .start_addr = 0,
739 .size = E2PROM_LITEON_12P1BA869D_SIZE,
740 },
741 [IMX132_SALTBAY] = {
742 .otp_read = dummy_otp_read,
743 .size = DEFAULT_OTP_SIZE,
744 },
745 [IMX208_MOFD_PD2] = {
746 .otp_read = dummy_otp_read,
747 .size = DEFAULT_OTP_SIZE,
748 },
749 [IMX219_MFV0_PRH] = {
750 .otp_read = brcc064_otp_read,
751 .dev_addr = E2PROM_ADDR,
752 .start_addr = 0,
753 .size = IMX219_OTP_SIZE,
754 },
755 [IMX227_SAND] = {
756 .otp_read = imx227_otp_read,
757 .size = IMX227_OTP_SIZE,
758 },
759 [IMX_ID_DEFAULT] = {
760 .otp_read = dummy_otp_read,
761 .size = DEFAULT_OTP_SIZE,
762 },
763};
764
765#endif
766
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