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[mirror_ubuntu-artful-kernel.git] / drivers / staging / media / atomisp / pci / atomisp2 / atomisp_internal.h
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1/*
2 * Support for Medifield PNW Camera Imaging ISP subsystem.
3 *
4 * Copyright (c) 2010 Intel Corporation. All Rights Reserved.
5 *
6 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 */
23#ifndef __ATOMISP_INTERNAL_H__
24#define __ATOMISP_INTERNAL_H__
25
25016567 26#include "../../include/linux/atomisp_platform.h"
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27#include <linux/firmware.h>
28#include <linux/kernel.h>
29#include <linux/pm_qos.h>
30#include <linux/idr.h>
31
32#include <asm/intel-mid.h>
25016567 33#include "../../include/asm/intel_mid_pcihelpers.h"
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34
35#include <media/media-device.h>
36#include <media/v4l2-subdev.h>
37
38#ifndef ISP2401
39#include "ia_css_types.h"
40#include "sh_css_legacy.h"
41#else
42/*#include "ia_css_types.h"*/
43/*#include "sh_css_legacy.h"*/
44#endif
45
46#include "atomisp_csi2.h"
47#include "atomisp_file.h"
48#include "atomisp_subdev.h"
49#include "atomisp_tpg.h"
50#include "atomisp_compat.h"
51
52#include "gp_device.h"
53#include "irq.h"
54#include <linux/vmalloc.h>
55
56#define V4L2_EVENT_FRAME_END 5
57
58#define IS_HWREVISION(isp, rev) \
59 (((isp)->media_dev.hw_revision & ATOMISP_HW_REVISION_MASK) == \
60 ((rev) << ATOMISP_HW_REVISION_SHIFT))
61
62#define MAX_STREAM_NUM 2
63
64#define ATOMISP_PCI_DEVICE_SOC_MASK 0xfff8
65/* MRFLD with 0x1178: ISP freq can burst to 457MHz */
66#define ATOMISP_PCI_DEVICE_SOC_MRFLD 0x1178
67/* MRFLD with 0x1179: max ISP freq limited to 400MHz */
68#define ATOMISP_PCI_DEVICE_SOC_MRFLD_1179 0x1179
69/* MRFLD with 0x117a: max ISP freq is 400MHz and max freq at Vmin is 200MHz */
70#define ATOMISP_PCI_DEVICE_SOC_MRFLD_117A 0x117a
71#define ATOMISP_PCI_DEVICE_SOC_BYT 0x0f38
72#define ATOMISP_PCI_DEVICE_SOC_ANN 0x1478
73#define ATOMISP_PCI_DEVICE_SOC_CHT 0x22b8
74
75#define ATOMISP_PCI_REV_MRFLD_A0_MAX 0
76#define ATOMISP_PCI_REV_BYT_A0_MAX 4
77
78#define ATOMISP_MAJOR 0
79#define ATOMISP_MINOR 5
80#define ATOMISP_PATCHLEVEL 1
81
82#define DRIVER_VERSION_STR __stringify(ATOMISP_MAJOR) \
83 "." __stringify(ATOMISP_MINOR) "." __stringify(ATOMISP_PATCHLEVEL)
84#define DRIVER_VERSION KERNEL_VERSION(ATOMISP_MAJOR, \
85 ATOMISP_MINOR, ATOMISP_PATCHLEVEL)
86
87#define ATOM_ISP_STEP_WIDTH 2
88#define ATOM_ISP_STEP_HEIGHT 2
89
90#define ATOM_ISP_MIN_WIDTH 4
91#define ATOM_ISP_MIN_HEIGHT 4
92#define ATOM_ISP_MAX_WIDTH UINT_MAX
93#define ATOM_ISP_MAX_HEIGHT UINT_MAX
94
95/* sub-QCIF resolution */
96#define ATOM_RESOLUTION_SUBQCIF_WIDTH 128
97#define ATOM_RESOLUTION_SUBQCIF_HEIGHT 96
98
99#define ATOM_ISP_MAX_WIDTH_TMP 1280
100#define ATOM_ISP_MAX_HEIGHT_TMP 720
101
102#define ATOM_ISP_I2C_BUS_1 4
103#define ATOM_ISP_I2C_BUS_2 5
104
105#define ATOM_ISP_POWER_DOWN 0
106#define ATOM_ISP_POWER_UP 1
107
108#define ATOM_ISP_MAX_INPUTS 4
109
110#define ATOMISP_SC_TYPE_SIZE 2
111
112#define ATOMISP_ISP_TIMEOUT_DURATION (2 * HZ)
113#define ATOMISP_EXT_ISP_TIMEOUT_DURATION (6 * HZ)
114#define ATOMISP_ISP_FILE_TIMEOUT_DURATION (60 * HZ)
115#define ATOMISP_WDT_KEEP_CURRENT_DELAY 0
116#define ATOMISP_ISP_MAX_TIMEOUT_COUNT 2
117#define ATOMISP_CSS_STOP_TIMEOUT_US 200000
118
119#define ATOMISP_CSS_Q_DEPTH 3
120#define ATOMISP_CSS_EVENTS_MAX 16
121#define ATOMISP_CONT_RAW_FRAMES 15
122#define ATOMISP_METADATA_QUEUE_DEPTH_FOR_HAL 8
123#define ATOMISP_S3A_BUF_QUEUE_DEPTH_FOR_HAL 8
124
125#define ATOMISP_DELAYED_INIT_NOT_QUEUED 0
126#define ATOMISP_DELAYED_INIT_QUEUED 1
127#define ATOMISP_DELAYED_INIT_DONE 2
128
129#define ATOMISP_CALC_CSS_PREV_OVERLAP(lines) \
130 ((lines) * 38 / 100 & 0xfffffe)
131
132/*
133 * Define how fast CPU should be able to serve ISP interrupts.
134 * The bigger the value, the higher risk that the ISP is not
135 * triggered sufficiently fast for it to process image during
136 * vertical blanking time, increasing risk of dropped frames.
137 * 1000 us is a reasonable value considering that the processing
138 * time is typically ~2000 us.
139 */
140#define ATOMISP_MAX_ISR_LATENCY 1000
141
142/* Add new YUVPP pipe for SOC sensor. */
143#define ATOMISP_CSS_SUPPORT_YUVPP 1
144
145#define ATOMISP_CSS_OUTPUT_SECOND_INDEX 1
146#define ATOMISP_CSS_OUTPUT_DEFAULT_INDEX 0
147
148/*
149 * ATOMISP_SOC_CAMERA
150 * This is to differentiate between ext-isp and soc camera in
151 * Moorefield/Baytrail platform.
152 */
153#define ATOMISP_SOC_CAMERA(asd) \
154 (asd->isp->inputs[asd->input_curr].type == SOC_CAMERA \
155 && asd->isp->inputs[asd->input_curr].camera_caps-> \
156 sensor[asd->sensor_curr].stream_num == 1)
157
158#define ATOMISP_USE_YUVPP(asd) \
159 (ATOMISP_SOC_CAMERA(asd) && ATOMISP_CSS_SUPPORT_YUVPP && \
160 !asd->copy_mode)
161
162#define ATOMISP_DEPTH_SENSOR_STREAMON_COUNT 2
163
164#define ATOMISP_DEPTH_DEFAULT_MASTER_SENSOR 0
165#define ATOMISP_DEPTH_DEFAULT_SLAVE_SENSOR 1
166
167#ifdef ISP2401
168#define ATOMISP_ION_DEVICE_FD_OFFSET 16
169#define ATOMISP_ION_SHARED_FD_MASK (0xFFFF)
170#define ATOMISP_ION_DEVICE_FD_MASK (~ATOMISP_ION_SHARED_FD_MASK)
171#define ION_FD_UNSET (-1)
172
173#endif
174#define DIV_NEAREST_STEP(n, d, step) \
175 round_down((2 * (n) + (d) * (step))/(2 * (d)), (step))
176
177struct atomisp_input_subdev {
178 unsigned int type;
179 enum atomisp_camera_port port;
180 struct v4l2_subdev *camera;
181 struct v4l2_subdev *motor;
182 struct v4l2_frmsizeenum frame_size;
183
184 /*
185 * To show this resource is used by
186 * which stream, in ISP multiple stream mode
187 */
188 struct atomisp_sub_device *asd;
189
190 const struct atomisp_camera_caps *camera_caps;
191 int sensor_index;
192};
193
194enum atomisp_dfs_mode {
195 ATOMISP_DFS_MODE_AUTO = 0,
196 ATOMISP_DFS_MODE_LOW,
197 ATOMISP_DFS_MODE_MAX,
198};
199
200struct atomisp_regs {
201 /* PCI config space info */
202 u16 pcicmdsts;
203 u32 ispmmadr;
204 u32 msicap;
205 u32 msi_addr;
206 u16 msi_data;
207 u8 intr;
208 u32 interrupt_control;
209 u32 pmcs;
210 u32 cg_dis;
211 u32 i_control;
212
213 /* I-Unit PHY related info */
214 u32 csi_rcomp_config;
215 u32 csi_afe_dly;
216 u32 csi_control;
217
218 /* New for MRFLD */
219 u32 csi_afe_rcomp_config;
220 u32 csi_afe_hs_control;
221 u32 csi_deadline_control;
222 u32 csi_access_viol;
223};
224
225struct atomisp_sw_contex {
226 bool file_input;
227 int power_state;
228 int running_freq;
229};
230
231
232#define ATOMISP_DEVICE_STREAMING_DISABLED 0
233#define ATOMISP_DEVICE_STREAMING_ENABLED 1
234#define ATOMISP_DEVICE_STREAMING_STOPPING 2
235
236/*
237 * ci device struct
238 */
239struct atomisp_device {
240 struct pci_dev *pdev;
241 struct device *dev;
242 struct v4l2_device v4l2_dev;
243 struct media_device media_dev;
244 struct atomisp_platform_data *pdata;
245 void *mmu_l1_base;
246 struct pci_dev *pci_root;
247 const struct firmware *firmware;
248
249 struct pm_qos_request pm_qos;
250 s32 max_isr_latency;
251
252 /*
253 * ISP modules
254 * Multiple streams are represents by multiple
255 * atomisp_sub_device instances
256 */
257 struct atomisp_sub_device *asd;
258 /*
259 * this will be assiged dyanamically.
260 * For Merr/BTY(ISP2400), 2 streams are supported.
261 */
262 unsigned int num_of_streams;
263
264 struct atomisp_mipi_csi2_device csi2_port[ATOMISP_CAMERA_NR_PORTS];
265 struct atomisp_tpg_device tpg;
266 struct atomisp_file_device file_dev;
267
268 /* Purpose of mutex is to protect and serialize use of isp data
269 * structures and css API calls. */
270 struct rt_mutex mutex;
271 /*
272 * Serialise streamoff: mutex is dropped during streamoff to
273 * cancel the watchdog queue. MUST be acquired BEFORE
274 * "mutex".
275 */
276 struct mutex streamoff_mutex;
277
7b065c55 278 unsigned int input_cnt;
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279 struct atomisp_input_subdev inputs[ATOM_ISP_MAX_INPUTS];
280 struct v4l2_subdev *flash;
281 struct v4l2_subdev *motor;
282
283 struct atomisp_regs saved_regs;
284 struct atomisp_sw_contex sw_contex;
285 struct atomisp_css_env css_env;
286
287 /* isp timeout status flag */
288 bool isp_timeout;
289 bool isp_fatal_error;
290 struct workqueue_struct *wdt_work_queue;
291 struct work_struct wdt_work;
292#ifndef ISP2401
293 atomic_t wdt_count;
294#endif
295 atomic_t wdt_work_queued;
296
297 spinlock_t lock; /* Just for streaming below */
298
299 bool need_gfx_throttle;
300
301 unsigned int mipi_frame_size;
302 const struct atomisp_dfs_config *dfs;
303 unsigned int hpll_freq;
304
305 bool css_initialized;
306};
307
308#define v4l2_dev_to_atomisp_device(dev) \
309 container_of(dev, struct atomisp_device, v4l2_dev)
310
311extern struct device *atomisp_dev;
312
313extern void *atomisp_kernel_malloc(size_t bytes);
314
315extern void atomisp_kernel_free(void *ptr);
316
317#define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt)
318#ifdef ISP2401
319extern void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe,
320 unsigned int delay);
321#endif
322extern void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay);
323#ifndef ISP2401
324extern void atomisp_wdt_start(struct atomisp_sub_device *asd);
325#else
326extern void atomisp_wdt_start(struct atomisp_video_pipe *pipe);
327extern void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync);
328#endif
329extern void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync);
330
331#endif /* __ATOMISP_INTERNAL_H__ */