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[mirror_ubuntu-hirsute-kernel.git] / drivers / staging / media / atomisp / pci / atomisp2 / css2400 / css_2401_csi2p_system / spmem_dump.c
CommitLineData
a49d2536
AC		 1/*
2 * Support for Intel Camera Imaging ISP subsystem.
3 * Copyright (c) 2015, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#ifndef _sp_map_h_
16#define _sp_map_h_
17
18
19#ifndef _hrt_dummy_use_blob_sp
20#define _hrt_dummy_use_blob_sp()
21#endif
22
23#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp)
24
25#ifndef ISP2401
26/* function longjmp: 680D */
27#else
28/* function longjmp: 6A0B */
29#endif
30
31#ifndef ISP2401
32/* function tmpmem_init_dmem: 6558 */
33#else
34/* function tmpmem_init_dmem: 671E */
35#endif
36
37#ifndef ISP2401
38/* function ia_css_dmaproxy_sp_set_addr_B: 3C50 */
39#else
40/* function ia_css_dmaproxy_sp_set_addr_B: 3DC5 */
41
42/* function ia_css_pipe_data_init_tagger_resources: AC7 */
43#endif
44
45/* function debug_buffer_set_ddr_addr: DD */
46
47#ifndef HIVE_MULTIPLE_PROGRAMS
48#ifndef HIVE_MEM_vbuf_mipi
49#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem
50#ifndef ISP2401
51#define HIVE_ADDR_vbuf_mipi 0x7398
52#else
53#define HIVE_ADDR_vbuf_mipi 0x7444
54#endif
55#define HIVE_SIZE_vbuf_mipi 12
56#else
57#endif
58#endif
59#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem
60#ifndef ISP2401
61#define HIVE_ADDR_sp_vbuf_mipi 0x7398
62#else
63#define HIVE_ADDR_sp_vbuf_mipi 0x7444
64#endif
65#define HIVE_SIZE_sp_vbuf_mipi 12
66
67#ifndef ISP2401
68/* function ia_css_event_sp_decode: 3E41 */
69#else
70/* function ia_css_event_sp_decode: 3FB6 */
71#endif
72
73#ifndef ISP2401
74/* function ia_css_queue_get_size: 51BF */
75#else
76/* function ia_css_queue_get_size: 53C8 */
77#endif
78
79#ifndef ISP2401
80/* function ia_css_queue_load: 5800 */
81#else
82/* function ia_css_queue_load: 59DF */
83#endif
84
85#ifndef ISP2401
86/* function setjmp: 6816 */
87#else
88/* function setjmp: 6A14 */
89#endif
90
91#ifndef ISP2401
92/* function ia_css_pipeline_sp_sfi_get_current_frame: 27BF */
93#else
94/* function ia_css_pipeline_sp_sfi_get_current_frame: 2790 */
95#endif
96
97#ifndef HIVE_MULTIPLE_PROGRAMS
98#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue
99#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem
100#ifndef ISP2401
101#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x5760
102#else
103#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x57FC
104#endif
105#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20
106#else
107#endif
108#endif
109#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem
110#ifndef ISP2401
111#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x5760
112#else
113#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x57FC
114#endif
115#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20
116
117#ifndef ISP2401
118/* function ia_css_dmaproxy_sp_wait_for_ack: 6DA9 */
119#else
120/* function ia_css_dmaproxy_sp_wait_for_ack: 6FF7 */
121#endif
122
123#ifndef ISP2401
124/* function ia_css_sp_rawcopy_func: 596B */
125#else
126/* function ia_css_sp_rawcopy_func: 5B4A */
127#endif
128
129#ifndef ISP2401
130/* function ia_css_tagger_buf_sp_pop_marked: 3339 */
131#else
132/* function ia_css_tagger_buf_sp_pop_marked: 345C */
133#endif
134
135#ifndef HIVE_MULTIPLE_PROGRAMS
136#ifndef HIVE_MEM_N_CSI_RX_BE_SID_WIDTH
137#define HIVE_MEM_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem
138#define HIVE_ADDR_N_CSI_RX_BE_SID_WIDTH 0x1D0
139#define HIVE_SIZE_N_CSI_RX_BE_SID_WIDTH 12
140#else
141#endif
142#endif
143#define HIVE_MEM_sp_N_CSI_RX_BE_SID_WIDTH scalar_processor_2400_dmem
144#define HIVE_ADDR_sp_N_CSI_RX_BE_SID_WIDTH 0x1D0
145#define HIVE_SIZE_sp_N_CSI_RX_BE_SID_WIDTH 12
146
147#ifndef HIVE_MULTIPLE_PROGRAMS
148#ifndef HIVE_MEM_isp_stage
149#define HIVE_MEM_isp_stage scalar_processor_2400_dmem
150#ifndef ISP2401
151#define HIVE_ADDR_isp_stage 0x6C98
152#else
153#define HIVE_ADDR_isp_stage 0x6D48
154#endif
155#define HIVE_SIZE_isp_stage 832
156#else
157#endif
158#endif
159#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem
160#ifndef ISP2401
161#define HIVE_ADDR_sp_isp_stage 0x6C98
162#else
163#define HIVE_ADDR_sp_isp_stage 0x6D48
164#endif
165#define HIVE_SIZE_sp_isp_stage 832
166
167#ifndef HIVE_MULTIPLE_PROGRAMS
168#ifndef HIVE_MEM_vbuf_raw
169#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem
170#ifndef ISP2401
171#define HIVE_ADDR_vbuf_raw 0x37C
172#else
173#define HIVE_ADDR_vbuf_raw 0x394
174#endif
175#define HIVE_SIZE_vbuf_raw 4
176#else
177#endif
178#endif
179#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem
180#ifndef ISP2401
181#define HIVE_ADDR_sp_vbuf_raw 0x37C
182#else
183#define HIVE_ADDR_sp_vbuf_raw 0x394
184#endif
185#define HIVE_SIZE_sp_vbuf_raw 4
186
187#ifndef ISP2401
188/* function ia_css_sp_bin_copy_func: 594C */
189#else
190/* function ia_css_sp_bin_copy_func: 5B2B */
191#endif
192
193#ifndef ISP2401
194/* function ia_css_queue_item_store: 554E */
195#else
196/* function ia_css_queue_item_store: 572D */
197#endif
198
199#ifndef ISP2401
200/* function input_system_reset: 1286 */
201#else
202/* function input_system_reset: 1201 */
203#endif
204
205#ifndef HIVE_MULTIPLE_PROGRAMS
206#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs
207#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem
208#ifndef ISP2401
209#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5B38
210#else
211#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4
212#endif
213#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20
214#else
215#endif
216#endif
217#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem
218#ifndef ISP2401
219#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5B38
220#else
221#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x5BE4
222#endif
223#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20
224
225#ifndef HIVE_MULTIPLE_PROGRAMS
226#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs
227#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem
228#ifndef ISP2401
229#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5B4C
230#else
231#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8
232#endif
233#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160
234#else
235#endif
236#endif
237#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem
238#ifndef ISP2401
239#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5B4C
240#else
241#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x5BF8
242#endif
243#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160
244
245/* function sp_start_isp: 39C */
246
247#ifndef HIVE_MULTIPLE_PROGRAMS
248#ifndef HIVE_MEM_sp_binary_group
249#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem
250#ifndef ISP2401
251#define HIVE_ADDR_sp_binary_group 0x7088
252#else
253#define HIVE_ADDR_sp_binary_group 0x7138
254#endif
255#define HIVE_SIZE_sp_binary_group 32
256#else
257#endif
258#endif
259#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem
260#ifndef ISP2401
261#define HIVE_ADDR_sp_sp_binary_group 0x7088
262#else
263#define HIVE_ADDR_sp_sp_binary_group 0x7138
264#endif
265#define HIVE_SIZE_sp_sp_binary_group 32
266
267#ifndef HIVE_MULTIPLE_PROGRAMS
268#ifndef HIVE_MEM_sp_sw_state
269#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem
270#ifndef ISP2401
271#define HIVE_ADDR_sp_sw_state 0x7344
272#else
273#define HIVE_ADDR_sp_sw_state 0x73F0
274#endif
275#define HIVE_SIZE_sp_sw_state 4
276#else
277#endif
278#endif
279#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem
280#ifndef ISP2401
281#define HIVE_ADDR_sp_sp_sw_state 0x7344
282#else
283#define HIVE_ADDR_sp_sp_sw_state 0x73F0
284#endif
285#define HIVE_SIZE_sp_sp_sw_state 4
286
287#ifndef ISP2401
288/* function ia_css_thread_sp_main: 13F7 */
289#else
290/* function ia_css_thread_sp_main: 136D */
291#endif
292
293#ifndef ISP2401
294/* function ia_css_ispctrl_sp_init_internal_buffers: 4047 */
295#else
296/* function ia_css_ispctrl_sp_init_internal_buffers: 41F7 */
297#endif
298
299#ifndef HIVE_MULTIPLE_PROGRAMS
300#ifndef HIVE_MEM_sp2host_psys_event_queue_handle
301#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem
302#ifndef ISP2401
303#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5BEC
304#else
305#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x5C98
306#endif
307#define HIVE_SIZE_sp2host_psys_event_queue_handle 12
308#else
309#endif
310#endif
311#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem
312#ifndef ISP2401
313#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5BEC
314#else
315#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x5C98
316#endif
317#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12
318
319#ifndef ISP2401
320/* function pixelgen_unit_test: E68 */
321#else
322/* function pixelgen_unit_test: E62 */
323#endif
324
325#ifndef HIVE_MULTIPLE_PROGRAMS
326#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue
327#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem
328#ifndef ISP2401
329#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5774
330#else
331#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x5810
332#endif
333#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20
334#else
335#endif
336#endif
337#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem
338#ifndef ISP2401
339#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5774
340#else
341#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x5810
342#endif
343#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20
344
345#ifndef ISP2401
346/* function ia_css_tagger_sp_propagate_frame: 2D52 */
347
348#ifndef HIVE_MULTIPLE_PROGRAMS
349#ifndef HIVE_MEM_sp_stop_copy_preview
350#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem
351#define HIVE_ADDR_sp_stop_copy_preview 0x7328
352#define HIVE_SIZE_sp_stop_copy_preview 4
353#else
354#endif
355#endif
356#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem
357#define HIVE_ADDR_sp_sp_stop_copy_preview 0x7328
358#define HIVE_SIZE_sp_sp_stop_copy_preview 4
359#else
360/* function ia_css_tagger_sp_propagate_frame: 2D23 */
361#endif
362
363#ifndef HIVE_MULTIPLE_PROGRAMS
364#ifndef HIVE_MEM_vbuf_handles
365#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem
366#ifndef ISP2401
367#define HIVE_ADDR_vbuf_handles 0x73A4
368#else
369#define HIVE_ADDR_vbuf_handles 0x7450
370#endif
371#define HIVE_SIZE_vbuf_handles 960
372#else
373#endif
374#endif
375#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem
376#ifndef ISP2401
377#define HIVE_ADDR_sp_vbuf_handles 0x73A4
378#else
379#define HIVE_ADDR_sp_vbuf_handles 0x7450
380#endif
381#define HIVE_SIZE_sp_vbuf_handles 960
382
383#ifndef ISP2401
384/* function ia_css_queue_store: 56B4 */
385
386/* function ia_css_sp_flash_register: 356E */
387#else
388/* function ia_css_queue_store: 5893 */
389#endif
390
391#ifndef ISP2401
392/* function ia_css_sp_rawcopy_dummy_function: 5CF7 */
393#else
394/* function ia_css_sp_flash_register: 3691 */
395#endif
396
397#ifndef ISP2401
398/* function ia_css_pipeline_sp_init: 201C */
399#else
400/* function ia_css_pipeline_sp_init: 1FD7 */
401#endif
402
403#ifndef ISP2401
404/* function ia_css_tagger_sp_configure: 2C42 */
405#else
406/* function ia_css_tagger_sp_configure: 2C13 */
407#endif
408
409#ifndef ISP2401
410/* function ia_css_ispctrl_sp_end_binary: 3E8A */
411#else
412/* function ia_css_ispctrl_sp_end_binary: 3FFF */
413#endif
414
415#ifndef HIVE_MULTIPLE_PROGRAMS
416#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs
417#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem
418#ifndef ISP2401
419#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5BF8
420#else
421#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4
422#endif
423#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20
424#else
425#endif
426#endif
427#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem
428#ifndef ISP2401
429#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5BF8
430#else
431#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x5CA4
432#endif
433#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20
434
435#ifndef ISP2401
436/* function pixelgen_tpg_run: F1E */
437#else
438/* function pixelgen_tpg_run: F18 */
439#endif
440
441#ifndef HIVE_MULTIPLE_PROGRAMS
442#ifndef HIVE_MEM_event_is_pending_mask
443#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem
444#define HIVE_ADDR_event_is_pending_mask 0x5C
445#define HIVE_SIZE_event_is_pending_mask 44
446#else
447#endif
448#endif
449#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem
450#define HIVE_ADDR_sp_event_is_pending_mask 0x5C
451#define HIVE_SIZE_sp_event_is_pending_mask 44
452
453#ifndef HIVE_MULTIPLE_PROGRAMS
454#ifndef HIVE_MEM_sp_all_cb_elems_frame
455#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem
456#ifndef ISP2401
457#define HIVE_ADDR_sp_all_cb_elems_frame 0x5788
458#else
459#define HIVE_ADDR_sp_all_cb_elems_frame 0x5824
460#endif
461#define HIVE_SIZE_sp_all_cb_elems_frame 16
462#else
463#endif
464#endif
465#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem
466#ifndef ISP2401
467#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5788
468#else
469#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x5824
470#endif
471#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16
472
473#ifndef HIVE_MULTIPLE_PROGRAMS
474#ifndef HIVE_MEM_sp2host_isys_event_queue_handle
475#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem
476#ifndef ISP2401
477#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5C0C
478#else
479#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x5CB8
480#endif
481#define HIVE_SIZE_sp2host_isys_event_queue_handle 12
482#else
483#endif
484#endif
485#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem
486#ifndef ISP2401
487#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5C0C
488#else
489#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x5CB8
490#endif
491#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12
492
493#ifndef HIVE_MULTIPLE_PROGRAMS
494#ifndef HIVE_MEM_host_sp_com
495#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem
496#ifndef ISP2401
497#define HIVE_ADDR_host_sp_com 0x3E48
498#else
499#define HIVE_ADDR_host_sp_com 0x3E6C
500#endif
501#define HIVE_SIZE_host_sp_com 220
502#else
503#endif
504#endif
505#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem
506#ifndef ISP2401
507#define HIVE_ADDR_sp_host_sp_com 0x3E48
508#else
509#define HIVE_ADDR_sp_host_sp_com 0x3E6C
510#endif
511#define HIVE_SIZE_sp_host_sp_com 220
512
513#ifndef ISP2401
514/* function ia_css_queue_get_free_space: 5313 */
515#else
516/* function ia_css_queue_get_free_space: 54F2 */
517#endif
518
519#ifndef ISP2401
520/* function exec_image_pipe: 5E6 */
521#else
522/* function exec_image_pipe: 57A */
523#endif
524
525#ifndef HIVE_MULTIPLE_PROGRAMS
526#ifndef HIVE_MEM_sp_init_dmem_data
527#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem
528#ifndef ISP2401
529#define HIVE_ADDR_sp_init_dmem_data 0x7348
530#else
531#define HIVE_ADDR_sp_init_dmem_data 0x73F4
532#endif
533#define HIVE_SIZE_sp_init_dmem_data 24
534#else
535#endif
536#endif
537#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem
538#ifndef ISP2401
539#define HIVE_ADDR_sp_sp_init_dmem_data 0x7348
540#else
541#define HIVE_ADDR_sp_sp_init_dmem_data 0x73F4
542#endif
543#define HIVE_SIZE_sp_sp_init_dmem_data 24
544
545#ifndef ISP2401
546/* function ia_css_sp_metadata_start: 5DD1 */
547#else
548/* function ia_css_sp_metadata_start: 5EB3 */
549#endif
550
551#ifndef ISP2401
552/* function ia_css_bufq_sp_init_buffer_queues: 35BF */
553#else
554/* function ia_css_bufq_sp_init_buffer_queues: 36E2 */
555#endif
556
557#ifndef ISP2401
558/* function ia_css_pipeline_sp_stop: 1FFF */
559#else
560/* function ia_css_pipeline_sp_stop: 1FBA */
561#endif
562
563#ifndef ISP2401
564/* function ia_css_tagger_sp_connect_pipes: 312C */
565#else
566/* function ia_css_tagger_sp_connect_pipes: 30FD */
567#endif
568
569#ifndef ISP2401
570/* function sp_isys_copy_wait: 644 */
571#else
572/* function sp_isys_copy_wait: 5D8 */
573#endif
574
575/* function is_isp_debug_buffer_full: 337 */
576
577#ifndef ISP2401
578/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3BD3 */
579#else
580/* function ia_css_dmaproxy_sp_configure_channel_from_info: 3D35 */
581#endif
582
583#ifndef ISP2401
584/* function encode_and_post_timer_event: AA8 */
585#else
586/* function encode_and_post_timer_event: A3C */
587#endif
588
589#ifndef HIVE_MULTIPLE_PROGRAMS
590#ifndef HIVE_MEM_input_system_bz2788_active
591#define HIVE_MEM_input_system_bz2788_active scalar_processor_2400_dmem
592#ifndef ISP2401
593#define HIVE_ADDR_input_system_bz2788_active 0x250C
594#else
595#define HIVE_ADDR_input_system_bz2788_active 0x2524
596#endif
597#define HIVE_SIZE_input_system_bz2788_active 4
598#else
599#endif
600#endif
601#define HIVE_MEM_sp_input_system_bz2788_active scalar_processor_2400_dmem
602#ifndef ISP2401
603#define HIVE_ADDR_sp_input_system_bz2788_active 0x250C
604#else
605#define HIVE_ADDR_sp_input_system_bz2788_active 0x2524
606#endif
607#define HIVE_SIZE_sp_input_system_bz2788_active 4
608
609#ifndef HIVE_MULTIPLE_PROGRAMS
610#ifndef HIVE_MEM_N_IBUF_CTRL_PROCS
611#define HIVE_MEM_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem
612#define HIVE_ADDR_N_IBUF_CTRL_PROCS 0x1FC
613#define HIVE_SIZE_N_IBUF_CTRL_PROCS 12
614#else
615#endif
616#endif
617#define HIVE_MEM_sp_N_IBUF_CTRL_PROCS scalar_processor_2400_dmem
618#define HIVE_ADDR_sp_N_IBUF_CTRL_PROCS 0x1FC
619#define HIVE_SIZE_sp_N_IBUF_CTRL_PROCS 12
620
621#ifndef HIVE_MULTIPLE_PROGRAMS
622#ifndef HIVE_MEM_sp_per_frame_data
623#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem
624#ifndef ISP2401
625#define HIVE_ADDR_sp_per_frame_data 0x3F24
626#else
627#define HIVE_ADDR_sp_per_frame_data 0x3F48
628#endif
629#define HIVE_SIZE_sp_per_frame_data 4
630#else
631#endif
632#endif
633#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem
634#ifndef ISP2401
635#define HIVE_ADDR_sp_sp_per_frame_data 0x3F24
636#else
637#define HIVE_ADDR_sp_sp_per_frame_data 0x3F48
638#endif
639#define HIVE_SIZE_sp_sp_per_frame_data 4
640
641#ifndef ISP2401
642/* function ia_css_rmgr_sp_vbuf_dequeue: 62AC */
643#else
644/* function ia_css_rmgr_sp_vbuf_dequeue: 6472 */
645#endif
646
647#ifndef HIVE_MULTIPLE_PROGRAMS
648#ifndef HIVE_MEM_host2sp_psys_event_queue_handle
649#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem
650#ifndef ISP2401
651#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5C18
652#else
653#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x5CC4
654#endif
655#define HIVE_SIZE_host2sp_psys_event_queue_handle 12
656#else
657#endif
658#endif
659#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem
660#ifndef ISP2401
661#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5C18
662#else
663#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x5CC4
664#endif
665#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12
666
667#ifndef HIVE_MULTIPLE_PROGRAMS
668#ifndef HIVE_MEM_xmem_bin_addr
669#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem
670#ifndef ISP2401
671#define HIVE_ADDR_xmem_bin_addr 0x3F28
672#else
673#define HIVE_ADDR_xmem_bin_addr 0x3F4C
674#endif
675#define HIVE_SIZE_xmem_bin_addr 4
676#else
677#endif
678#endif
679#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem
680#ifndef ISP2401
681#define HIVE_ADDR_sp_xmem_bin_addr 0x3F28
682#else
683#define HIVE_ADDR_sp_xmem_bin_addr 0x3F4C
684#endif
685#define HIVE_SIZE_sp_xmem_bin_addr 4
686
687#ifndef ISP2401
688/* function tmr_clock_init: 16F9 */
689#else
690/* function tmr_clock_init: 166F */
691#endif
692
693#ifndef ISP2401
694/* function ia_css_pipeline_sp_run: 1ABF */
695#else
696/* function ia_css_pipeline_sp_run: 1A61 */
697#endif
698
699#ifndef ISP2401
700/* function memcpy: 68B6 */
701#else
702/* function memcpy: 6AB4 */
703#endif
704
705#ifndef HIVE_MULTIPLE_PROGRAMS
706#ifndef HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS
707#define HIVE_MEM_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem
708#define HIVE_ADDR_N_ISYS2401_DMA_CHANNEL_PROCS 0x214
709#define HIVE_SIZE_N_ISYS2401_DMA_CHANNEL_PROCS 4
710#else
711#endif
712#endif
713#define HIVE_MEM_sp_N_ISYS2401_DMA_CHANNEL_PROCS scalar_processor_2400_dmem
714#define HIVE_ADDR_sp_N_ISYS2401_DMA_CHANNEL_PROCS 0x214
715#define HIVE_SIZE_sp_N_ISYS2401_DMA_CHANNEL_PROCS 4
716
717#ifndef HIVE_MULTIPLE_PROGRAMS
718#ifndef HIVE_MEM_GP_DEVICE_BASE
719#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem
720#ifndef ISP2401
721#define HIVE_ADDR_GP_DEVICE_BASE 0x384
722#else
723#define HIVE_ADDR_GP_DEVICE_BASE 0x39C
724#endif
725#define HIVE_SIZE_GP_DEVICE_BASE 4
726#else
727#endif
728#endif
729#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem
730#ifndef ISP2401
731#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x384
732#else
733#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x39C
734#endif
735#define HIVE_SIZE_sp_GP_DEVICE_BASE 4
736
737#ifndef HIVE_MULTIPLE_PROGRAMS
738#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue
739#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem
740#ifndef ISP2401
741#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x278
742#else
743#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x27C
744#endif
745#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12
746#else
747#endif
748#endif
749#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem
750#ifndef ISP2401
751#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x278
752#else
753#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x27C
754#endif
755#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12
756
757#ifndef ISP2401
758/* function stream2mmio_send_command: E0A */
759#else
760/* function stream2mmio_send_command: E04 */
761#endif
762
763#ifndef ISP2401
764/* function ia_css_uds_sp_scale_params: 65BF */
765#else
766/* function ia_css_uds_sp_scale_params: 67BD */
767#endif
768
769#ifndef ISP2401
770/* function ia_css_circbuf_increase_size: 14DC */
771#else
772/* function ia_css_circbuf_increase_size: 1452 */
773#endif
774
775#ifndef ISP2401
776/* function __divu: 6834 */
777#else
778/* function __divu: 6A32 */
779#endif
780
781#ifndef ISP2401
782/* function ia_css_thread_sp_get_state: 131F */
783#else
784/* function ia_css_thread_sp_get_state: 1295 */
785#endif
786
787#ifndef HIVE_MULTIPLE_PROGRAMS
788#ifndef HIVE_MEM_sem_for_cont_capt_stop
789#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem
790#ifndef ISP2401
791#define HIVE_ADDR_sem_for_cont_capt_stop 0x5798
792#else
793#define HIVE_ADDR_sem_for_cont_capt_stop 0x5834
794#endif
795#define HIVE_SIZE_sem_for_cont_capt_stop 20
796#else
797#endif
798#endif
799#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem
800#ifndef ISP2401
801#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5798
802#else
803#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x5834
804#endif
805#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20
806
807#ifndef HIVE_MULTIPLE_PROGRAMS
808#ifndef HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES
809#define HIVE_MEM_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem
810#define HIVE_ADDR_N_SHORT_PACKET_LUT_ENTRIES 0x1AC
811#define HIVE_SIZE_N_SHORT_PACKET_LUT_ENTRIES 12
812#else
813#endif
814#endif
815#define HIVE_MEM_sp_N_SHORT_PACKET_LUT_ENTRIES scalar_processor_2400_dmem
816#define HIVE_ADDR_sp_N_SHORT_PACKET_LUT_ENTRIES 0x1AC
817#define HIVE_SIZE_sp_N_SHORT_PACKET_LUT_ENTRIES 12
818
819#ifndef ISP2401
820/* function thread_fiber_sp_main: 14D5 */
821#else
822/* function thread_fiber_sp_main: 144B */
823#endif
824
825#ifndef HIVE_MULTIPLE_PROGRAMS
826#ifndef HIVE_MEM_sp_isp_pipe_thread
827#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem
828#ifndef ISP2401
829#define HIVE_ADDR_sp_isp_pipe_thread 0x58DC
830#define HIVE_SIZE_sp_isp_pipe_thread 340
831#else
832#define HIVE_ADDR_sp_isp_pipe_thread 0x5978
833#define HIVE_SIZE_sp_isp_pipe_thread 360
834#endif
835#else
836#endif
837#endif
838#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem
839#ifndef ISP2401
840#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x58DC
841#define HIVE_SIZE_sp_sp_isp_pipe_thread 340
842#else
843#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x5978
844#define HIVE_SIZE_sp_sp_isp_pipe_thread 360
845#endif
846
847#ifndef ISP2401
848/* function ia_css_parambuf_sp_handle_parameter_sets: 193F */
849#else
850/* function ia_css_parambuf_sp_handle_parameter_sets: 18B5 */
851#endif
852
853#ifndef ISP2401
854/* function ia_css_spctrl_sp_set_state: 5DED */
855#else
856/* function ia_css_spctrl_sp_set_state: 5ECF */
857#endif
858
859#ifndef ISP2401
860/* function ia_css_thread_sem_sp_signal: 6A99 */
861#else
862/* function ia_css_thread_sem_sp_signal: 6D18 */
863#endif
864
865#ifndef HIVE_MULTIPLE_PROGRAMS
866#ifndef HIVE_MEM_IRQ_BASE
867#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem
868#define HIVE_ADDR_IRQ_BASE 0x2C
869#define HIVE_SIZE_IRQ_BASE 16
870#else
871#endif
872#endif
873#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem
874#define HIVE_ADDR_sp_IRQ_BASE 0x2C
875#define HIVE_SIZE_sp_IRQ_BASE 16
876
877#ifndef ISP2401
878/* function ia_css_virtual_isys_sp_isr_init: 5E8C */
879#else
880/* function ia_css_virtual_isys_sp_isr_init: 5F70 */
881#endif
882
883#ifndef HIVE_MULTIPLE_PROGRAMS
884#ifndef HIVE_MEM_TIMED_CTRL_BASE
885#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem
886#define HIVE_ADDR_TIMED_CTRL_BASE 0x40
887#define HIVE_SIZE_TIMED_CTRL_BASE 4
888#else
889#endif
890#endif
891#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem
892#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40
893#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4
894
895#ifndef ISP2401
896/* function ia_css_isys_sp_generate_exp_id: 613C */
897
898/* function ia_css_rmgr_sp_init: 61A7 */
899#else
900/* function ia_css_isys_sp_generate_exp_id: 6302 */
901#endif
902
903#ifndef ISP2401
904/* function ia_css_thread_sem_sp_init: 6B6A */
905#else
906/* function ia_css_rmgr_sp_init: 636D */
907#endif
908
909#ifndef ISP2401
910#ifndef HIVE_MULTIPLE_PROGRAMS
911#ifndef HIVE_MEM_is_isp_requested
912#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem
913#define HIVE_ADDR_is_isp_requested 0x390
914#define HIVE_SIZE_is_isp_requested 4
915#else
916#endif
917#endif
918#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem
919#define HIVE_ADDR_sp_is_isp_requested 0x390
920#define HIVE_SIZE_sp_is_isp_requested 4
921#else
922/* function ia_css_thread_sem_sp_init: 6DE7 */
923#endif
924
925#ifndef HIVE_MULTIPLE_PROGRAMS
926#ifndef HIVE_MEM_sem_for_reading_cb_frame
927#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem
928#ifndef ISP2401
929#define HIVE_ADDR_sem_for_reading_cb_frame 0x57AC
930#else
931#define HIVE_ADDR_sem_for_reading_cb_frame 0x5848
932#endif
933#define HIVE_SIZE_sem_for_reading_cb_frame 40
934#else
935#endif
936#endif
937#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem
938#ifndef ISP2401
939#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x57AC
940#else
941#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x5848
942#endif
943#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40
944
945#ifndef ISP2401
946/* function ia_css_dmaproxy_sp_execute: 3B3B */
947#else
948#ifndef HIVE_MULTIPLE_PROGRAMS
949#ifndef HIVE_MEM_is_isp_requested
950#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem
951#define HIVE_ADDR_is_isp_requested 0x3A8
952#define HIVE_SIZE_is_isp_requested 4
953#else
954#endif
955#endif
956#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem
957#define HIVE_ADDR_sp_is_isp_requested 0x3A8
958#define HIVE_SIZE_sp_is_isp_requested 4
959
960/* function ia_css_dmaproxy_sp_execute: 3C9B */
961#endif
962
963#ifndef ISP2401
964/* function csi_rx_backend_rst: CE6 */
965#else
966/* function csi_rx_backend_rst: CE0 */
967#endif
968
969#ifndef ISP2401
970/* function ia_css_queue_is_empty: 51FA */
971#else
972/* function ia_css_queue_is_empty: 7144 */
973#endif
974
975#ifndef ISP2401
976/* function ia_css_pipeline_sp_has_stopped: 1FF5 */
977#else
978/* function ia_css_pipeline_sp_has_stopped: 1FB0 */
979#endif
980
981#ifndef ISP2401
982/* function ia_css_circbuf_extract: 15E0 */
983#else
984/* function ia_css_circbuf_extract: 1556 */
985#endif
986
987#ifndef ISP2401
988/* function ia_css_tagger_buf_sp_is_locked_from_start: 344F */
989#else
990/* function ia_css_tagger_buf_sp_is_locked_from_start: 3572 */
991#endif
992
993#ifndef HIVE_MULTIPLE_PROGRAMS
994#ifndef HIVE_MEM_current_sp_thread
995#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem
996#define HIVE_ADDR_current_sp_thread 0x274
997#define HIVE_SIZE_current_sp_thread 4
998#else
999#endif
1000#endif
1001#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem
1002#define HIVE_ADDR_sp_current_sp_thread 0x274
1003#define HIVE_SIZE_sp_current_sp_thread 4
1004
1005#ifndef ISP2401
1006/* function ia_css_spctrl_sp_get_spid: 5DF4 */
1007#else
1008/* function ia_css_spctrl_sp_get_spid: 5ED6 */
1009#endif
1010
1011#ifndef ISP2401
1012/* function ia_css_bufq_sp_reset_buffers: 3646 */
1013#else
1014/* function ia_css_bufq_sp_reset_buffers: 3769 */
1015#endif
1016
1017#ifndef ISP2401
1018/* function ia_css_dmaproxy_sp_read_byte_addr: 6DD7 */
1019#else
1020/* function ia_css_dmaproxy_sp_read_byte_addr: 7025 */
1021#endif
1022
1023#ifndef ISP2401
1024/* function ia_css_rmgr_sp_uninit: 61A0 */
1025#else
1026/* function ia_css_rmgr_sp_uninit: 6366 */
1027#endif
1028
1029#ifndef HIVE_MULTIPLE_PROGRAMS
1030#ifndef HIVE_MEM_sp_threads_stack
1031#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem
1032#define HIVE_ADDR_sp_threads_stack 0x164
1033#define HIVE_SIZE_sp_threads_stack 24
1034#else
1035#endif
1036#endif
1037#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem
1038#define HIVE_ADDR_sp_sp_threads_stack 0x164
1039#define HIVE_SIZE_sp_sp_threads_stack 24
1040
1041#ifndef HIVE_MULTIPLE_PROGRAMS
1042#ifndef HIVE_MEM_N_STREAM2MMIO_SID_PROCS
1043#define HIVE_MEM_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem
1044#define HIVE_ADDR_N_STREAM2MMIO_SID_PROCS 0x218
1045#define HIVE_SIZE_N_STREAM2MMIO_SID_PROCS 12
1046#else
1047#endif
1048#endif
1049#define HIVE_MEM_sp_N_STREAM2MMIO_SID_PROCS scalar_processor_2400_dmem
1050#define HIVE_ADDR_sp_N_STREAM2MMIO_SID_PROCS 0x218
1051#define HIVE_SIZE_sp_N_STREAM2MMIO_SID_PROCS 12
1052
1053#ifndef ISP2401
1054/* function ia_css_circbuf_peek: 15C2 */
1055#else
1056/* function ia_css_circbuf_peek: 1538 */
1057#endif
1058
1059#ifndef ISP2401
1060/* function ia_css_parambuf_sp_wait_for_in_param: 1708 */
1061#else
1062/* function ia_css_parambuf_sp_wait_for_in_param: 167E */
1063#endif
1064
1065#ifndef HIVE_MULTIPLE_PROGRAMS
1066#ifndef HIVE_MEM_sp_all_cb_elems_param
1067#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem
1068#ifndef ISP2401
1069#define HIVE_ADDR_sp_all_cb_elems_param 0x57D4
1070#else
1071#define HIVE_ADDR_sp_all_cb_elems_param 0x5870
1072#endif
1073#define HIVE_SIZE_sp_all_cb_elems_param 16
1074#else
1075#endif
1076#endif
1077#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem
1078#ifndef ISP2401
1079#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x57D4
1080#else
1081#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x5870
1082#endif
1083#define HIVE_SIZE_sp_sp_all_cb_elems_param 16
1084
1085#ifndef HIVE_MULTIPLE_PROGRAMS
1086#ifndef HIVE_MEM_pipeline_sp_curr_binary_id
1087#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem
1088#ifndef ISP2401
1089#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x284
1090#else
1091#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x288
1092#endif
1093#define HIVE_SIZE_pipeline_sp_curr_binary_id 4
1094#else
1095#endif
1096#endif
1097#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem
1098#ifndef ISP2401
1099#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x284
1100#else
1101#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x288
1102#endif
1103#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4
1104
1105#ifndef HIVE_MULTIPLE_PROGRAMS
1106#ifndef HIVE_MEM_sp_all_cbs_frame_desc
1107#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem
1108#ifndef ISP2401
1109#define HIVE_ADDR_sp_all_cbs_frame_desc 0x57E4
1110#else
1111#define HIVE_ADDR_sp_all_cbs_frame_desc 0x5880
1112#endif
1113#define HIVE_SIZE_sp_all_cbs_frame_desc 8
1114#else
1115#endif
1116#endif
1117#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem
1118#ifndef ISP2401
1119#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x57E4
1120#else
1121#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x5880
1122#endif
1123#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8
1124
1125#ifndef ISP2401
1126/* function sp_isys_copy_func_v2: 629 */
1127#else
1128/* function sp_isys_copy_func_v2: 5BD */
1129#endif
1130
1131#ifndef HIVE_MULTIPLE_PROGRAMS
1132#ifndef HIVE_MEM_sem_for_reading_cb_param
1133#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem
1134#ifndef ISP2401
1135#define HIVE_ADDR_sem_for_reading_cb_param 0x57EC
1136#else
1137#define HIVE_ADDR_sem_for_reading_cb_param 0x5888
1138#endif
1139#define HIVE_SIZE_sem_for_reading_cb_param 40
1140#else
1141#endif
1142#endif
1143#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem
1144#ifndef ISP2401
1145#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x57EC
1146#else
1147#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x5888
1148#endif
1149#define HIVE_SIZE_sp_sem_for_reading_cb_param 40
1150
1151#ifndef ISP2401
1152/* function ia_css_queue_get_used_space: 52C7 */
1153#else
1154/* function ia_css_queue_get_used_space: 54A6 */
1155#endif
1156
1157#ifndef HIVE_MULTIPLE_PROGRAMS
1158#ifndef HIVE_MEM_sem_for_cont_capt_start
1159#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem
1160#ifndef ISP2401
1161#define HIVE_ADDR_sem_for_cont_capt_start 0x5814
1162#else
1163#define HIVE_ADDR_sem_for_cont_capt_start 0x58B0
1164#endif
1165#define HIVE_SIZE_sem_for_cont_capt_start 20
1166#else
1167#endif
1168#endif
1169#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem
1170#ifndef ISP2401
1171#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x5814
1172#else
1173#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x58B0
1174#endif
1175#define HIVE_SIZE_sp_sem_for_cont_capt_start 20
1176
1177#ifndef HIVE_MULTIPLE_PROGRAMS
1178#ifndef HIVE_MEM_tmp_heap
1179#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem
1180#ifndef ISP2401
1181#define HIVE_ADDR_tmp_heap 0x70A8
1182#else
1183#define HIVE_ADDR_tmp_heap 0x7158
1184#endif
1185#define HIVE_SIZE_tmp_heap 640
1186#else
1187#endif
1188#endif
1189#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem
1190#ifndef ISP2401
1191#define HIVE_ADDR_sp_tmp_heap 0x70A8
1192#else
1193#define HIVE_ADDR_sp_tmp_heap 0x7158
1194#endif
1195#define HIVE_SIZE_sp_tmp_heap 640
1196
1197#ifndef ISP2401
1198/* function ia_css_rmgr_sp_get_num_vbuf: 64B0 */
1199#else
1200/* function ia_css_rmgr_sp_get_num_vbuf: 6676 */
1201#endif
1202
1203#ifndef ISP2401
1204/* function ia_css_ispctrl_sp_output_compute_dma_info: 4863 */
1205#else
1206/* function ia_css_ispctrl_sp_output_compute_dma_info: 4A27 */
1207#endif
1208
1209#ifndef ISP2401
1210/* function ia_css_tagger_sp_lock_exp_id: 2A0F */
1211#else
1212/* function ia_css_tagger_sp_lock_exp_id: 29E0 */
1213#endif
1214
1215#ifndef HIVE_MULTIPLE_PROGRAMS
1216#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs
1217#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem
1218#ifndef ISP2401
1219#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5C24
1220#else
1221#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0
1222#endif
1223#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60
1224#else
1225#endif
1226#endif
1227#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem
1228#ifndef ISP2401
1229#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5C24
1230#else
1231#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x5CD0
1232#endif
1233#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60
1234
1235#ifndef ISP2401
1236/* function ia_css_queue_is_full: 535E */
1237#else
1238/* function ia_css_queue_is_full: 553D */
1239#endif
1240
1241/* function debug_buffer_init_isp: E4 */
1242
1243#ifndef ISP2401
1244/* function ia_css_tagger_sp_exp_id_is_locked: 2945 */
1245#else
1246/* function ia_css_tagger_sp_exp_id_is_locked: 2916 */
1247#endif
1248
1249#ifndef HIVE_MULTIPLE_PROGRAMS
1250#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem
1251#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem
1252#ifndef ISP2401
1253#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7764
1254#else
1255#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x7810
1256#endif
1257#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60
1258#else
1259#endif
1260#endif
1261#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem
1262#ifndef ISP2401
1263#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7764
1264#else
1265#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x7810
1266#endif
1267#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60
1268
1269#ifndef ISP2401
1270/* function ia_css_rmgr_sp_refcount_dump: 6287 */
1271#else
1272/* function ia_css_rmgr_sp_refcount_dump: 644D */
1273#endif
1274
1275#ifndef HIVE_MULTIPLE_PROGRAMS
1276#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id
1277#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem
1278#ifndef ISP2401
1279#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5C60
1280#else
1281#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C
1282#endif
1283#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20
1284#else
1285#endif
1286#endif
1287#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem
1288#ifndef ISP2401
1289#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5C60
1290#else
1291#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x5D0C
1292#endif
1293#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20
1294
1295#ifndef HIVE_MULTIPLE_PROGRAMS
1296#ifndef HIVE_MEM_sp_pipe_threads
1297#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem
1298#define HIVE_ADDR_sp_pipe_threads 0x150
1299#define HIVE_SIZE_sp_pipe_threads 20
1300#else
1301#endif
1302#endif
1303#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem
1304#define HIVE_ADDR_sp_sp_pipe_threads 0x150
1305#define HIVE_SIZE_sp_sp_pipe_threads 20
1306
1307#ifndef ISP2401
1308/* function sp_event_proxy_func: 78D */
1309#else
1310/* function sp_event_proxy_func: 721 */
1311#endif
1312
1313#ifndef ISP2401
1314/* function ibuf_ctrl_run: D7F */
1315#else
1316/* function ibuf_ctrl_run: D79 */
1317#endif
1318
1319#ifndef HIVE_MULTIPLE_PROGRAMS
1320#ifndef HIVE_MEM_host2sp_isys_event_queue_handle
1321#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem
1322#ifndef ISP2401
1323#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5C74
1324#else
1325#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x5D20
1326#endif
1327#define HIVE_SIZE_host2sp_isys_event_queue_handle 12
1328#else
1329#endif
1330#endif
1331#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem
1332#ifndef ISP2401
1333#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5C74
1334#else
1335#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x5D20
1336#endif
1337#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12
1338
1339#ifndef ISP2401
1340/* function ia_css_thread_sp_yield: 6A12 */
1341#else
1342/* function ia_css_thread_sp_yield: 6C96 */
1343#endif
1344
1345#ifndef HIVE_MULTIPLE_PROGRAMS
1346#ifndef HIVE_MEM_sp_all_cbs_param_desc
1347#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem
1348#ifndef ISP2401
1349#define HIVE_ADDR_sp_all_cbs_param_desc 0x5828
1350#else
1351#define HIVE_ADDR_sp_all_cbs_param_desc 0x58C4
1352#endif
1353#define HIVE_SIZE_sp_all_cbs_param_desc 8
1354#else
1355#endif
1356#endif
1357#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem
1358#ifndef ISP2401
1359#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x5828
1360#else
1361#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x58C4
1362#endif
1363#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8
1364
1365#ifndef HIVE_MULTIPLE_PROGRAMS
1366#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb
1367#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem
1368#ifndef ISP2401
1369#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6C8C
1370#else
1371#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38
1372#endif
1373#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4
1374#else
1375#endif
1376#endif
1377#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem
1378#ifndef ISP2401
1379#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6C8C
1380#else
1381#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x6D38
1382#endif
1383#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4
1384
1385#ifndef ISP2401
1386/* function ia_css_thread_sp_fork: 13AC */
1387#else
1388/* function ia_css_thread_sp_fork: 1322 */
1389#endif
1390
1391#ifndef ISP2401
1392/* function ia_css_tagger_sp_destroy: 3136 */
1393#else
1394/* function ia_css_tagger_sp_destroy: 3107 */
1395#endif
1396
1397#ifndef ISP2401
1398/* function ia_css_dmaproxy_sp_vmem_read: 3ADB */
1399#else
1400/* function ia_css_dmaproxy_sp_vmem_read: 3C3B */
1401#endif
1402
1403#ifndef HIVE_MULTIPLE_PROGRAMS
1404#ifndef HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES
1405#define HIVE_MEM_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem
1406#define HIVE_ADDR_N_LONG_PACKET_LUT_ENTRIES 0x1B8
1407#define HIVE_SIZE_N_LONG_PACKET_LUT_ENTRIES 12
1408#else
1409#endif
1410#endif
1411#define HIVE_MEM_sp_N_LONG_PACKET_LUT_ENTRIES scalar_processor_2400_dmem
1412#define HIVE_ADDR_sp_N_LONG_PACKET_LUT_ENTRIES 0x1B8
1413#define HIVE_SIZE_sp_N_LONG_PACKET_LUT_ENTRIES 12
1414
1415#ifndef ISP2401
1416/* function initialize_sp_group: 5F6 */
1417#else
1418/* function initialize_sp_group: 58A */
1419#endif
1420
1421#ifndef ISP2401
1422/* function ia_css_tagger_buf_sp_peek: 325B */
1423#else
1424/* function ia_css_tagger_buf_sp_peek: 337E */
1425#endif
1426
1427#ifndef ISP2401
1428/* function ia_css_thread_sp_init: 13D8 */
1429#else
1430/* function ia_css_thread_sp_init: 134E */
1431#endif
1432
1433#ifndef ISP2401
1434/* function ia_css_isys_sp_reset_exp_id: 6133 */
1435#else
1436/* function qos_scheduler_update_fps: 67AD */
1437#endif
1438
1439#ifndef ISP2401
1440/* function qos_scheduler_update_fps: 65AF */
1441#else
1442/* function ia_css_isys_sp_reset_exp_id: 62F9 */
1443#endif
1444
1445#ifndef ISP2401
1446/* function ia_css_ispctrl_sp_set_stream_base_addr: 4F38 */
1447#else
1448/* function ia_css_ispctrl_sp_set_stream_base_addr: 5114 */
1449#endif
1450
1451#ifndef HIVE_MULTIPLE_PROGRAMS
1452#ifndef HIVE_MEM_ISP_DMEM_BASE
1453#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem
1454#define HIVE_ADDR_ISP_DMEM_BASE 0x10
1455#define HIVE_SIZE_ISP_DMEM_BASE 4
1456#else
1457#endif
1458#endif
1459#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem
1460#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10
1461#define HIVE_SIZE_sp_ISP_DMEM_BASE 4
1462
1463#ifndef HIVE_MULTIPLE_PROGRAMS
1464#ifndef HIVE_MEM_SP_DMEM_BASE
1465#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem
1466#define HIVE_ADDR_SP_DMEM_BASE 0x4
1467#define HIVE_SIZE_SP_DMEM_BASE 4
1468#else
1469#endif
1470#endif
1471#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem
1472#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4
1473#define HIVE_SIZE_sp_SP_DMEM_BASE 4
1474
1475#ifndef ISP2401
1476/* function ibuf_ctrl_transfer: D67 */
1477#else
1478/* function ibuf_ctrl_transfer: D61 */
1479
1480/* function __ia_css_queue_is_empty_text: 5403 */
1481#endif
1482
1483#ifndef ISP2401
1484/* function ia_css_dmaproxy_sp_read: 3B51 */
1485#else
1486/* function ia_css_dmaproxy_sp_read: 3CB1 */
1487#endif
1488
1489#ifndef ISP2401
1490/* function virtual_isys_stream_is_capture_done: 5EB0 */
1491#else
1492/* function virtual_isys_stream_is_capture_done: 5F94 */
1493#endif
1494
1495#ifndef HIVE_MULTIPLE_PROGRAMS
1496#ifndef HIVE_MEM_raw_copy_line_count
1497#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem
1498#ifndef ISP2401
1499#define HIVE_ADDR_raw_copy_line_count 0x360
1500#else
1501#define HIVE_ADDR_raw_copy_line_count 0x378
1502#endif
1503#define HIVE_SIZE_raw_copy_line_count 4
1504#else
1505#endif
1506#endif
1507#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem
1508#ifndef ISP2401
1509#define HIVE_ADDR_sp_raw_copy_line_count 0x360
1510#else
1511#define HIVE_ADDR_sp_raw_copy_line_count 0x378
1512#endif
1513#define HIVE_SIZE_sp_raw_copy_line_count 4
1514
1515#ifndef HIVE_MULTIPLE_PROGRAMS
1516#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle
1517#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem
1518#ifndef ISP2401
1519#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5C80
1520#else
1521#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x5D2C
1522#endif
1523#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12
1524#else
1525#endif
1526#endif
1527#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem
1528#ifndef ISP2401
1529#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5C80
1530#else
1531#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x5D2C
1532#endif
1533#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12
1534
1535#ifndef ISP2401
1536/* function ia_css_queue_peek: 523D */
1537#else
1538/* function ia_css_queue_peek: 541C */
1539#endif
1540
1541#ifndef HIVE_MULTIPLE_PROGRAMS
1542#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt
1543#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem
1544#ifndef ISP2401
1545#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5B2C
1546#else
1547#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x5BD8
1548#endif
1549#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4
1550#else
1551#endif
1552#endif
1553#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem
1554#ifndef ISP2401
1555#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5B2C
1556#else
1557#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x5BD8
1558#endif
1559#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4
1560
1561#ifndef HIVE_MULTIPLE_PROGRAMS
1562#ifndef HIVE_MEM_event_can_send_token_mask
1563#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem
1564#define HIVE_ADDR_event_can_send_token_mask 0x88
1565#define HIVE_SIZE_event_can_send_token_mask 44
1566#else
1567#endif
1568#endif
1569#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem
1570#define HIVE_ADDR_sp_event_can_send_token_mask 0x88
1571#define HIVE_SIZE_sp_event_can_send_token_mask 44
1572
1573#ifndef ISP2401
1574/* function csi_rx_frontend_stop: C11 */
1575#else
1576/* function csi_rx_frontend_stop: C0B */
1577#endif
1578
1579#ifndef HIVE_MULTIPLE_PROGRAMS
1580#ifndef HIVE_MEM_isp_thread
1581#define HIVE_MEM_isp_thread scalar_processor_2400_dmem
1582#ifndef ISP2401
1583#define HIVE_ADDR_isp_thread 0x6FD8
1584#else
1585#define HIVE_ADDR_isp_thread 0x7088
1586#endif
1587#define HIVE_SIZE_isp_thread 4
1588#else
1589#endif
1590#endif
1591#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem
1592#ifndef ISP2401
1593#define HIVE_ADDR_sp_isp_thread 0x6FD8
1594#else
1595#define HIVE_ADDR_sp_isp_thread 0x7088
1596#endif
1597#define HIVE_SIZE_sp_isp_thread 4
1598
1599#ifndef ISP2401
1600/* function encode_and_post_sp_event_non_blocking: AF0 */
1601#else
1602/* function encode_and_post_sp_event_non_blocking: A84 */
1603#endif
1604
1605/* function is_ddr_debug_buffer_full: 2CC */
1606
1607#ifndef ISP2401
1608/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 32AB */
1609#else
1610/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 33CE */
1611#endif
1612
1613#ifndef HIVE_MULTIPLE_PROGRAMS
1614#ifndef HIVE_MEM_sp_threads_fiber
1615#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem
1616#define HIVE_ADDR_sp_threads_fiber 0x194
1617#define HIVE_SIZE_sp_threads_fiber 24
1618#else
1619#endif
1620#endif
1621#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem
1622#define HIVE_ADDR_sp_sp_threads_fiber 0x194
1623#define HIVE_SIZE_sp_sp_threads_fiber 24
1624
1625#ifndef ISP2401
1626/* function encode_and_post_sp_event: A79 */
1627#else
1628/* function encode_and_post_sp_event: A0D */
1629#endif
1630
1631/* function debug_enqueue_ddr: EE */
1632
1633#ifndef ISP2401
1634/* function ia_css_rmgr_sp_refcount_init_vbuf: 6242 */
1635#else
1636/* function ia_css_rmgr_sp_refcount_init_vbuf: 6408 */
1637#endif
1638
1639#ifndef ISP2401
1640/* function dmaproxy_sp_read_write: 6E86 */
1641#else
1642/* function dmaproxy_sp_read_write: 70C3 */
1643#endif
1644
1645#ifndef HIVE_MULTIPLE_PROGRAMS
1646#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer
1647#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem
1648#ifndef ISP2401
1649#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6C90
1650#else
1651#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C
1652#endif
1653#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4
1654#else
1655#endif
1656#endif
1657#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem
1658#ifndef ISP2401
1659#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6C90
1660#else
1661#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x6D3C
1662#endif
1663#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4
1664
1665#ifndef HIVE_MULTIPLE_PROGRAMS
1666#ifndef HIVE_MEM_host2sp_buffer_queue_handle
1667#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem
1668#ifndef ISP2401
1669#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5C8C
1670#else
1671#define HIVE_ADDR_host2sp_buffer_queue_handle 0x5D38
1672#endif
1673#define HIVE_SIZE_host2sp_buffer_queue_handle 480
1674#else
1675#endif
1676#endif
1677#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem
1678#ifndef ISP2401
1679#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5C8C
1680#else
1681#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x5D38
1682#endif
1683#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480
1684
1685#ifndef HIVE_MULTIPLE_PROGRAMS
1686#ifndef HIVE_MEM_ia_css_flash_sp_in_service
1687#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem
1688#ifndef ISP2401
1689#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3054
1690#else
1691#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3074
1692#endif
1693#define HIVE_SIZE_ia_css_flash_sp_in_service 4
1694#else
1695#endif
1696#endif
1697#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem
1698#ifndef ISP2401
1699#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3054
1700#else
1701#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3074
1702#endif
1703#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4
1704
1705#ifndef ISP2401
1706/* function ia_css_dmaproxy_sp_process: 6B92 */
1707#else
1708/* function ia_css_dmaproxy_sp_process: 6E0F */
1709#endif
1710
1711#ifndef ISP2401
1712/* function ia_css_tagger_buf_sp_mark_from_end: 3533 */
1713#else
1714/* function ia_css_tagger_buf_sp_mark_from_end: 3656 */
1715#endif
1716
1717#ifndef ISP2401
1718/* function ia_css_ispctrl_sp_init_cs: 3F77 */
1719#else
1720/* function ia_css_ispctrl_sp_init_cs: 40FA */
1721#endif
1722
1723#ifndef ISP2401
1724/* function ia_css_spctrl_sp_init: 5E02 */
1725#else
1726/* function ia_css_spctrl_sp_init: 5EE4 */
1727#endif
1728
1729#ifndef ISP2401
1730/* function sp_event_proxy_init: 7A2 */
1731#else
1732/* function sp_event_proxy_init: 736 */
1733#endif
1734
1735#ifndef ISP2401
1736/* function input_system_input_port_close: 109B */
1737#else
1738/* function input_system_input_port_close: 1095 */
1739#endif
1740
1741#ifndef HIVE_MULTIPLE_PROGRAMS
1742#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick
1743#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem
1744#ifndef ISP2401
1745#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5E6C
1746#else
1747#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18
1748#endif
1749#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40
1750#else
1751#endif
1752#endif
1753#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem
1754#ifndef ISP2401
1755#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5E6C
1756#else
1757#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x5F18
1758#endif
1759#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40
1760
1761#ifndef HIVE_MULTIPLE_PROGRAMS
1762#ifndef HIVE_MEM_sp_output
1763#define HIVE_MEM_sp_output scalar_processor_2400_dmem
1764#ifndef ISP2401
1765#define HIVE_ADDR_sp_output 0x3F2C
1766#else
1767#define HIVE_ADDR_sp_output 0x3F50
1768#endif
1769#define HIVE_SIZE_sp_output 16
1770#else
1771#endif
1772#endif
1773#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem
1774#ifndef ISP2401
1775#define HIVE_ADDR_sp_sp_output 0x3F2C
1776#else
1777#define HIVE_ADDR_sp_sp_output 0x3F50
1778#endif
1779#define HIVE_SIZE_sp_sp_output 16
1780
1781#ifndef HIVE_MULTIPLE_PROGRAMS
1782#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues
1783#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem
1784#ifndef ISP2401
1785#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5E94
1786#else
1787#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40
1788#endif
1789#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800
1790#else
1791#endif
1792#endif
1793#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem
1794#ifndef ISP2401
1795#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5E94
1796#else
1797#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x5F40
1798#endif
1799#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800
1800
1801#ifndef ISP2401
1802/* function pixelgen_prbs_config: E93 */
1803#else
1804/* function pixelgen_prbs_config: E8D */
1805#endif
1806
1807#ifndef HIVE_MULTIPLE_PROGRAMS
1808#ifndef HIVE_MEM_ISP_CTRL_BASE
1809#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem
1810#define HIVE_ADDR_ISP_CTRL_BASE 0x8
1811#define HIVE_SIZE_ISP_CTRL_BASE 4
1812#else
1813#endif
1814#endif
1815#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem
1816#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8
1817#define HIVE_SIZE_sp_ISP_CTRL_BASE 4
1818
1819#ifndef HIVE_MULTIPLE_PROGRAMS
1820#ifndef HIVE_MEM_INPUT_FORMATTER_BASE
1821#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem
1822#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C
1823#define HIVE_SIZE_INPUT_FORMATTER_BASE 16
1824#else
1825#endif
1826#endif
1827#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem
1828#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C
1829#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16
1830
1831#ifndef ISP2401
1832/* function sp_dma_proxy_reset_channels: 3DAB */
1833#else
1834/* function sp_dma_proxy_reset_channels: 3F20 */
1835#endif
1836
1837#ifndef ISP2401
1838/* function ia_css_tagger_sp_update_size: 322A */
1839#else
1840/* function ia_css_tagger_sp_update_size: 334D */
1841#endif
1842
1843#ifndef HIVE_MULTIPLE_PROGRAMS
1844#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue
1845#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem
1846#ifndef ISP2401
1847#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x61B4
1848#else
1849#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x6260
1850#endif
1851#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008
1852#else
1853#endif
1854#endif
1855#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem
1856#ifndef ISP2401
1857#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x61B4
1858#else
1859#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x6260
1860#endif
1861#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008
1862
1863#ifndef ISP2401
1864/* function thread_fiber_sp_create: 1444 */
1865#else
1866/* function thread_fiber_sp_create: 13BA */
1867#endif
1868
1869#ifndef ISP2401
1870/* function ia_css_dmaproxy_sp_set_increments: 3C3D */
1871#else
1872/* function ia_css_dmaproxy_sp_set_increments: 3DB2 */
1873#endif
1874
1875#ifndef HIVE_MULTIPLE_PROGRAMS
1876#ifndef HIVE_MEM_sem_for_writing_cb_frame
1877#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem
1878#ifndef ISP2401
1879#define HIVE_ADDR_sem_for_writing_cb_frame 0x5830
1880#else
1881#define HIVE_ADDR_sem_for_writing_cb_frame 0x58CC
1882#endif
1883#define HIVE_SIZE_sem_for_writing_cb_frame 20
1884#else
1885#endif
1886#endif
1887#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem
1888#ifndef ISP2401
1889#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x5830
1890#else
1891#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x58CC
1892#endif
1893#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20
1894
1895#ifndef HIVE_MULTIPLE_PROGRAMS
1896#ifndef HIVE_MEM_sem_for_writing_cb_param
1897#define HIVE_MEM_sem_for_writing_cb_param scalar_processor_2400_dmem
1898#ifndef ISP2401
1899#define HIVE_ADDR_sem_for_writing_cb_param 0x5844
1900#else
1901#define HIVE_ADDR_sem_for_writing_cb_param 0x58E0
1902#endif
1903#define HIVE_SIZE_sem_for_writing_cb_param 20
1904#else
1905#endif
1906#endif
1907#define HIVE_MEM_sp_sem_for_writing_cb_param scalar_processor_2400_dmem
1908#ifndef ISP2401
1909#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x5844
1910#else
1911#define HIVE_ADDR_sp_sem_for_writing_cb_param 0x58E0
1912#endif
1913#define HIVE_SIZE_sp_sem_for_writing_cb_param 20
1914
1915#ifndef ISP2401
1916/* function pixelgen_tpg_is_done: F0D */
1917#else
1918/* function pixelgen_tpg_is_done: F07 */
1919#endif
1920
1921#ifndef ISP2401
1922/* function ia_css_isys_stream_capture_indication: 5FB6 */
1923#else
1924/* function ia_css_isys_stream_capture_indication: 60D7 */
1925#endif
1926
1927/* function sp_start_isp_entry: 392 */
1928#ifndef HIVE_MULTIPLE_PROGRAMS
1929#ifdef HIVE_ADDR_sp_start_isp_entry
1930#endif
1931#define HIVE_ADDR_sp_start_isp_entry 0x392
1932#endif
1933#define HIVE_ADDR_sp_sp_start_isp_entry 0x392
1934
1935#ifndef ISP2401
1936/* function ia_css_tagger_buf_sp_unmark_all: 34B7 */
1937#else
1938/* function ia_css_tagger_buf_sp_unmark_all: 35DA */
1939#endif
1940
1941#ifndef ISP2401
1942/* function ia_css_tagger_buf_sp_unmark_from_start: 34F8 */
1943#else
1944/* function ia_css_tagger_buf_sp_unmark_from_start: 361B */
1945#endif
1946
1947#ifndef ISP2401
1948/* function ia_css_dmaproxy_sp_channel_acquire: 3DD7 */
1949#else
1950/* function ia_css_dmaproxy_sp_channel_acquire: 3F4C */
1951#endif
1952
1953#ifndef ISP2401
1954/* function ia_css_rmgr_sp_add_num_vbuf: 648C */
1955#else
1956/* function ia_css_rmgr_sp_add_num_vbuf: 6652 */
1957#endif
1958
1959#ifndef ISP2401
1960/* function ibuf_ctrl_config: D8B */
1961#else
1962/* function ibuf_ctrl_config: D85 */
1963#endif
1964
1965#ifndef ISP2401
1966/* function ia_css_isys_stream_stop: 602E */
1967#else
1968/* function ia_css_isys_stream_stop: 61F4 */
1969#endif
1970
1971#ifndef ISP2401
1972/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3AA7 */
1973#else
1974/* function __ia_css_dmaproxy_sp_wait_for_ack_text: 3C07 */
1975#endif
1976
1977#ifndef ISP2401
1978/* function ia_css_tagger_sp_acquire_buf_elem: 291D */
1979#else
1980/* function ia_css_tagger_sp_acquire_buf_elem: 28EE */
1981#endif
1982
1983#ifndef ISP2401
1984/* function ia_css_bufq_sp_is_dynamic_buffer: 3990 */
1985#else
1986/* function ia_css_bufq_sp_is_dynamic_buffer: 3AB3 */
1987#endif
1988
1989#ifndef HIVE_MULTIPLE_PROGRAMS
1990#ifndef HIVE_MEM_sp_group
1991#define HIVE_MEM_sp_group scalar_processor_2400_dmem
1992#ifndef ISP2401
1993#define HIVE_ADDR_sp_group 0x3F3C
1994#define HIVE_SIZE_sp_group 6176
1995#else
1996#define HIVE_ADDR_sp_group 0x3F60
1997#define HIVE_SIZE_sp_group 6296
1998#endif
1999#else
2000#endif
2001#endif
2002#define HIVE_MEM_sp_sp_group scalar_processor_2400_dmem
2003#ifndef ISP2401
2004#define HIVE_ADDR_sp_sp_group 0x3F3C
2005#define HIVE_SIZE_sp_sp_group 6176
2006#else
2007#define HIVE_ADDR_sp_sp_group 0x3F60
2008#define HIVE_SIZE_sp_sp_group 6296
2009#endif
2010
2011#ifndef HIVE_MULTIPLE_PROGRAMS
2012#ifndef HIVE_MEM_sp_event_proxy_thread
2013#define HIVE_MEM_sp_event_proxy_thread scalar_processor_2400_dmem
2014#ifndef ISP2401
2015#define HIVE_ADDR_sp_event_proxy_thread 0x5A30
2016#define HIVE_SIZE_sp_event_proxy_thread 68
2017#else
2018#define HIVE_ADDR_sp_event_proxy_thread 0x5AE0
2019#define HIVE_SIZE_sp_event_proxy_thread 72
2020#endif
2021#else
2022#endif
2023#endif
2024#define HIVE_MEM_sp_sp_event_proxy_thread scalar_processor_2400_dmem
2025#ifndef ISP2401
2026#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5A30
2027#define HIVE_SIZE_sp_sp_event_proxy_thread 68
2028#else
2029#define HIVE_ADDR_sp_sp_event_proxy_thread 0x5AE0
2030#define HIVE_SIZE_sp_sp_event_proxy_thread 72
2031#endif
2032
2033#ifndef ISP2401
2034/* function ia_css_thread_sp_kill: 1372 */
2035#else
2036/* function ia_css_thread_sp_kill: 12E8 */
2037#endif
2038
2039#ifndef ISP2401
2040/* function ia_css_tagger_sp_create: 31E4 */
2041#else
2042/* function ia_css_tagger_sp_create: 32FB */
2043#endif
2044
2045#ifndef ISP2401
2046/* function tmpmem_acquire_dmem: 6539 */
2047#else
2048/* function tmpmem_acquire_dmem: 66FF */
2049#endif
2050
2051#ifndef HIVE_MULTIPLE_PROGRAMS
2052#ifndef HIVE_MEM_MMU_BASE
2053#define HIVE_MEM_MMU_BASE scalar_processor_2400_dmem
2054#define HIVE_ADDR_MMU_BASE 0x24
2055#define HIVE_SIZE_MMU_BASE 8
2056#else
2057#endif
2058#endif
2059#define HIVE_MEM_sp_MMU_BASE scalar_processor_2400_dmem
2060#define HIVE_ADDR_sp_MMU_BASE 0x24
2061#define HIVE_SIZE_sp_MMU_BASE 8
2062
2063#ifndef ISP2401
2064/* function ia_css_dmaproxy_sp_channel_release: 3DC3 */
2065#else
2066/* function ia_css_dmaproxy_sp_channel_release: 3F38 */
2067#endif
2068
2069#ifndef ISP2401
2070/* function pixelgen_prbs_run: E81 */
2071#else
2072/* function pixelgen_prbs_run: E7B */
2073#endif
2074
2075#ifndef ISP2401
2076/* function ia_css_dmaproxy_sp_is_idle: 3DA3 */
2077#else
2078/* function ia_css_dmaproxy_sp_is_idle: 3F18 */
2079#endif
2080
2081#ifndef HIVE_MULTIPLE_PROGRAMS
2082#ifndef HIVE_MEM_sem_for_qos_start
2083#define HIVE_MEM_sem_for_qos_start scalar_processor_2400_dmem
2084#ifndef ISP2401
2085#define HIVE_ADDR_sem_for_qos_start 0x5858
2086#else
2087#define HIVE_ADDR_sem_for_qos_start 0x58F4
2088#endif
2089#define HIVE_SIZE_sem_for_qos_start 20
2090#else
2091#endif
2092#endif
2093#define HIVE_MEM_sp_sem_for_qos_start scalar_processor_2400_dmem
2094#ifndef ISP2401
2095#define HIVE_ADDR_sp_sem_for_qos_start 0x5858
2096#else
2097#define HIVE_ADDR_sp_sem_for_qos_start 0x58F4
2098#endif
2099#define HIVE_SIZE_sp_sem_for_qos_start 20
2100
2101#ifndef ISP2401
2102/* function isp_hmem_load: B63 */
2103#else
2104/* function isp_hmem_load: B5D */
2105#endif
2106
2107#ifndef ISP2401
2108/* function ia_css_tagger_sp_release_buf_elem: 28F9 */
2109#else
2110/* function ia_css_tagger_sp_release_buf_elem: 28CA */
2111#endif
2112
2113#ifndef ISP2401
2114/* function ia_css_eventq_sp_send: 3E19 */
2115#else
2116/* function ia_css_eventq_sp_send: 3F8E */
2117#endif
2118
2119#ifndef ISP2401
2120/* function ia_css_tagger_buf_sp_unlock_from_start: 33E7 */
2121#else
2122/* function ia_css_tagger_buf_sp_unlock_from_start: 350A */
2123#endif
2124
2125#ifndef HIVE_MULTIPLE_PROGRAMS
2126#ifndef HIVE_MEM_debug_buffer_ddr_address
2127#define HIVE_MEM_debug_buffer_ddr_address scalar_processor_2400_dmem
2128#define HIVE_ADDR_debug_buffer_ddr_address 0xBC
2129#define HIVE_SIZE_debug_buffer_ddr_address 4
2130#else
2131#endif
2132#endif
2133#define HIVE_MEM_sp_debug_buffer_ddr_address scalar_processor_2400_dmem
2134#define HIVE_ADDR_sp_debug_buffer_ddr_address 0xBC
2135#define HIVE_SIZE_sp_debug_buffer_ddr_address 4
2136
2137#ifndef ISP2401
2138/* function sp_isys_copy_request: 6ED */
2139#else
2140/* function sp_isys_copy_request: 681 */
2141#endif
2142
2143#ifndef ISP2401
2144/* function ia_css_rmgr_sp_refcount_retain_vbuf: 631C */
2145#else
2146/* function ia_css_rmgr_sp_refcount_retain_vbuf: 64E2 */
2147#endif
2148
2149#ifndef ISP2401
2150/* function ia_css_thread_sp_set_priority: 136A */
2151#else
2152/* function ia_css_thread_sp_set_priority: 12E0 */
2153#endif
2154
2155#ifndef ISP2401
2156/* function sizeof_hmem: C0A */
2157#else
2158/* function sizeof_hmem: C04 */
2159#endif
2160
2161#ifndef ISP2401
2162/* function input_system_channel_open: 1241 */
2163#else
2164/* function input_system_channel_open: 11BC */
2165#endif
2166
2167#ifndef ISP2401
2168/* function pixelgen_tpg_stop: EFB */
2169#else
2170/* function pixelgen_tpg_stop: EF5 */
2171#endif
2172
2173#ifndef ISP2401
2174/* function tmpmem_release_dmem: 6528 */
2175#else
2176/* function tmpmem_release_dmem: 66EE */
2177#endif
2178
2179#ifndef ISP2401
2180/* function ia_css_dmaproxy_sp_set_width_exception: 3C28 */
2181#else
2182/* function __ia_css_dmaproxy_sp_process_text: 3BAB */
2183#endif
2184
2185#ifndef ISP2401
2186/* function sp_event_assert: 929 */
2187#else
2188/* function ia_css_dmaproxy_sp_set_width_exception: 3D9D */
2189#endif
2190
2191#ifndef ISP2401
2192/* function ia_css_flash_sp_init_internal_params: 35B4 */
2193#else
2194/* function sp_event_assert: 8BD */
2195#endif
2196
2197#ifndef ISP2401
2198/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 32ED */
2199#else
2200/* function ia_css_flash_sp_init_internal_params: 36D7 */
2201#endif
2202
2203#ifndef ISP2401
2204/* function __modu: 687A */
2205#else
2206/* function ia_css_tagger_buf_sp_pop_unmarked_and_unlocked: 3410 */
2207#endif
2208
2209#ifndef ISP2401
2210/* function ia_css_dmaproxy_sp_init_isp_vector: 3AAD */
2211#else
2212/* function __modu: 6A78 */
2213#endif
2214
2215#ifndef ISP2401
2216/* function input_system_channel_transfer: 122A */
2217#else
2218/* function ia_css_dmaproxy_sp_init_isp_vector: 3C0D */
2219
2220/* function input_system_channel_transfer: 11A5 */
2221#endif
2222
2223/* function isp_vamem_store: 0 */
2224
2225#ifdef ISP2401
2226/* function ia_css_tagger_sp_set_copy_pipe: 32F2 */
2227
2228#endif
2229#ifndef HIVE_MULTIPLE_PROGRAMS
2230#ifndef HIVE_MEM_GDC_BASE
2231#define HIVE_MEM_GDC_BASE scalar_processor_2400_dmem
2232#define HIVE_ADDR_GDC_BASE 0x44
2233#define HIVE_SIZE_GDC_BASE 8
2234#else
2235#endif
2236#endif
2237#define HIVE_MEM_sp_GDC_BASE scalar_processor_2400_dmem
2238#define HIVE_ADDR_sp_GDC_BASE 0x44
2239#define HIVE_SIZE_sp_GDC_BASE 8
2240
2241#ifndef ISP2401
2242/* function ia_css_queue_local_init: 5528 */
2243#else
2244/* function ia_css_queue_local_init: 5707 */
2245#endif
2246
2247#ifndef ISP2401
2248/* function sp_event_proxy_callout_func: 6947 */
2249#else
2250/* function sp_event_proxy_callout_func: 6B45 */
2251#endif
2252
2253#ifndef ISP2401
2254/* function qos_scheduler_schedule_stage: 6580 */
2255#else
2256/* function qos_scheduler_schedule_stage: 6759 */
2257#endif
2258
2259#ifndef HIVE_MULTIPLE_PROGRAMS
2260#ifndef HIVE_MEM_ia_css_thread_sp_num_ready_threads
2261#define HIVE_MEM_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem
2262#ifndef ISP2401
2263#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5A78
2264#else
2265#define HIVE_ADDR_ia_css_thread_sp_num_ready_threads 0x5B28
2266#endif
2267#define HIVE_SIZE_ia_css_thread_sp_num_ready_threads 4
2268#else
2269#endif
2270#endif
2271#define HIVE_MEM_sp_ia_css_thread_sp_num_ready_threads scalar_processor_2400_dmem
2272#ifndef ISP2401
2273#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5A78
2274#else
2275#define HIVE_ADDR_sp_ia_css_thread_sp_num_ready_threads 0x5B28
2276#endif
2277#define HIVE_SIZE_sp_ia_css_thread_sp_num_ready_threads 4
2278
2279#ifndef HIVE_MULTIPLE_PROGRAMS
2280#ifndef HIVE_MEM_sp_threads_stack_size
2281#define HIVE_MEM_sp_threads_stack_size scalar_processor_2400_dmem
2282#define HIVE_ADDR_sp_threads_stack_size 0x17C
2283#define HIVE_SIZE_sp_threads_stack_size 24
2284#else
2285#endif
2286#endif
2287#define HIVE_MEM_sp_sp_threads_stack_size scalar_processor_2400_dmem
2288#define HIVE_ADDR_sp_sp_threads_stack_size 0x17C
2289#define HIVE_SIZE_sp_sp_threads_stack_size 24
2290
2291#ifndef ISP2401
2292/* function ia_css_ispctrl_sp_isp_done_row_striping: 4849 */
2293#else
2294/* function ia_css_ispctrl_sp_isp_done_row_striping: 4A0D */
2295#endif
2296
2297#ifndef ISP2401
2298/* function __ia_css_virtual_isys_sp_isr_text: 5E45 */
2299#else
2300/* function __ia_css_virtual_isys_sp_isr_text: 5F4E */
2301#endif
2302
2303#ifndef ISP2401
2304/* function ia_css_queue_dequeue: 53A6 */
2305#else
2306/* function ia_css_queue_dequeue: 5585 */
2307#endif
2308
2309#ifndef ISP2401
2310/* function ia_css_dmaproxy_sp_configure_channel: 6DEE */
2311#else
2312/* function is_qos_standalone_mode: 6734 */
2313
2314/* function ia_css_dmaproxy_sp_configure_channel: 703C */
2315#endif
2316
2317#ifndef HIVE_MULTIPLE_PROGRAMS
2318#ifndef HIVE_MEM_current_thread_fiber_sp
2319#define HIVE_MEM_current_thread_fiber_sp scalar_processor_2400_dmem
2320#ifndef ISP2401
2321#define HIVE_ADDR_current_thread_fiber_sp 0x5A80
2322#else
2323#define HIVE_ADDR_current_thread_fiber_sp 0x5B2C
2324#endif
2325#define HIVE_SIZE_current_thread_fiber_sp 4
2326#else
2327#endif
2328#endif
2329#define HIVE_MEM_sp_current_thread_fiber_sp scalar_processor_2400_dmem
2330#ifndef ISP2401
2331#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5A80
2332#else
2333#define HIVE_ADDR_sp_current_thread_fiber_sp 0x5B2C
2334#endif
2335#define HIVE_SIZE_sp_current_thread_fiber_sp 4
2336
2337#ifndef ISP2401
2338/* function ia_css_circbuf_pop: 1674 */
2339#else
2340/* function ia_css_circbuf_pop: 15EA */
2341#endif
2342
2343#ifndef ISP2401
2344/* function memset: 68F9 */
2345#else
2346/* function memset: 6AF7 */
2347#endif
2348
2349/* function irq_raise_set_token: B6 */
2350
2351#ifndef HIVE_MULTIPLE_PROGRAMS
2352#ifndef HIVE_MEM_GPIO_BASE
2353#define HIVE_MEM_GPIO_BASE scalar_processor_2400_dmem
2354#define HIVE_ADDR_GPIO_BASE 0x3C
2355#define HIVE_SIZE_GPIO_BASE 4
2356#else
2357#endif
2358#endif
2359#define HIVE_MEM_sp_GPIO_BASE scalar_processor_2400_dmem
2360#define HIVE_ADDR_sp_GPIO_BASE 0x3C
2361#define HIVE_SIZE_sp_GPIO_BASE 4
2362
2363#ifndef ISP2401
2364/* function pixelgen_prbs_stop: E6F */
2365#else
2366/* function pixelgen_prbs_stop: E69 */
2367#endif
2368
2369#ifndef ISP2401
2370/* function ia_css_pipeline_acc_stage_enable: 1FC0 */
2371#else
2372/* function ia_css_pipeline_acc_stage_enable: 1F69 */
2373#endif
2374
2375#ifndef ISP2401
2376/* function ia_css_tagger_sp_unlock_exp_id: 296A */
2377#else
2378/* function ia_css_tagger_sp_unlock_exp_id: 293B */
2379#endif
2380
2381#ifndef HIVE_MULTIPLE_PROGRAMS
2382#ifndef HIVE_MEM_isp_ph
2383#define HIVE_MEM_isp_ph scalar_processor_2400_dmem
2384#ifndef ISP2401
2385#define HIVE_ADDR_isp_ph 0x7360
2386#else
2387#define HIVE_ADDR_isp_ph 0x740C
2388#endif
2389#define HIVE_SIZE_isp_ph 28
2390#else
2391#endif
2392#endif
2393#define HIVE_MEM_sp_isp_ph scalar_processor_2400_dmem
2394#ifndef ISP2401
2395#define HIVE_ADDR_sp_isp_ph 0x7360
2396#else
2397#define HIVE_ADDR_sp_isp_ph 0x740C
2398#endif
2399#define HIVE_SIZE_sp_isp_ph 28
2400
2401#ifndef ISP2401
2402/* function ia_css_ispctrl_sp_init_ds: 40D6 */
2403#else
2404/* function ia_css_ispctrl_sp_init_ds: 4286 */
2405#endif
2406
2407#ifndef ISP2401
2408/* function get_xmem_base_addr_raw: 4479 */
2409#else
2410/* function get_xmem_base_addr_raw: 4635 */
2411#endif
2412
2413#ifndef HIVE_MULTIPLE_PROGRAMS
2414#ifndef HIVE_MEM_sp_all_cbs_param
2415#define HIVE_MEM_sp_all_cbs_param scalar_processor_2400_dmem
2416#ifndef ISP2401
2417#define HIVE_ADDR_sp_all_cbs_param 0x586C
2418#else
2419#define HIVE_ADDR_sp_all_cbs_param 0x5908
2420#endif
2421#define HIVE_SIZE_sp_all_cbs_param 16
2422#else
2423#endif
2424#endif
2425#define HIVE_MEM_sp_sp_all_cbs_param scalar_processor_2400_dmem
2426#ifndef ISP2401
2427#define HIVE_ADDR_sp_sp_all_cbs_param 0x586C
2428#else
2429#define HIVE_ADDR_sp_sp_all_cbs_param 0x5908
2430#endif
2431#define HIVE_SIZE_sp_sp_all_cbs_param 16
2432
2433#ifndef ISP2401
2434/* function pixelgen_tpg_config: F30 */
2435#else
2436/* function pixelgen_tpg_config: F2A */
2437#endif
2438
2439#ifndef ISP2401
2440/* function ia_css_circbuf_create: 16C2 */
2441#else
2442/* function ia_css_circbuf_create: 1638 */
2443#endif
2444
2445#ifndef HIVE_MULTIPLE_PROGRAMS
2446#ifndef HIVE_MEM_sem_for_sp_group
2447#define HIVE_MEM_sem_for_sp_group scalar_processor_2400_dmem
2448#ifndef ISP2401
2449#define HIVE_ADDR_sem_for_sp_group 0x587C
2450#else
2451#define HIVE_ADDR_sem_for_sp_group 0x5918
2452#endif
2453#define HIVE_SIZE_sem_for_sp_group 20
2454#else
2455#endif
2456#endif
2457#define HIVE_MEM_sp_sem_for_sp_group scalar_processor_2400_dmem
2458#ifndef ISP2401
2459#define HIVE_ADDR_sp_sem_for_sp_group 0x587C
2460#else
2461#define HIVE_ADDR_sp_sem_for_sp_group 0x5918
2462#endif
2463#define HIVE_SIZE_sp_sem_for_sp_group 20
2464
2465#ifndef ISP2401
2466/* function csi_rx_frontend_run: C22 */
2467#else
2468/* function csi_rx_frontend_run: C1C */
2469
2470/* function __ia_css_dmaproxy_sp_configure_channel_text: 3D7C */
2471#endif
2472
2473#ifndef ISP2401
2474/* function ia_css_framebuf_sp_wait_for_in_frame: 64B7 */
2475#else
2476/* function ia_css_framebuf_sp_wait_for_in_frame: 667D */
2477#endif
2478
2479#ifndef ISP2401
2480/* function ia_css_isys_stream_open: 60E3 */
2481#else
2482/* function ia_css_isys_stream_open: 62A9 */
2483#endif
2484
2485#ifndef ISP2401
2486/* function ia_css_sp_rawcopy_tag_frame: 5C71 */
2487#else
2488/* function ia_css_sp_rawcopy_tag_frame: 5E35 */
2489#endif
2490
2491#ifndef ISP2401
2492/* function input_system_channel_configure: 125D */
2493#else
2494/* function input_system_channel_configure: 11D8 */
2495#endif
2496
2497#ifndef ISP2401
2498/* function isp_hmem_clear: B33 */
2499#else
2500/* function isp_hmem_clear: B2D */
2501#endif
2502
2503#ifndef ISP2401
2504/* function ia_css_framebuf_sp_release_in_frame: 64FA */
2505#else
2506/* function ia_css_framebuf_sp_release_in_frame: 66C0 */
2507#endif
2508
2509#ifndef ISP2401
2510/* function stream2mmio_config: E1B */
2511#else
2512/* function stream2mmio_config: E15 */
2513#endif
2514
2515#ifndef ISP2401
2516/* function ia_css_ispctrl_sp_start_binary: 3F55 */
2517#else
2518/* function ia_css_ispctrl_sp_start_binary: 40D8 */
2519#endif
2520
2521#ifndef HIVE_MULTIPLE_PROGRAMS
2522#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs
2523#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem
2524#ifndef ISP2401
2525#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x698C
2526#else
2527#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38
2528#endif
2529#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20
2530#else
2531#endif
2532#endif
2533#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs scalar_processor_2400_dmem
2534#ifndef ISP2401
2535#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x698C
2536#else
2537#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 0x6A38
2538#endif
2539#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_ddr_ptrs 20
2540
2541#ifndef ISP2401
2542/* function ia_css_eventq_sp_recv: 3DEB */
2543#else
2544/* function ia_css_eventq_sp_recv: 3F60 */
2545#endif
2546
2547#ifndef ISP2401
2548/* function csi_rx_frontend_config: C7A */
2549#else
2550/* function csi_rx_frontend_config: C74 */
2551#endif
2552
2553#ifndef HIVE_MULTIPLE_PROGRAMS
2554#ifndef HIVE_MEM_isp_pool
2555#define HIVE_MEM_isp_pool scalar_processor_2400_dmem
2556#ifndef ISP2401
2557#define HIVE_ADDR_isp_pool 0x370
2558#else
2559#define HIVE_ADDR_isp_pool 0x388
2560#endif
2561#define HIVE_SIZE_isp_pool 4
2562#else
2563#endif
2564#endif
2565#define HIVE_MEM_sp_isp_pool scalar_processor_2400_dmem
2566#ifndef ISP2401
2567#define HIVE_ADDR_sp_isp_pool 0x370
2568#else
2569#define HIVE_ADDR_sp_isp_pool 0x388
2570#endif
2571#define HIVE_SIZE_sp_isp_pool 4
2572
2573#ifndef ISP2401
2574/* function ia_css_rmgr_sp_rel_gen: 61E9 */
2575#else
2576/* function ia_css_rmgr_sp_rel_gen: 63AF */
2577
2578/* function ia_css_tagger_sp_unblock_clients: 31C3 */
2579#endif
2580
2581#ifndef ISP2401
2582/* function css_get_frame_processing_time_end: 28E9 */
2583#else
2584/* function css_get_frame_processing_time_end: 28BA */
2585#endif
2586
2587#ifndef HIVE_MULTIPLE_PROGRAMS
2588#ifndef HIVE_MEM_event_any_pending_mask
2589#define HIVE_MEM_event_any_pending_mask scalar_processor_2400_dmem
2590#ifndef ISP2401
2591#define HIVE_ADDR_event_any_pending_mask 0x388
2592#else
2593#define HIVE_ADDR_event_any_pending_mask 0x3A0
2594#endif
2595#define HIVE_SIZE_event_any_pending_mask 8
2596#else
2597#endif
2598#endif
2599#define HIVE_MEM_sp_event_any_pending_mask scalar_processor_2400_dmem
2600#ifndef ISP2401
2601#define HIVE_ADDR_sp_event_any_pending_mask 0x388
2602#else
2603#define HIVE_ADDR_sp_event_any_pending_mask 0x3A0
2604#endif
2605#define HIVE_SIZE_sp_event_any_pending_mask 8
2606
2607#ifndef ISP2401
2608/* function ia_css_pipeline_sp_get_pipe_io_status: 1AB8 */
2609#else
2610/* function ia_css_pipeline_sp_get_pipe_io_status: 1A5A */
2611#endif
2612
2613/* function sh_css_decode_tag_descr: 352 */
2614
2615/* function debug_enqueue_isp: 27B */
2616
2617#ifndef ISP2401
2618/* function qos_scheduler_update_stage_budget: 656E */
2619#else
2620/* function qos_scheduler_update_stage_budget: 673C */
2621#endif
2622
2623#ifndef ISP2401
2624/* function ia_css_spctrl_sp_uninit: 5DFB */
2625#else
2626/* function ia_css_spctrl_sp_uninit: 5EDD */
2627#endif
2628
2629#ifndef ISP2401
2630/* function csi_rx_backend_run: C68 */
2631#else
2632/* function csi_rx_backend_run: C62 */
2633#endif
2634
2635#ifndef HIVE_MULTIPLE_PROGRAMS
2636#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs
2637#define HIVE_MEM_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem
2638#ifndef ISP2401
2639#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x69A0
2640#else
2641#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C
2642#endif
2643#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_dis_bufs 140
2644#else
2645#endif
2646#endif
2647#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_dis_bufs scalar_processor_2400_dmem
2648#ifndef ISP2401
2649#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x69A0
2650#else
2651#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_dis_bufs 0x6A4C
2652#endif
2653#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_dis_bufs 140
2654
2655#ifndef ISP2401
2656/* function ia_css_tagger_buf_sp_lock_from_start: 341B */
2657#else
2658/* function ia_css_tagger_buf_sp_lock_from_start: 353E */
2659#endif
2660
2661#ifndef HIVE_MULTIPLE_PROGRAMS
2662#ifndef HIVE_MEM_sem_for_isp_idle
2663#define HIVE_MEM_sem_for_isp_idle scalar_processor_2400_dmem
2664#ifndef ISP2401
2665#define HIVE_ADDR_sem_for_isp_idle 0x5890
2666#else
2667#define HIVE_ADDR_sem_for_isp_idle 0x592C
2668#endif
2669#define HIVE_SIZE_sem_for_isp_idle 20
2670#else
2671#endif
2672#endif
2673#define HIVE_MEM_sp_sem_for_isp_idle scalar_processor_2400_dmem
2674#ifndef ISP2401
2675#define HIVE_ADDR_sp_sem_for_isp_idle 0x5890
2676#else
2677#define HIVE_ADDR_sp_sem_for_isp_idle 0x592C
2678#endif
2679#define HIVE_SIZE_sp_sem_for_isp_idle 20
2680
2681#ifndef ISP2401
2682/* function ia_css_dmaproxy_sp_write_byte_addr: 3B0A */
2683#else
2684/* function ia_css_dmaproxy_sp_write_byte_addr: 3C6A */
2685#endif
2686
2687#ifndef ISP2401
2688/* function ia_css_dmaproxy_sp_init: 3A81 */
2689#else
2690/* function ia_css_dmaproxy_sp_init: 3BE1 */
2691#endif
2692
2693#ifndef ISP2401
2694/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 3686 */
2695#else
2696/* function ia_css_bufq_sp_release_dynamic_buf_clock_tick: 37A9 */
2697#endif
2698
2699#ifndef HIVE_MULTIPLE_PROGRAMS
2700#ifndef HIVE_MEM_ISP_VAMEM_BASE
2701#define HIVE_MEM_ISP_VAMEM_BASE scalar_processor_2400_dmem
2702#define HIVE_ADDR_ISP_VAMEM_BASE 0x14
2703#define HIVE_SIZE_ISP_VAMEM_BASE 12
2704#else
2705#endif
2706#endif
2707#define HIVE_MEM_sp_ISP_VAMEM_BASE scalar_processor_2400_dmem
2708#define HIVE_ADDR_sp_ISP_VAMEM_BASE 0x14
2709#define HIVE_SIZE_sp_ISP_VAMEM_BASE 12
2710
2711#ifndef ISP2401
2712/* function input_system_channel_sync: 11A4 */
2713#else
2714/* function input_system_channel_sync: 6C10 */
2715#endif
2716
2717#ifndef HIVE_MULTIPLE_PROGRAMS
2718#ifndef HIVE_MEM_ia_css_rawcopy_sp_tagger
2719#define HIVE_MEM_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem
2720#ifndef ISP2401
2721#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x732C
2722#else
2723#define HIVE_ADDR_ia_css_rawcopy_sp_tagger 0x73D8
2724#endif
2725#define HIVE_SIZE_ia_css_rawcopy_sp_tagger 24
2726#else
2727#endif
2728#endif
2729#define HIVE_MEM_sp_ia_css_rawcopy_sp_tagger scalar_processor_2400_dmem
2730#ifndef ISP2401
2731#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x732C
2732#else
2733#define HIVE_ADDR_sp_ia_css_rawcopy_sp_tagger 0x73D8
2734#endif
2735#define HIVE_SIZE_sp_ia_css_rawcopy_sp_tagger 24
2736
2737#ifndef HIVE_MULTIPLE_PROGRAMS
2738#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids
2739#define HIVE_MEM_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem
2740#ifndef ISP2401
2741#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6A2C
2742#else
2743#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8
2744#endif
2745#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_exp_ids 70
2746#else
2747#endif
2748#endif
2749#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_exp_ids scalar_processor_2400_dmem
2750#ifndef ISP2401
2751#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6A2C
2752#else
2753#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_exp_ids 0x6AD8
2754#endif
2755#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_exp_ids 70
2756
2757#ifndef ISP2401
2758/* function ia_css_queue_item_load: 561A */
2759#else
2760/* function ia_css_queue_item_load: 57F9 */
2761#endif
2762
2763#ifndef ISP2401
2764/* function ia_css_spctrl_sp_get_state: 5DE6 */
2765#else
2766/* function ia_css_spctrl_sp_get_state: 5EC8 */
2767#endif
2768
2769#ifndef HIVE_MULTIPLE_PROGRAMS
2770#ifndef HIVE_MEM_callout_sp_thread
2771#define HIVE_MEM_callout_sp_thread scalar_processor_2400_dmem
2772#ifndef ISP2401
2773#define HIVE_ADDR_callout_sp_thread 0x5A74
2774#else
2775#define HIVE_ADDR_callout_sp_thread 0x278
2776#endif
2777#define HIVE_SIZE_callout_sp_thread 4
2778#else
2779#endif
2780#endif
2781#define HIVE_MEM_sp_callout_sp_thread scalar_processor_2400_dmem
2782#ifndef ISP2401
2783#define HIVE_ADDR_sp_callout_sp_thread 0x5A74
2784#else
2785#define HIVE_ADDR_sp_callout_sp_thread 0x278
2786#endif
2787#define HIVE_SIZE_sp_callout_sp_thread 4
2788
2789#ifndef ISP2401
2790/* function thread_fiber_sp_init: 14CB */
2791#else
2792/* function thread_fiber_sp_init: 1441 */
2793#endif
2794
2795#ifndef HIVE_MULTIPLE_PROGRAMS
2796#ifndef HIVE_MEM_SP_PMEM_BASE
2797#define HIVE_MEM_SP_PMEM_BASE scalar_processor_2400_dmem
2798#define HIVE_ADDR_SP_PMEM_BASE 0x0
2799#define HIVE_SIZE_SP_PMEM_BASE 4
2800#else
2801#endif
2802#endif
2803#define HIVE_MEM_sp_SP_PMEM_BASE scalar_processor_2400_dmem
2804#define HIVE_ADDR_sp_SP_PMEM_BASE 0x0
2805#define HIVE_SIZE_sp_SP_PMEM_BASE 4
2806
2807#ifndef HIVE_MULTIPLE_PROGRAMS
2808#ifndef HIVE_MEM_sp_isp_input_stream_format
2809#define HIVE_MEM_sp_isp_input_stream_format scalar_processor_2400_dmem
2810#ifndef ISP2401
2811#define HIVE_ADDR_sp_isp_input_stream_format 0x3E2C
2812#else
2813#define HIVE_ADDR_sp_isp_input_stream_format 0x3E50
2814#endif
2815#define HIVE_SIZE_sp_isp_input_stream_format 20
2816#else
2817#endif
2818#endif
2819#define HIVE_MEM_sp_sp_isp_input_stream_format scalar_processor_2400_dmem
2820#ifndef ISP2401
2821#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E2C
2822#else
2823#define HIVE_ADDR_sp_sp_isp_input_stream_format 0x3E50
2824#endif
2825#define HIVE_SIZE_sp_sp_isp_input_stream_format 20
2826
2827#ifndef ISP2401
2828/* function __mod: 6866 */
2829#else
2830/* function __mod: 6A64 */
2831#endif
2832
2833#ifndef ISP2401
2834/* function ia_css_dmaproxy_sp_init_dmem_channel: 3B6B */
2835#else
2836/* function ia_css_dmaproxy_sp_init_dmem_channel: 3CCB */
2837#endif
2838
2839#ifndef ISP2401
2840/* function ia_css_thread_sp_join: 139B */
2841#else
2842/* function ia_css_thread_sp_join: 1311 */
2843#endif
2844
2845#ifndef ISP2401
2846/* function ia_css_dmaproxy_sp_add_command: 6EF1 */
2847#else
2848/* function ia_css_dmaproxy_sp_add_command: 712E */
2849#endif
2850
2851#ifndef ISP2401
2852/* function ia_css_sp_metadata_thread_func: 5DDF */
2853#else
2854/* function ia_css_sp_metadata_thread_func: 5EC1 */
2855#endif
2856
2857#ifndef ISP2401
2858/* function __sp_event_proxy_func_critical: 6934 */
2859#else
2860/* function __sp_event_proxy_func_critical: 6B32 */
2861#endif
2862
2863#ifndef ISP2401
2864/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 5F53 */
2865#else
2866/* function ia_css_pipeline_sp_wait_for_isys_stream_N: 6074 */
2867#endif
2868
2869#ifndef ISP2401
2870/* function ia_css_sp_metadata_wait: 5DD8 */
2871#else
2872/* function ia_css_sp_metadata_wait: 5EBA */
2873#endif
2874
2875#ifndef ISP2401
2876/* function ia_css_circbuf_peek_from_start: 15A4 */
2877#else
2878/* function ia_css_circbuf_peek_from_start: 151A */
2879#endif
2880
2881#ifndef ISP2401
2882/* function ia_css_event_sp_encode: 3E76 */
2883#else
2884/* function ia_css_event_sp_encode: 3FEB */
2885#endif
2886
2887#ifndef ISP2401
2888/* function ia_css_thread_sp_run: 140E */
2889#else
2890/* function ia_css_thread_sp_run: 1384 */
2891#endif
2892
2893#ifndef ISP2401
2894/* function sp_isys_copy_func: 618 */
2895#else
2896/* function sp_isys_copy_func: 5AC */
2897#endif
2898
2899#ifndef ISP2401
2900/* function ia_css_sp_isp_param_init_isp_memories: 50A3 */
2901#else
2902/* function ia_css_sp_isp_param_init_isp_memories: 52AC */
2903#endif
2904
2905#ifndef ISP2401
2906/* function register_isr: 921 */
2907#else
2908/* function register_isr: 8B5 */
2909#endif
2910
2911/* function irq_raise: C8 */
2912
2913#ifndef ISP2401
2914/* function ia_css_dmaproxy_sp_mmu_invalidate: 3A48 */
2915#else
2916/* function ia_css_dmaproxy_sp_mmu_invalidate: 3B71 */
2917#endif
2918
2919#ifndef ISP2401
2920/* function csi_rx_backend_disable: C34 */
2921#else
2922/* function csi_rx_backend_disable: C2E */
2923#endif
2924
2925#ifndef ISP2401
2926/* function pipeline_sp_initialize_stage: 2104 */
2927#else
2928/* function pipeline_sp_initialize_stage: 20BF */
2929#endif
2930
2931#ifndef HIVE_MULTIPLE_PROGRAMS
2932#ifndef HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES
2933#define HIVE_MEM_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem
2934#define HIVE_ADDR_N_CSI_RX_FE_CTRL_DLANES 0x1C4
2935#define HIVE_SIZE_N_CSI_RX_FE_CTRL_DLANES 12
2936#else
2937#endif
2938#endif
2939#define HIVE_MEM_sp_N_CSI_RX_FE_CTRL_DLANES scalar_processor_2400_dmem
2940#define HIVE_ADDR_sp_N_CSI_RX_FE_CTRL_DLANES 0x1C4
2941#define HIVE_SIZE_sp_N_CSI_RX_FE_CTRL_DLANES 12
2942
2943#ifndef ISP2401
2944/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 6DC0 */
2945#else
2946/* function ia_css_dmaproxy_sp_read_byte_addr_mmio: 700E */
2947#endif
2948
2949#ifndef ISP2401
2950/* function ia_css_ispctrl_sp_done_ds: 40BD */
2951#else
2952/* function ia_css_ispctrl_sp_done_ds: 426D */
2953#endif
2954
2955#ifndef ISP2401
2956/* function csi_rx_backend_config: C8B */
2957#else
2958/* function csi_rx_backend_config: C85 */
2959#endif
2960
2961#ifndef ISP2401
2962/* function ia_css_sp_isp_param_get_mem_inits: 507E */
2963#else
2964/* function ia_css_sp_isp_param_get_mem_inits: 5287 */
2965#endif
2966
2967#ifndef ISP2401
2968/* function ia_css_parambuf_sp_init_buffer_queues: 1A85 */
2969#else
2970/* function ia_css_parambuf_sp_init_buffer_queues: 1A27 */
2971#endif
2972
2973#ifndef HIVE_MULTIPLE_PROGRAMS
2974#ifndef HIVE_MEM_vbuf_pfp_spref
2975#define HIVE_MEM_vbuf_pfp_spref scalar_processor_2400_dmem
2976#ifndef ISP2401
2977#define HIVE_ADDR_vbuf_pfp_spref 0x378
2978#else
2979#define HIVE_ADDR_vbuf_pfp_spref 0x390
2980#endif
2981#define HIVE_SIZE_vbuf_pfp_spref 4
2982#else
2983#endif
2984#endif
2985#define HIVE_MEM_sp_vbuf_pfp_spref scalar_processor_2400_dmem
2986#ifndef ISP2401
2987#define HIVE_ADDR_sp_vbuf_pfp_spref 0x378
2988#else
2989#define HIVE_ADDR_sp_vbuf_pfp_spref 0x390
2990#endif
2991#define HIVE_SIZE_sp_vbuf_pfp_spref 4
2992
2993#ifndef HIVE_MULTIPLE_PROGRAMS
2994#ifndef HIVE_MEM_ISP_HMEM_BASE
2995#define HIVE_MEM_ISP_HMEM_BASE scalar_processor_2400_dmem
2996#define HIVE_ADDR_ISP_HMEM_BASE 0x20
2997#define HIVE_SIZE_ISP_HMEM_BASE 4
2998#else
2999#endif
3000#endif
3001#define HIVE_MEM_sp_ISP_HMEM_BASE scalar_processor_2400_dmem
3002#define HIVE_ADDR_sp_ISP_HMEM_BASE 0x20
3003#define HIVE_SIZE_sp_ISP_HMEM_BASE 4
3004
3005#ifndef HIVE_MULTIPLE_PROGRAMS
3006#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_frames
3007#define HIVE_MEM_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem
3008#ifndef ISP2401
3009#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6A74
3010#else
3011#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_frames 0x6B20
3012#endif
3013#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_frames 280
3014#else
3015#endif
3016#endif
3017#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_frames scalar_processor_2400_dmem
3018#ifndef ISP2401
3019#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6A74
3020#else
3021#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_frames 0x6B20
3022#endif
3023#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_frames 280
3024
3025#ifndef ISP2401
3026/* function qos_scheduler_init_stage_budget: 65A7 */
3027#else
3028/* function qos_scheduler_init_stage_budget: 679A */
3029#endif
3030
3031#ifndef HIVE_MULTIPLE_PROGRAMS
3032#ifndef HIVE_MEM_sp2host_buffer_queue_handle
3033#define HIVE_MEM_sp2host_buffer_queue_handle scalar_processor_2400_dmem
3034#ifndef ISP2401
3035#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6B8C
3036#else
3037#define HIVE_ADDR_sp2host_buffer_queue_handle 0x6C38
3038#endif
3039#define HIVE_SIZE_sp2host_buffer_queue_handle 96
3040#else
3041#endif
3042#endif
3043#define HIVE_MEM_sp_sp2host_buffer_queue_handle scalar_processor_2400_dmem
3044#ifndef ISP2401
3045#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6B8C
3046#else
3047#define HIVE_ADDR_sp_sp2host_buffer_queue_handle 0x6C38
3048#endif
3049#define HIVE_SIZE_sp_sp2host_buffer_queue_handle 96
3050
3051#ifndef ISP2401
3052/* function ia_css_ispctrl_sp_init_isp_vars: 4D9D */
3053#else
3054/* function ia_css_ispctrl_sp_init_isp_vars: 4F79 */
3055#endif
3056
3057#ifndef ISP2401
3058/* function ia_css_isys_stream_start: 6010 */
3059#else
3060/* function ia_css_isys_stream_start: 6187 */
3061#endif
3062
3063#ifndef ISP2401
3064/* function sp_warning: 954 */
3065#else
3066/* function sp_warning: 8E8 */
3067#endif
3068
3069#ifndef ISP2401
3070/* function ia_css_rmgr_sp_vbuf_enqueue: 62DC */
3071#else
3072/* function ia_css_rmgr_sp_vbuf_enqueue: 64A2 */
3073#endif
3074
3075#ifndef ISP2401
3076/* function ia_css_tagger_sp_tag_exp_id: 2A84 */
3077#else
3078/* function ia_css_tagger_sp_tag_exp_id: 2A55 */
3079#endif
3080
3081#ifndef ISP2401
3082/* function ia_css_pipeline_sp_sfi_release_current_frame: 276B */
3083#else
3084/* function ia_css_pipeline_sp_sfi_release_current_frame: 273C */
3085#endif
3086
3087#ifndef ISP2401
3088/* function ia_css_dmaproxy_sp_write: 3B21 */
3089#else
3090/* function ia_css_dmaproxy_sp_write: 3C81 */
3091#endif
3092
3093#ifndef ISP2401
3094/* function ia_css_isys_stream_start_async: 608A */
3095#else
3096/* function ia_css_isys_stream_start_async: 6250 */
3097#endif
3098
3099#ifndef ISP2401
3100/* function ia_css_parambuf_sp_release_in_param: 1905 */
3101#else
3102/* function ia_css_parambuf_sp_release_in_param: 187B */
3103#endif
3104
3105#ifndef HIVE_MULTIPLE_PROGRAMS
3106#ifndef HIVE_MEM_irq_sw_interrupt_token
3107#define HIVE_MEM_irq_sw_interrupt_token scalar_processor_2400_dmem
3108#ifndef ISP2401
3109#define HIVE_ADDR_irq_sw_interrupt_token 0x3E28
3110#else
3111#define HIVE_ADDR_irq_sw_interrupt_token 0x3E4C
3112#endif
3113#define HIVE_SIZE_irq_sw_interrupt_token 4
3114#else
3115#endif
3116#endif
3117#define HIVE_MEM_sp_irq_sw_interrupt_token scalar_processor_2400_dmem
3118#ifndef ISP2401
3119#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E28
3120#else
3121#define HIVE_ADDR_sp_irq_sw_interrupt_token 0x3E4C
3122#endif
3123#define HIVE_SIZE_sp_irq_sw_interrupt_token 4
3124
3125#ifndef HIVE_MULTIPLE_PROGRAMS
3126#ifndef HIVE_MEM_sp_isp_addresses
3127#define HIVE_MEM_sp_isp_addresses scalar_processor_2400_dmem
3128#ifndef ISP2401
3129#define HIVE_ADDR_sp_isp_addresses 0x6FDC
3130#else
3131#define HIVE_ADDR_sp_isp_addresses 0x708C
3132#endif
3133#define HIVE_SIZE_sp_isp_addresses 172
3134#else
3135#endif
3136#endif
3137#define HIVE_MEM_sp_sp_isp_addresses scalar_processor_2400_dmem
3138#ifndef ISP2401
3139#define HIVE_ADDR_sp_sp_isp_addresses 0x6FDC
3140#else
3141#define HIVE_ADDR_sp_sp_isp_addresses 0x708C
3142#endif
3143#define HIVE_SIZE_sp_sp_isp_addresses 172
3144
3145#ifndef ISP2401
3146/* function ia_css_rmgr_sp_acq_gen: 6201 */
3147#else
3148/* function ia_css_rmgr_sp_acq_gen: 63C7 */
3149#endif
3150
3151#ifndef ISP2401
3152/* function input_system_input_port_open: 10ED */
3153#else
3154/* function input_system_input_port_open: 10E7 */
3155#endif
3156
3157#ifndef HIVE_MULTIPLE_PROGRAMS
3158#ifndef HIVE_MEM_isps
3159#define HIVE_MEM_isps scalar_processor_2400_dmem
3160#ifndef ISP2401
3161#define HIVE_ADDR_isps 0x737C
3162#else
3163#define HIVE_ADDR_isps 0x7428
3164#endif
3165#define HIVE_SIZE_isps 28
3166#else
3167#endif
3168#endif
3169#define HIVE_MEM_sp_isps scalar_processor_2400_dmem
3170#ifndef ISP2401
3171#define HIVE_ADDR_sp_isps 0x737C
3172#else
3173#define HIVE_ADDR_sp_isps 0x7428
3174#endif
3175#define HIVE_SIZE_sp_isps 28
3176
3177#ifndef HIVE_MULTIPLE_PROGRAMS
3178#ifndef HIVE_MEM_host_sp_queues_initialized
3179#define HIVE_MEM_host_sp_queues_initialized scalar_processor_2400_dmem
3180#ifndef ISP2401
3181#define HIVE_ADDR_host_sp_queues_initialized 0x3E40
3182#else
3183#define HIVE_ADDR_host_sp_queues_initialized 0x3E64
3184#endif
3185#define HIVE_SIZE_host_sp_queues_initialized 4
3186#else
3187#endif
3188#endif
3189#define HIVE_MEM_sp_host_sp_queues_initialized scalar_processor_2400_dmem
3190#ifndef ISP2401
3191#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E40
3192#else
3193#define HIVE_ADDR_sp_host_sp_queues_initialized 0x3E64
3194#endif
3195#define HIVE_SIZE_sp_host_sp_queues_initialized 4
3196
3197#ifndef ISP2401
3198/* function ia_css_queue_uninit: 54E6 */
3199#else
3200/* function ia_css_queue_uninit: 56C5 */
3201#endif
3202
3203#ifndef HIVE_MULTIPLE_PROGRAMS
3204#ifndef HIVE_MEM_ia_css_ispctrl_sp_isp_started
3205#define HIVE_MEM_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem
3206#ifndef ISP2401
3207#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6C94
3208#else
3209#define HIVE_ADDR_ia_css_ispctrl_sp_isp_started 0x6D40
3210#endif
3211#define HIVE_SIZE_ia_css_ispctrl_sp_isp_started 4
3212#else
3213#endif
3214#endif
3215#define HIVE_MEM_sp_ia_css_ispctrl_sp_isp_started scalar_processor_2400_dmem
3216#ifndef ISP2401
3217#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6C94
3218#else
3219#define HIVE_ADDR_sp_ia_css_ispctrl_sp_isp_started 0x6D40
3220#endif
3221#define HIVE_SIZE_sp_ia_css_ispctrl_sp_isp_started 4
3222
3223#ifndef ISP2401
3224/* function ia_css_bufq_sp_release_dynamic_buf: 36F2 */
3225#else
3226/* function ia_css_bufq_sp_release_dynamic_buf: 3815 */
3227#endif
3228
3229#ifndef ISP2401
3230/* function ia_css_dmaproxy_sp_set_height_exception: 3C19 */
3231#else
3232/* function ia_css_dmaproxy_sp_set_height_exception: 3D8E */
3233#endif
3234
3235#ifndef ISP2401
3236/* function ia_css_dmaproxy_sp_init_vmem_channel: 3B9E */
3237#else
3238/* function ia_css_dmaproxy_sp_init_vmem_channel: 3CFF */
3239#endif
3240
3241#ifndef ISP2401
3242/* function csi_rx_backend_stop: C57 */
3243#else
3244/* function csi_rx_backend_stop: C51 */
3245#endif
3246
3247#ifndef ISP2401
3248#ifndef HIVE_MULTIPLE_PROGRAMS
3249#ifndef HIVE_MEM_num_ready_threads
3250#define HIVE_MEM_num_ready_threads scalar_processor_2400_dmem
3251#define HIVE_ADDR_num_ready_threads 0x5A7C
3252#define HIVE_SIZE_num_ready_threads 4
3253#else
3254#endif
3255#endif
3256#define HIVE_MEM_sp_num_ready_threads scalar_processor_2400_dmem
3257#define HIVE_ADDR_sp_num_ready_threads 0x5A7C
3258#define HIVE_SIZE_sp_num_ready_threads 4
3259
3260/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3AF3 */
3261#else
3262/* function ia_css_dmaproxy_sp_write_byte_addr_mmio: 3C53 */
3263#endif
3264
3265#ifndef HIVE_MULTIPLE_PROGRAMS
3266#ifndef HIVE_MEM_vbuf_spref
3267#define HIVE_MEM_vbuf_spref scalar_processor_2400_dmem
3268#ifndef ISP2401
3269#define HIVE_ADDR_vbuf_spref 0x374
3270#else
3271#define HIVE_ADDR_vbuf_spref 0x38C
3272#endif
3273#define HIVE_SIZE_vbuf_spref 4
3274#else
3275#endif
3276#endif
3277#define HIVE_MEM_sp_vbuf_spref scalar_processor_2400_dmem
3278#ifndef ISP2401
3279#define HIVE_ADDR_sp_vbuf_spref 0x374
3280#else
3281#define HIVE_ADDR_sp_vbuf_spref 0x38C
3282#endif
3283#define HIVE_SIZE_sp_vbuf_spref 4
3284
3285#ifndef ISP2401
3286/* function ia_css_queue_enqueue: 5430 */
3287#else
3288/* function ia_css_queue_enqueue: 560F */
3289#endif
3290
3291#ifndef HIVE_MULTIPLE_PROGRAMS
3292#ifndef HIVE_MEM_ia_css_flash_sp_request
3293#define HIVE_MEM_ia_css_flash_sp_request scalar_processor_2400_dmem
3294#ifndef ISP2401
3295#define HIVE_ADDR_ia_css_flash_sp_request 0x5B30
3296#else
3297#define HIVE_ADDR_ia_css_flash_sp_request 0x5BDC
3298#endif
3299#define HIVE_SIZE_ia_css_flash_sp_request 4
3300#else
3301#endif
3302#endif
3303#define HIVE_MEM_sp_ia_css_flash_sp_request scalar_processor_2400_dmem
3304#ifndef ISP2401
3305#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5B30
3306#else
3307#define HIVE_ADDR_sp_ia_css_flash_sp_request 0x5BDC
3308#endif
3309#define HIVE_SIZE_sp_ia_css_flash_sp_request 4
3310
3311#ifndef ISP2401
3312/* function ia_css_dmaproxy_sp_vmem_write: 3AC4 */
3313#else
3314/* function ia_css_dmaproxy_sp_vmem_write: 3C24 */
3315#endif
3316
3317#ifndef HIVE_MULTIPLE_PROGRAMS
3318#ifndef HIVE_MEM_tagger_frames
3319#define HIVE_MEM_tagger_frames scalar_processor_2400_dmem
3320#ifndef ISP2401
3321#define HIVE_ADDR_tagger_frames 0x5A84
3322#else
3323#define HIVE_ADDR_tagger_frames 0x5B30
3324#endif
3325#define HIVE_SIZE_tagger_frames 168
3326#else
3327#endif
3328#endif
3329#define HIVE_MEM_sp_tagger_frames scalar_processor_2400_dmem
3330#ifndef ISP2401
3331#define HIVE_ADDR_sp_tagger_frames 0x5A84
3332#else
3333#define HIVE_ADDR_sp_tagger_frames 0x5B30
3334#endif
3335#define HIVE_SIZE_sp_tagger_frames 168
3336
3337#ifndef HIVE_MULTIPLE_PROGRAMS
3338#ifndef HIVE_MEM_sem_for_reading_if
3339#define HIVE_MEM_sem_for_reading_if scalar_processor_2400_dmem
3340#ifndef ISP2401
3341#define HIVE_ADDR_sem_for_reading_if 0x58A4
3342#else
3343#define HIVE_ADDR_sem_for_reading_if 0x5940
3344#endif
3345#define HIVE_SIZE_sem_for_reading_if 20
3346#else
3347#endif
3348#endif
3349#define HIVE_MEM_sp_sem_for_reading_if scalar_processor_2400_dmem
3350#ifndef ISP2401
3351#define HIVE_ADDR_sp_sem_for_reading_if 0x58A4
3352#else
3353#define HIVE_ADDR_sp_sem_for_reading_if 0x5940
3354#endif
3355#define HIVE_SIZE_sp_sem_for_reading_if 20
3356
3357#ifndef ISP2401
3358/* function sp_generate_interrupts: 9D3 */
3359#else
3360/* function sp_generate_interrupts: 967 */
3361
3362/* function ia_css_pipeline_sp_start: 1FC2 */
3363#endif
3364
3365#ifndef ISP2401
3366/* function ia_css_pipeline_sp_start: 2007 */
3367#else
3368/* function ia_css_thread_default_callout: 6C8F */
3369#endif
3370
3371#ifndef ISP2401
3372/* function csi_rx_backend_enable: C45 */
3373#else
3374/* function csi_rx_backend_enable: C3F */
3375#endif
3376
3377#ifndef ISP2401
3378/* function ia_css_sp_rawcopy_init: 5953 */
3379#else
3380/* function ia_css_sp_rawcopy_init: 5B32 */
3381#endif
3382
3383#ifndef ISP2401
3384/* function input_system_input_port_configure: 113F */
3385#else
3386/* function input_system_input_port_configure: 1139 */
3387#endif
3388
3389#ifndef ISP2401
3390/* function tmr_clock_read: 16EF */
3391#else
3392/* function tmr_clock_read: 1665 */
3393#endif
3394
3395#ifndef HIVE_MULTIPLE_PROGRAMS
3396#ifndef HIVE_MEM_ISP_BAMEM_BASE
3397#define HIVE_MEM_ISP_BAMEM_BASE scalar_processor_2400_dmem
3398#ifndef ISP2401
3399#define HIVE_ADDR_ISP_BAMEM_BASE 0x380
3400#else
3401#define HIVE_ADDR_ISP_BAMEM_BASE 0x398
3402#endif
3403#define HIVE_SIZE_ISP_BAMEM_BASE 4
3404#else
3405#endif
3406#endif
3407#define HIVE_MEM_sp_ISP_BAMEM_BASE scalar_processor_2400_dmem
3408#ifndef ISP2401
3409#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x380
3410#else
3411#define HIVE_ADDR_sp_ISP_BAMEM_BASE 0x398
3412#endif
3413#define HIVE_SIZE_sp_ISP_BAMEM_BASE 4
3414
3415#ifndef HIVE_MULTIPLE_PROGRAMS
3416#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues
3417#define HIVE_MEM_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem
3418#ifndef ISP2401
3419#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6BEC
3420#else
3421#define HIVE_ADDR_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98
3422#endif
3423#define HIVE_SIZE_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160
3424#else
3425#endif
3426#endif
3427#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues scalar_processor_2400_dmem
3428#ifndef ISP2401
3429#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6BEC
3430#else
3431#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 0x6C98
3432#endif
3433#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_sp2host_buf_queues 160
3434
3435#ifndef ISP2401
3436/* function isys2401_dma_config_legacy: DE0 */
3437#else
3438/* function isys2401_dma_config_legacy: DDA */
3439#endif
3440
3441#ifndef HIVE_MULTIPLE_PROGRAMS
3442#ifndef HIVE_MEM_ibuf_ctrl_master_ports
3443#define HIVE_MEM_ibuf_ctrl_master_ports scalar_processor_2400_dmem
3444#define HIVE_ADDR_ibuf_ctrl_master_ports 0x208
3445#define HIVE_SIZE_ibuf_ctrl_master_ports 12
3446#else
3447#endif
3448#endif
3449#define HIVE_MEM_sp_ibuf_ctrl_master_ports scalar_processor_2400_dmem
3450#define HIVE_ADDR_sp_ibuf_ctrl_master_ports 0x208
3451#define HIVE_SIZE_sp_ibuf_ctrl_master_ports 12
3452
3453#ifndef ISP2401
3454/* function css_get_frame_processing_time_start: 28F1 */
3455#else
3456/* function css_get_frame_processing_time_start: 28C2 */
3457#endif
3458
3459#ifndef HIVE_MULTIPLE_PROGRAMS
3460#ifndef HIVE_MEM_sp_all_cbs_frame
3461#define HIVE_MEM_sp_all_cbs_frame scalar_processor_2400_dmem
3462#ifndef ISP2401
3463#define HIVE_ADDR_sp_all_cbs_frame 0x58B8
3464#else
3465#define HIVE_ADDR_sp_all_cbs_frame 0x5954
3466#endif
3467#define HIVE_SIZE_sp_all_cbs_frame 16
3468#else
3469#endif
3470#endif
3471#define HIVE_MEM_sp_sp_all_cbs_frame scalar_processor_2400_dmem
3472#ifndef ISP2401
3473#define HIVE_ADDR_sp_sp_all_cbs_frame 0x58B8
3474#else
3475#define HIVE_ADDR_sp_sp_all_cbs_frame 0x5954
3476#endif
3477#define HIVE_SIZE_sp_sp_all_cbs_frame 16
3478
3479#ifndef ISP2401
3480/* function ia_css_virtual_isys_sp_isr: 6F07 */
3481#else
3482/* function ia_css_virtual_isys_sp_isr: 716E */
3483#endif
3484
3485#ifndef ISP2401
3486/* function thread_sp_queue_print: 142B */
3487#else
3488/* function thread_sp_queue_print: 13A1 */
3489#endif
3490
3491#ifndef ISP2401
3492/* function sp_notify_eof: 97F */
3493#else
3494/* function sp_notify_eof: 913 */
3495#endif
3496
3497#ifndef HIVE_MULTIPLE_PROGRAMS
3498#ifndef HIVE_MEM_sem_for_str2mem
3499#define HIVE_MEM_sem_for_str2mem scalar_processor_2400_dmem
3500#ifndef ISP2401
3501#define HIVE_ADDR_sem_for_str2mem 0x58C8
3502#else
3503#define HIVE_ADDR_sem_for_str2mem 0x5964
3504#endif
3505#define HIVE_SIZE_sem_for_str2mem 20
3506#else
3507#endif
3508#endif
3509#define HIVE_MEM_sp_sem_for_str2mem scalar_processor_2400_dmem
3510#ifndef ISP2401
3511#define HIVE_ADDR_sp_sem_for_str2mem 0x58C8
3512#else
3513#define HIVE_ADDR_sp_sem_for_str2mem 0x5964
3514#endif
3515#define HIVE_SIZE_sp_sem_for_str2mem 20
3516
3517#ifndef ISP2401
3518/* function ia_css_tagger_buf_sp_is_marked_from_start: 3483 */
3519#else
3520/* function ia_css_tagger_buf_sp_is_marked_from_start: 35A6 */
3521#endif
3522
3523#ifndef ISP2401
3524/* function ia_css_bufq_sp_acquire_dynamic_buf: 38AA */
3525#else
3526/* function ia_css_bufq_sp_acquire_dynamic_buf: 39CD */
3527#endif
3528
3529#ifndef ISP2401
3530/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 28BF */
3531#else
3532/* function ia_css_pipeline_sp_sfi_mode_is_enabled: 2890 */
3533#endif
3534
3535#ifndef ISP2401
3536/* function ia_css_circbuf_destroy: 16B9 */
3537#else
3538/* function ia_css_circbuf_destroy: 162F */
3539#endif
3540
3541#ifndef HIVE_MULTIPLE_PROGRAMS
3542#ifndef HIVE_MEM_ISP_PMEM_BASE
3543#define HIVE_MEM_ISP_PMEM_BASE scalar_processor_2400_dmem
3544#define HIVE_ADDR_ISP_PMEM_BASE 0xC
3545#define HIVE_SIZE_ISP_PMEM_BASE 4
3546#else
3547#endif
3548#endif
3549#define HIVE_MEM_sp_ISP_PMEM_BASE scalar_processor_2400_dmem
3550#define HIVE_ADDR_sp_ISP_PMEM_BASE 0xC
3551#define HIVE_SIZE_sp_ISP_PMEM_BASE 4
3552
3553#ifndef ISP2401
3554/* function ia_css_sp_isp_param_mem_load: 5011 */
3555#else
3556/* function ia_css_sp_isp_param_mem_load: 521A */
3557#endif
3558
3559#ifndef ISP2401
3560/* function ia_css_tagger_buf_sp_pop_from_start: 326F */
3561#else
3562/* function ia_css_tagger_buf_sp_pop_from_start: 3392 */
3563#endif
3564
3565#ifndef ISP2401
3566/* function __div: 681E */
3567#else
3568/* function __div: 6A1C */
3569#endif
3570
3571#ifndef ISP2401
3572/* function ia_css_rmgr_sp_refcount_release_vbuf: 62FB */
3573#else
3574/* function ia_css_rmgr_sp_refcount_release_vbuf: 64C1 */
3575#endif
3576
3577#ifndef HIVE_MULTIPLE_PROGRAMS
3578#ifndef HIVE_MEM_ia_css_flash_sp_in_use
3579#define HIVE_MEM_ia_css_flash_sp_in_use scalar_processor_2400_dmem
3580#ifndef ISP2401
3581#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5B34
3582#else
3583#define HIVE_ADDR_ia_css_flash_sp_in_use 0x5BE0
3584#endif
3585#define HIVE_SIZE_ia_css_flash_sp_in_use 4
3586#else
3587#endif
3588#endif
3589#define HIVE_MEM_sp_ia_css_flash_sp_in_use scalar_processor_2400_dmem
3590#ifndef ISP2401
3591#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5B34
3592#else
3593#define HIVE_ADDR_sp_ia_css_flash_sp_in_use 0x5BE0
3594#endif
3595#define HIVE_SIZE_sp_ia_css_flash_sp_in_use 4
3596
3597#ifndef ISP2401
3598/* function ia_css_thread_sem_sp_wait: 6AE4 */
3599#else
3600/* function ia_css_thread_sem_sp_wait: 6D63 */
3601#endif
3602
3603#ifndef HIVE_MULTIPLE_PROGRAMS
3604#ifndef HIVE_MEM_sp_sleep_mode
3605#define HIVE_MEM_sp_sleep_mode scalar_processor_2400_dmem
3606#ifndef ISP2401
3607#define HIVE_ADDR_sp_sleep_mode 0x3E44
3608#else
3609#define HIVE_ADDR_sp_sleep_mode 0x3E68
3610#endif
3611#define HIVE_SIZE_sp_sleep_mode 4
3612#else
3613#endif
3614#endif
3615#define HIVE_MEM_sp_sp_sleep_mode scalar_processor_2400_dmem
3616#ifndef ISP2401
3617#define HIVE_ADDR_sp_sp_sleep_mode 0x3E44
3618#else
3619#define HIVE_ADDR_sp_sp_sleep_mode 0x3E68
3620#endif
3621#define HIVE_SIZE_sp_sp_sleep_mode 4
3622
3623#ifndef ISP2401
3624/* function ia_css_tagger_buf_sp_push: 337E */
3625#else
3626/* function ia_css_tagger_buf_sp_push: 34A1 */
3627#endif
3628
3629/* function mmu_invalidate_cache: D3 */
3630
3631#ifndef HIVE_MULTIPLE_PROGRAMS
3632#ifndef HIVE_MEM_sp_max_cb_elems
3633#define HIVE_MEM_sp_max_cb_elems scalar_processor_2400_dmem
3634#define HIVE_ADDR_sp_max_cb_elems 0x148
3635#define HIVE_SIZE_sp_max_cb_elems 8
3636#else
3637#endif
3638#endif
3639#define HIVE_MEM_sp_sp_max_cb_elems scalar_processor_2400_dmem
3640#define HIVE_ADDR_sp_sp_max_cb_elems 0x148
3641#define HIVE_SIZE_sp_sp_max_cb_elems 8
3642
3643#ifndef ISP2401
3644/* function ia_css_queue_remote_init: 5508 */
3645#else
3646/* function ia_css_queue_remote_init: 56E7 */
3647#endif
3648
3649#ifndef HIVE_MULTIPLE_PROGRAMS
3650#ifndef HIVE_MEM_isp_stop_req
3651#define HIVE_MEM_isp_stop_req scalar_processor_2400_dmem
3652#ifndef ISP2401
3653#define HIVE_ADDR_isp_stop_req 0x575C
3654#else
3655#define HIVE_ADDR_isp_stop_req 0x57F8
3656#endif
3657#define HIVE_SIZE_isp_stop_req 4
3658#else
3659#endif
3660#endif
3661#define HIVE_MEM_sp_isp_stop_req scalar_processor_2400_dmem
3662#ifndef ISP2401
3663#define HIVE_ADDR_sp_isp_stop_req 0x575C
3664#else
3665#define HIVE_ADDR_sp_isp_stop_req 0x57F8
3666#endif
3667#define HIVE_SIZE_sp_isp_stop_req 4
3668
3669#ifndef ISP2401
3670/* function ia_css_pipeline_sp_sfi_request_next_frame: 2781 */
3671#else
3672/* function ia_css_pipeline_sp_sfi_request_next_frame: 2752 */
3673#endif
3674
3675#ifndef ISP2401
3676#define HIVE_ICACHE_sp_critical_SEGMENT_START 0
3677#define HIVE_ICACHE_sp_critical_NUM_SEGMENTS 1
3678#endif
3679
3680#endif /* _sp_map_h_ */
3681#ifndef ISP2401
3682extern void sh_css_dump_sp_dmem(void);
3683void sh_css_dump_sp_dmem(void)
3684{
3685}
3686#endif
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