[mirror_ubuntu-artful-kernel.git] / drivers / staging / msm / mddihost.h

/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Code Aurora nor
 *       the names of its contributors may be used to endorse or promote
 *       products derived from this software without specific prior written
 *       permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NON-INFRINGEMENT ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef MDDIHOST_H
#define MDDIHOST_H

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include "linux/proc_fs.h"
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>

#include <mach/hardware.h>
#include <linux/io.h>

#include <asm/system.h>
#include <asm/mach-types.h>

#include "msm_fb_panel.h"

#undef FEATURE_MDDI_MC4
#undef FEATURE_MDDI_S6D0142
#undef FEATURE_MDDI_HITACHI
#define FEATURE_MDDI_SHARP
#define FEATURE_MDDI_TOSHIBA
#undef FEATURE_MDDI_E751
#define FEATURE_MDDI_CORONA
#define FEATURE_MDDI_PRISM

#define T_MSM7500

typedef enum {
	format_16bpp,
	format_18bpp,
	format_24bpp
} mddi_video_format;

typedef enum {
	MDDI_LCD_NONE = 0,
	MDDI_LCD_MC4,
	MDDI_LCD_S6D0142,
	MDDI_LCD_SHARP,
	MDDI_LCD_E751,
	MDDI_LCD_CORONA,
	MDDI_LCD_HITACHI,
	MDDI_LCD_TOSHIBA,
	MDDI_LCD_PRISM,
	MDDI_LCD_TP2,
	MDDI_NUM_LCD_TYPES,
	MDDI_LCD_DEFAULT = MDDI_LCD_TOSHIBA
} mddi_lcd_type;

typedef enum {
	MDDI_HOST_PRIM = 0,
	MDDI_HOST_EXT,
	MDDI_NUM_HOST_CORES
} mddi_host_type;

typedef enum {
	MDDI_DRIVER_RESET,	/* host core registers have not been written. */
	MDDI_DRIVER_DISABLED,	/* registers written, interrupts disabled. */
	MDDI_DRIVER_ENABLED	/* registers written, interrupts enabled. */
} mddi_host_driver_state_type;

typedef enum {
	MDDI_GPIO_INT_0 = 0,
	MDDI_GPIO_INT_1,
	MDDI_GPIO_INT_2,
	MDDI_GPIO_INT_3,
	MDDI_GPIO_INT_4,
	MDDI_GPIO_INT_5,
	MDDI_GPIO_INT_6,
	MDDI_GPIO_INT_7,
	MDDI_GPIO_INT_8,
	MDDI_GPIO_INT_9,
	MDDI_GPIO_INT_10,
	MDDI_GPIO_INT_11,
	MDDI_GPIO_INT_12,
	MDDI_GPIO_INT_13,
	MDDI_GPIO_INT_14,
	MDDI_GPIO_INT_15,
	MDDI_GPIO_NUM_INTS
} mddi_gpio_int_type;

enum mddi_data_packet_size_type {
	MDDI_DATA_PACKET_4_BYTES  = 4,
	MDDI_DATA_PACKET_8_BYTES  = 8,
	MDDI_DATA_PACKET_12_BYTES = 12,
	MDDI_DATA_PACKET_16_BYTES = 16,
	MDDI_DATA_PACKET_24_BYTES = 24
};

typedef struct {
	uint32 addr;
	uint32 value;
} mddi_reg_write_type;

boolean mddi_vsync_set_handler(msm_fb_vsync_handler_type handler, void *arg);

typedef void (*mddi_llist_done_cb_type) (void);

typedef void (*mddi_rev_handler_type) (void *);

boolean mddi_set_rev_handler(mddi_rev_handler_type handler, uint16 pkt_type);

#define MDDI_DEFAULT_PRIM_PIX_ATTR 0xC3
#define MDDI_DEFAULT_SECD_PIX_ATTR 0xC0

typedef int gpio_int_polarity_type;
typedef int gpio_int_handler_type;

typedef struct {
	void (*vsync_detected) (boolean);
} mddi_lcd_func_type;

extern mddi_lcd_func_type mddi_lcd;
void mddi_init(void);

void mddi_powerdown(void);

void mddi_host_start_ext_display(void);
void mddi_host_stop_ext_display(void);

extern spinlock_t mddi_host_spin_lock;
#ifdef T_MSM7500
void mddi_reset(void);
#ifdef FEATURE_DUAL_PROC_MODEM_DISPLAY
void mddi_host_switch_proc_control(boolean on);
#endif
#endif
void mddi_host_exit_power_collapse(void);

void mddi_queue_splash_screen
    (void *buf_ptr,
     boolean clear_area,
     int16 src_width,
     int16 src_starting_row,
     int16 src_starting_column,
     int16 num_of_rows,
     int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column);

void mddi_queue_image
    (void *buf_ptr,
     uint8 stereo_video,
     boolean clear_area,
     int16 src_width,
     int16 src_starting_row,
     int16 src_starting_column,
     int16 num_of_rows,
     int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column);

int mddi_host_register_read
    (uint32 reg_addr,
     uint32 *reg_value_ptr, boolean wait, mddi_host_type host_idx);
int mddi_host_register_write
    (uint32 reg_addr, uint32 reg_val,
     enum mddi_data_packet_size_type packet_size,
     boolean wait, mddi_llist_done_cb_type done_cb, mddi_host_type host);
boolean mddi_host_register_write_int
    (uint32 reg_addr,
     uint32 reg_val, mddi_llist_done_cb_type done_cb, mddi_host_type host);
boolean mddi_host_register_read_int
    (uint32 reg_addr, uint32 *reg_value_ptr, mddi_host_type host_idx);
void mddi_queue_register_write_static
    (uint32 reg_addr,
     uint32 reg_val, boolean wait, mddi_llist_done_cb_type done_cb);
void mddi_queue_static_window_adjust
    (const mddi_reg_write_type *reg_write,
     uint16 num_writes, mddi_llist_done_cb_type done_cb);

#define mddi_queue_register_read(reg, val_ptr, wait, sig) \
	mddi_host_register_read(reg, val_ptr, wait, MDDI_HOST_PRIM)
#define mddi_queue_register_write(reg, val, wait, sig) \
	mddi_host_register_write(reg, val, MDDI_DATA_PACKET_4_BYTES,\
	wait, NULL, MDDI_HOST_PRIM)
#define mddi_queue_register_write_extn(reg, val, pkt_size, wait, sig) \
	mddi_host_register_write(reg, val, pkt_size, \
	wait, NULL, MDDI_HOST_PRIM)
#define mddi_queue_register_write_int(reg, val) \
	mddi_host_register_write_int(reg, val, NULL, MDDI_HOST_PRIM)
#define mddi_queue_register_read_int(reg, val_ptr) \
	mddi_host_register_read_int(reg, val_ptr, MDDI_HOST_PRIM)
#define mddi_queue_register_writes(reg_ptr, val, wait, sig) \
	mddi_host_register_writes(reg_ptr, val, wait, sig, MDDI_HOST_PRIM)

void mddi_wait(uint16 time_ms);
void mddi_assign_max_pkt_dimensions(uint16 image_cols,
				    uint16 image_rows,
				    uint16 bpp,
				    uint16 *max_cols, uint16 * max_rows);
uint16 mddi_assign_pkt_height(uint16 pkt_width, uint16 pkt_height, uint16 bpp);
void mddi_queue_reverse_encapsulation(boolean wait);
void mddi_disable(int lock);
#endif /* MDDIHOST_H */
Commit	Line	Data
9d200153 SM	1	/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
	2	*
	3	* Redistribution and use in source and binary forms, with or without
	4	* modification, are permitted provided that the following conditions are met:
	5	* * Redistributions of source code must retain the above copyright
	6	* notice, this list of conditions and the following disclaimer.
	7	* * Redistributions in binary form must reproduce the above copyright
	8	* notice, this list of conditions and the following disclaimer in the
	9	* documentation and/or other materials provided with the distribution.
	10	* * Neither the name of Code Aurora nor
	11	* the names of its contributors may be used to endorse or promote
	12	* products derived from this software without specific prior written
	13	* permission.
	14	*
	15	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	16	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	17	* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	18	* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
	19	* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
	20	* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
	21	* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
	22	* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
	23	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
	24	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
	25	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	26	*
	27	*/
	28
	29	#ifndef MDDIHOST_H
	30	#define MDDIHOST_H
	31
	32	#include <linux/kernel.h>
	33	#include <linux/sched.h>
	34	#include <linux/time.h>
	35	#include <linux/init.h>
	36	#include <linux/interrupt.h>
	37	#include "linux/proc_fs.h"
	38	#include <linux/types.h>
	39	#include <linux/dma-mapping.h>
	40	#include <linux/clk.h>
	41
	42	#include <mach/hardware.h>
	43	#include <linux/io.h>
	44
	45	#include <asm/system.h>
	46	#include <asm/mach-types.h>
9d200153 SM	47
	48	#include "msm_fb_panel.h"
	49
	50	#undef FEATURE_MDDI_MC4
	51	#undef FEATURE_MDDI_S6D0142
	52	#undef FEATURE_MDDI_HITACHI
	53	#define FEATURE_MDDI_SHARP
	54	#define FEATURE_MDDI_TOSHIBA
	55	#undef FEATURE_MDDI_E751
	56	#define FEATURE_MDDI_CORONA
	57	#define FEATURE_MDDI_PRISM
	58
	59	#define T_MSM7500
	60
	61	typedef enum {
	62	format_16bpp,
	63	format_18bpp,
	64	format_24bpp
	65	} mddi_video_format;
	66
	67	typedef enum {
	68	MDDI_LCD_NONE = 0,
	69	MDDI_LCD_MC4,
	70	MDDI_LCD_S6D0142,
	71	MDDI_LCD_SHARP,
	72	MDDI_LCD_E751,
	73	MDDI_LCD_CORONA,
	74	MDDI_LCD_HITACHI,
	75	MDDI_LCD_TOSHIBA,
	76	MDDI_LCD_PRISM,
	77	MDDI_LCD_TP2,
	78	MDDI_NUM_LCD_TYPES,
	79	MDDI_LCD_DEFAULT = MDDI_LCD_TOSHIBA
	80	} mddi_lcd_type;
	81
	82	typedef enum {
	83	MDDI_HOST_PRIM = 0,
	84	MDDI_HOST_EXT,
	85	MDDI_NUM_HOST_CORES
	86	} mddi_host_type;
	87
	88	typedef enum {
	89	MDDI_DRIVER_RESET, /* host core registers have not been written. */
	90	MDDI_DRIVER_DISABLED, /* registers written, interrupts disabled. */
	91	MDDI_DRIVER_ENABLED /* registers written, interrupts enabled. */
	92	} mddi_host_driver_state_type;
	93
	94	typedef enum {
	95	MDDI_GPIO_INT_0 = 0,
	96	MDDI_GPIO_INT_1,
	97	MDDI_GPIO_INT_2,
	98	MDDI_GPIO_INT_3,
	99	MDDI_GPIO_INT_4,
	100	MDDI_GPIO_INT_5,
	101	MDDI_GPIO_INT_6,
	102	MDDI_GPIO_INT_7,
	103	MDDI_GPIO_INT_8,
	104	MDDI_GPIO_INT_9,
	105	MDDI_GPIO_INT_10,
	106	MDDI_GPIO_INT_11,
	107	MDDI_GPIO_INT_12,
	108	MDDI_GPIO_INT_13,
	109	MDDI_GPIO_INT_14,
	110	MDDI_GPIO_INT_15,
111	MDDI_GPIO_NUM_INTS
112	} mddi_gpio_int_type;
113
114	enum mddi_data_packet_size_type {
115	MDDI_DATA_PACKET_4_BYTES = 4,
116	MDDI_DATA_PACKET_8_BYTES = 8,
117	MDDI_DATA_PACKET_12_BYTES = 12,
118	MDDI_DATA_PACKET_16_BYTES = 16,
119	MDDI_DATA_PACKET_24_BYTES = 24
120	};
121
122	typedef struct {
123	uint32 addr;
124	uint32 value;
125	} mddi_reg_write_type;
126
127	boolean mddi_vsync_set_handler(msm_fb_vsync_handler_type handler, void *arg);
128
129	typedef void (*mddi_llist_done_cb_type) (void);
130
131	typedef void (mddi_rev_handler_type) (void );
132
133	boolean mddi_set_rev_handler(mddi_rev_handler_type handler, uint16 pkt_type);
134
135	#define MDDI_DEFAULT_PRIM_PIX_ATTR 0xC3
136	#define MDDI_DEFAULT_SECD_PIX_ATTR 0xC0
137
138	typedef int gpio_int_polarity_type;
139	typedef int gpio_int_handler_type;
140
141	typedef struct {
142	void (*vsync_detected) (boolean);
143	} mddi_lcd_func_type;
144
145	extern mddi_lcd_func_type mddi_lcd;
146	void mddi_init(void);
147
148	void mddi_powerdown(void);
149
150	void mddi_host_start_ext_display(void);
151	void mddi_host_stop_ext_display(void);
152
153	extern spinlock_t mddi_host_spin_lock;
154	#ifdef T_MSM7500
155	void mddi_reset(void);
156	#ifdef FEATURE_DUAL_PROC_MODEM_DISPLAY
157	void mddi_host_switch_proc_control(boolean on);
158	#endif
159	#endif
160	void mddi_host_exit_power_collapse(void);
161
162	void mddi_queue_splash_screen
163	(void *buf_ptr,
164	boolean clear_area,
165	int16 src_width,
166	int16 src_starting_row,
167	int16 src_starting_column,
168	int16 num_of_rows,
169	int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column);
170
171	void mddi_queue_image
172	(void *buf_ptr,
173	uint8 stereo_video,
174	boolean clear_area,
175	int16 src_width,
176	int16 src_starting_row,
177	int16 src_starting_column,
178	int16 num_of_rows,
179	int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column);
180
181	int mddi_host_register_read
182	(uint32 reg_addr,
183	uint32 *reg_value_ptr, boolean wait, mddi_host_type host_idx);
184	int mddi_host_register_write
185	(uint32 reg_addr, uint32 reg_val,
186	enum mddi_data_packet_size_type packet_size,
187	boolean wait, mddi_llist_done_cb_type done_cb, mddi_host_type host);
188	boolean mddi_host_register_write_int
189	(uint32 reg_addr,
190	uint32 reg_val, mddi_llist_done_cb_type done_cb, mddi_host_type host);
191	boolean mddi_host_register_read_int
192	(uint32 reg_addr, uint32 *reg_value_ptr, mddi_host_type host_idx);
193	void mddi_queue_register_write_static
194	(uint32 reg_addr,
195	uint32 reg_val, boolean wait, mddi_llist_done_cb_type done_cb);
196	void mddi_queue_static_window_adjust
197	(const mddi_reg_write_type *reg_write,
198	uint16 num_writes, mddi_llist_done_cb_type done_cb);
199
200	#define mddi_queue_register_read(reg, val_ptr, wait, sig) \
201	mddi_host_register_read(reg, val_ptr, wait, MDDI_HOST_PRIM)
202	#define mddi_queue_register_write(reg, val, wait, sig) \
203	mddi_host_register_write(reg, val, MDDI_DATA_PACKET_4_BYTES,\
204	wait, NULL, MDDI_HOST_PRIM)
205	#define mddi_queue_register_write_extn(reg, val, pkt_size, wait, sig) \
206	mddi_host_register_write(reg, val, pkt_size, \
207	wait, NULL, MDDI_HOST_PRIM)
208	#define mddi_queue_register_write_int(reg, val) \
209	mddi_host_register_write_int(reg, val, NULL, MDDI_HOST_PRIM)
210	#define mddi_queue_register_read_int(reg, val_ptr) \
211	mddi_host_register_read_int(reg, val_ptr, MDDI_HOST_PRIM)
212	#define mddi_queue_register_writes(reg_ptr, val, wait, sig) \
213	mddi_host_register_writes(reg_ptr, val, wait, sig, MDDI_HOST_PRIM)
214
215	void mddi_wait(uint16 time_ms);
216	void mddi_assign_max_pkt_dimensions(uint16 image_cols,
217	uint16 image_rows,
218	uint16 bpp,
219	uint16 max_cols, uint16 max_rows);
220	uint16 mddi_assign_pkt_height(uint16 pkt_width, uint16 pkt_height, uint16 bpp);
221	void mddi_queue_reverse_encapsulation(boolean wait);
222	void mddi_disable(int lock);
223	#endif /* MDDIHOST_H */