[mirror_ubuntu-bionic-kernel.git] / drivers / staging / mt29f_spinand / mt29f_spinand.h

/*-
 * Copyright 2013 Broadcom Corporation
 *
 * Copyright (c) 2009-2010 Micron Technology, Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * Henry Pan <hspan@micron.com>
 *
 * based on nand.h
 */
#ifndef __LINUX_MTD_SPI_NAND_H
#define __LINUX_MTD_SPI_NAND_H

#include <linux/wait.h>
#include <linux/spinlock.h>
#include <linux/mtd/mtd.h>

/* cmd */
#define CMD_READ			0x13
#define CMD_READ_RDM			0x03
#define CMD_PROG_PAGE_CLRCACHE		0x02
#define CMD_PROG_PAGE			0x84
#define CMD_PROG_PAGE_EXC		0x10
#define CMD_ERASE_BLK			0xd8
#define CMD_WR_ENABLE			0x06
#define CMD_WR_DISABLE			0x04
#define CMD_READ_ID			0x9f
#define CMD_RESET			0xff
#define CMD_READ_REG			0x0f
#define CMD_WRITE_REG			0x1f

/* feature/ status reg */
#define REG_BLOCK_LOCK			0xa0
#define REG_OTP				0xb0
#define REG_STATUS			0xc0/* timing */

/* status */
#define STATUS_OIP_MASK			0x01
#define STATUS_READY			0
#define STATUS_BUSY			BIT(0)

#define STATUS_E_FAIL_MASK		0x04
#define STATUS_E_FAIL			BIT(2)

#define STATUS_P_FAIL_MASK		0x08
#define STATUS_P_FAIL			BIT(3)

#define STATUS_ECC_MASK			0x30
#define STATUS_ECC_1BIT_CORRECTED	BIT(4)
#define STATUS_ECC_ERROR		BIT(5)
#define STATUS_ECC_RESERVED		(BIT(5) | BIT(4))

/*ECC enable defines*/
#define OTP_ECC_MASK			0x10
#define OTP_ECC_OFF			0
#define OTP_ECC_ON			1

#define ECC_DISABLED
#define ECC_IN_NAND
#define ECC_SOFT

/* block lock */
#define BL_ALL_LOCKED      0x38
#define BL_1_2_LOCKED      0x30
#define BL_1_4_LOCKED      0x28
#define BL_1_8_LOCKED      0x20
#define BL_1_16_LOCKED     0x18
#define BL_1_32_LOCKED     0x10
#define BL_1_64_LOCKED     0x08
#define BL_ALL_UNLOCKED    0

struct spinand_info {
	struct spi_device *spi;
	void *priv;
};

struct spinand_state {
	u32	col;
	u32	row;
	int		buf_ptr;
	u8		*buf;
};

struct spinand_cmd {
	u8		cmd;
	u32		n_addr;		/* Number of address */
	u8		addr[3];	/* Reg Offset */
	u32		n_dummy;	/* Dummy use */
	u32		n_tx;		/* Number of tx bytes */
	u8		*tx_buf;	/* Tx buf */
	u32		n_rx;		/* Number of rx bytes */
	u8		*rx_buf;	/* Rx buf */
};

int spinand_mtd(struct mtd_info *mtd);
void spinand_mtd_release(struct mtd_info *mtd);

#endif /* __LINUX_MTD_SPI_NAND_H */
Commit	Line	Data
d974ce4f KP	1	/*-
	2	* Copyright 2013 Broadcom Corporation
	3	*
	4	* Copyright (c) 2009-2010 Micron Technology, Inc.
	5	*
	6	* This software is licensed under the terms of the GNU General Public
	7	* License version 2, as published by the Free Software Foundation, and
	8	* may be copied, distributed, and modified under those terms.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* Henry Pan <hspan@micron.com>
	16	*
	17	* based on nand.h
	18	*/
	19	#ifndef __LINUX_MTD_SPI_NAND_H
	20	#define __LINUX_MTD_SPI_NAND_H
	21
	22	#include <linux/wait.h>
	23	#include <linux/spinlock.h>
	24	#include <linux/mtd/mtd.h>
	25
	26	/* cmd */
	27	#define CMD_READ 0x13
	28	#define CMD_READ_RDM 0x03
	29	#define CMD_PROG_PAGE_CLRCACHE 0x02
	30	#define CMD_PROG_PAGE 0x84
	31	#define CMD_PROG_PAGE_EXC 0x10
	32	#define CMD_ERASE_BLK 0xd8
	33	#define CMD_WR_ENABLE 0x06
	34	#define CMD_WR_DISABLE 0x04
	35	#define CMD_READ_ID 0x9f
	36	#define CMD_RESET 0xff
	37	#define CMD_READ_REG 0x0f
	38	#define CMD_WRITE_REG 0x1f
	39
	40	/* feature/ status reg */
	41	#define REG_BLOCK_LOCK 0xa0
	42	#define REG_OTP 0xb0
	43	#define REG_STATUS 0xc0/* timing */
	44
	45	/* status */
	46	#define STATUS_OIP_MASK 0x01
6f663d5d ERR	47	#define STATUS_READY 0
6f663d5d ERR	48	#define STATUS_BUSY BIT(0)
d974ce4f KP	49
d974ce4f KP	50	#define STATUS_E_FAIL_MASK 0x04
6f663d5d	51	#define STATUS_E_FAIL BIT(2)
d974ce4f KP	52
d974ce4f KP	53	#define STATUS_P_FAIL_MASK 0x08
6f663d5d	54	#define STATUS_P_FAIL BIT(3)
d974ce4f KP	55
d974ce4f KP	56	#define STATUS_ECC_MASK 0x30
6f663d5d ERR	57	#define STATUS_ECC_1BIT_CORRECTED BIT(4)
	58	#define STATUS_ECC_ERROR BIT(5)
	59	#define STATUS_ECC_RESERVED (BIT(5) \| BIT(4))
d974ce4f KP	60
	61	/ECC enable defines/
	62	#define OTP_ECC_MASK 0x10
	63	#define OTP_ECC_OFF 0
	64	#define OTP_ECC_ON 1
	65
	66	#define ECC_DISABLED
	67	#define ECC_IN_NAND
	68	#define ECC_SOFT
	69
	70	/* block lock */
	71	#define BL_ALL_LOCKED 0x38
	72	#define BL_1_2_LOCKED 0x30
	73	#define BL_1_4_LOCKED 0x28
	74	#define BL_1_8_LOCKED 0x20
	75	#define BL_1_16_LOCKED 0x18
	76	#define BL_1_32_LOCKED 0x10
	77	#define BL_1_64_LOCKED 0x08
	78	#define BL_ALL_UNLOCKED 0
	79
	80	struct spinand_info {
d974ce4f KP	81	struct spi_device *spi;
	82	void *priv;
	83	};
	84
	85	struct spinand_state {
74f63bd6 ERR	86	u32 col;
74f63bd6 ERR	87	u32 row;
d974ce4f KP	88	int buf_ptr;
	89	u8 *buf;
	90	};
	91
	92	struct spinand_cmd {
	93	u8 cmd;
	94	u32 n_addr; /* Number of address */
	95	u8 addr[3]; /* Reg Offset */
	96	u32 n_dummy; /* Dummy use */
	97	u32 n_tx; /* Number of tx bytes */
	98	u8 tx_buf; / Tx buf */
	99	u32 n_rx; /* Number of rx bytes */
	100	u8 rx_buf; / Rx buf */
	101	};
	102
ec9a0ffa JP	103	int spinand_mtd(struct mtd_info *mtd);
ec9a0ffa JP	104	void spinand_mtd_release(struct mtd_info *mtd);
d974ce4f KP	105
d974ce4f KP	106	#endif /* __LINUX_MTD_SPI_NAND_H */