[mirror_ubuntu-artful-kernel.git] / drivers / staging / rtl8192e / rtl_debug.h

/******************************************************************************
 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
 *
 * Based on the r8180 driver, which is:
 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
 *
 * The full GNU General Public License is included in this distribution in the
 * file called LICENSE.
 *
 * Contact Information:
 * wlanfae <wlanfae@realtek.com>
******************************************************************************/
#ifndef _RTL_DEBUG_H
#define _RTL_DEBUG_H
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/debugfs.h>

struct r8192_priv;
struct _tx_desc_8192se;
struct _TX_DESC_8192CE;
struct net_device;

#define	DBG_LOUD	4

#define RT_ASSERT(_Exp,Fmt)				\
		if (!(_Exp))						\
		{								\
			printk("Rtl819x: ");				\
			printk Fmt;					\
		}

enum dbgp_flag {
	FQoS				= 0,
	FTX					= 1,
	FRX					= 2,
	FSEC				= 3,
	FMGNT				= 4,
	FMLME				= 5,
	FRESOURCE			= 6,
	FBEACON			= 7,
	FISR				= 8,
	FPHY				= 9,
	FMP					= 10,
	FEEPROM			= 11,
	FPWR				= 12,
	FDM					= 13,
	FDBGCtrl				= 14,
	FC2H				= 15,
	FBT					= 16,
	FINIT				= 17,
	FIOCTL				= 18,
	DBGP_TYPE_MAX
};

#define		QoS_INIT				BIT0
#define		QoS_VISTA				BIT1

#define		TX_DESC					BIT0
#define		TX_DESC_TID				BIT1

#define		RX_DATA					BIT0
#define		RX_PHY_STS				BIT1
#define		RX_PHY_SS				BIT2
#define		RX_PHY_SQ				BIT3
#define		RX_PHY_ASTS			BIT4
#define		RX_ERR_LEN				BIT5
#define		RX_DEFRAG				BIT6
#define		RX_ERR_RATE			BIT7


#define		MEDIA_STS				BIT0
#define		LINK_STS				BIT1

#define		OS_CHK					BIT0

#define		BCN_SHOW				BIT0
#define		BCN_PEER				BIT1

#define		ISR_CHK					BIT0

#define		PHY_BBR				BIT0
#define		PHY_BBW				BIT1
#define		PHY_RFR				BIT2
#define		PHY_RFW				BIT3
#define		PHY_MACR				BIT4
#define		PHY_MACW				BIT5
#define		PHY_ALLR				BIT6
#define		PHY_ALLW				BIT7
#define		PHY_TXPWR				BIT8
#define		PHY_PWRDIFF			BIT9

#define		MP_RX					BIT0
#define		MP_SWICH_CH			BIT1

#define		EEPROM_W				BIT0
#define		EFUSE_PG				BIT1
#define		EFUSE_READ_ALL			BIT2

#define		LPS						BIT0
#define		IPS						BIT1
#define		PWRSW					BIT2
#define		PWRHW					BIT3
#define		PWRHAL					BIT4

#define		WA_IOT					BIT0
#define		DM_PWDB				BIT1
#define		DM_Monitor				BIT2
#define		DM_DIG					BIT3
#define		DM_EDCA_Turbo			BIT4

#define		DbgCtrl_Trace			BIT0
#define		DbgCtrl_InbandNoise		BIT1

#define		BT_TRACE				BIT0
#define		BT_RFPoll				BIT1

#define		C2H_Summary			BIT0
#define		C2H_PacketData			BIT1
#define		C2H_ContentData			BIT2
#define		BT_TRACE				BIT0
#define		BT_RFPoll				BIT1

#define		INIT_EEPROM				BIT0
#define		INIT_TxPower			BIT1
#define		INIT_IQK				BIT2
#define		INIT_RF					BIT3

#define		IOCTL_TRACE						BIT0
#define		IOCTL_BT_EVENT					BIT1
#define		IOCTL_BT_EVENT_DETAIL			BIT2
#define		IOCTL_BT_TX_ACLDATA			BIT3
#define		IOCTL_BT_TX_ACLDATA_DETAIL		BIT4
#define		IOCTL_BT_RX_ACLDATA			BIT5
#define		IOCTL_BT_RX_ACLDATA_DETAIL	BIT6
#define		IOCTL_BT_HCICMD				BIT7
#define		IOCTL_BT_HCICMD_DETAIL			BIT8
#define		IOCTL_IRP						BIT9
#define		IOCTL_IRP_DETAIL				BIT10
#define		IOCTL_CALLBACK_FUN				BIT11
#define			IOCTL_STATE						BIT12
#define		IOCTL_BT_TP						BIT13
#define		IOCTL_BT_LOGO					BIT14

/* 2007/07/13 MH  ------For DeBuG Print modeue------*/
/*------------------------------Define structure----------------------------*/


/*------------------------Export Marco Definition---------------------------*/
#define		DEBUG_PRINT		1

#if (DEBUG_PRINT == 1)
#define RTPRINT(dbgtype, dbgflag, printstr)	\
{									\
	if (DBGP_Type[dbgtype] & dbgflag)\
	{								\
		printk printstr;				\
	}								\
}

#define	RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)\
{\
	if (DBGP_Type[dbgtype] & dbgflag)\
	{\
				int __i;						\
				u8*	ptr = (u8*)_Ptr;	\
				printk printstr;				\
				printk(" ");					\
				for ( __i=0; __i<6; __i++ )		\
					printk("%02X%s", ptr[__i], (__i==5)?"":"-");		\
				printk("\n");							\
	}\
}

#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
{\
	if (DBGP_Type[dbgtype] & dbgflag)\
	{\
		int __i;									\
		u8*	ptr = (u8*)_HexData;			\
		printk(_TitleString);					\
		for ( __i=0; __i<(int)_HexDataLen; __i++ )	\
		{										\
			printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?"  ":" ");\
			if (((__i + 1) % 16) == 0)	printk("\n");\
		}										\
		printk("\n");							\
	}\
}
#else
#define	RTPRINT(dbgtype, dbgflag, printstr)
#define	RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
#define		RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
#endif

extern u32	DBGP_Type[DBGP_TYPE_MAX];

#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen)			\
do {\
	if (((_Comp) & rt_global_debug_component ) && (_Level <= rt_global_debug_component ))	\
	{									\
		int __i;								\
		u8*	ptr = (u8*)_HexData;				\
		printk("Rtl819x: ");						\
		printk(_TitleString);						\
		for ( __i=0; __i<(int)_HexDataLen; __i++ )				\
		{								\
			printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?"  ":" ");	\
			if (((__i + 1) % 16) == 0)	printk("\n");			\
		}								\
		printk("\n");							\
	} \
}while(0);

#define DMESG(x,a...)
#define DMESGW(x,a...)
#define DMESGE(x,a...)
extern u32 rt_global_debug_component;
#define RT_TRACE(component, x, args...) \
do { if (rt_global_debug_component & component) \
	printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
	       ##args);\
}while(0);

#define assert(expr) \
        if (!(expr)) {                                  \
                printk( "Assertion failed! %s,%s,%s,line=%d\n", \
                #expr,__FILE__,__func__,__LINE__);          \
        }
#define RT_DEBUG_DATA(level, data, datalen)      \
        do{ if ((rt_global_debug_component & (level)) == (level))   \
                {       \
                        int _i;                                  \
                        u8* _pdata = (u8*) data;                 \
                        printk(KERN_DEBUG DRV_NAME ": %s()\n", __func__);   \
                        for (_i=0; _i<(int)(datalen); _i++)                 \
                        {                                               \
                                printk("%2x ", _pdata[_i]);               \
                                if ((_i+1)%16 == 0) printk("\n");        \
                        }                               \
                        printk("\n");                   \
                }                                       \
        } while (0)

struct rtl_fs_debug {
	const char *name;
	struct dentry *dir_drv;
	struct dentry *debug_register;
	u32 hw_type;
	u32 hw_offset;
	bool hw_holding;
};

void print_buffer(u32 *buffer, int len);
void dump_eprom(struct net_device *dev);
void rtl8192_dump_reg(struct net_device *dev);

/* debugfs stuff */
static inline int rtl_debug_module_init(struct r8192_priv *priv, const char *name) {
	return 0;
}
static inline void rtl_debug_module_remove(struct r8192_priv *priv) {

}
static inline int rtl_create_debugfs_root(void) {
	return 0;
}
static inline void rtl_remove_debugfs_root(void) {
}

/* proc stuff */
void rtl8192_proc_init_one(struct net_device *dev);
void rtl8192_proc_remove_one(struct net_device *dev);
void rtl8192_proc_module_init(void);
void rtl8192_proc_module_remove(void);
void rtl8192_dbgp_flag_init(struct net_device *dev);
#endif
Commit	Line	Data
94a79942 LF	1	/******************************************************************************
	2	* Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
	3	*
	4	* Based on the r8180 driver, which is:
	5	* Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of version 2 of the GNU General Public License as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
	15	* You should have received a copy of the GNU General Public License along with
	16	* this program; if not, write to the Free Software Foundation, Inc.,
	17	* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
	18	*
	19	* The full GNU General Public License is included in this distribution in the
	20	* file called LICENSE.
	21	*
	22	* Contact Information:
	23	* wlanfae <wlanfae@realtek.com>
	24	******************************************************************************/
	25	#ifndef _RTL_DEBUG_H
	26	#define _RTL_DEBUG_H
	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
	29	#include <linux/version.h>
94a79942	30	#include <linux/debugfs.h>
94a79942 LF	31
	32	struct r8192_priv;
	33	struct _tx_desc_8192se;
	34	struct _TX_DESC_8192CE;
	35	struct net_device;
	36
	37	#define DBG_LOUD 4
	38
	39	#define RT_ASSERT(_Exp,Fmt) \
	40	if (!(_Exp)) \
	41	{ \
	42	printk("Rtl819x: "); \
	43	printk Fmt; \
	44	}
	45
85cdd997	46	enum dbgp_flag {
94a79942 LF	47	FQoS = 0,
	48	FTX = 1,
	49	FRX = 2,
	50	FSEC = 3,
	51	FMGNT = 4,
	52	FMLME = 5,
	53	FRESOURCE = 6,
	54	FBEACON = 7,
	55	FISR = 8,
	56	FPHY = 9,
	57	FMP = 10,
	58	FEEPROM = 11,
	59	FPWR = 12,
	60	FDM = 13,
	61	FDBGCtrl = 14,
	62	FC2H = 15,
	63	FBT = 16,
	64	FINIT = 17,
	65	FIOCTL = 18,
	66	DBGP_TYPE_MAX
85cdd997	67	};
94a79942 LF	68
	69	#define QoS_INIT BIT0
	70	#define QoS_VISTA BIT1
	71
	72	#define TX_DESC BIT0
	73	#define TX_DESC_TID BIT1
	74
	75	#define RX_DATA BIT0
	76	#define RX_PHY_STS BIT1
	77	#define RX_PHY_SS BIT2
	78	#define RX_PHY_SQ BIT3
	79	#define RX_PHY_ASTS BIT4
	80	#define RX_ERR_LEN BIT5
	81	#define RX_DEFRAG BIT6
	82	#define RX_ERR_RATE BIT7
	83
	84
	85
	86	#define MEDIA_STS BIT0
	87	#define LINK_STS BIT1
	88
	89	#define OS_CHK BIT0
	90
	91	#define BCN_SHOW BIT0
	92	#define BCN_PEER BIT1
	93
	94	#define ISR_CHK BIT0
	95
	96	#define PHY_BBR BIT0
	97	#define PHY_BBW BIT1
	98	#define PHY_RFR BIT2
	99	#define PHY_RFW BIT3
	100	#define PHY_MACR BIT4
	101	#define PHY_MACW BIT5
	102	#define PHY_ALLR BIT6
	103	#define PHY_ALLW BIT7
	104	#define PHY_TXPWR BIT8
	105	#define PHY_PWRDIFF BIT9
	106
	107	#define MP_RX BIT0
	108	#define MP_SWICH_CH BIT1
	109
	110	#define EEPROM_W BIT0
	111	#define EFUSE_PG BIT1
	112	#define EFUSE_READ_ALL BIT2
	113
	114	#define LPS BIT0
	115	#define IPS BIT1
	116	#define PWRSW BIT2
	117	#define PWRHW BIT3
	118	#define PWRHAL BIT4
	119
	120	#define WA_IOT BIT0
	121	#define DM_PWDB BIT1
	122	#define DM_Monitor BIT2
	123	#define DM_DIG BIT3
	124	#define DM_EDCA_Turbo BIT4
	125
	126	#define DbgCtrl_Trace BIT0
	127	#define DbgCtrl_InbandNoise BIT1
	128
	129	#define BT_TRACE BIT0
	130	#define BT_RFPoll BIT1
	131
132	#define C2H_Summary BIT0
133	#define C2H_PacketData BIT1
134	#define C2H_ContentData BIT2
135	#define BT_TRACE BIT0
136	#define BT_RFPoll BIT1
137
138	#define INIT_EEPROM BIT0
139	#define INIT_TxPower BIT1
140	#define INIT_IQK BIT2
141	#define INIT_RF BIT3
142
143	#define IOCTL_TRACE BIT0
144	#define IOCTL_BT_EVENT BIT1
145	#define IOCTL_BT_EVENT_DETAIL BIT2
146	#define IOCTL_BT_TX_ACLDATA BIT3
147	#define IOCTL_BT_TX_ACLDATA_DETAIL BIT4
148	#define IOCTL_BT_RX_ACLDATA BIT5
149	#define IOCTL_BT_RX_ACLDATA_DETAIL BIT6
150	#define IOCTL_BT_HCICMD BIT7
151	#define IOCTL_BT_HCICMD_DETAIL BIT8
152	#define IOCTL_IRP BIT9
153	#define IOCTL_IRP_DETAIL BIT10
154	#define IOCTL_CALLBACK_FUN BIT11
155	#define IOCTL_STATE BIT12
156	#define IOCTL_BT_TP BIT13
157	#define IOCTL_BT_LOGO BIT14
158
159	/* 2007/07/13 MH ------For DeBuG Print modeue------*/
160	/------------------------------Define structure----------------------------/
161
162
163	/------------------------Export Marco Definition---------------------------/
164	#define DEBUG_PRINT 1
165
166	#if (DEBUG_PRINT == 1)
167	#define RTPRINT(dbgtype, dbgflag, printstr) \
168	{ \
169	if (DBGP_Type[dbgtype] & dbgflag)\
170	{ \
171	printk printstr; \
172	} \
173	}
174
175	#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)\
176	{\
177	if (DBGP_Type[dbgtype] & dbgflag)\
178	{\
179	int __i; \
180	u8* ptr = (u8*)_Ptr; \
181	printk printstr; \
182	printk(" "); \
183	for ( __i=0; __i<6; __i++ ) \
184	printk("%02X%s", ptr[__i], (__i==5)?"":"-"); \
185	printk("\n"); \
186	}\
187	}
188
189	#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
190	{\
191	if (DBGP_Type[dbgtype] & dbgflag)\
192	{\
193	int __i; \
194	u8* ptr = (u8*)_HexData; \
195	printk(_TitleString); \
196	for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
197	{ \
198	printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" ");\
199	if (((__i + 1) % 16) == 0) printk("\n");\
200	} \
201	printk("\n"); \
202	}\
203	}
204	#else
205	#define RTPRINT(dbgtype, dbgflag, printstr)
206	#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
207	#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
208	#endif
209
210	extern u32 DBGP_Type[DBGP_TYPE_MAX];
211
212	#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
213	do {\
214	if (((_Comp) & rt_global_debug_component ) && (_Level <= rt_global_debug_component )) \
215	{ \
216	int __i; \
217	u8* ptr = (u8*)_HexData; \
218	printk("Rtl819x: "); \
219	printk(_TitleString); \
220	for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
221	{ \
222	printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \
223	if (((__i + 1) % 16) == 0) printk("\n"); \
224	} \
225	printk("\n"); \
226	} \
227	}while(0);
228
229	#define DMESG(x,a...)
230	#define DMESGW(x,a...)
231	#define DMESGE(x,a...)
232	extern u32 rt_global_debug_component;
233	#define RT_TRACE(component, x, args...) \
234	do { if (rt_global_debug_component & component) \
235	printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
236	##args);\
237	}while(0);
238
94a79942 LF	239	#define assert(expr) \
	240	if (!(expr)) { \
	241	printk( "Assertion failed! %s,%s,%s,line=%d\n", \
	242	#expr,__FILE__,__func__,__LINE__); \
	243	}
	244	#define RT_DEBUG_DATA(level, data, datalen) \
	245	do{ if ((rt_global_debug_component & (level)) == (level)) \
	246	{ \
	247	int _i; \
	248	u8* _pdata = (u8*) data; \
	249	printk(KERN_DEBUG DRV_NAME ": %s()\n", __func__); \
	250	for (_i=0; _i<(int)(datalen); _i++) \
	251	{ \
	252	printk("%2x ", _pdata[_i]); \
	253	if ((_i+1)%16 == 0) printk("\n"); \
	254	} \
	255	printk("\n"); \
	256	} \
	257	} while (0)
94a79942	258
2278a29d	259	struct rtl_fs_debug {
94a79942 LF	260	const char *name;
	261	struct dentry *dir_drv;
	262	struct dentry *debug_register;
	263	u32 hw_type;
	264	u32 hw_offset;
94a79942	265	bool hw_holding;
2278a29d	266	};
94a79942 LF	267
	268	void print_buffer(u32 *buffer, int len);
	269	void dump_eprom(struct net_device *dev);
	270	void rtl8192_dump_reg(struct net_device *dev);
	271
94a79942	272	/* debugfs stuff */
94a79942 LF	273	static inline int rtl_debug_module_init(struct r8192_priv priv, const char name) {
	274	return 0;
	275	}
	276	static inline void rtl_debug_module_remove(struct r8192_priv *priv) {
	277
	278	}
	279	static inline int rtl_create_debugfs_root(void) {
	280	return 0;
	281	}
	282	static inline void rtl_remove_debugfs_root(void) {
	283	}
94a79942 LF	284
	285	/* proc stuff */
	286	void rtl8192_proc_init_one(struct net_device *dev);
	287	void rtl8192_proc_remove_one(struct net_device *dev);
	288	void rtl8192_proc_module_init(void);
	289	void rtl8192_proc_module_remove(void);
	290	void rtl8192_dbgp_flag_init(struct net_device *dev);
	291	#endif