projects / mirror_ubuntu-artful-kernel.git / blame
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1 | /****************************************************************************** |
| 2 | * | |
| 3 | * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify it | |
| 6 | * under the terms of version 2 of the GNU General Public License as | |
| 7 | * published by the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 12 | * more details. | |
| 13 | * | |
| 14 | ******************************************************************************/ | |
| 15 | #ifndef __HAL_COMMON_H__ | |
| 16 | #define __HAL_COMMON_H__ | |
| 17 | ||
| 18 | /* */ | |
| 19 | /* Rate Definition */ | |
| 20 | /* */ | |
| 21 | /* CCK */ | |
| 22 | #define RATR_1M 0x00000001 | |
| 23 | #define RATR_2M 0x00000002 | |
| 24 | #define RATR_55M 0x00000004 | |
| 25 | #define RATR_11M 0x00000008 | |
| 26 | /* OFDM */ | |
| 27 | #define RATR_6M 0x00000010 | |
| 28 | #define RATR_9M 0x00000020 | |
| 29 | #define RATR_12M 0x00000040 | |
| 30 | #define RATR_18M 0x00000080 | |
| 31 | #define RATR_24M 0x00000100 | |
| 32 | #define RATR_36M 0x00000200 | |
| 33 | #define RATR_48M 0x00000400 | |
| 34 | #define RATR_54M 0x00000800 | |
| 35 | /* MCS 1 Spatial Stream */ | |
| 36 | #define RATR_MCS0 0x00001000 | |
| 37 | #define RATR_MCS1 0x00002000 | |
| 38 | #define RATR_MCS2 0x00004000 | |
| 39 | #define RATR_MCS3 0x00008000 | |
| 40 | #define RATR_MCS4 0x00010000 | |
| 41 | #define RATR_MCS5 0x00020000 | |
| 42 | #define RATR_MCS6 0x00040000 | |
| 43 | #define RATR_MCS7 0x00080000 | |
| 44 | /* MCS 2 Spatial Stream */ | |
| 45 | #define RATR_MCS8 0x00100000 | |
| 46 | #define RATR_MCS9 0x00200000 | |
| 47 | #define RATR_MCS10 0x00400000 | |
| 48 | #define RATR_MCS11 0x00800000 | |
| 49 | #define RATR_MCS12 0x01000000 | |
| 50 | #define RATR_MCS13 0x02000000 | |
| 51 | #define RATR_MCS14 0x04000000 | |
| 52 | #define RATR_MCS15 0x08000000 | |
| 53 | ||
| 54 | /* CCK */ | |
| 55 | #define RATE_1M BIT(0) | |
| 56 | #define RATE_2M BIT(1) | |
| 57 | #define RATE_5_5M BIT(2) | |
| 58 | #define RATE_11M BIT(3) | |
| 59 | /* OFDM */ | |
| 60 | #define RATE_6M BIT(4) | |
| 61 | #define RATE_9M BIT(5) | |
| 62 | #define RATE_12M BIT(6) | |
| 63 | #define RATE_18M BIT(7) | |
| 64 | #define RATE_24M BIT(8) | |
| 65 | #define RATE_36M BIT(9) | |
| 66 | #define RATE_48M BIT(10) | |
| 67 | #define RATE_54M BIT(11) | |
| 68 | /* MCS 1 Spatial Stream */ | |
| 69 | #define RATE_MCS0 BIT(12) | |
| 70 | #define RATE_MCS1 BIT(13) | |
| 71 | #define RATE_MCS2 BIT(14) | |
| 72 | #define RATE_MCS3 BIT(15) | |
| 73 | #define RATE_MCS4 BIT(16) | |
| 74 | #define RATE_MCS5 BIT(17) | |
| 75 | #define RATE_MCS6 BIT(18) | |
| 76 | #define RATE_MCS7 BIT(19) | |
| 77 | /* MCS 2 Spatial Stream */ | |
| 78 | #define RATE_MCS8 BIT(20) | |
| 79 | #define RATE_MCS9 BIT(21) | |
| 80 | #define RATE_MCS10 BIT(22) | |
| 81 | #define RATE_MCS11 BIT(23) | |
| 82 | #define RATE_MCS12 BIT(24) | |
| 83 | #define RATE_MCS13 BIT(25) | |
| 84 | #define RATE_MCS14 BIT(26) | |
| 85 | #define RATE_MCS15 BIT(27) | |
| 86 | ||
| 87 | /* ALL CCK Rate */ | |
| 88 | #define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M) | |
| 89 | #define RATE_ALL_OFDM_AG \ | |
| 90 | (RATR_6M | RATR_9M | RATR_12M | RATR_18M | RATR_24M| \ | |
| 91 | RATR_36M|RATR_48M|RATR_54M) | |
| 92 | #define RATE_ALL_OFDM_1SS \ | |
| 93 | (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | RATR_MCS3 | \ | |
| 94 | RATR_MCS4 | RATR_MCS5 | RATR_MCS6 | RATR_MCS7) | |
| 95 | #define RATE_ALL_OFDM_2SS \ | |
| 96 | (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | RATR_MCS11| \ | |
| 97 | RATR_MCS12 | RATR_MCS13 | RATR_MCS14 | RATR_MCS15) | |
| 98 | ||
| 99 | /*------------------------------ Tx Desc definition Macro ------------------------*/ | |
| 100 | /* pragma mark -- Tx Desc related definition. -- */ | |
| 101 | /* */ | |
| 102 | /* */ | |
| 103 | /* Rate */ | |
| 104 | /* */ | |
| 105 | /* CCK Rates, TxHT = 0 */ | |
| 106 | #define DESC_RATE1M 0x00 | |
| 107 | #define DESC_RATE2M 0x01 | |
| 108 | #define DESC_RATE5_5M 0x02 | |
| 109 | #define DESC_RATE11M 0x03 | |
| 110 | ||
| 111 | /* OFDM Rates, TxHT = 0 */ | |
| 112 | #define DESC_RATE6M 0x04 | |
| 113 | #define DESC_RATE9M 0x05 | |
| 114 | #define DESC_RATE12M 0x06 | |
| 115 | #define DESC_RATE18M 0x07 | |
| 116 | #define DESC_RATE24M 0x08 | |
| 117 | #define DESC_RATE36M 0x09 | |
| 118 | #define DESC_RATE48M 0x0a | |
| 119 | #define DESC_RATE54M 0x0b | |
| 120 | ||
| 121 | /* MCS Rates, TxHT = 1 */ | |
| 122 | #define DESC_RATEMCS0 0x0c | |
| 123 | #define DESC_RATEMCS1 0x0d | |
| 124 | #define DESC_RATEMCS2 0x0e | |
| 125 | #define DESC_RATEMCS3 0x0f | |
| 126 | #define DESC_RATEMCS4 0x10 | |
| 127 | #define DESC_RATEMCS5 0x11 | |
| 128 | #define DESC_RATEMCS6 0x12 | |
| 129 | #define DESC_RATEMCS7 0x13 | |
| 130 | #define DESC_RATEMCS8 0x14 | |
| 131 | #define DESC_RATEMCS9 0x15 | |
| 132 | #define DESC_RATEMCS10 0x16 | |
| 133 | #define DESC_RATEMCS11 0x17 | |
| 134 | #define DESC_RATEMCS12 0x18 | |
| 135 | #define DESC_RATEMCS13 0x19 | |
| 136 | #define DESC_RATEMCS14 0x1a | |
| 137 | #define DESC_RATEMCS15 0x1b | |
| 138 | #define DESC_RATEMCS15_SG 0x1c | |
| 139 | #define DESC_RATEMCS32 0x20 | |
| 140 | ||
| 141 | #define REG_P2P_CTWIN 0x0572 /* 1 Byte long (in unit of TU) */ | |
| 142 | #define REG_NOA_DESC_SEL 0x05CF | |
| 143 | #define REG_NOA_DESC_DURATION 0x05E0 | |
| 144 | #define REG_NOA_DESC_INTERVAL 0x05E4 | |
| 145 | #define REG_NOA_DESC_START 0x05E8 | |
| 146 | #define REG_NOA_DESC_COUNT 0x05EC | |
| 147 | ||
| 148 | #include "HalVerDef.h" | |
| 149 | void dump_chip_info23a(struct hal_version ChipVersion); | |
| 150 | ||
| 151 | ||
| 152 | u8 /* return the final channel plan decision */ | |
| 153 | hal_com_get_channel_plan23a( | |
| 154 | struct rtw_adapter *padapter, | |
| 155 | u8 hw_channel_plan, /* channel plan from HW (efuse/eeprom) */ | |
| 156 | u8 sw_channel_plan, /* channel plan from SW (registry/module param) */ | |
| 157 | u8 def_channel_plan, /* channel plan used when the former two is invalid */ | |
| 158 | bool AutoLoadFail | |
| 159 | ); | |
| 160 | ||
| 161 | u8 MRateToHwRate23a(u8 rate); | |
| 162 | ||
| 163 | void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS); | |
| 164 | ||
| 165 | bool | |
| 166 | Hal_MappingOutPipe23a(struct rtw_adapter *pAdapter, u8 NumOutPipe); | |
| 167 | ||
| 364e30eb LF |
168 | void c2h_evt_clear23a(struct rtw_adapter *adapter); |
| 169 | s32 c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf); | |
| 170 | ||
| 171 | void rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet); | |
| 172 | void rtl8723a_set_ampdu_factor(struct rtw_adapter *padapter, u8 FactorToSet); | |
| 173 | void rtl8723a_set_acm_ctrl(struct rtw_adapter *padapter, u8 ctrl); | |
| 174 | void rtl8723a_set_media_status(struct rtw_adapter *padapter, u8 status); | |
| 175 | void rtl8723a_set_media_status1(struct rtw_adapter *padapter, u8 status); | |
| 176 | void rtl8723a_set_bcn_func(struct rtw_adapter *padapter, u8 val); | |
| 177 | void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val); | |
| 178 | void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag); | |
| 179 | void rtl8723a_on_rcr_am(struct rtw_adapter *padapter); | |
| 180 | void rtl8723a_off_rcr_am(struct rtw_adapter *padapter); | |
| 181 | void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime); | |
| 182 | void rtl8723a_ack_preamble(struct rtw_adapter *padapter, u8 bShortPreamble); | |
| 183 | void rtl8723a_set_sec_cfg(struct rtw_adapter *padapter, u8 sec); | |
| 184 | void rtl8723a_cam_empty_entry(struct rtw_adapter *padapter, u8 ucIndex); | |
| 185 | void rtl8723a_cam_invalid_all(struct rtw_adapter *padapter); | |
| dc0d16a1 JS |
186 | void rtl8723a_cam_write(struct rtw_adapter *padapter, |
| 187 | u8 entry, u16 ctrl, u8 *mac, u8 *key); | |
| 364e30eb LF |
188 | void rtl8723a_fifo_cleanup(struct rtw_adapter *padapter); |
| 189 | void rtl8723a_set_apfm_on_mac(struct rtw_adapter *padapter, u8 val); | |
| 190 | void rtl8723a_bcn_valid(struct rtw_adapter *padapter); | |
| ff5d82e4 | 191 | bool rtl8723a_get_bcn_valid(struct rtw_adapter *padapter); |
| 364e30eb LF |
192 | void rtl8723a_set_tx_pause(struct rtw_adapter *padapter, u8 pause); |
| 193 | void rtl8723a_set_beacon_interval(struct rtw_adapter *padapter, u16 interval); | |
| 194 | void rtl8723a_set_resp_sifs(struct rtw_adapter *padapter, | |
| 195 | u8 r2t1, u8 r2t2, u8 t2t1, u8 t2t2); | |
| 196 | void rtl8723a_set_ac_param_vo(struct rtw_adapter *padapter, u32 vo); | |
| 197 | void rtl8723a_set_ac_param_vi(struct rtw_adapter *padapter, u32 vi); | |
| 198 | void rtl8723a_set_ac_param_be(struct rtw_adapter *padapter, u32 be); | |
| 199 | void rtl8723a_set_ac_param_bk(struct rtw_adapter *padapter, u32 bk); | |
| 200 | void rtl8723a_set_rxdma_agg_pg_th(struct rtw_adapter *padapter, u8 val); | |
| 201 | void rtl8723a_set_nav_upper(struct rtw_adapter *padapter, u32 usNavUpper); | |
| 202 | void rtl8723a_set_initial_gain(struct rtw_adapter *padapter, u32 rx_gain); | |
| 203 | ||
| 204 | void rtl8723a_odm_support_ability_write(struct rtw_adapter *padapter, u32 val); | |
| 205 | void rtl8723a_odm_support_ability_backup(struct rtw_adapter *padapter, u8 val); | |
| 206 | void rtl8723a_odm_support_ability_set(struct rtw_adapter *padapter, u32 val); | |
| 207 | void rtl8723a_odm_support_ability_clr(struct rtw_adapter *padapter, u32 val); | |
| 208 | ||
| 209 | void rtl8723a_set_rpwm(struct rtw_adapter *padapter, u8 val); | |
| 210 | ||
| 211 | #endif /* __HAL_COMMON_H__ */ |