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4856ab33 MA |
1 | #ifndef __SEP_DEV_H__ |
2 | #define __SEP_DEV_H__ | |
3 | ||
4 | /* | |
5 | * | |
6 | * sep_dev.h - Security Processor Device Structures | |
7 | * | |
ff3d9c3c MA |
8 | * Copyright(c) 2009-2011 Intel Corporation. All rights reserved. |
9 | * Contributions(c) 2009-2011 Discretix. All rights reserved. | |
4856ab33 MA |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the Free | |
13 | * Software Foundation; version 2 of the License. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
18 | * more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License along with | |
21 | * this program; if not, write to the Free Software Foundation, Inc., 59 | |
22 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
23 | * | |
24 | * CONTACTS: | |
25 | * | |
26 | * Mark Allyn mark.a.allyn@intel.com | |
27 | * Jayant Mangalampalli jayant.mangalampalli@intel.com | |
28 | * | |
29 | * CHANGES | |
30 | * 2010.09.14 upgrade to Medfield | |
ff3d9c3c | 31 | * 2011.02.22 enable kernel crypto |
4856ab33 MA |
32 | */ |
33 | ||
34 | struct sep_device { | |
35 | /* pointer to pci dev */ | |
36 | struct pci_dev *pdev; | |
37 | ||
38 | /* character device file */ | |
39 | struct cdev sep_cdev; | |
4856ab33 MA |
40 | |
41 | /* devices (using misc dev) */ | |
42 | struct miscdevice miscdev_sep; | |
4856ab33 MA |
43 | |
44 | /* major / minor numbers of device */ | |
45 | dev_t sep_devno; | |
ff3d9c3c | 46 | /* guards command sent counter */ |
4856ab33 | 47 | spinlock_t snd_rply_lck; |
ff3d9c3c MA |
48 | /* guards driver memory usage in fastcall if */ |
49 | struct semaphore sep_doublebuf; | |
4856ab33 MA |
50 | |
51 | /* flags to indicate use and lock status of sep */ | |
52 | u32 pid_doing_transaction; | |
53 | unsigned long in_use_flags; | |
54 | ||
4856ab33 MA |
55 | /* address of the shared memory allocated during init for SEP driver |
56 | (coherent alloc) */ | |
57 | dma_addr_t shared_bus; | |
58 | size_t shared_size; | |
59 | void *shared_addr; | |
60 | ||
4856ab33 MA |
61 | /* start address of the access to the SEP registers from driver */ |
62 | dma_addr_t reg_physical_addr; | |
63 | dma_addr_t reg_physical_end; | |
64 | void __iomem *reg_addr; | |
65 | ||
ff3d9c3c MA |
66 | /* wait queue heads of the driver */ |
67 | wait_queue_head_t event_interrupt; | |
68 | wait_queue_head_t event_transactions; | |
4856ab33 | 69 | |
ff3d9c3c MA |
70 | struct list_head sep_queue_status; |
71 | u32 sep_queue_num; | |
72 | spinlock_t sep_queue_lock; | |
4856ab33 | 73 | |
ff3d9c3c MA |
74 | /* Is this in use? */ |
75 | u32 in_use; | |
76 | ||
77 | /* indicates whether power save is set up */ | |
78 | u32 power_save_setup; | |
79 | ||
80 | /* Power state */ | |
81 | u32 power_state; | |
4856ab33 MA |
82 | |
83 | /* transaction counter that coordinates the | |
84 | transactions between SEP and HOST */ | |
85 | unsigned long send_ct; | |
86 | /* counter for the messages from sep */ | |
87 | unsigned long reply_ct; | |
4856ab33 | 88 | |
ff3d9c3c MA |
89 | /* The following are used for kernel crypto client requests */ |
90 | u32 in_kernel; /* Set for kernel client request */ | |
91 | struct tasklet_struct finish_tasklet; | |
92 | enum type_of_request current_request; | |
93 | enum hash_stage current_hash_stage; | |
94 | struct ahash_request *current_hash_req; | |
95 | struct ablkcipher_request *current_cypher_req; | |
9196dc11 | 96 | struct this_task_ctx *ta_ctx; |
ff3d9c3c MA |
97 | struct workqueue_struct *workqueue; |
98 | }; | |
4856ab33 | 99 | |
ff3d9c3c | 100 | extern struct sep_device *sep_dev; |
4856ab33 | 101 | |
ff3d9c3c MA |
102 | /** |
103 | * SEP message header for a transaction | |
104 | * @reserved: reserved memory (two words) | |
105 | * @token: SEP message token | |
106 | * @msg_len: message length | |
107 | * @opcpde: message opcode | |
108 | */ | |
109 | struct sep_msgarea_hdr { | |
110 | u32 reserved[2]; | |
111 | u32 token; | |
112 | u32 msg_len; | |
113 | u32 opcode; | |
114 | }; | |
4856ab33 | 115 | |
ff3d9c3c MA |
116 | /** |
117 | * sep_queue_data - data to be maintained in status queue for a transaction | |
118 | * @opcode : transaction opcode | |
119 | * @size : message size | |
120 | * @pid: owner process | |
121 | * @name: owner process name | |
122 | */ | |
123 | struct sep_queue_data { | |
124 | u32 opcode; | |
125 | u32 size; | |
126 | s32 pid; | |
127 | u8 name[TASK_COMM_LEN]; | |
128 | }; | |
4856ab33 | 129 | |
ff3d9c3c MA |
130 | /** sep_queue_info - maintains status info of all transactions |
131 | * @list: head of list | |
132 | * @sep_queue_data : data for transaction | |
133 | */ | |
134 | struct sep_queue_info { | |
135 | struct list_head list; | |
136 | struct sep_queue_data data; | |
4856ab33 MA |
137 | }; |
138 | ||
139 | static inline void sep_write_reg(struct sep_device *dev, int reg, u32 value) | |
140 | { | |
141 | void __iomem *addr = dev->reg_addr + reg; | |
142 | writel(value, addr); | |
143 | } | |
144 | ||
145 | static inline u32 sep_read_reg(struct sep_device *dev, int reg) | |
146 | { | |
147 | void __iomem *addr = dev->reg_addr + reg; | |
148 | return readl(addr); | |
149 | } | |
150 | ||
151 | /* wait for SRAM write complete(indirect write */ | |
152 | static inline void sep_wait_sram_write(struct sep_device *dev) | |
153 | { | |
154 | u32 reg_val; | |
2787b99f | 155 | |
eb6b420d | 156 | do { |
4856ab33 | 157 | reg_val = sep_read_reg(dev, HW_SRAM_DATA_READY_REG_ADDR); |
eb6b420d | 158 | } while (!(reg_val & 1)); |
4856ab33 MA |
159 | } |
160 | ||
161 | ||
162 | #endif |