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4d6f6af8 GKH |
1 | /************************************************************************** |
2 | * | |
3 | * Copyright 2000-2006 Alacritech, Inc. All rights reserved. | |
4 | * | |
5 | * Redistribution and use in source and binary forms, with or without | |
6 | * modification, are permitted provided that the following conditions | |
7 | * are met: | |
8 | * | |
9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above | |
12 | * copyright notice, this list of conditions and the following | |
13 | * disclaimer in the documentation and/or other materials provided | |
14 | * with the distribution. | |
15 | * | |
16 | * Alternatively, this software may be distributed under the terms of the | |
17 | * GNU General Public License ("GPL") version 2 as published by the Free | |
18 | * Software Foundation. | |
19 | * | |
20 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY | |
21 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR | |
24 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
25 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
26 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
27 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
28 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | |
30 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
31 | * SUCH DAMAGE. | |
32 | * | |
33 | * The views and conclusions contained in the software and documentation | |
34 | * are those of the authors and should not be interpreted as representing | |
35 | * official policies, either expressed or implied, of Alacritech, Inc. | |
36 | * | |
37 | **************************************************************************/ | |
38 | ||
39 | /* | |
40 | * FILENAME: slicoss.c | |
41 | * | |
42 | * The SLICOSS driver for Alacritech's IS-NIC products. | |
43 | * | |
44 | * This driver is supposed to support: | |
45 | * | |
46 | * Mojave cards (single port PCI Gigabit) both copper and fiber | |
47 | * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber | |
48 | * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber | |
49 | * | |
493b67b7 | 50 | * The driver was actually tested on Oasis and Kalahari cards. |
4d6f6af8 GKH |
51 | * |
52 | * | |
53 | * NOTE: This is the standard, non-accelerated version of Alacritech's | |
54 | * IS-NIC driver. | |
55 | */ | |
56 | ||
4d6f6af8 | 57 | |
4d6f6af8 GKH |
58 | #define KLUDGE_FOR_4GB_BOUNDARY 1 |
59 | #define DEBUG_MICROCODE 1 | |
4d6f6af8 | 60 | #define DBG 1 |
4d6f6af8 | 61 | #define SLIC_INTERRUPT_PROCESS_LIMIT 1 |
4d6f6af8 GKH |
62 | #define SLIC_OFFLOAD_IP_CHECKSUM 1 |
63 | #define STATS_TIMER_INTERVAL 2 | |
64 | #define PING_TIMER_INTERVAL 1 | |
65 | ||
66 | #include <linux/kernel.h> | |
67 | #include <linux/string.h> | |
68 | #include <linux/errno.h> | |
69 | #include <linux/ioport.h> | |
70 | #include <linux/slab.h> | |
71 | #include <linux/interrupt.h> | |
72 | #include <linux/timer.h> | |
73 | #include <linux/pci.h> | |
74 | #include <linux/spinlock.h> | |
75 | #include <linux/init.h> | |
76 | #include <linux/bitops.h> | |
77 | #include <linux/io.h> | |
78 | #include <linux/netdevice.h> | |
79 | #include <linux/etherdevice.h> | |
80 | #include <linux/skbuff.h> | |
81 | #include <linux/delay.h> | |
82 | #include <linux/debugfs.h> | |
83 | #include <linux/seq_file.h> | |
84 | #include <linux/kthread.h> | |
85 | #include <linux/module.h> | |
86 | #include <linux/moduleparam.h> | |
87 | ||
470c5736 | 88 | #include <linux/firmware.h> |
4d6f6af8 | 89 | #include <linux/types.h> |
4d6f6af8 | 90 | #include <linux/dma-mapping.h> |
4d6f6af8 GKH |
91 | #include <linux/mii.h> |
92 | #include <linux/if_vlan.h> | |
4d6f6af8 GKH |
93 | #include <asm/unaligned.h> |
94 | ||
95 | #include <linux/ethtool.h> | |
4d6f6af8 | 96 | #include <linux/uaccess.h> |
77faefa3 GKH |
97 | #include "slichw.h" |
98 | #include "slic.h" | |
99 | ||
4d6f6af8 GKH |
100 | static uint slic_first_init = 1; |
101 | static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\ | |
e9ef456e | 102 | "and Storage Accelerator (Non-Accelerated)"; |
4d6f6af8 GKH |
103 | |
104 | static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00"; | |
105 | static char *slic_product_name = "SLIC Technology(tm) Server "\ | |
106 | "and Storage Accelerator (Non-Accelerated)"; | |
107 | static char *slic_vendor = "Alacritech, Inc."; | |
108 | ||
109 | static int slic_debug = 1; | |
110 | static int debug = -1; | |
111 | static struct net_device *head_netdevice; | |
112 | ||
e9eff9d6 | 113 | static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL }; |
4d6f6af8 GKH |
114 | static int intagg_delay = 100; |
115 | static u32 dynamic_intagg; | |
4d6f6af8 GKH |
116 | static unsigned int rcv_count; |
117 | static struct dentry *slic_debugfs; | |
118 | ||
119 | #define DRV_NAME "slicoss" | |
120 | #define DRV_VERSION "2.0.1" | |
121 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" | |
122 | #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\ | |
123 | "Non-Accelerated Driver" | |
124 | #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\ | |
125 | "All rights reserved." | |
126 | #define PFX DRV_NAME " " | |
127 | ||
128 | MODULE_AUTHOR(DRV_AUTHOR); | |
129 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
130 | MODULE_LICENSE("Dual BSD/GPL"); | |
131 | ||
132 | module_param(dynamic_intagg, int, 0); | |
133 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); | |
134 | module_param(intagg_delay, int, 0); | |
135 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); | |
136 | ||
5d372900 | 137 | static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = { |
138 | { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) }, | |
139 | { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) }, | |
140 | { 0 } | |
4d6f6af8 GKH |
141 | }; |
142 | ||
143 | MODULE_DEVICE_TABLE(pci, slic_pci_tbl); | |
144 | ||
a750c1c5 GKH |
145 | #ifdef ASSERT |
146 | #undef ASSERT | |
147 | #endif | |
148 | ||
4d6ea9c3 DK |
149 | static void slic_assert_fail(void) |
150 | { | |
151 | u32 cpuid; | |
152 | u32 curr_pid; | |
153 | cpuid = smp_processor_id(); | |
154 | curr_pid = current->pid; | |
155 | ||
156 | printk(KERN_ERR "%s CPU # %d ---- PID # %d\n", | |
157 | __func__, cpuid, curr_pid); | |
158 | } | |
159 | ||
a750c1c5 GKH |
160 | #ifndef ASSERT |
161 | #define ASSERT(a) do { \ | |
162 | if (!(a)) { \ | |
163 | printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \ | |
164 | "line %d\n", __func__, __LINE__); \ | |
165 | slic_assert_fail(); \ | |
166 | } \ | |
167 | } while (0) | |
168 | #endif | |
169 | ||
170 | ||
4d6f6af8 GKH |
171 | #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \ |
172 | { \ | |
e9eff9d6 LD |
173 | spin_lock_irqsave(&_adapter->handle_lock.lock, \ |
174 | _adapter->handle_lock.flags); \ | |
4d6f6af8 GKH |
175 | _pslic_handle = _adapter->pfree_slic_handles; \ |
176 | if (_pslic_handle) { \ | |
177 | ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \ | |
178 | _adapter->pfree_slic_handles = _pslic_handle->next; \ | |
179 | } \ | |
e9eff9d6 LD |
180 | spin_unlock_irqrestore(&_adapter->handle_lock.lock, \ |
181 | _adapter->handle_lock.flags); \ | |
4d6f6af8 GKH |
182 | } |
183 | ||
184 | #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \ | |
185 | { \ | |
186 | _pslic_handle->type = SLIC_HANDLE_FREE; \ | |
e9eff9d6 LD |
187 | spin_lock_irqsave(&_adapter->handle_lock.lock, \ |
188 | _adapter->handle_lock.flags); \ | |
4d6f6af8 GKH |
189 | _pslic_handle->next = _adapter->pfree_slic_handles; \ |
190 | _adapter->pfree_slic_handles = _pslic_handle; \ | |
e9eff9d6 LD |
191 | spin_unlock_irqrestore(&_adapter->handle_lock.lock, \ |
192 | _adapter->handle_lock.flags); \ | |
4d6f6af8 GKH |
193 | } |
194 | ||
62f691a3 | 195 | static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush) |
4d6f6af8 GKH |
196 | { |
197 | writel(value, reg); | |
198 | if (flush) | |
199 | mb(); | |
200 | } | |
201 | ||
28980a3c GKH |
202 | static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg, |
203 | u32 value, void __iomem *regh, u32 paddrh, | |
204 | bool flush) | |
4d6f6af8 | 205 | { |
e9eff9d6 LD |
206 | spin_lock_irqsave(&adapter->bit64reglock.lock, |
207 | adapter->bit64reglock.flags); | |
4d6f6af8 GKH |
208 | if (paddrh != adapter->curaddrupper) { |
209 | adapter->curaddrupper = paddrh; | |
210 | writel(paddrh, regh); | |
211 | } | |
212 | writel(value, reg); | |
213 | if (flush) | |
214 | mb(); | |
e9eff9d6 LD |
215 | spin_unlock_irqrestore(&adapter->bit64reglock.lock, |
216 | adapter->bit64reglock.flags); | |
4d6f6af8 GKH |
217 | } |
218 | ||
4d6ea9c3 DK |
219 | /* |
220 | * Functions to obtain the CRC corresponding to the destination mac address. | |
221 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using | |
222 | * the polynomial: | |
223 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + | |
224 | * x^4 + x^2 + x^1. | |
225 | * | |
226 | * After the CRC for the 6 bytes is generated (but before the value is | |
227 | * complemented), | |
228 | * we must then transpose the value and return bits 30-23. | |
229 | * | |
230 | */ | |
231 | static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */ | |
232 | static u32 slic_crc_init; /* Is table initialized */ | |
4d6f6af8 | 233 | |
4d6ea9c3 DK |
234 | /* |
235 | * Contruct the CRC32 table | |
236 | */ | |
237 | static void slic_mcast_init_crc32(void) | |
4d6f6af8 | 238 | { |
4d6ea9c3 DK |
239 | u32 c; /* CRC shit reg */ |
240 | u32 e = 0; /* Poly X-or pattern */ | |
241 | int i; /* counter */ | |
242 | int k; /* byte being shifted into crc */ | |
e8bc9b7a | 243 | |
4d6ea9c3 | 244 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
4d6f6af8 | 245 | |
4d6ea9c3 DK |
246 | for (i = 0; i < ARRAY_SIZE(p); i++) |
247 | e |= 1L << (31 - p[i]); | |
4d6f6af8 | 248 | |
4d6ea9c3 DK |
249 | for (i = 1; i < 256; i++) { |
250 | c = i; | |
251 | for (k = 8; k; k--) | |
252 | c = c & 1 ? (c >> 1) ^ e : c >> 1; | |
253 | slic_crc_table[i] = c; | |
4d6f6af8 | 254 | } |
4d6f6af8 GKH |
255 | } |
256 | ||
4d6ea9c3 DK |
257 | /* |
258 | * Return the MAC hast as described above. | |
259 | */ | |
260 | static unsigned char slic_mcast_get_mac_hash(char *macaddr) | |
4d6f6af8 | 261 | { |
4d6ea9c3 DK |
262 | u32 crc; |
263 | char *p; | |
264 | int i; | |
265 | unsigned char machash = 0; | |
4d6f6af8 | 266 | |
4d6ea9c3 DK |
267 | if (!slic_crc_init) { |
268 | slic_mcast_init_crc32(); | |
269 | slic_crc_init = 1; | |
4d6f6af8 GKH |
270 | } |
271 | ||
4d6ea9c3 DK |
272 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
273 | for (i = 0, p = macaddr; i < 6; ++p, ++i) | |
274 | crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF]; | |
4d6f6af8 | 275 | |
4d6ea9c3 DK |
276 | /* Return bits 1-8, transposed */ |
277 | for (i = 1; i < 9; i++) | |
278 | machash |= (((crc >> i) & 1) << (8 - i)); | |
4d6f6af8 | 279 | |
4d6ea9c3 DK |
280 | return machash; |
281 | } | |
4d6f6af8 | 282 | |
4d6ea9c3 DK |
283 | static void slic_mcast_set_bit(struct adapter *adapter, char *address) |
284 | { | |
285 | unsigned char crcpoly; | |
4d6f6af8 | 286 | |
4d6ea9c3 DK |
287 | /* Get the CRC polynomial for the mac address */ |
288 | crcpoly = slic_mcast_get_mac_hash(address); | |
4d6f6af8 | 289 | |
4d6ea9c3 DK |
290 | /* We only have space on the SLIC for 64 entries. Lop |
291 | * off the top two bits. (2^6 = 64) | |
292 | */ | |
293 | crcpoly &= 0x3F; | |
4d6f6af8 | 294 | |
4d6ea9c3 DK |
295 | /* OR in the new bit into our 64 bit mask. */ |
296 | adapter->mcastmask |= (u64) 1 << crcpoly; | |
297 | } | |
4d6f6af8 | 298 | |
4d6ea9c3 DK |
299 | static void slic_mcast_set_mask(struct adapter *adapter) |
300 | { | |
301 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
4d6f6af8 | 302 | |
4d6ea9c3 DK |
303 | if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) { |
304 | /* Turn on all multicast addresses. We have to do this for | |
305 | * promiscuous mode as well as ALLMCAST mode. It saves the | |
306 | * Microcode from having to keep state about the MAC | |
307 | * configuration. | |
308 | */ | |
309 | slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH); | |
310 | slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF, | |
311 | FLUSH); | |
312 | } else { | |
313 | /* Commit our multicast mast to the SLIC by writing to the | |
314 | * multicast address mask registers | |
315 | */ | |
316 | slic_reg32_write(&slic_regs->slic_mcastlow, | |
317 | (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH); | |
318 | slic_reg32_write(&slic_regs->slic_mcasthigh, | |
319 | (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH); | |
4d6f6af8 | 320 | } |
4d6ea9c3 | 321 | } |
4d6f6af8 | 322 | |
4d6ea9c3 DK |
323 | static void slic_timer_ping(ulong dev) |
324 | { | |
325 | struct adapter *adapter; | |
326 | struct sliccard *card; | |
4d6f6af8 | 327 | |
4d6ea9c3 DK |
328 | ASSERT(dev); |
329 | adapter = netdev_priv((struct net_device *)dev); | |
330 | ASSERT(adapter); | |
4d6f6af8 | 331 | card = adapter->card; |
4d6ea9c3 | 332 | ASSERT(card); |
4d6f6af8 | 333 | |
4d6ea9c3 DK |
334 | adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ); |
335 | add_timer(&adapter->pingtimer); | |
336 | } | |
4d6f6af8 | 337 | |
4d6ea9c3 DK |
338 | static void slic_unmap_mmio_space(struct adapter *adapter) |
339 | { | |
340 | if (adapter->slic_regs) | |
341 | iounmap(adapter->slic_regs); | |
342 | adapter->slic_regs = NULL; | |
343 | } | |
4d6f6af8 | 344 | |
4d6ea9c3 DK |
345 | /* |
346 | * slic_link_config | |
347 | * | |
348 | * Write phy control to configure link duplex/speed | |
349 | * | |
350 | */ | |
351 | static void slic_link_config(struct adapter *adapter, | |
352 | u32 linkspeed, u32 linkduplex) | |
353 | { | |
354 | u32 __iomem *wphy; | |
355 | u32 speed; | |
356 | u32 duplex; | |
357 | u32 phy_config; | |
358 | u32 phy_advreg; | |
359 | u32 phy_gctlreg; | |
4d6f6af8 | 360 | |
4d6ea9c3 DK |
361 | if (adapter->state != ADAPT_UP) |
362 | return; | |
4d6f6af8 | 363 | |
4d6ea9c3 DK |
364 | ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID) |
365 | || (adapter->devid == SLIC_2GB_DEVICE_ID)); | |
4d6f6af8 | 366 | |
4d6ea9c3 DK |
367 | if (linkspeed > LINK_1000MB) |
368 | linkspeed = LINK_AUTOSPEED; | |
369 | if (linkduplex > LINK_AUTOD) | |
370 | linkduplex = LINK_AUTOD; | |
4d6f6af8 | 371 | |
4d6ea9c3 | 372 | wphy = &adapter->slic_regs->slic_wphy; |
4d6f6af8 | 373 | |
4d6ea9c3 DK |
374 | if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) { |
375 | if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) { | |
376 | /* We've got a fiber gigabit interface, and register | |
377 | * 4 is different in fiber mode than in copper mode | |
378 | */ | |
4d6f6af8 | 379 | |
4d6ea9c3 DK |
380 | /* advertise FD only @1000 Mb */ |
381 | phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD)); | |
382 | /* enable PAUSE frames */ | |
383 | phy_advreg |= PAR_ASYMPAUSE_FIBER; | |
384 | slic_reg32_write(wphy, phy_advreg, FLUSH); | |
4d6f6af8 | 385 | |
4d6ea9c3 DK |
386 | if (linkspeed == LINK_AUTOSPEED) { |
387 | /* reset phy, enable auto-neg */ | |
388 | phy_config = | |
389 | (MIICR_REG_PCR | | |
390 | (PCR_RESET | PCR_AUTONEG | | |
391 | PCR_AUTONEG_RST)); | |
392 | slic_reg32_write(wphy, phy_config, FLUSH); | |
393 | } else { /* forced 1000 Mb FD*/ | |
394 | /* power down phy to break link | |
395 | this may not work) */ | |
396 | phy_config = (MIICR_REG_PCR | PCR_POWERDOWN); | |
397 | slic_reg32_write(wphy, phy_config, FLUSH); | |
398 | /* wait, Marvell says 1 sec, | |
399 | try to get away with 10 ms */ | |
400 | mdelay(10); | |
4d6f6af8 | 401 | |
4d6ea9c3 DK |
402 | /* disable auto-neg, set speed/duplex, |
403 | soft reset phy, powerup */ | |
404 | phy_config = | |
405 | (MIICR_REG_PCR | | |
406 | (PCR_RESET | PCR_SPEED_1000 | | |
407 | PCR_DUPLEX_FULL)); | |
408 | slic_reg32_write(wphy, phy_config, FLUSH); | |
409 | } | |
410 | } else { /* copper gigabit */ | |
4d6f6af8 | 411 | |
4d6ea9c3 DK |
412 | /* Auto-Negotiate or 1000 Mb must be auto negotiated |
413 | * We've got a copper gigabit interface, and | |
414 | * register 4 is different in copper mode than | |
415 | * in fiber mode | |
416 | */ | |
417 | if (linkspeed == LINK_AUTOSPEED) { | |
418 | /* advertise 10/100 Mb modes */ | |
419 | phy_advreg = | |
420 | (MIICR_REG_4 | | |
421 | (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD | |
422 | | PAR_ADV10HD)); | |
423 | } else { | |
424 | /* linkspeed == LINK_1000MB - | |
425 | don't advertise 10/100 Mb modes */ | |
426 | phy_advreg = MIICR_REG_4; | |
427 | } | |
428 | /* enable PAUSE frames */ | |
429 | phy_advreg |= PAR_ASYMPAUSE; | |
430 | /* required by the Cicada PHY */ | |
431 | phy_advreg |= PAR_802_3; | |
432 | slic_reg32_write(wphy, phy_advreg, FLUSH); | |
433 | /* advertise FD only @1000 Mb */ | |
434 | phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD)); | |
435 | slic_reg32_write(wphy, phy_gctlreg, FLUSH); | |
4d6f6af8 | 436 | |
4d6ea9c3 DK |
437 | if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { |
438 | /* if a Marvell PHY | |
439 | enable auto crossover */ | |
440 | phy_config = | |
441 | (MIICR_REG_16 | (MRV_REG16_XOVERON)); | |
442 | slic_reg32_write(wphy, phy_config, FLUSH); | |
4d6f6af8 | 443 | |
4d6ea9c3 DK |
444 | /* reset phy, enable auto-neg */ |
445 | phy_config = | |
446 | (MIICR_REG_PCR | | |
447 | (PCR_RESET | PCR_AUTONEG | | |
448 | PCR_AUTONEG_RST)); | |
449 | slic_reg32_write(wphy, phy_config, FLUSH); | |
450 | } else { /* it's a Cicada PHY */ | |
451 | /* enable and restart auto-neg (don't reset) */ | |
452 | phy_config = | |
453 | (MIICR_REG_PCR | | |
454 | (PCR_AUTONEG | PCR_AUTONEG_RST)); | |
455 | slic_reg32_write(wphy, phy_config, FLUSH); | |
456 | } | |
4d6f6af8 | 457 | } |
4d6ea9c3 DK |
458 | } else { |
459 | /* Forced 10/100 */ | |
460 | if (linkspeed == LINK_10MB) | |
461 | speed = 0; | |
462 | else | |
463 | speed = PCR_SPEED_100; | |
464 | if (linkduplex == LINK_HALFD) | |
465 | duplex = 0; | |
466 | else | |
467 | duplex = PCR_DUPLEX_FULL; | |
468 | ||
469 | if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { | |
470 | /* if a Marvell PHY | |
471 | disable auto crossover */ | |
472 | phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF)); | |
473 | slic_reg32_write(wphy, phy_config, FLUSH); | |
4d6f6af8 | 474 | } |
4d6f6af8 | 475 | |
4d6ea9c3 DK |
476 | /* power down phy to break link (this may not work) */ |
477 | phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex)); | |
478 | slic_reg32_write(wphy, phy_config, FLUSH); | |
4d6f6af8 | 479 | |
4d6ea9c3 DK |
480 | /* wait, Marvell says 1 sec, try to get away with 10 ms */ |
481 | mdelay(10); | |
482 | ||
483 | if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { | |
484 | /* if a Marvell PHY | |
485 | disable auto-neg, set speed, | |
486 | soft reset phy, powerup */ | |
487 | phy_config = | |
488 | (MIICR_REG_PCR | (PCR_RESET | speed | duplex)); | |
489 | slic_reg32_write(wphy, phy_config, FLUSH); | |
490 | } else { /* it's a Cicada PHY */ | |
491 | /* disable auto-neg, set speed, powerup */ | |
492 | phy_config = (MIICR_REG_PCR | (speed | duplex)); | |
493 | slic_reg32_write(wphy, phy_config, FLUSH); | |
494 | } | |
495 | } | |
4d6f6af8 GKH |
496 | } |
497 | ||
4d6ea9c3 | 498 | static int slic_card_download_gbrcv(struct adapter *adapter) |
4d6f6af8 | 499 | { |
4d6ea9c3 DK |
500 | const struct firmware *fw; |
501 | const char *file = ""; | |
502 | int ret; | |
503 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
504 | u32 codeaddr; | |
505 | u32 instruction; | |
506 | int index = 0; | |
507 | u32 rcvucodelen = 0; | |
4d6f6af8 | 508 | |
4d6ea9c3 DK |
509 | switch (adapter->devid) { |
510 | case SLIC_2GB_DEVICE_ID: | |
511 | file = "slicoss/oasisrcvucode.sys"; | |
512 | break; | |
513 | case SLIC_1GB_DEVICE_ID: | |
514 | file = "slicoss/gbrcvucode.sys"; | |
515 | break; | |
516 | default: | |
517 | ASSERT(0); | |
518 | break; | |
519 | } | |
4d6f6af8 | 520 | |
4d6ea9c3 DK |
521 | ret = request_firmware(&fw, file, &adapter->pcidev->dev); |
522 | if (ret) { | |
523 | dev_err(&adapter->pcidev->dev, | |
524 | "SLICOSS: Failed to load firmware %s\n", file); | |
525 | return ret; | |
786ed801 | 526 | } |
4d6ea9c3 DK |
527 | |
528 | rcvucodelen = *(u32 *)(fw->data + index); | |
529 | index += 4; | |
530 | switch (adapter->devid) { | |
531 | case SLIC_2GB_DEVICE_ID: | |
532 | if (rcvucodelen != OasisRcvUCodeLen) | |
533 | return -EINVAL; | |
534 | break; | |
535 | case SLIC_1GB_DEVICE_ID: | |
536 | if (rcvucodelen != GBRcvUCodeLen) | |
537 | return -EINVAL; | |
538 | break; | |
539 | default: | |
540 | ASSERT(0); | |
541 | break; | |
4d6f6af8 | 542 | } |
4d6ea9c3 DK |
543 | /* start download */ |
544 | slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH); | |
545 | /* download the rcv sequencer ucode */ | |
546 | for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) { | |
547 | /* write out instruction address */ | |
548 | slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH); | |
549 | ||
550 | instruction = *(u32 *)(fw->data + index); | |
551 | index += 4; | |
552 | /* write out the instruction data low addr */ | |
553 | slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH); | |
554 | ||
555 | instruction = *(u8 *)(fw->data + index); | |
556 | index++; | |
557 | /* write out the instruction data high addr */ | |
558 | slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction, | |
559 | FLUSH); | |
560 | } | |
561 | ||
562 | /* download finished */ | |
563 | release_firmware(fw); | |
564 | slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH); | |
565 | return 0; | |
4d6f6af8 GKH |
566 | } |
567 | ||
4d6ea9c3 DK |
568 | MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); |
569 | MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); | |
570 | ||
571 | static int slic_card_download(struct adapter *adapter) | |
4d6f6af8 | 572 | { |
4d6ea9c3 DK |
573 | const struct firmware *fw; |
574 | const char *file = ""; | |
575 | int ret; | |
576 | u32 section; | |
577 | int thissectionsize; | |
578 | int codeaddr; | |
e9eff9d6 | 579 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; |
4d6ea9c3 DK |
580 | u32 instruction; |
581 | u32 baseaddress; | |
582 | u32 i; | |
583 | u32 numsects = 0; | |
584 | u32 sectsize[3]; | |
585 | u32 sectstart[3]; | |
586 | int ucode_start, index = 0; | |
4d6f6af8 | 587 | |
4d6ea9c3 DK |
588 | switch (adapter->devid) { |
589 | case SLIC_2GB_DEVICE_ID: | |
590 | file = "slicoss/oasisdownload.sys"; | |
591 | break; | |
592 | case SLIC_1GB_DEVICE_ID: | |
593 | file = "slicoss/gbdownload.sys"; | |
594 | break; | |
595 | default: | |
596 | ASSERT(0); | |
597 | break; | |
4d6f6af8 | 598 | } |
4d6ea9c3 DK |
599 | ret = request_firmware(&fw, file, &adapter->pcidev->dev); |
600 | if (ret) { | |
601 | dev_err(&adapter->pcidev->dev, | |
602 | "SLICOSS: Failed to load firmware %s\n", file); | |
603 | return ret; | |
604 | } | |
605 | numsects = *(u32 *)(fw->data + index); | |
606 | index += 4; | |
607 | ASSERT(numsects <= 3); | |
608 | for (i = 0; i < numsects; i++) { | |
609 | sectsize[i] = *(u32 *)(fw->data + index); | |
610 | index += 4; | |
611 | } | |
612 | for (i = 0; i < numsects; i++) { | |
613 | sectstart[i] = *(u32 *)(fw->data + index); | |
614 | index += 4; | |
615 | } | |
616 | ucode_start = index; | |
617 | instruction = *(u32 *)(fw->data + index); | |
618 | index += 4; | |
619 | for (section = 0; section < numsects; section++) { | |
620 | baseaddress = sectstart[section]; | |
621 | thissectionsize = sectsize[section] >> 3; | |
4d6f6af8 | 622 | |
4d6ea9c3 DK |
623 | for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { |
624 | /* Write out instruction address */ | |
625 | slic_reg32_write(&slic_regs->slic_wcs, | |
626 | baseaddress + codeaddr, FLUSH); | |
627 | /* Write out instruction to low addr */ | |
628 | slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH); | |
629 | instruction = *(u32 *)(fw->data + index); | |
630 | index += 4; | |
631 | ||
632 | /* Write out instruction to high addr */ | |
633 | slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH); | |
634 | instruction = *(u32 *)(fw->data + index); | |
635 | index += 4; | |
636 | } | |
637 | } | |
638 | index = ucode_start; | |
639 | for (section = 0; section < numsects; section++) { | |
640 | instruction = *(u32 *)(fw->data + index); | |
641 | baseaddress = sectstart[section]; | |
642 | if (baseaddress < 0x8000) | |
643 | continue; | |
644 | thissectionsize = sectsize[section] >> 3; | |
645 | ||
646 | for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { | |
647 | /* Write out instruction address */ | |
648 | slic_reg32_write(&slic_regs->slic_wcs, | |
649 | SLIC_WCS_COMPARE | (baseaddress + codeaddr), | |
650 | FLUSH); | |
651 | /* Write out instruction to low addr */ | |
652 | slic_reg32_write(&slic_regs->slic_wcs, instruction, | |
653 | FLUSH); | |
654 | instruction = *(u32 *)(fw->data + index); | |
655 | index += 4; | |
656 | /* Write out instruction to high addr */ | |
657 | slic_reg32_write(&slic_regs->slic_wcs, instruction, | |
658 | FLUSH); | |
659 | instruction = *(u32 *)(fw->data + index); | |
660 | index += 4; | |
661 | ||
662 | /* Check SRAM location zero. If it is non-zero. Abort.*/ | |
663 | /* failure = readl((u32 __iomem *)&slic_regs->slic_reset); | |
664 | if (failure) { | |
665 | release_firmware(fw); | |
666 | return -EIO; | |
667 | }*/ | |
668 | } | |
669 | } | |
670 | release_firmware(fw); | |
671 | /* Everything OK, kick off the card */ | |
672 | mdelay(10); | |
673 | slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH); | |
674 | ||
675 | /* stall for 20 ms, long enough for ucode to init card | |
676 | and reach mainloop */ | |
677 | mdelay(20); | |
4d6f6af8 | 678 | |
d1939786 | 679 | return 0; |
4d6f6af8 GKH |
680 | } |
681 | ||
4d6ea9c3 DK |
682 | MODULE_FIRMWARE("slicoss/oasisdownload.sys"); |
683 | MODULE_FIRMWARE("slicoss/gbdownload.sys"); | |
684 | ||
685 | static void slic_adapter_set_hwaddr(struct adapter *adapter) | |
4d6f6af8 | 686 | { |
4d6ea9c3 | 687 | struct sliccard *card = adapter->card; |
e52011e4 | 688 | |
4d6ea9c3 DK |
689 | if ((adapter->card) && (card->config_set)) { |
690 | memcpy(adapter->macaddr, | |
691 | card->config.MacInfo[adapter->functionnumber].macaddrA, | |
692 | sizeof(struct slic_config_mac)); | |
693 | if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] || | |
694 | adapter->currmacaddr[2] || adapter->currmacaddr[3] || | |
695 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { | |
696 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); | |
697 | } | |
698 | if (adapter->netdev) { | |
699 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, | |
700 | 6); | |
701 | } | |
702 | } | |
703 | } | |
4d6f6af8 | 704 | |
4d6ea9c3 DK |
705 | static void slic_intagg_set(struct adapter *adapter, u32 value) |
706 | { | |
707 | slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH); | |
708 | adapter->card->loadlevel_current = value; | |
709 | } | |
4d6f6af8 | 710 | |
4d6ea9c3 DK |
711 | static void slic_soft_reset(struct adapter *adapter) |
712 | { | |
713 | if (adapter->card->state == CARD_UP) { | |
714 | slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH); | |
715 | mdelay(1); | |
716 | } | |
4d6f6af8 | 717 | |
4d6ea9c3 DK |
718 | slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, |
719 | FLUSH); | |
720 | mdelay(1); | |
721 | } | |
e52011e4 | 722 | |
4d6ea9c3 DK |
723 | static void slic_mac_address_config(struct adapter *adapter) |
724 | { | |
725 | u32 value; | |
726 | u32 value2; | |
727 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
e52011e4 | 728 | |
4d6ea9c3 DK |
729 | value = *(u32 *) &adapter->currmacaddr[2]; |
730 | value = ntohl(value); | |
731 | slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH); | |
732 | slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH); | |
e52011e4 | 733 | |
4d6ea9c3 DK |
734 | value2 = (u32) ((adapter->currmacaddr[0] << 8 | |
735 | adapter->currmacaddr[1]) & 0xFFFF); | |
4d6f6af8 | 736 | |
4d6ea9c3 DK |
737 | slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH); |
738 | slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH); | |
e52011e4 | 739 | |
4d6ea9c3 DK |
740 | /* Write our multicast mask out to the card. This is done */ |
741 | /* here in addition to the slic_mcast_addr_set routine */ | |
742 | /* because ALL_MCAST may have been enabled or disabled */ | |
743 | slic_mcast_set_mask(adapter); | |
744 | } | |
e52011e4 | 745 | |
4d6ea9c3 DK |
746 | static void slic_mac_config(struct adapter *adapter) |
747 | { | |
748 | u32 value; | |
749 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
e52011e4 | 750 | |
4d6ea9c3 DK |
751 | /* Setup GMAC gaps */ |
752 | if (adapter->linkspeed == LINK_1000MB) { | |
753 | value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) | | |
754 | (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) | | |
755 | (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT)); | |
756 | } else { | |
757 | value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) | | |
758 | (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) | | |
759 | (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT)); | |
760 | } | |
e52011e4 | 761 | |
4d6ea9c3 DK |
762 | /* enable GMII */ |
763 | if (adapter->linkspeed == LINK_1000MB) | |
764 | value |= GMCR_GBIT; | |
765 | ||
766 | /* enable fullduplex */ | |
767 | if ((adapter->linkduplex == LINK_FULLD) | |
768 | || (adapter->macopts & MAC_LOOPBACK)) { | |
769 | value |= GMCR_FULLD; | |
4d6f6af8 | 770 | } |
4d6f6af8 | 771 | |
4d6ea9c3 DK |
772 | /* write mac config */ |
773 | slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH); | |
4d6f6af8 | 774 | |
4d6ea9c3 DK |
775 | /* setup mac addresses */ |
776 | slic_mac_address_config(adapter); | |
777 | } | |
778 | ||
779 | static void slic_config_set(struct adapter *adapter, bool linkchange) | |
4d6f6af8 | 780 | { |
4d6ea9c3 DK |
781 | u32 value; |
782 | u32 RcrReset; | |
783 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
4d6f6af8 | 784 | |
4d6ea9c3 DK |
785 | if (linkchange) { |
786 | /* Setup MAC */ | |
787 | slic_mac_config(adapter); | |
788 | RcrReset = GRCR_RESET; | |
789 | } else { | |
790 | slic_mac_address_config(adapter); | |
791 | RcrReset = 0; | |
792 | } | |
4d6f6af8 | 793 | |
4d6ea9c3 DK |
794 | if (adapter->linkduplex == LINK_FULLD) { |
795 | /* setup xmtcfg */ | |
796 | value = (GXCR_RESET | /* Always reset */ | |
797 | GXCR_XMTEN | /* Enable transmit */ | |
798 | GXCR_PAUSEEN); /* Enable pause */ | |
4d6f6af8 | 799 | |
4d6ea9c3 | 800 | slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); |
4d6f6af8 | 801 | |
4d6ea9c3 DK |
802 | /* Setup rcvcfg last */ |
803 | value = (RcrReset | /* Reset, if linkchange */ | |
804 | GRCR_CTLEN | /* Enable CTL frames */ | |
805 | GRCR_ADDRAEN | /* Address A enable */ | |
806 | GRCR_RCVBAD | /* Rcv bad frames */ | |
807 | (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); | |
808 | } else { | |
809 | /* setup xmtcfg */ | |
810 | value = (GXCR_RESET | /* Always reset */ | |
811 | GXCR_XMTEN); /* Enable transmit */ | |
4d6f6af8 | 812 | |
4d6ea9c3 | 813 | slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); |
4d6f6af8 | 814 | |
4d6ea9c3 DK |
815 | /* Setup rcvcfg last */ |
816 | value = (RcrReset | /* Reset, if linkchange */ | |
817 | GRCR_ADDRAEN | /* Address A enable */ | |
818 | GRCR_RCVBAD | /* Rcv bad frames */ | |
819 | (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); | |
4d6f6af8 GKH |
820 | } |
821 | ||
4d6ea9c3 DK |
822 | if (adapter->state != ADAPT_DOWN) { |
823 | /* Only enable receive if we are restarting or running */ | |
824 | value |= GRCR_RCVEN; | |
4d6f6af8 | 825 | } |
4d6f6af8 | 826 | |
4d6ea9c3 DK |
827 | if (adapter->macopts & MAC_PROMISC) |
828 | value |= GRCR_RCVALL; | |
4d6f6af8 | 829 | |
4d6ea9c3 DK |
830 | slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); |
831 | } | |
4d6f6af8 | 832 | |
4d6ea9c3 DK |
833 | /* |
834 | * Turn off RCV and XMT, power down PHY | |
835 | */ | |
836 | static void slic_config_clear(struct adapter *adapter) | |
4d6f6af8 | 837 | { |
4d6ea9c3 DK |
838 | u32 value; |
839 | u32 phy_config; | |
840 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
841 | ||
842 | /* Setup xmtcfg */ | |
843 | value = (GXCR_RESET | /* Always reset */ | |
844 | GXCR_PAUSEEN); /* Enable pause */ | |
845 | ||
846 | slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); | |
847 | ||
848 | value = (GRCR_RESET | /* Always reset */ | |
849 | GRCR_CTLEN | /* Enable CTL frames */ | |
850 | GRCR_ADDRAEN | /* Address A enable */ | |
851 | (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); | |
852 | ||
853 | slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); | |
854 | ||
855 | /* power down phy */ | |
856 | phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN)); | |
857 | slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH); | |
4d6f6af8 GKH |
858 | } |
859 | ||
4d6ea9c3 DK |
860 | static bool slic_mac_filter(struct adapter *adapter, |
861 | struct ether_header *ether_frame) | |
4d6f6af8 | 862 | { |
9092de6d | 863 | struct net_device *netdev = adapter->netdev; |
4d6ea9c3 DK |
864 | u32 opts = adapter->macopts; |
865 | u32 *dhost4 = (u32 *)ðer_frame->ether_dhost[0]; | |
866 | u16 *dhost2 = (u16 *)ðer_frame->ether_dhost[4]; | |
4d6f6af8 | 867 | |
4d6ea9c3 DK |
868 | if (opts & MAC_PROMISC) |
869 | return true; | |
4d6f6af8 | 870 | |
4d6ea9c3 DK |
871 | if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) { |
872 | if (opts & MAC_BCAST) { | |
873 | adapter->rcv_broadcasts++; | |
874 | return true; | |
875 | } else { | |
876 | return false; | |
4d6f6af8 | 877 | } |
4d6ea9c3 DK |
878 | } |
879 | ||
880 | if (ether_frame->ether_dhost[0] & 0x01) { | |
881 | if (opts & MAC_ALLMCAST) { | |
882 | adapter->rcv_multicasts++; | |
9092de6d | 883 | netdev->stats.multicast++; |
4d6ea9c3 | 884 | return true; |
4d6f6af8 | 885 | } |
4d6ea9c3 DK |
886 | if (opts & MAC_MCAST) { |
887 | struct mcast_address *mcaddr = adapter->mcastaddrs; | |
4d6f6af8 | 888 | |
4d6ea9c3 DK |
889 | while (mcaddr) { |
890 | if (!compare_ether_addr(mcaddr->address, | |
891 | ether_frame->ether_dhost)) { | |
892 | adapter->rcv_multicasts++; | |
9092de6d | 893 | netdev->stats.multicast++; |
4d6ea9c3 DK |
894 | return true; |
895 | } | |
896 | mcaddr = mcaddr->next; | |
897 | } | |
898 | return false; | |
899 | } else { | |
900 | return false; | |
4d6f6af8 GKH |
901 | } |
902 | } | |
4d6ea9c3 DK |
903 | if (opts & MAC_DIRECTED) { |
904 | adapter->rcv_unicasts++; | |
905 | return true; | |
906 | } | |
907 | return false; | |
4d6f6af8 | 908 | |
4d6ea9c3 | 909 | } |
4d6f6af8 | 910 | |
4d6ea9c3 | 911 | static int slic_mac_set_address(struct net_device *dev, void *ptr) |
4d6f6af8 | 912 | { |
4d6ea9c3 DK |
913 | struct adapter *adapter = netdev_priv(dev); |
914 | struct sockaddr *addr = ptr; | |
4d6f6af8 | 915 | |
4d6ea9c3 DK |
916 | if (netif_running(dev)) |
917 | return -EBUSY; | |
918 | if (!adapter) | |
919 | return -EBUSY; | |
4d6f6af8 | 920 | |
4d6ea9c3 DK |
921 | if (!is_valid_ether_addr(addr->sa_data)) |
922 | return -EINVAL; | |
4d6f6af8 | 923 | |
4d6ea9c3 DK |
924 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
925 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); | |
4d6f6af8 | 926 | |
4d6ea9c3 DK |
927 | slic_config_set(adapter, true); |
928 | return 0; | |
4d6f6af8 GKH |
929 | } |
930 | ||
4d6ea9c3 | 931 | static void slic_timer_load_check(ulong cardaddr) |
4d6f6af8 | 932 | { |
4d6ea9c3 DK |
933 | struct sliccard *card = (struct sliccard *)cardaddr; |
934 | struct adapter *adapter = card->master; | |
935 | u32 __iomem *intagg; | |
936 | u32 load = card->events; | |
937 | u32 level = 0; | |
4d6f6af8 | 938 | |
4d6ea9c3 | 939 | intagg = &adapter->slic_regs->slic_intagg; |
4d6f6af8 | 940 | |
4d6ea9c3 DK |
941 | if ((adapter) && (adapter->state == ADAPT_UP) && |
942 | (card->state == CARD_UP) && (slic_global.dynamic_intagg)) { | |
943 | if (adapter->devid == SLIC_1GB_DEVICE_ID) { | |
944 | if (adapter->linkspeed == LINK_1000MB) | |
945 | level = 100; | |
946 | else { | |
947 | if (load > SLIC_LOAD_5) | |
948 | level = SLIC_INTAGG_5; | |
949 | else if (load > SLIC_LOAD_4) | |
950 | level = SLIC_INTAGG_4; | |
951 | else if (load > SLIC_LOAD_3) | |
952 | level = SLIC_INTAGG_3; | |
953 | else if (load > SLIC_LOAD_2) | |
954 | level = SLIC_INTAGG_2; | |
955 | else if (load > SLIC_LOAD_1) | |
956 | level = SLIC_INTAGG_1; | |
957 | else | |
958 | level = SLIC_INTAGG_0; | |
4d6f6af8 | 959 | } |
4d6ea9c3 DK |
960 | if (card->loadlevel_current != level) { |
961 | card->loadlevel_current = level; | |
962 | slic_reg32_write(intagg, level, FLUSH); | |
4d6f6af8 | 963 | } |
4d6ea9c3 DK |
964 | } else { |
965 | if (load > SLIC_LOAD_5) | |
966 | level = SLIC_INTAGG_5; | |
967 | else if (load > SLIC_LOAD_4) | |
968 | level = SLIC_INTAGG_4; | |
969 | else if (load > SLIC_LOAD_3) | |
970 | level = SLIC_INTAGG_3; | |
971 | else if (load > SLIC_LOAD_2) | |
972 | level = SLIC_INTAGG_2; | |
973 | else if (load > SLIC_LOAD_1) | |
974 | level = SLIC_INTAGG_1; | |
975 | else | |
976 | level = SLIC_INTAGG_0; | |
977 | if (card->loadlevel_current != level) { | |
978 | card->loadlevel_current = level; | |
979 | slic_reg32_write(intagg, level, FLUSH); | |
4d6f6af8 | 980 | } |
4d6f6af8 | 981 | } |
4d6f6af8 | 982 | } |
4d6ea9c3 DK |
983 | card->events = 0; |
984 | card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ); | |
985 | add_timer(&card->loadtimer); | |
4d6f6af8 GKH |
986 | } |
987 | ||
4d6ea9c3 DK |
988 | static int slic_upr_queue_request(struct adapter *adapter, |
989 | u32 upr_request, | |
990 | u32 upr_data, | |
991 | u32 upr_data_h, | |
992 | u32 upr_buffer, u32 upr_buffer_h) | |
4d6f6af8 | 993 | { |
4d6ea9c3 DK |
994 | struct slic_upr *upr; |
995 | struct slic_upr *uprqueue; | |
4d6f6af8 | 996 | |
4d6ea9c3 DK |
997 | upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC); |
998 | if (!upr) | |
999 | return -ENOMEM; | |
4d6f6af8 | 1000 | |
4d6ea9c3 DK |
1001 | upr->adapter = adapter->port; |
1002 | upr->upr_request = upr_request; | |
1003 | upr->upr_data = upr_data; | |
1004 | upr->upr_buffer = upr_buffer; | |
1005 | upr->upr_data_h = upr_data_h; | |
1006 | upr->upr_buffer_h = upr_buffer_h; | |
1007 | upr->next = NULL; | |
1008 | if (adapter->upr_list) { | |
1009 | uprqueue = adapter->upr_list; | |
a0a1cbef | 1010 | |
4d6ea9c3 DK |
1011 | while (uprqueue->next) |
1012 | uprqueue = uprqueue->next; | |
1013 | uprqueue->next = upr; | |
1014 | } else { | |
1015 | adapter->upr_list = upr; | |
4d6f6af8 | 1016 | } |
4d6ea9c3 | 1017 | return 0; |
4d6f6af8 GKH |
1018 | } |
1019 | ||
4d6ea9c3 | 1020 | static void slic_upr_start(struct adapter *adapter) |
4d6f6af8 | 1021 | { |
4d6ea9c3 DK |
1022 | struct slic_upr *upr; |
1023 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
4d6f6af8 | 1024 | /* |
4d6ea9c3 DK |
1025 | char * ptr1; |
1026 | char * ptr2; | |
1027 | uint cmdoffset; | |
1028 | */ | |
1029 | upr = adapter->upr_list; | |
1030 | if (!upr) | |
1031 | return; | |
1032 | if (adapter->upr_busy) | |
1033 | return; | |
1034 | adapter->upr_busy = 1; | |
4d6f6af8 | 1035 | |
4d6ea9c3 DK |
1036 | switch (upr->upr_request) { |
1037 | case SLIC_UPR_STATS: | |
1038 | if (upr->upr_data_h == 0) { | |
1039 | slic_reg32_write(&slic_regs->slic_stats, upr->upr_data, | |
1040 | FLUSH); | |
1041 | } else { | |
1042 | slic_reg64_write(adapter, &slic_regs->slic_stats64, | |
1043 | upr->upr_data, | |
1044 | &slic_regs->slic_addr_upper, | |
1045 | upr->upr_data_h, FLUSH); | |
1046 | } | |
1047 | break; | |
4d6f6af8 | 1048 | |
4d6ea9c3 DK |
1049 | case SLIC_UPR_RLSR: |
1050 | slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data, | |
1051 | &slic_regs->slic_addr_upper, upr->upr_data_h, | |
1052 | FLUSH); | |
1053 | break; | |
4d6f6af8 | 1054 | |
4d6ea9c3 DK |
1055 | case SLIC_UPR_RCONFIG: |
1056 | slic_reg64_write(adapter, &slic_regs->slic_rconfig, | |
1057 | upr->upr_data, &slic_regs->slic_addr_upper, | |
1058 | upr->upr_data_h, FLUSH); | |
1059 | break; | |
1060 | case SLIC_UPR_PING: | |
1061 | slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH); | |
1062 | break; | |
1063 | default: | |
1064 | ASSERT(0); | |
1065 | } | |
4d6f6af8 GKH |
1066 | } |
1067 | ||
4d6ea9c3 DK |
1068 | static int slic_upr_request(struct adapter *adapter, |
1069 | u32 upr_request, | |
1070 | u32 upr_data, | |
1071 | u32 upr_data_h, | |
1072 | u32 upr_buffer, u32 upr_buffer_h) | |
4d6f6af8 | 1073 | { |
4d6ea9c3 | 1074 | int rc; |
4d6f6af8 | 1075 | |
4d6ea9c3 DK |
1076 | spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); |
1077 | rc = slic_upr_queue_request(adapter, | |
1078 | upr_request, | |
1079 | upr_data, | |
1080 | upr_data_h, upr_buffer, upr_buffer_h); | |
1081 | if (rc) | |
1082 | goto err_unlock_irq; | |
4d6f6af8 | 1083 | |
4d6ea9c3 DK |
1084 | slic_upr_start(adapter); |
1085 | err_unlock_irq: | |
1086 | spin_unlock_irqrestore(&adapter->upr_lock.lock, | |
1087 | adapter->upr_lock.flags); | |
1088 | return rc; | |
4d6f6af8 GKH |
1089 | } |
1090 | ||
4d6ea9c3 | 1091 | static void slic_link_upr_complete(struct adapter *adapter, u32 isr) |
4d6f6af8 | 1092 | { |
4d6ea9c3 DK |
1093 | u32 linkstatus = adapter->pshmem->linkstatus; |
1094 | uint linkup; | |
1095 | unsigned char linkspeed; | |
1096 | unsigned char linkduplex; | |
4d6f6af8 | 1097 | |
4d6ea9c3 DK |
1098 | if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { |
1099 | struct slic_shmem *pshmem; | |
4d6f6af8 | 1100 | |
4d6ea9c3 | 1101 | pshmem = (struct slic_shmem *)adapter->phys_shmem; |
1033f1f7 | 1102 | #if BITS_PER_LONG == 64 |
4d6ea9c3 DK |
1103 | slic_upr_queue_request(adapter, |
1104 | SLIC_UPR_RLSR, | |
1105 | SLIC_GET_ADDR_LOW(&pshmem->linkstatus), | |
1106 | SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), | |
1107 | 0, 0); | |
1033f1f7 | 1108 | #else |
4d6ea9c3 DK |
1109 | slic_upr_queue_request(adapter, |
1110 | SLIC_UPR_RLSR, | |
1111 | (u32) &pshmem->linkstatus, | |
1112 | SLIC_GET_ADDR_HIGH(pshmem), 0, 0); | |
4d6ea9c3 DK |
1113 | #endif |
1114 | return; | |
1115 | } | |
1116 | if (adapter->state != ADAPT_UP) | |
1117 | return; | |
4d6f6af8 | 1118 | |
4d6ea9c3 DK |
1119 | ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID) |
1120 | || (adapter->devid == SLIC_2GB_DEVICE_ID)); | |
4d6f6af8 | 1121 | |
4d6ea9c3 DK |
1122 | linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN; |
1123 | if (linkstatus & GIG_SPEED_1000) | |
1124 | linkspeed = LINK_1000MB; | |
1125 | else if (linkstatus & GIG_SPEED_100) | |
1126 | linkspeed = LINK_100MB; | |
1127 | else | |
1128 | linkspeed = LINK_10MB; | |
4d6f6af8 | 1129 | |
4d6ea9c3 DK |
1130 | if (linkstatus & GIG_FULLDUPLEX) |
1131 | linkduplex = LINK_FULLD; | |
1132 | else | |
1133 | linkduplex = LINK_HALFD; | |
4d6f6af8 | 1134 | |
4d6ea9c3 DK |
1135 | if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) |
1136 | return; | |
4d6f6af8 | 1137 | |
4d6ea9c3 DK |
1138 | /* link up event, but nothing has changed */ |
1139 | if ((adapter->linkstate == LINK_UP) && | |
1140 | (linkup == LINK_UP) && | |
1141 | (adapter->linkspeed == linkspeed) && | |
1142 | (adapter->linkduplex == linkduplex)) | |
1143 | return; | |
4d6f6af8 | 1144 | |
4d6ea9c3 | 1145 | /* link has changed at this point */ |
4d6f6af8 | 1146 | |
4d6ea9c3 DK |
1147 | /* link has gone from up to down */ |
1148 | if (linkup == LINK_DOWN) { | |
1149 | adapter->linkstate = LINK_DOWN; | |
1150 | return; | |
4d6f6af8 GKH |
1151 | } |
1152 | ||
4d6ea9c3 DK |
1153 | /* link has gone from down to up */ |
1154 | adapter->linkspeed = linkspeed; | |
1155 | adapter->linkduplex = linkduplex; | |
1156 | ||
1157 | if (adapter->linkstate != LINK_UP) { | |
1158 | /* setup the mac */ | |
b574488e | 1159 | slic_config_set(adapter, true); |
4d6ea9c3 DK |
1160 | adapter->linkstate = LINK_UP; |
1161 | netif_start_queue(adapter->netdev); | |
4d6f6af8 | 1162 | } |
4d6f6af8 GKH |
1163 | } |
1164 | ||
4d6ea9c3 | 1165 | static void slic_upr_request_complete(struct adapter *adapter, u32 isr) |
4d6f6af8 | 1166 | { |
4d6ea9c3 DK |
1167 | struct sliccard *card = adapter->card; |
1168 | struct slic_upr *upr; | |
4d6f6af8 | 1169 | |
4d6ea9c3 DK |
1170 | spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); |
1171 | upr = adapter->upr_list; | |
1172 | if (!upr) { | |
1173 | ASSERT(0); | |
1174 | spin_unlock_irqrestore(&adapter->upr_lock.lock, | |
1175 | adapter->upr_lock.flags); | |
1176 | return; | |
4d6f6af8 | 1177 | } |
4d6ea9c3 DK |
1178 | adapter->upr_list = upr->next; |
1179 | upr->next = NULL; | |
1180 | adapter->upr_busy = 0; | |
1181 | ASSERT(adapter->port == upr->adapter); | |
1182 | switch (upr->upr_request) { | |
1183 | case SLIC_UPR_STATS: | |
1184 | { | |
1185 | struct slic_stats *slicstats = | |
1186 | (struct slic_stats *) &adapter->pshmem->inicstats; | |
1187 | struct slic_stats *newstats = slicstats; | |
1188 | struct slic_stats *old = &adapter->inicstats_prev; | |
1189 | struct slicnet_stats *stst = &adapter->slic_stats; | |
4d6f6af8 | 1190 | |
4d6ea9c3 DK |
1191 | if (isr & ISR_UPCERR) { |
1192 | dev_err(&adapter->netdev->dev, | |
1193 | "SLIC_UPR_STATS command failed isr[%x]\n", | |
1194 | isr); | |
4d6f6af8 | 1195 | |
4d6ea9c3 DK |
1196 | break; |
1197 | } | |
1198 | UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs, | |
1199 | newstats->xmit_tcp_segs_gb, | |
1200 | old->xmit_tcp_segs_gb); | |
4d6f6af8 | 1201 | |
4d6ea9c3 DK |
1202 | UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes, |
1203 | newstats->xmit_tcp_bytes_gb, | |
1204 | old->xmit_tcp_bytes_gb); | |
4d6f6af8 | 1205 | |
4d6ea9c3 DK |
1206 | UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs, |
1207 | newstats->rcv_tcp_segs_gb, | |
1208 | old->rcv_tcp_segs_gb); | |
4d6f6af8 | 1209 | |
4d6ea9c3 DK |
1210 | UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes, |
1211 | newstats->rcv_tcp_bytes_gb, | |
1212 | old->rcv_tcp_bytes_gb); | |
4d6f6af8 | 1213 | |
4d6ea9c3 DK |
1214 | UPDATE_STATS_GB(stst->iface.xmt_bytes, |
1215 | newstats->xmit_bytes_gb, | |
1216 | old->xmit_bytes_gb); | |
4d6f6af8 | 1217 | |
4d6ea9c3 DK |
1218 | UPDATE_STATS_GB(stst->iface.xmt_ucast, |
1219 | newstats->xmit_unicasts_gb, | |
1220 | old->xmit_unicasts_gb); | |
4d6f6af8 | 1221 | |
4d6ea9c3 DK |
1222 | UPDATE_STATS_GB(stst->iface.rcv_bytes, |
1223 | newstats->rcv_bytes_gb, | |
1224 | old->rcv_bytes_gb); | |
4d6f6af8 | 1225 | |
4d6ea9c3 DK |
1226 | UPDATE_STATS_GB(stst->iface.rcv_ucast, |
1227 | newstats->rcv_unicasts_gb, | |
1228 | old->rcv_unicasts_gb); | |
4d6f6af8 | 1229 | |
4d6ea9c3 DK |
1230 | UPDATE_STATS_GB(stst->iface.xmt_errors, |
1231 | newstats->xmit_collisions_gb, | |
1232 | old->xmit_collisions_gb); | |
4d6f6af8 | 1233 | |
4d6ea9c3 DK |
1234 | UPDATE_STATS_GB(stst->iface.xmt_errors, |
1235 | newstats->xmit_excess_collisions_gb, | |
1236 | old->xmit_excess_collisions_gb); | |
4d6f6af8 | 1237 | |
4d6ea9c3 DK |
1238 | UPDATE_STATS_GB(stst->iface.xmt_errors, |
1239 | newstats->xmit_other_error_gb, | |
1240 | old->xmit_other_error_gb); | |
4d6f6af8 | 1241 | |
4d6ea9c3 DK |
1242 | UPDATE_STATS_GB(stst->iface.rcv_errors, |
1243 | newstats->rcv_other_error_gb, | |
1244 | old->rcv_other_error_gb); | |
4d6f6af8 | 1245 | |
4d6ea9c3 DK |
1246 | UPDATE_STATS_GB(stst->iface.rcv_discards, |
1247 | newstats->rcv_drops_gb, | |
1248 | old->rcv_drops_gb); | |
a0a1cbef | 1249 | |
4d6ea9c3 DK |
1250 | if (newstats->rcv_drops_gb > old->rcv_drops_gb) { |
1251 | adapter->rcv_drops += | |
1252 | (newstats->rcv_drops_gb - | |
1253 | old->rcv_drops_gb); | |
1254 | } | |
1255 | memcpy(old, newstats, sizeof(struct slic_stats)); | |
1256 | break; | |
1257 | } | |
1258 | case SLIC_UPR_RLSR: | |
1259 | slic_link_upr_complete(adapter, isr); | |
1260 | break; | |
1261 | case SLIC_UPR_RCONFIG: | |
1262 | break; | |
1263 | case SLIC_UPR_RPHY: | |
1264 | ASSERT(0); | |
1265 | break; | |
1266 | case SLIC_UPR_ENLB: | |
1267 | ASSERT(0); | |
1268 | break; | |
1269 | case SLIC_UPR_ENCT: | |
1270 | ASSERT(0); | |
1271 | break; | |
1272 | case SLIC_UPR_PDWN: | |
1273 | ASSERT(0); | |
1274 | break; | |
1275 | case SLIC_UPR_PING: | |
1276 | card->pingstatus |= (isr & ISR_PINGDSMASK); | |
1277 | break; | |
1278 | default: | |
1279 | ASSERT(0); | |
4d6f6af8 | 1280 | } |
4d6ea9c3 DK |
1281 | kfree(upr); |
1282 | slic_upr_start(adapter); | |
1283 | spin_unlock_irqrestore(&adapter->upr_lock.lock, | |
1284 | adapter->upr_lock.flags); | |
4d6f6af8 GKH |
1285 | } |
1286 | ||
4d6ea9c3 DK |
1287 | static void slic_config_get(struct adapter *adapter, u32 config, |
1288 | u32 config_h) | |
4d6f6af8 | 1289 | { |
4d6ea9c3 DK |
1290 | int status; |
1291 | ||
1292 | status = slic_upr_request(adapter, | |
1293 | SLIC_UPR_RCONFIG, | |
1294 | (u32) config, (u32) config_h, 0, 0); | |
1295 | ASSERT(status == 0); | |
4d6f6af8 GKH |
1296 | } |
1297 | ||
4d6ea9c3 DK |
1298 | /* |
1299 | * this is here to checksum the eeprom, there is some ucode bug | |
1300 | * which prevens us from using the ucode result. | |
1301 | * remove this once ucode is fixed. | |
1302 | */ | |
1303 | static ushort slic_eeprom_cksum(char *m, int len) | |
4d6f6af8 | 1304 | { |
4d6ea9c3 DK |
1305 | #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x) |
1306 | #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\ | |
1307 | } | |
4d6f6af8 | 1308 | |
4d6ea9c3 DK |
1309 | u16 *w; |
1310 | u32 sum = 0; | |
1311 | u32 byte_swapped = 0; | |
1312 | u32 w_int; | |
4d6f6af8 | 1313 | |
4d6ea9c3 DK |
1314 | union { |
1315 | char c[2]; | |
1316 | ushort s; | |
1317 | } s_util; | |
4d6f6af8 | 1318 | |
4d6ea9c3 DK |
1319 | union { |
1320 | ushort s[2]; | |
1321 | int l; | |
1322 | } l_util; | |
4d6f6af8 | 1323 | |
4d6ea9c3 DK |
1324 | l_util.l = 0; |
1325 | s_util.s = 0; | |
1326 | ||
1327 | w = (u16 *)m; | |
1033f1f7 | 1328 | #if BITS_PER_LONG == 64 |
4d6ea9c3 DK |
1329 | w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF); |
1330 | #else | |
1331 | w_int = (u32) (w); | |
1332 | #endif | |
1333 | if ((1 & w_int) && (len > 0)) { | |
1334 | REDUCE; | |
1335 | sum <<= 8; | |
1336 | s_util.c[0] = *(unsigned char *)w; | |
1337 | w = (u16 *)((char *)w + 1); | |
1338 | len--; | |
1339 | byte_swapped = 1; | |
1340 | } | |
1341 | ||
1342 | /* Unroll the loop to make overhead from branches &c small. */ | |
1343 | while ((len -= 32) >= 0) { | |
1344 | sum += w[0]; | |
1345 | sum += w[1]; | |
1346 | sum += w[2]; | |
1347 | sum += w[3]; | |
1348 | sum += w[4]; | |
1349 | sum += w[5]; | |
1350 | sum += w[6]; | |
1351 | sum += w[7]; | |
1352 | sum += w[8]; | |
1353 | sum += w[9]; | |
1354 | sum += w[10]; | |
1355 | sum += w[11]; | |
1356 | sum += w[12]; | |
1357 | sum += w[13]; | |
1358 | sum += w[14]; | |
1359 | sum += w[15]; | |
1360 | w = (u16 *)((ulong) w + 16); /* verify */ | |
1361 | } | |
1362 | len += 32; | |
1363 | while ((len -= 8) >= 0) { | |
1364 | sum += w[0]; | |
1365 | sum += w[1]; | |
1366 | sum += w[2]; | |
1367 | sum += w[3]; | |
1368 | w = (u16 *)((ulong) w + 4); /* verify */ | |
1369 | } | |
1370 | len += 8; | |
1371 | if (len != 0 || byte_swapped != 0) { | |
1372 | REDUCE; | |
1373 | while ((len -= 2) >= 0) | |
1374 | sum += *w++; /* verify */ | |
1375 | if (byte_swapped) { | |
1376 | REDUCE; | |
1377 | sum <<= 8; | |
1378 | byte_swapped = 0; | |
1379 | if (len == -1) { | |
1380 | s_util.c[1] = *(char *) w; | |
1381 | sum += s_util.s; | |
1382 | len = 0; | |
1383 | } else { | |
1384 | len = -1; | |
1385 | } | |
1386 | ||
1387 | } else if (len == -1) { | |
1388 | s_util.c[0] = *(char *) w; | |
1389 | } | |
1390 | ||
1391 | if (len == -1) { | |
1392 | s_util.c[1] = 0; | |
1393 | sum += s_util.s; | |
4d6f6af8 | 1394 | } |
4d6f6af8 | 1395 | } |
4d6ea9c3 DK |
1396 | REDUCE; |
1397 | return (ushort) sum; | |
4d6f6af8 GKH |
1398 | } |
1399 | ||
4d6ea9c3 | 1400 | static void slic_rspqueue_free(struct adapter *adapter) |
4d6f6af8 | 1401 | { |
4d6ea9c3 DK |
1402 | int i; |
1403 | struct slic_rspqueue *rspq = &adapter->rspqueue; | |
4d6f6af8 | 1404 | |
4d6ea9c3 DK |
1405 | for (i = 0; i < rspq->num_pages; i++) { |
1406 | if (rspq->vaddr[i]) { | |
1407 | pci_free_consistent(adapter->pcidev, PAGE_SIZE, | |
1408 | rspq->vaddr[i], rspq->paddr[i]); | |
1409 | } | |
1410 | rspq->vaddr[i] = NULL; | |
1411 | rspq->paddr[i] = 0; | |
1412 | } | |
1413 | rspq->offset = 0; | |
1414 | rspq->pageindex = 0; | |
1415 | rspq->rspbuf = NULL; | |
4d6f6af8 GKH |
1416 | } |
1417 | ||
4d6ea9c3 | 1418 | static int slic_rspqueue_init(struct adapter *adapter) |
4d6f6af8 | 1419 | { |
4d6ea9c3 DK |
1420 | int i; |
1421 | struct slic_rspqueue *rspq = &adapter->rspqueue; | |
1422 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
1423 | u32 paddrh = 0; | |
1424 | ||
1425 | ASSERT(adapter->state == ADAPT_DOWN); | |
1426 | memset(rspq, 0, sizeof(struct slic_rspqueue)); | |
1427 | ||
1428 | rspq->num_pages = SLIC_RSPQ_PAGES_GB; | |
1429 | ||
1430 | for (i = 0; i < rspq->num_pages; i++) { | |
1431 | rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev, | |
1432 | PAGE_SIZE, | |
1433 | &rspq->paddr[i]); | |
1434 | if (!rspq->vaddr[i]) { | |
1435 | dev_err(&adapter->pcidev->dev, | |
1436 | "pci_alloc_consistent failed\n"); | |
1437 | slic_rspqueue_free(adapter); | |
1438 | return -ENOMEM; | |
1439 | } | |
1033f1f7 DK |
1440 | /* FIXME: |
1441 | * do we really need this assertions (4K PAGE_SIZE aligned addr)? */ | |
1442 | #if 0 | |
4d6ea9c3 DK |
1443 | #ifndef CONFIG_X86_64 |
1444 | ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) == | |
1445 | (u32) rspq->vaddr[i]); | |
1446 | ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) == | |
1447 | (u32) rspq->paddr[i]); | |
1033f1f7 | 1448 | #endif |
4d6ea9c3 DK |
1449 | #endif |
1450 | memset(rspq->vaddr[i], 0, PAGE_SIZE); | |
1451 | ||
1452 | if (paddrh == 0) { | |
1453 | slic_reg32_write(&slic_regs->slic_rbar, | |
1454 | (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), | |
1455 | DONT_FLUSH); | |
1456 | } else { | |
1457 | slic_reg64_write(adapter, &slic_regs->slic_rbar64, | |
1458 | (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), | |
1459 | &slic_regs->slic_addr_upper, | |
1460 | paddrh, DONT_FLUSH); | |
1461 | } | |
1462 | } | |
1463 | rspq->offset = 0; | |
1464 | rspq->pageindex = 0; | |
1465 | rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0]; | |
1466 | return 0; | |
4d6f6af8 GKH |
1467 | } |
1468 | ||
4d6ea9c3 | 1469 | static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter) |
4d6f6af8 | 1470 | { |
4d6ea9c3 DK |
1471 | struct slic_rspqueue *rspq = &adapter->rspqueue; |
1472 | struct slic_rspbuf *buf; | |
4d6f6af8 | 1473 | |
4d6ea9c3 DK |
1474 | if (!(rspq->rspbuf->status)) |
1475 | return NULL; | |
4d6f6af8 | 1476 | |
4d6ea9c3 | 1477 | buf = rspq->rspbuf; |
1033f1f7 | 1478 | #if BITS_PER_LONG == 32 |
4d6ea9c3 DK |
1479 | ASSERT((buf->status & 0xFFFFFFE0) == 0); |
1480 | #endif | |
1481 | ASSERT(buf->hosthandle); | |
1482 | if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) { | |
1483 | rspq->rspbuf++; | |
1033f1f7 | 1484 | #if BITS_PER_LONG == 32 |
4d6ea9c3 DK |
1485 | ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) == |
1486 | (u32) rspq->rspbuf); | |
1487 | #endif | |
1488 | } else { | |
1489 | ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE); | |
1490 | slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64, | |
1491 | (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE), | |
1492 | &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH); | |
1493 | rspq->pageindex = (++rspq->pageindex) % rspq->num_pages; | |
1494 | rspq->offset = 0; | |
1495 | rspq->rspbuf = (struct slic_rspbuf *) | |
1496 | rspq->vaddr[rspq->pageindex]; | |
1033f1f7 | 1497 | #if BITS_PER_LONG == 32 |
4d6ea9c3 DK |
1498 | ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) == |
1499 | (u32) rspq->rspbuf); | |
1500 | #endif | |
1501 | } | |
1033f1f7 | 1502 | #if BITS_PER_LONG == 32 |
4d6ea9c3 DK |
1503 | ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf); |
1504 | #endif | |
1505 | return buf; | |
1506 | } | |
4d6f6af8 | 1507 | |
4d6ea9c3 DK |
1508 | static void slic_cmdqmem_init(struct adapter *adapter) |
1509 | { | |
1510 | struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; | |
4d6f6af8 | 1511 | |
4d6ea9c3 DK |
1512 | memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); |
1513 | } | |
62f691a3 | 1514 | |
4d6ea9c3 DK |
1515 | static void slic_cmdqmem_free(struct adapter *adapter) |
1516 | { | |
1517 | struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; | |
1518 | int i; | |
4d6f6af8 | 1519 | |
4d6ea9c3 DK |
1520 | for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) { |
1521 | if (cmdqmem->pages[i]) { | |
1522 | pci_free_consistent(adapter->pcidev, | |
1523 | PAGE_SIZE, | |
1524 | (void *) cmdqmem->pages[i], | |
1525 | cmdqmem->dma_pages[i]); | |
1526 | } | |
1527 | } | |
1528 | memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); | |
1529 | } | |
4d6f6af8 | 1530 | |
4d6ea9c3 DK |
1531 | static u32 *slic_cmdqmem_addpage(struct adapter *adapter) |
1532 | { | |
1533 | struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; | |
1534 | u32 *pageaddr; | |
4d6f6af8 | 1535 | |
4d6ea9c3 DK |
1536 | if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES) |
1537 | return NULL; | |
1538 | pageaddr = pci_alloc_consistent(adapter->pcidev, | |
1539 | PAGE_SIZE, | |
1540 | &cmdqmem->dma_pages[cmdqmem->pagecnt]); | |
1541 | if (!pageaddr) | |
1542 | return NULL; | |
1033f1f7 | 1543 | #if BITS_PER_LONG == 32 |
4d6ea9c3 DK |
1544 | ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr); |
1545 | #endif | |
1546 | cmdqmem->pages[cmdqmem->pagecnt] = pageaddr; | |
1547 | cmdqmem->pagecnt++; | |
1548 | return pageaddr; | |
1549 | } | |
4d6f6af8 | 1550 | |
4d6ea9c3 DK |
1551 | static void slic_cmdq_free(struct adapter *adapter) |
1552 | { | |
1553 | struct slic_hostcmd *cmd; | |
4d6f6af8 | 1554 | |
4d6ea9c3 DK |
1555 | cmd = adapter->cmdq_all.head; |
1556 | while (cmd) { | |
1557 | if (cmd->busy) { | |
1558 | struct sk_buff *tempskb; | |
4d6f6af8 | 1559 | |
4d6ea9c3 DK |
1560 | tempskb = cmd->skb; |
1561 | if (tempskb) { | |
1562 | cmd->skb = NULL; | |
1563 | dev_kfree_skb_irq(tempskb); | |
4d6f6af8 GKH |
1564 | } |
1565 | } | |
4d6ea9c3 DK |
1566 | cmd = cmd->next_all; |
1567 | } | |
1568 | memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); | |
1569 | memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); | |
1570 | memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); | |
1571 | slic_cmdqmem_free(adapter); | |
1572 | } | |
4d6f6af8 | 1573 | |
4d6ea9c3 DK |
1574 | static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page) |
1575 | { | |
1576 | struct slic_hostcmd *cmd; | |
1577 | struct slic_hostcmd *prev; | |
1578 | struct slic_hostcmd *tail; | |
1579 | struct slic_cmdqueue *cmdq; | |
1580 | int cmdcnt; | |
1581 | void *cmdaddr; | |
1582 | ulong phys_addr; | |
1583 | u32 phys_addrl; | |
1584 | u32 phys_addrh; | |
1585 | struct slic_handle *pslic_handle; | |
4d6f6af8 | 1586 | |
4d6ea9c3 DK |
1587 | cmdaddr = page; |
1588 | cmd = (struct slic_hostcmd *)cmdaddr; | |
1589 | cmdcnt = 0; | |
4d6f6af8 | 1590 | |
4d6ea9c3 DK |
1591 | phys_addr = virt_to_bus((void *)page); |
1592 | phys_addrl = SLIC_GET_ADDR_LOW(phys_addr); | |
1593 | phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr); | |
4d6f6af8 | 1594 | |
4d6ea9c3 DK |
1595 | prev = NULL; |
1596 | tail = cmd; | |
1597 | while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) && | |
1598 | (adapter->slic_handle_ix < 256)) { | |
1599 | /* Allocate and initialize a SLIC_HANDLE for this command */ | |
1600 | SLIC_GET_SLIC_HANDLE(adapter, pslic_handle); | |
1601 | if (pslic_handle == NULL) | |
1602 | ASSERT(0); | |
1603 | ASSERT(pslic_handle == | |
1604 | &adapter->slic_handles[pslic_handle->token. | |
1605 | handle_index]); | |
1606 | pslic_handle->type = SLIC_HANDLE_CMD; | |
1607 | pslic_handle->address = (void *) cmd; | |
1608 | pslic_handle->offset = (ushort) adapter->slic_handle_ix++; | |
1609 | pslic_handle->other_handle = NULL; | |
1610 | pslic_handle->next = NULL; | |
1611 | ||
1612 | cmd->pslic_handle = pslic_handle; | |
1613 | cmd->cmd64.hosthandle = pslic_handle->token.handle_token; | |
1614 | cmd->busy = false; | |
1615 | cmd->paddrl = phys_addrl; | |
1616 | cmd->paddrh = phys_addrh; | |
1617 | cmd->next_all = prev; | |
1618 | cmd->next = prev; | |
1619 | prev = cmd; | |
1620 | phys_addrl += SLIC_HOSTCMD_SIZE; | |
1621 | cmdaddr += SLIC_HOSTCMD_SIZE; | |
1622 | ||
1623 | cmd = (struct slic_hostcmd *)cmdaddr; | |
1624 | cmdcnt++; | |
4d6f6af8 | 1625 | } |
4d6ea9c3 DK |
1626 | |
1627 | cmdq = &adapter->cmdq_all; | |
1628 | cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ | |
1629 | tail->next_all = cmdq->head; | |
1630 | cmdq->head = prev; | |
1631 | cmdq = &adapter->cmdq_free; | |
1632 | spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); | |
1633 | cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ | |
1634 | tail->next = cmdq->head; | |
1635 | cmdq->head = prev; | |
1636 | spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); | |
4d6f6af8 GKH |
1637 | } |
1638 | ||
4d6ea9c3 | 1639 | static int slic_cmdq_init(struct adapter *adapter) |
4d6f6af8 | 1640 | { |
4d6ea9c3 DK |
1641 | int i; |
1642 | u32 *pageaddr; | |
4d6f6af8 | 1643 | |
4d6ea9c3 DK |
1644 | ASSERT(adapter->state == ADAPT_DOWN); |
1645 | memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); | |
1646 | memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); | |
1647 | memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); | |
1648 | spin_lock_init(&adapter->cmdq_all.lock.lock); | |
1649 | spin_lock_init(&adapter->cmdq_free.lock.lock); | |
1650 | spin_lock_init(&adapter->cmdq_done.lock.lock); | |
1651 | slic_cmdqmem_init(adapter); | |
1652 | adapter->slic_handle_ix = 1; | |
1653 | for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) { | |
1654 | pageaddr = slic_cmdqmem_addpage(adapter); | |
1033f1f7 | 1655 | #if BITS_PER_LONG == 32 |
4d6ea9c3 DK |
1656 | ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr); |
1657 | #endif | |
1658 | if (!pageaddr) { | |
1659 | slic_cmdq_free(adapter); | |
1660 | return -ENOMEM; | |
1661 | } | |
1662 | slic_cmdq_addcmdpage(adapter, pageaddr); | |
1663 | } | |
1664 | adapter->slic_handle_ix = 1; | |
4d6f6af8 | 1665 | |
4d6ea9c3 | 1666 | return 0; |
4d6f6af8 GKH |
1667 | } |
1668 | ||
4d6ea9c3 | 1669 | static void slic_cmdq_reset(struct adapter *adapter) |
4d6f6af8 | 1670 | { |
4d6ea9c3 DK |
1671 | struct slic_hostcmd *hcmd; |
1672 | struct sk_buff *skb; | |
1673 | u32 outstanding; | |
4d6f6af8 | 1674 | |
4d6ea9c3 DK |
1675 | spin_lock_irqsave(&adapter->cmdq_free.lock.lock, |
1676 | adapter->cmdq_free.lock.flags); | |
1677 | spin_lock_irqsave(&adapter->cmdq_done.lock.lock, | |
1678 | adapter->cmdq_done.lock.flags); | |
1679 | outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count; | |
1680 | outstanding -= adapter->cmdq_free.count; | |
1681 | hcmd = adapter->cmdq_all.head; | |
1682 | while (hcmd) { | |
1683 | if (hcmd->busy) { | |
1684 | skb = hcmd->skb; | |
1685 | ASSERT(skb); | |
1686 | hcmd->busy = 0; | |
1687 | hcmd->skb = NULL; | |
1688 | dev_kfree_skb_irq(skb); | |
1689 | } | |
1690 | hcmd = hcmd->next_all; | |
470c5736 | 1691 | } |
4d6ea9c3 DK |
1692 | adapter->cmdq_free.count = 0; |
1693 | adapter->cmdq_free.head = NULL; | |
1694 | adapter->cmdq_free.tail = NULL; | |
1695 | adapter->cmdq_done.count = 0; | |
1696 | adapter->cmdq_done.head = NULL; | |
1697 | adapter->cmdq_done.tail = NULL; | |
1698 | adapter->cmdq_free.head = adapter->cmdq_all.head; | |
1699 | hcmd = adapter->cmdq_all.head; | |
1700 | while (hcmd) { | |
1701 | adapter->cmdq_free.count++; | |
1702 | hcmd->next = hcmd->next_all; | |
1703 | hcmd = hcmd->next_all; | |
4d6f6af8 | 1704 | } |
4d6ea9c3 DK |
1705 | if (adapter->cmdq_free.count != adapter->cmdq_all.count) { |
1706 | dev_err(&adapter->netdev->dev, | |
1707 | "free_count %d != all count %d\n", | |
1708 | adapter->cmdq_free.count, adapter->cmdq_all.count); | |
4d6f6af8 | 1709 | } |
4d6ea9c3 DK |
1710 | spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock, |
1711 | adapter->cmdq_done.lock.flags); | |
1712 | spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock, | |
1713 | adapter->cmdq_free.lock.flags); | |
4d6f6af8 GKH |
1714 | } |
1715 | ||
4d6ea9c3 | 1716 | static void slic_cmdq_getdone(struct adapter *adapter) |
4d6f6af8 | 1717 | { |
4d6ea9c3 DK |
1718 | struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done; |
1719 | struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free; | |
4d6f6af8 | 1720 | |
4d6ea9c3 DK |
1721 | ASSERT(free_cmdq->head == NULL); |
1722 | spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags); | |
4d6f6af8 | 1723 | |
4d6ea9c3 DK |
1724 | free_cmdq->head = done_cmdq->head; |
1725 | free_cmdq->count = done_cmdq->count; | |
1726 | done_cmdq->head = NULL; | |
1727 | done_cmdq->tail = NULL; | |
1728 | done_cmdq->count = 0; | |
1729 | spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags); | |
1730 | } | |
874073ea | 1731 | |
4d6ea9c3 DK |
1732 | static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter) |
1733 | { | |
1734 | struct slic_cmdqueue *cmdq = &adapter->cmdq_free; | |
1735 | struct slic_hostcmd *cmd = NULL; | |
4d6f6af8 | 1736 | |
4d6ea9c3 DK |
1737 | lock_and_retry: |
1738 | spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); | |
1739 | retry: | |
1740 | cmd = cmdq->head; | |
1741 | if (cmd) { | |
1742 | cmdq->head = cmd->next; | |
1743 | cmdq->count--; | |
1744 | spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); | |
1745 | } else { | |
1746 | slic_cmdq_getdone(adapter); | |
1747 | cmd = cmdq->head; | |
1748 | if (cmd) { | |
1749 | goto retry; | |
1750 | } else { | |
1751 | u32 *pageaddr; | |
874073ea | 1752 | |
4d6ea9c3 DK |
1753 | spin_unlock_irqrestore(&cmdq->lock.lock, |
1754 | cmdq->lock.flags); | |
1755 | pageaddr = slic_cmdqmem_addpage(adapter); | |
1756 | if (pageaddr) { | |
1757 | slic_cmdq_addcmdpage(adapter, pageaddr); | |
1758 | goto lock_and_retry; | |
1759 | } | |
4d6f6af8 GKH |
1760 | } |
1761 | } | |
4d6ea9c3 | 1762 | return cmd; |
4d6f6af8 GKH |
1763 | } |
1764 | ||
4d6ea9c3 DK |
1765 | static void slic_cmdq_putdone_irq(struct adapter *adapter, |
1766 | struct slic_hostcmd *cmd) | |
4d6f6af8 | 1767 | { |
4d6ea9c3 | 1768 | struct slic_cmdqueue *cmdq = &adapter->cmdq_done; |
4d6f6af8 | 1769 | |
4d6ea9c3 DK |
1770 | spin_lock(&cmdq->lock.lock); |
1771 | cmd->busy = 0; | |
1772 | cmd->next = cmdq->head; | |
1773 | cmdq->head = cmd; | |
1774 | cmdq->count++; | |
1775 | if ((adapter->xmitq_full) && (cmdq->count > 10)) | |
1776 | netif_wake_queue(adapter->netdev); | |
1777 | spin_unlock(&cmdq->lock.lock); | |
4d6f6af8 GKH |
1778 | } |
1779 | ||
4d6ea9c3 | 1780 | static int slic_rcvqueue_fill(struct adapter *adapter) |
4d6f6af8 | 1781 | { |
4d6ea9c3 DK |
1782 | void *paddr; |
1783 | u32 paddrl; | |
1784 | u32 paddrh; | |
1785 | struct slic_rcvqueue *rcvq = &adapter->rcvqueue; | |
1786 | int i = 0; | |
1787 | struct device *dev = &adapter->netdev->dev; | |
1788 | ||
1789 | while (i < SLIC_RCVQ_FILLENTRIES) { | |
1790 | struct slic_rcvbuf *rcvbuf; | |
1791 | struct sk_buff *skb; | |
1792 | #ifdef KLUDGE_FOR_4GB_BOUNDARY | |
1793 | retry_rcvqfill: | |
1794 | #endif | |
1795 | skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC); | |
1796 | if (skb) { | |
1797 | paddr = (void *)pci_map_single(adapter->pcidev, | |
1798 | skb->data, | |
1799 | SLIC_RCVQ_RCVBUFSIZE, | |
1800 | PCI_DMA_FROMDEVICE); | |
1801 | paddrl = SLIC_GET_ADDR_LOW(paddr); | |
1802 | paddrh = SLIC_GET_ADDR_HIGH(paddr); | |
1803 | ||
1804 | skb->len = SLIC_RCVBUF_HEADSIZE; | |
1805 | rcvbuf = (struct slic_rcvbuf *)skb->head; | |
1806 | rcvbuf->status = 0; | |
1807 | skb->next = NULL; | |
1808 | #ifdef KLUDGE_FOR_4GB_BOUNDARY | |
1809 | if (paddrl == 0) { | |
1810 | dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", | |
1811 | __func__); | |
1812 | dev_err(dev, "skb[%p] PROBLEM\n", skb); | |
1813 | dev_err(dev, " skbdata[%p]\n", skb->data); | |
1814 | dev_err(dev, " skblen[%x]\n", skb->len); | |
1815 | dev_err(dev, " paddr[%p]\n", paddr); | |
1816 | dev_err(dev, " paddrl[%x]\n", paddrl); | |
1817 | dev_err(dev, " paddrh[%x]\n", paddrh); | |
1818 | dev_err(dev, " rcvq->head[%p]\n", rcvq->head); | |
1819 | dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); | |
1820 | dev_err(dev, " rcvq->count[%x]\n", rcvq->count); | |
1821 | dev_err(dev, "SKIP THIS SKB!!!!!!!!\n"); | |
1822 | goto retry_rcvqfill; | |
1823 | } | |
1824 | #else | |
1825 | if (paddrl == 0) { | |
1826 | dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", | |
1827 | __func__); | |
1828 | dev_err(dev, "skb[%p] PROBLEM\n", skb); | |
1829 | dev_err(dev, " skbdata[%p]\n", skb->data); | |
1830 | dev_err(dev, " skblen[%x]\n", skb->len); | |
1831 | dev_err(dev, " paddr[%p]\n", paddr); | |
1832 | dev_err(dev, " paddrl[%x]\n", paddrl); | |
1833 | dev_err(dev, " paddrh[%x]\n", paddrh); | |
1834 | dev_err(dev, " rcvq->head[%p]\n", rcvq->head); | |
1835 | dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); | |
1836 | dev_err(dev, " rcvq->count[%x]\n", rcvq->count); | |
1837 | dev_err(dev, "GIVE TO CARD ANYWAY\n"); | |
1838 | } | |
1839 | #endif | |
1840 | if (paddrh == 0) { | |
1841 | slic_reg32_write(&adapter->slic_regs->slic_hbar, | |
1842 | (u32)paddrl, DONT_FLUSH); | |
1843 | } else { | |
1844 | slic_reg64_write(adapter, | |
1845 | &adapter->slic_regs->slic_hbar64, | |
1846 | paddrl, | |
1847 | &adapter->slic_regs->slic_addr_upper, | |
1848 | paddrh, DONT_FLUSH); | |
1849 | } | |
1850 | if (rcvq->head) | |
1851 | rcvq->tail->next = skb; | |
1852 | else | |
1853 | rcvq->head = skb; | |
1854 | rcvq->tail = skb; | |
1855 | rcvq->count++; | |
1856 | i++; | |
1857 | } else { | |
1858 | dev_err(&adapter->netdev->dev, | |
1859 | "slic_rcvqueue_fill could only get [%d] skbuffs\n", | |
1860 | i); | |
1861 | break; | |
1862 | } | |
1863 | } | |
1864 | return i; | |
4d6f6af8 GKH |
1865 | } |
1866 | ||
4d6ea9c3 | 1867 | static void slic_rcvqueue_free(struct adapter *adapter) |
4d6f6af8 | 1868 | { |
4d6ea9c3 DK |
1869 | struct slic_rcvqueue *rcvq = &adapter->rcvqueue; |
1870 | struct sk_buff *skb; | |
4d6f6af8 | 1871 | |
4d6ea9c3 DK |
1872 | while (rcvq->head) { |
1873 | skb = rcvq->head; | |
1874 | rcvq->head = rcvq->head->next; | |
1875 | dev_kfree_skb(skb); | |
1876 | } | |
1877 | rcvq->tail = NULL; | |
1878 | rcvq->head = NULL; | |
1879 | rcvq->count = 0; | |
1880 | } | |
4d6f6af8 | 1881 | |
4d6ea9c3 DK |
1882 | static int slic_rcvqueue_init(struct adapter *adapter) |
1883 | { | |
1884 | int i, count; | |
1885 | struct slic_rcvqueue *rcvq = &adapter->rcvqueue; | |
4d6f6af8 | 1886 | |
4d6ea9c3 DK |
1887 | ASSERT(adapter->state == ADAPT_DOWN); |
1888 | rcvq->tail = NULL; | |
1889 | rcvq->head = NULL; | |
1890 | rcvq->size = SLIC_RCVQ_ENTRIES; | |
1891 | rcvq->errors = 0; | |
1892 | rcvq->count = 0; | |
1893 | i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES); | |
1894 | count = 0; | |
1895 | while (i) { | |
1896 | count += slic_rcvqueue_fill(adapter); | |
1897 | i--; | |
1898 | } | |
1899 | if (rcvq->count < SLIC_RCVQ_MINENTRIES) { | |
1900 | slic_rcvqueue_free(adapter); | |
1901 | return -ENOMEM; | |
4d6f6af8 | 1902 | } |
4d6ea9c3 DK |
1903 | return 0; |
1904 | } | |
4d6f6af8 | 1905 | |
4d6ea9c3 DK |
1906 | static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter) |
1907 | { | |
1908 | struct slic_rcvqueue *rcvq = &adapter->rcvqueue; | |
1909 | struct sk_buff *skb; | |
1910 | struct slic_rcvbuf *rcvbuf; | |
1911 | int count; | |
4d6f6af8 | 1912 | |
4d6ea9c3 DK |
1913 | if (rcvq->count) { |
1914 | skb = rcvq->head; | |
1915 | rcvbuf = (struct slic_rcvbuf *)skb->head; | |
1916 | ASSERT(rcvbuf); | |
4d6f6af8 | 1917 | |
4d6ea9c3 DK |
1918 | if (rcvbuf->status & IRHDDR_SVALID) { |
1919 | rcvq->head = rcvq->head->next; | |
1920 | skb->next = NULL; | |
1921 | rcvq->count--; | |
4d6f6af8 | 1922 | } else { |
4d6ea9c3 | 1923 | skb = NULL; |
4d6f6af8 | 1924 | } |
4d6ea9c3 DK |
1925 | } else { |
1926 | dev_err(&adapter->netdev->dev, | |
1927 | "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count); | |
1928 | skb = NULL; | |
1929 | } | |
1930 | while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { | |
1931 | count = slic_rcvqueue_fill(adapter); | |
1932 | if (!count) | |
1933 | break; | |
1934 | } | |
1935 | if (skb) | |
1936 | rcvq->errors = 0; | |
1937 | return skb; | |
1938 | } | |
4d6f6af8 | 1939 | |
4d6ea9c3 DK |
1940 | static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb) |
1941 | { | |
1942 | struct slic_rcvqueue *rcvq = &adapter->rcvqueue; | |
1943 | void *paddr; | |
1944 | u32 paddrl; | |
1945 | u32 paddrh; | |
1946 | struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head; | |
1947 | struct device *dev; | |
4d6f6af8 | 1948 | |
4d6ea9c3 | 1949 | ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE); |
4d6f6af8 | 1950 | |
4d6ea9c3 DK |
1951 | paddr = (void *)pci_map_single(adapter->pcidev, skb->head, |
1952 | SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE); | |
1953 | rcvbuf->status = 0; | |
1954 | skb->next = NULL; | |
4d6f6af8 | 1955 | |
4d6ea9c3 DK |
1956 | paddrl = SLIC_GET_ADDR_LOW(paddr); |
1957 | paddrh = SLIC_GET_ADDR_HIGH(paddr); | |
4d6f6af8 | 1958 | |
4d6ea9c3 DK |
1959 | if (paddrl == 0) { |
1960 | dev = &adapter->netdev->dev; | |
1961 | dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", | |
1962 | __func__); | |
1963 | dev_err(dev, "skb[%p] PROBLEM\n", skb); | |
1964 | dev_err(dev, " skbdata[%p]\n", skb->data); | |
1965 | dev_err(dev, " skblen[%x]\n", skb->len); | |
1966 | dev_err(dev, " paddr[%p]\n", paddr); | |
1967 | dev_err(dev, " paddrl[%x]\n", paddrl); | |
1968 | dev_err(dev, " paddrh[%x]\n", paddrh); | |
1969 | dev_err(dev, " rcvq->head[%p]\n", rcvq->head); | |
1970 | dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); | |
1971 | dev_err(dev, " rcvq->count[%x]\n", rcvq->count); | |
4d6f6af8 | 1972 | } |
4d6ea9c3 DK |
1973 | if (paddrh == 0) { |
1974 | slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl, | |
1975 | DONT_FLUSH); | |
1976 | } else { | |
1977 | slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64, | |
1978 | paddrl, &adapter->slic_regs->slic_addr_upper, | |
1979 | paddrh, DONT_FLUSH); | |
4d6f6af8 | 1980 | } |
4d6ea9c3 DK |
1981 | if (rcvq->head) |
1982 | rcvq->tail->next = skb; | |
e8bc9b7a | 1983 | else |
4d6ea9c3 DK |
1984 | rcvq->head = skb; |
1985 | rcvq->tail = skb; | |
1986 | rcvq->count++; | |
1987 | return rcvq->count; | |
4d6f6af8 GKH |
1988 | } |
1989 | ||
4d6ea9c3 | 1990 | static int slic_debug_card_show(struct seq_file *seq, void *v) |
4d6f6af8 | 1991 | { |
4d6ea9c3 DK |
1992 | #ifdef MOOKTODO |
1993 | int i; | |
1994 | struct sliccard *card = seq->private; | |
1995 | struct slic_config *config = &card->config; | |
1996 | unsigned char *fru = (unsigned char *)(&card->config.atk_fru); | |
1997 | unsigned char *oemfru = (unsigned char *)(&card->config.OemFru); | |
1998 | #endif | |
4d6f6af8 | 1999 | |
4d6ea9c3 DK |
2000 | seq_printf(seq, "driver_version : %s\n", slic_proc_version); |
2001 | seq_printf(seq, "Microcode versions: \n"); | |
2002 | seq_printf(seq, " Gigabit (gb) : %s %s\n", | |
2003 | MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE); | |
2004 | seq_printf(seq, " Gigabit Receiver : %s %s\n", | |
2005 | GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE); | |
2006 | seq_printf(seq, "Vendor : %s\n", slic_vendor); | |
2007 | seq_printf(seq, "Product Name : %s\n", slic_product_name); | |
2008 | #ifdef MOOKTODO | |
2009 | seq_printf(seq, "VendorId : %4.4X\n", | |
2010 | config->VendorId); | |
2011 | seq_printf(seq, "DeviceId : %4.4X\n", | |
2012 | config->DeviceId); | |
2013 | seq_printf(seq, "RevisionId : %2.2x\n", | |
2014 | config->RevisionId); | |
2015 | seq_printf(seq, "Bus # : %d\n", card->busnumber); | |
2016 | seq_printf(seq, "Device # : %d\n", card->slotnumber); | |
2017 | seq_printf(seq, "Interfaces : %d\n", card->card_size); | |
2018 | seq_printf(seq, " Initialized : %d\n", | |
2019 | card->adapters_activated); | |
2020 | seq_printf(seq, " Allocated : %d\n", | |
2021 | card->adapters_allocated); | |
2022 | ASSERT(card->card_size <= SLIC_NBR_MACS); | |
2023 | for (i = 0; i < card->card_size; i++) { | |
2024 | seq_printf(seq, | |
2025 | " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", | |
2026 | i, config->macinfo[i].macaddrA[0], | |
2027 | config->macinfo[i].macaddrA[1], | |
2028 | config->macinfo[i].macaddrA[2], | |
2029 | config->macinfo[i].macaddrA[3], | |
2030 | config->macinfo[i].macaddrA[4], | |
2031 | config->macinfo[i].macaddrA[5]); | |
4d6f6af8 | 2032 | } |
4d6ea9c3 DK |
2033 | seq_printf(seq, " IF Init State Duplex/Speed irq\n"); |
2034 | seq_printf(seq, " -------------------------------\n"); | |
2035 | for (i = 0; i < card->adapters_allocated; i++) { | |
2036 | struct adapter *adapter; | |
4d6f6af8 | 2037 | |
4d6ea9c3 DK |
2038 | adapter = card->adapter[i]; |
2039 | if (adapter) { | |
2040 | seq_printf(seq, | |
2041 | " %d %d %s %s %s 0x%X\n", | |
2042 | adapter->physport, adapter->state, | |
2043 | SLIC_LINKSTATE(adapter->linkstate), | |
2044 | SLIC_DUPLEX(adapter->linkduplex), | |
2045 | SLIC_SPEED(adapter->linkspeed), | |
2046 | (uint) adapter->irq); | |
2047 | } | |
2048 | } | |
2049 | seq_printf(seq, "Generation # : %4.4X\n", card->gennumber); | |
2050 | seq_printf(seq, "RcvQ max entries : %4.4X\n", | |
2051 | SLIC_RCVQ_ENTRIES); | |
2052 | seq_printf(seq, "Ping Status : %8.8X\n", | |
2053 | card->pingstatus); | |
2054 | seq_printf(seq, "Minimum grant : %2.2x\n", | |
2055 | config->MinGrant); | |
2056 | seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat); | |
2057 | seq_printf(seq, "PciStatus : %4.4x\n", | |
2058 | config->Pcistatus); | |
2059 | seq_printf(seq, "Debug Device Id : %4.4x\n", | |
2060 | config->DbgDevId); | |
2061 | seq_printf(seq, "DRAM ROM Function : %4.4x\n", | |
2062 | config->DramRomFn); | |
2063 | seq_printf(seq, "Network interface Pin 1 : %2.2x\n", | |
2064 | config->NetIntPin1); | |
2065 | seq_printf(seq, "Network interface Pin 2 : %2.2x\n", | |
2066 | config->NetIntPin1); | |
2067 | seq_printf(seq, "Network interface Pin 3 : %2.2x\n", | |
2068 | config->NetIntPin1); | |
2069 | seq_printf(seq, "PM capabilities : %4.4X\n", | |
2070 | config->PMECapab); | |
2071 | seq_printf(seq, "Network Clock Controls : %4.4X\n", | |
2072 | config->NwClkCtrls); | |
4d6f6af8 | 2073 | |
4d6ea9c3 DK |
2074 | switch (config->FruFormat) { |
2075 | case ATK_FRU_FORMAT: | |
2076 | { | |
2077 | seq_printf(seq, | |
2078 | "Vendor : Alacritech, Inc.\n"); | |
2079 | seq_printf(seq, | |
2080 | "Assembly # : %c%c%c%c%c%c\n", | |
2081 | fru[0], fru[1], fru[2], fru[3], fru[4], | |
2082 | fru[5]); | |
2083 | seq_printf(seq, | |
2084 | "Revision # : %c%c\n", | |
2085 | fru[6], fru[7]); | |
4d6f6af8 | 2086 | |
4d6ea9c3 DK |
2087 | if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) { |
2088 | seq_printf(seq, | |
2089 | "Serial # : " | |
2090 | "%c%c%c%c%c%c%c%c%c%c%c%c\n", | |
2091 | fru[8], fru[9], fru[10], | |
2092 | fru[11], fru[12], fru[13], | |
2093 | fru[16], fru[17], fru[18], | |
2094 | fru[19], fru[20], fru[21]); | |
2095 | } else { | |
2096 | seq_printf(seq, | |
2097 | "Serial # : " | |
2098 | "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n", | |
2099 | fru[8], fru[9], fru[10], | |
2100 | fru[11], fru[12], fru[13], | |
2101 | fru[14], fru[15], fru[16], | |
2102 | fru[17], fru[18], fru[19], | |
2103 | fru[20], fru[21]); | |
4d6f6af8 | 2104 | } |
4d6ea9c3 | 2105 | break; |
4d6f6af8 | 2106 | } |
4d6f6af8 | 2107 | |
4d6ea9c3 DK |
2108 | default: |
2109 | { | |
2110 | seq_printf(seq, | |
2111 | "Vendor : Alacritech, Inc.\n"); | |
2112 | seq_printf(seq, | |
2113 | "Serial # : Empty FRU\n"); | |
2114 | break; | |
4d6f6af8 GKH |
2115 | } |
2116 | } | |
2117 | ||
4d6ea9c3 DK |
2118 | switch (config->OEMFruFormat) { |
2119 | case VENDOR1_FRU_FORMAT: | |
2120 | { | |
2121 | seq_printf(seq, "FRU Information:\n"); | |
2122 | seq_printf(seq, " Commodity # : %c\n", | |
2123 | oemfru[0]); | |
2124 | seq_printf(seq, | |
2125 | " Assembly # : %c%c%c%c\n", | |
2126 | oemfru[1], oemfru[2], oemfru[3], oemfru[4]); | |
2127 | seq_printf(seq, | |
2128 | " Revision # : %c%c\n", | |
2129 | oemfru[5], oemfru[6]); | |
2130 | seq_printf(seq, | |
2131 | " Supplier # : %c%c\n", | |
2132 | oemfru[7], oemfru[8]); | |
2133 | seq_printf(seq, | |
2134 | " Date : %c%c\n", | |
2135 | oemfru[9], oemfru[10]); | |
2136 | seq_sprintf(seq, | |
2137 | " Sequence # : %c%c%c\n", | |
2138 | oemfru[11], oemfru[12], oemfru[13]); | |
2139 | break; | |
2140 | } | |
4d6f6af8 | 2141 | |
4d6ea9c3 DK |
2142 | case VENDOR2_FRU_FORMAT: |
2143 | { | |
2144 | seq_printf(seq, "FRU Information:\n"); | |
2145 | seq_printf(seq, | |
2146 | " Part # : " | |
2147 | "%c%c%c%c%c%c%c%c\n", | |
2148 | oemfru[0], oemfru[1], oemfru[2], | |
2149 | oemfru[3], oemfru[4], oemfru[5], | |
2150 | oemfru[6], oemfru[7]); | |
2151 | seq_printf(seq, | |
2152 | " Supplier # : %c%c%c%c%c\n", | |
2153 | oemfru[8], oemfru[9], oemfru[10], | |
2154 | oemfru[11], oemfru[12]); | |
2155 | seq_printf(seq, | |
2156 | " Date : %c%c%c\n", | |
2157 | oemfru[13], oemfru[14], oemfru[15]); | |
2158 | seq_sprintf(seq, | |
2159 | " Sequence # : %c%c%c%c\n", | |
2160 | oemfru[16], oemfru[17], oemfru[18], | |
2161 | oemfru[19]); | |
2162 | break; | |
2163 | } | |
4d6f6af8 | 2164 | |
4d6ea9c3 DK |
2165 | case VENDOR3_FRU_FORMAT: |
2166 | { | |
2167 | seq_printf(seq, "FRU Information:\n"); | |
4d6f6af8 | 2168 | } |
4d6ea9c3 DK |
2169 | |
2170 | case VENDOR4_FRU_FORMAT: | |
2171 | { | |
2172 | seq_printf(seq, "FRU Information:\n"); | |
2173 | seq_printf(seq, | |
2174 | " FRU Number : " | |
2175 | "%c%c%c%c%c%c%c%c\n", | |
2176 | oemfru[0], oemfru[1], oemfru[2], | |
2177 | oemfru[3], oemfru[4], oemfru[5], | |
2178 | oemfru[6], oemfru[7]); | |
2179 | seq_sprintf(seq, | |
2180 | " Part Number : " | |
2181 | "%c%c%c%c%c%c%c%c\n", | |
2182 | oemfru[8], oemfru[9], oemfru[10], | |
2183 | oemfru[11], oemfru[12], oemfru[13], | |
2184 | oemfru[14], oemfru[15]); | |
2185 | seq_printf(seq, | |
2186 | " EC Level : " | |
2187 | "%c%c%c%c%c%c%c%c\n", | |
2188 | oemfru[16], oemfru[17], oemfru[18], | |
2189 | oemfru[19], oemfru[20], oemfru[21], | |
2190 | oemfru[22], oemfru[23]); | |
4d6f6af8 | 2191 | break; |
4d6ea9c3 | 2192 | } |
4d6f6af8 | 2193 | |
4d6ea9c3 DK |
2194 | default: |
2195 | break; | |
4d6f6af8 | 2196 | } |
4d6ea9c3 | 2197 | #endif |
4d6f6af8 GKH |
2198 | |
2199 | return 0; | |
2200 | } | |
2201 | ||
4d6ea9c3 | 2202 | static int slic_debug_adapter_show(struct seq_file *seq, void *v) |
4d6f6af8 | 2203 | { |
4d6ea9c3 | 2204 | struct adapter *adapter = seq->private; |
9092de6d | 2205 | struct net_device *netdev = adapter->netdev; |
4d6ea9c3 | 2206 | |
9092de6d | 2207 | seq_printf(seq, "info: interface : %s\n", |
4d6ea9c3 | 2208 | adapter->netdev->name); |
4d6ea9c3 DK |
2209 | seq_printf(seq, "info: status : %s\n", |
2210 | SLIC_LINKSTATE(adapter->linkstate)); | |
2211 | seq_printf(seq, "info: port : %d\n", | |
2212 | adapter->physport); | |
2213 | seq_printf(seq, "info: speed : %s\n", | |
2214 | SLIC_SPEED(adapter->linkspeed)); | |
2215 | seq_printf(seq, "info: duplex : %s\n", | |
2216 | SLIC_DUPLEX(adapter->linkduplex)); | |
2217 | seq_printf(seq, "info: irq : 0x%X\n", | |
2218 | (uint) adapter->irq); | |
2219 | seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n", | |
2220 | adapter->card->loadlevel_current); | |
2221 | seq_printf(seq, "info: RcvQ max entries : %4.4X\n", | |
2222 | SLIC_RCVQ_ENTRIES); | |
2223 | seq_printf(seq, "info: RcvQ current : %4.4X\n", | |
2224 | adapter->rcvqueue.count); | |
2225 | seq_printf(seq, "rx stats: packets : %8.8lX\n", | |
9092de6d | 2226 | netdev->stats.rx_packets); |
4d6ea9c3 | 2227 | seq_printf(seq, "rx stats: bytes : %8.8lX\n", |
9092de6d | 2228 | netdev->stats.rx_bytes); |
4d6ea9c3 DK |
2229 | seq_printf(seq, "rx stats: broadcasts : %8.8X\n", |
2230 | adapter->rcv_broadcasts); | |
2231 | seq_printf(seq, "rx stats: multicasts : %8.8X\n", | |
2232 | adapter->rcv_multicasts); | |
2233 | seq_printf(seq, "rx stats: unicasts : %8.8X\n", | |
2234 | adapter->rcv_unicasts); | |
2235 | seq_printf(seq, "rx stats: errors : %8.8X\n", | |
2236 | (u32) adapter->slic_stats.iface.rcv_errors); | |
2237 | seq_printf(seq, "rx stats: Missed errors : %8.8X\n", | |
2238 | (u32) adapter->slic_stats.iface.rcv_discards); | |
2239 | seq_printf(seq, "rx stats: drops : %8.8X\n", | |
2240 | (u32) adapter->rcv_drops); | |
2241 | seq_printf(seq, "tx stats: packets : %8.8lX\n", | |
9092de6d | 2242 | netdev->stats.tx_packets); |
4d6ea9c3 | 2243 | seq_printf(seq, "tx stats: bytes : %8.8lX\n", |
9092de6d | 2244 | netdev->stats.tx_bytes); |
4d6ea9c3 DK |
2245 | seq_printf(seq, "tx stats: errors : %8.8X\n", |
2246 | (u32) adapter->slic_stats.iface.xmt_errors); | |
2247 | seq_printf(seq, "rx stats: multicasts : %8.8lX\n", | |
9092de6d | 2248 | netdev->stats.multicast); |
4d6ea9c3 DK |
2249 | seq_printf(seq, "tx stats: collision errors : %8.8X\n", |
2250 | (u32) adapter->slic_stats.iface.xmit_collisions); | |
2251 | seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n", | |
2252 | adapter->max_isr_rcvs); | |
2253 | seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n", | |
2254 | adapter->rcv_interrupt_yields); | |
2255 | seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n", | |
2256 | adapter->max_isr_xmits); | |
2257 | seq_printf(seq, "perf: error interrupts : %8.8X\n", | |
2258 | adapter->error_interrupts); | |
2259 | seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n", | |
2260 | adapter->error_rmiss_interrupts); | |
2261 | seq_printf(seq, "perf: rcv interrupts : %8.8X\n", | |
2262 | adapter->rcv_interrupts); | |
2263 | seq_printf(seq, "perf: xmit interrupts : %8.8X\n", | |
2264 | adapter->xmit_interrupts); | |
2265 | seq_printf(seq, "perf: link event interrupts : %8.8X\n", | |
2266 | adapter->linkevent_interrupts); | |
2267 | seq_printf(seq, "perf: UPR interrupts : %8.8X\n", | |
2268 | adapter->upr_interrupts); | |
2269 | seq_printf(seq, "perf: interrupt count : %8.8X\n", | |
2270 | adapter->num_isrs); | |
2271 | seq_printf(seq, "perf: false interrupts : %8.8X\n", | |
2272 | adapter->false_interrupts); | |
2273 | seq_printf(seq, "perf: All register writes : %8.8X\n", | |
2274 | adapter->all_reg_writes); | |
2275 | seq_printf(seq, "perf: ICR register writes : %8.8X\n", | |
2276 | adapter->icr_reg_writes); | |
2277 | seq_printf(seq, "perf: ISR register writes : %8.8X\n", | |
2278 | adapter->isr_reg_writes); | |
2279 | seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n", | |
2280 | adapter->if_events.oflow802); | |
2281 | seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n", | |
2282 | adapter->if_events.Tprtoflow); | |
2283 | seq_printf(seq, "ifevents: underflow errors : %8.8X\n", | |
2284 | adapter->if_events.uflow802); | |
2285 | seq_printf(seq, "ifevents: receive early : %8.8X\n", | |
2286 | adapter->if_events.rcvearly); | |
2287 | seq_printf(seq, "ifevents: buffer overflows : %8.8X\n", | |
2288 | adapter->if_events.Bufov); | |
2289 | seq_printf(seq, "ifevents: carrier errors : %8.8X\n", | |
2290 | adapter->if_events.Carre); | |
2291 | seq_printf(seq, "ifevents: Long : %8.8X\n", | |
2292 | adapter->if_events.Longe); | |
2293 | seq_printf(seq, "ifevents: invalid preambles : %8.8X\n", | |
2294 | adapter->if_events.Invp); | |
2295 | seq_printf(seq, "ifevents: CRC errors : %8.8X\n", | |
2296 | adapter->if_events.Crc); | |
2297 | seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n", | |
2298 | adapter->if_events.Drbl); | |
2299 | seq_printf(seq, "ifevents: Code violations : %8.8X\n", | |
2300 | adapter->if_events.Code); | |
2301 | seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n", | |
2302 | adapter->if_events.TpCsum); | |
2303 | seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n", | |
2304 | adapter->if_events.TpHlen); | |
2305 | seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n", | |
2306 | adapter->if_events.IpCsum); | |
2307 | seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n", | |
2308 | adapter->if_events.IpLen); | |
2309 | seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n", | |
2310 | adapter->if_events.IpHlen); | |
4d6f6af8 | 2311 | |
4d6ea9c3 | 2312 | return 0; |
4d6f6af8 | 2313 | } |
4d6ea9c3 | 2314 | static int slic_debug_adapter_open(struct inode *inode, struct file *file) |
4d6f6af8 | 2315 | { |
4d6ea9c3 | 2316 | return single_open(file, slic_debug_adapter_show, inode->i_private); |
4d6f6af8 GKH |
2317 | } |
2318 | ||
4d6ea9c3 | 2319 | static int slic_debug_card_open(struct inode *inode, struct file *file) |
4d6f6af8 | 2320 | { |
4d6ea9c3 DK |
2321 | return single_open(file, slic_debug_card_show, inode->i_private); |
2322 | } | |
4d6f6af8 | 2323 | |
4d6ea9c3 DK |
2324 | static const struct file_operations slic_debug_adapter_fops = { |
2325 | .owner = THIS_MODULE, | |
2326 | .open = slic_debug_adapter_open, | |
2327 | .read = seq_read, | |
2328 | .llseek = seq_lseek, | |
2329 | .release = single_release, | |
2330 | }; | |
2331 | ||
2332 | static const struct file_operations slic_debug_card_fops = { | |
2333 | .owner = THIS_MODULE, | |
2334 | .open = slic_debug_card_open, | |
2335 | .read = seq_read, | |
2336 | .llseek = seq_lseek, | |
2337 | .release = single_release, | |
2338 | }; | |
4d6f6af8 | 2339 | |
4d6ea9c3 DK |
2340 | static void slic_debug_adapter_create(struct adapter *adapter) |
2341 | { | |
2342 | struct dentry *d; | |
2343 | char name[7]; | |
2344 | struct sliccard *card = adapter->card; | |
4d6f6af8 | 2345 | |
4d6ea9c3 DK |
2346 | if (!card->debugfs_dir) |
2347 | return; | |
4d6f6af8 | 2348 | |
4d6ea9c3 DK |
2349 | sprintf(name, "port%d", adapter->port); |
2350 | d = debugfs_create_file(name, S_IRUGO, | |
2351 | card->debugfs_dir, adapter, | |
2352 | &slic_debug_adapter_fops); | |
2353 | if (!d || IS_ERR(d)) | |
2354 | pr_info(PFX "%s: debugfs create failed\n", name); | |
2355 | else | |
2356 | adapter->debugfs_entry = d; | |
2357 | } | |
4d6f6af8 | 2358 | |
4d6ea9c3 DK |
2359 | static void slic_debug_adapter_destroy(struct adapter *adapter) |
2360 | { | |
2361 | debugfs_remove(adapter->debugfs_entry); | |
2362 | adapter->debugfs_entry = NULL; | |
4d6f6af8 GKH |
2363 | } |
2364 | ||
4d6ea9c3 | 2365 | static void slic_debug_card_create(struct sliccard *card) |
4d6f6af8 | 2366 | { |
4d6ea9c3 DK |
2367 | struct dentry *d; |
2368 | char name[IFNAMSIZ]; | |
4d6f6af8 | 2369 | |
4d6ea9c3 DK |
2370 | snprintf(name, sizeof(name), "slic%d", card->cardnum); |
2371 | d = debugfs_create_dir(name, slic_debugfs); | |
2372 | if (!d || IS_ERR(d)) | |
2373 | pr_info(PFX "%s: debugfs create dir failed\n", | |
2374 | name); | |
2375 | else { | |
2376 | card->debugfs_dir = d; | |
2377 | d = debugfs_create_file("cardinfo", S_IRUGO, | |
2378 | slic_debugfs, card, | |
2379 | &slic_debug_card_fops); | |
2380 | if (!d || IS_ERR(d)) | |
2381 | pr_info(PFX "%s: debugfs create failed\n", | |
2382 | name); | |
2383 | else | |
2384 | card->debugfs_cardinfo = d; | |
2385 | } | |
4d6f6af8 GKH |
2386 | } |
2387 | ||
4d6ea9c3 | 2388 | static void slic_debug_card_destroy(struct sliccard *card) |
4d6f6af8 | 2389 | { |
4d6ea9c3 | 2390 | int i; |
4d6f6af8 | 2391 | |
4d6ea9c3 DK |
2392 | for (i = 0; i < card->card_size; i++) { |
2393 | struct adapter *adapter; | |
4d6f6af8 | 2394 | |
4d6ea9c3 DK |
2395 | adapter = card->adapter[i]; |
2396 | if (adapter) | |
2397 | slic_debug_adapter_destroy(adapter); | |
2398 | } | |
2399 | if (card->debugfs_cardinfo) { | |
2400 | debugfs_remove(card->debugfs_cardinfo); | |
2401 | card->debugfs_cardinfo = NULL; | |
2402 | } | |
2403 | if (card->debugfs_dir) { | |
2404 | debugfs_remove(card->debugfs_dir); | |
2405 | card->debugfs_dir = NULL; | |
2406 | } | |
2407 | } | |
4d6f6af8 | 2408 | |
4d6ea9c3 DK |
2409 | static void slic_debug_init(void) |
2410 | { | |
2411 | struct dentry *ent; | |
4d6f6af8 | 2412 | |
4d6ea9c3 DK |
2413 | ent = debugfs_create_dir("slic", NULL); |
2414 | if (!ent || IS_ERR(ent)) { | |
2415 | pr_info(PFX "debugfs create directory failed\n"); | |
2416 | return; | |
2417 | } | |
2418 | ||
2419 | slic_debugfs = ent; | |
4d6f6af8 GKH |
2420 | } |
2421 | ||
4d6ea9c3 | 2422 | static void slic_debug_cleanup(void) |
4d6f6af8 | 2423 | { |
4d6ea9c3 DK |
2424 | if (slic_debugfs) { |
2425 | debugfs_remove(slic_debugfs); | |
2426 | slic_debugfs = NULL; | |
4d6f6af8 | 2427 | } |
4d6ea9c3 | 2428 | } |
4d6f6af8 | 2429 | |
4d6ea9c3 DK |
2430 | /* |
2431 | * slic_link_event_handler - | |
2432 | * | |
2433 | * Initiate a link configuration sequence. The link configuration begins | |
2434 | * by issuing a READ_LINK_STATUS command to the Utility Processor on the | |
2435 | * SLIC. Since the command finishes asynchronously, the slic_upr_comlete | |
2436 | * routine will follow it up witha UP configuration write command, which | |
2437 | * will also complete asynchronously. | |
2438 | * | |
2439 | */ | |
2440 | static void slic_link_event_handler(struct adapter *adapter) | |
2441 | { | |
2442 | int status; | |
2443 | struct slic_shmem *pshmem; | |
4d6f6af8 | 2444 | |
4d6ea9c3 DK |
2445 | if (adapter->state != ADAPT_UP) { |
2446 | /* Adapter is not operational. Ignore. */ | |
2447 | return; | |
4d6f6af8 GKH |
2448 | } |
2449 | ||
4d6ea9c3 | 2450 | pshmem = (struct slic_shmem *)adapter->phys_shmem; |
4d6f6af8 | 2451 | |
1033f1f7 | 2452 | #if BITS_PER_LONG == 64 |
4d6ea9c3 DK |
2453 | status = slic_upr_request(adapter, |
2454 | SLIC_UPR_RLSR, | |
2455 | SLIC_GET_ADDR_LOW(&pshmem->linkstatus), | |
2456 | SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), | |
2457 | 0, 0); | |
1033f1f7 | 2458 | #else |
4d6ea9c3 DK |
2459 | status = slic_upr_request(adapter, SLIC_UPR_RLSR, |
2460 | (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */ | |
2461 | 0, 0, 0); | |
4d6ea9c3 DK |
2462 | #endif |
2463 | ASSERT(status == 0); | |
4d6f6af8 GKH |
2464 | } |
2465 | ||
4d6ea9c3 | 2466 | static void slic_init_cleanup(struct adapter *adapter) |
4d6f6af8 | 2467 | { |
4d6ea9c3 DK |
2468 | if (adapter->intrregistered) { |
2469 | adapter->intrregistered = 0; | |
2470 | free_irq(adapter->netdev->irq, adapter->netdev); | |
4d6f6af8 | 2471 | |
4d6f6af8 | 2472 | } |
4d6ea9c3 DK |
2473 | if (adapter->pshmem) { |
2474 | pci_free_consistent(adapter->pcidev, | |
2475 | sizeof(struct slic_shmem), | |
2476 | adapter->pshmem, adapter->phys_shmem); | |
2477 | adapter->pshmem = NULL; | |
2478 | adapter->phys_shmem = (dma_addr_t) NULL; | |
4d6f6af8 | 2479 | } |
4d6ea9c3 DK |
2480 | |
2481 | if (adapter->pingtimerset) { | |
2482 | adapter->pingtimerset = 0; | |
2483 | del_timer(&adapter->pingtimer); | |
4d6f6af8 | 2484 | } |
4d6f6af8 | 2485 | |
4d6ea9c3 DK |
2486 | slic_rspqueue_free(adapter); |
2487 | slic_cmdq_free(adapter); | |
2488 | slic_rcvqueue_free(adapter); | |
4d6f6af8 GKH |
2489 | } |
2490 | ||
4d6ea9c3 DK |
2491 | /* |
2492 | * Allocate a mcast_address structure to hold the multicast address. | |
2493 | * Link it in. | |
2494 | */ | |
2495 | static int slic_mcast_add_list(struct adapter *adapter, char *address) | |
4d6f6af8 | 2496 | { |
4d6ea9c3 | 2497 | struct mcast_address *mcaddr, *mlist; |
4d6f6af8 | 2498 | |
4d6ea9c3 DK |
2499 | /* Check to see if it already exists */ |
2500 | mlist = adapter->mcastaddrs; | |
2501 | while (mlist) { | |
2502 | if (!compare_ether_addr(mlist->address, address)) | |
2503 | return 0; | |
2504 | mlist = mlist->next; | |
2505 | } | |
e8bc9b7a | 2506 | |
4d6ea9c3 DK |
2507 | /* Doesn't already exist. Allocate a structure to hold it */ |
2508 | mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC); | |
2509 | if (mcaddr == NULL) | |
2510 | return 1; | |
a71b9978 | 2511 | |
4d6ea9c3 DK |
2512 | memcpy(mcaddr->address, address, 6); |
2513 | ||
2514 | mcaddr->next = adapter->mcastaddrs; | |
2515 | adapter->mcastaddrs = mcaddr; | |
4d6f6af8 | 2516 | |
4d6f6af8 GKH |
2517 | return 0; |
2518 | } | |
2519 | ||
4d6ea9c3 | 2520 | static void slic_mcast_set_list(struct net_device *dev) |
4d6f6af8 | 2521 | { |
4d6ea9c3 DK |
2522 | struct adapter *adapter = netdev_priv(dev); |
2523 | int status = 0; | |
2524 | char *addresses; | |
2525 | struct netdev_hw_addr *ha; | |
4d6f6af8 | 2526 | |
4d6ea9c3 | 2527 | ASSERT(adapter); |
62f691a3 | 2528 | |
4d6ea9c3 DK |
2529 | netdev_for_each_mc_addr(ha, dev) { |
2530 | addresses = (char *) &ha->addr; | |
2531 | status = slic_mcast_add_list(adapter, addresses); | |
2532 | if (status != 0) | |
2533 | break; | |
2534 | slic_mcast_set_bit(adapter, addresses); | |
2535 | } | |
2536 | ||
2537 | if (adapter->devflags_prev != dev->flags) { | |
2538 | adapter->macopts = MAC_DIRECTED; | |
2539 | if (dev->flags) { | |
2540 | if (dev->flags & IFF_BROADCAST) | |
2541 | adapter->macopts |= MAC_BCAST; | |
2542 | if (dev->flags & IFF_PROMISC) | |
2543 | adapter->macopts |= MAC_PROMISC; | |
2544 | if (dev->flags & IFF_ALLMULTI) | |
2545 | adapter->macopts |= MAC_ALLMCAST; | |
2546 | if (dev->flags & IFF_MULTICAST) | |
2547 | adapter->macopts |= MAC_MCAST; | |
4d6f6af8 | 2548 | } |
4d6ea9c3 DK |
2549 | adapter->devflags_prev = dev->flags; |
2550 | slic_config_set(adapter, true); | |
2551 | } else { | |
2552 | if (status == 0) | |
2553 | slic_mcast_set_mask(adapter); | |
4d6f6af8 | 2554 | } |
4d6ea9c3 | 2555 | return; |
4d6f6af8 GKH |
2556 | } |
2557 | ||
4d6ea9c3 DK |
2558 | #define XMIT_FAIL_LINK_STATE 1 |
2559 | #define XMIT_FAIL_ZERO_LENGTH 2 | |
2560 | #define XMIT_FAIL_HOSTCMD_FAIL 3 | |
2561 | ||
2562 | static void slic_xmit_build_request(struct adapter *adapter, | |
2563 | struct slic_hostcmd *hcmd, struct sk_buff *skb) | |
4d6f6af8 | 2564 | { |
4d6ea9c3 DK |
2565 | struct slic_host64_cmd *ihcmd; |
2566 | ulong phys_addr; | |
4d6f6af8 | 2567 | |
4d6ea9c3 DK |
2568 | ihcmd = &hcmd->cmd64; |
2569 | ||
2570 | ihcmd->flags = (adapter->port << IHFLG_IFSHFT); | |
2571 | ihcmd->command = IHCMD_XMT_REQ; | |
2572 | ihcmd->u.slic_buffers.totlen = skb->len; | |
2573 | phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, | |
2574 | PCI_DMA_TODEVICE); | |
2575 | ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr); | |
2576 | ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr); | |
2577 | ihcmd->u.slic_buffers.bufs[0].length = skb->len; | |
1033f1f7 | 2578 | #if BITS_PER_LONG == 64 |
4d6ea9c3 DK |
2579 | hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] - |
2580 | (u64) hcmd) + 31) >> 5); | |
1033f1f7 | 2581 | #else |
4d6ea9c3 DK |
2582 | hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] - |
2583 | (u32) hcmd) + 31) >> 5); | |
4d6ea9c3 | 2584 | #endif |
4d6f6af8 GKH |
2585 | } |
2586 | ||
4d6ea9c3 DK |
2587 | static void slic_xmit_fail(struct adapter *adapter, |
2588 | struct sk_buff *skb, | |
2589 | void *cmd, u32 skbtype, u32 status) | |
4d6f6af8 | 2590 | { |
4d6ea9c3 DK |
2591 | if (adapter->xmitq_full) |
2592 | netif_stop_queue(adapter->netdev); | |
2593 | if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) { | |
2594 | switch (status) { | |
2595 | case XMIT_FAIL_LINK_STATE: | |
2596 | dev_err(&adapter->netdev->dev, | |
2597 | "reject xmit skb[%p: %x] linkstate[%s] " | |
2598 | "adapter[%s:%d] card[%s:%d]\n", | |
2599 | skb, skb->pkt_type, | |
2600 | SLIC_LINKSTATE(adapter->linkstate), | |
2601 | SLIC_ADAPTER_STATE(adapter->state), | |
2602 | adapter->state, | |
2603 | SLIC_CARD_STATE(adapter->card->state), | |
2604 | adapter->card->state); | |
2605 | break; | |
2606 | case XMIT_FAIL_ZERO_LENGTH: | |
2607 | dev_err(&adapter->netdev->dev, | |
2608 | "xmit_start skb->len == 0 skb[%p] type[%x]\n", | |
2609 | skb, skb->pkt_type); | |
2610 | break; | |
2611 | case XMIT_FAIL_HOSTCMD_FAIL: | |
2612 | dev_err(&adapter->netdev->dev, | |
2613 | "xmit_start skb[%p] type[%x] No host commands " | |
2614 | "available\n", skb, skb->pkt_type); | |
2615 | break; | |
2616 | default: | |
2617 | ASSERT(0); | |
2618 | } | |
2619 | } | |
2620 | dev_kfree_skb(skb); | |
9092de6d | 2621 | adapter->netdev->stats.tx_dropped++; |
4d6ea9c3 | 2622 | } |
e8bc9b7a | 2623 | |
4d6ea9c3 DK |
2624 | static void slic_rcv_handle_error(struct adapter *adapter, |
2625 | struct slic_rcvbuf *rcvbuf) | |
2626 | { | |
2627 | struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data; | |
9092de6d | 2628 | struct net_device *netdev = adapter->netdev; |
4d6f6af8 | 2629 | |
4d6ea9c3 DK |
2630 | if (adapter->devid != SLIC_1GB_DEVICE_ID) { |
2631 | if (hdr->frame_status14 & VRHSTAT_802OE) | |
2632 | adapter->if_events.oflow802++; | |
2633 | if (hdr->frame_status14 & VRHSTAT_TPOFLO) | |
2634 | adapter->if_events.Tprtoflow++; | |
2635 | if (hdr->frame_status_b14 & VRHSTATB_802UE) | |
2636 | adapter->if_events.uflow802++; | |
2637 | if (hdr->frame_status_b14 & VRHSTATB_RCVE) { | |
2638 | adapter->if_events.rcvearly++; | |
9092de6d | 2639 | netdev->stats.rx_fifo_errors++; |
4d6ea9c3 DK |
2640 | } |
2641 | if (hdr->frame_status_b14 & VRHSTATB_BUFF) { | |
2642 | adapter->if_events.Bufov++; | |
9092de6d | 2643 | netdev->stats.rx_over_errors++; |
4d6ea9c3 DK |
2644 | } |
2645 | if (hdr->frame_status_b14 & VRHSTATB_CARRE) { | |
2646 | adapter->if_events.Carre++; | |
9092de6d | 2647 | netdev->stats.tx_carrier_errors++; |
4d6ea9c3 DK |
2648 | } |
2649 | if (hdr->frame_status_b14 & VRHSTATB_LONGE) | |
2650 | adapter->if_events.Longe++; | |
2651 | if (hdr->frame_status_b14 & VRHSTATB_PREA) | |
2652 | adapter->if_events.Invp++; | |
2653 | if (hdr->frame_status_b14 & VRHSTATB_CRC) { | |
2654 | adapter->if_events.Crc++; | |
9092de6d | 2655 | netdev->stats.rx_crc_errors++; |
4d6ea9c3 DK |
2656 | } |
2657 | if (hdr->frame_status_b14 & VRHSTATB_DRBL) | |
2658 | adapter->if_events.Drbl++; | |
2659 | if (hdr->frame_status_b14 & VRHSTATB_CODE) | |
2660 | adapter->if_events.Code++; | |
2661 | if (hdr->frame_status_b14 & VRHSTATB_TPCSUM) | |
2662 | adapter->if_events.TpCsum++; | |
2663 | if (hdr->frame_status_b14 & VRHSTATB_TPHLEN) | |
2664 | adapter->if_events.TpHlen++; | |
2665 | if (hdr->frame_status_b14 & VRHSTATB_IPCSUM) | |
2666 | adapter->if_events.IpCsum++; | |
2667 | if (hdr->frame_status_b14 & VRHSTATB_IPLERR) | |
2668 | adapter->if_events.IpLen++; | |
2669 | if (hdr->frame_status_b14 & VRHSTATB_IPHERR) | |
2670 | adapter->if_events.IpHlen++; | |
4d6f6af8 | 2671 | } else { |
4d6ea9c3 DK |
2672 | if (hdr->frame_statusGB & VGBSTAT_XPERR) { |
2673 | u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT; | |
2674 | ||
2675 | if (xerr == VGBSTAT_XCSERR) | |
2676 | adapter->if_events.TpCsum++; | |
2677 | if (xerr == VGBSTAT_XUFLOW) | |
2678 | adapter->if_events.Tprtoflow++; | |
2679 | if (xerr == VGBSTAT_XHLEN) | |
2680 | adapter->if_events.TpHlen++; | |
2681 | } | |
2682 | if (hdr->frame_statusGB & VGBSTAT_NETERR) { | |
2683 | u32 nerr = | |
2684 | (hdr-> | |
2685 | frame_statusGB >> VGBSTAT_NERRSHFT) & | |
2686 | VGBSTAT_NERRMSK; | |
2687 | if (nerr == VGBSTAT_NCSERR) | |
2688 | adapter->if_events.IpCsum++; | |
2689 | if (nerr == VGBSTAT_NUFLOW) | |
2690 | adapter->if_events.IpLen++; | |
2691 | if (nerr == VGBSTAT_NHLEN) | |
2692 | adapter->if_events.IpHlen++; | |
2693 | } | |
2694 | if (hdr->frame_statusGB & VGBSTAT_LNKERR) { | |
2695 | u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK; | |
2696 | ||
2697 | if (lerr == VGBSTAT_LDEARLY) | |
2698 | adapter->if_events.rcvearly++; | |
2699 | if (lerr == VGBSTAT_LBOFLO) | |
2700 | adapter->if_events.Bufov++; | |
2701 | if (lerr == VGBSTAT_LCODERR) | |
2702 | adapter->if_events.Code++; | |
2703 | if (lerr == VGBSTAT_LDBLNBL) | |
2704 | adapter->if_events.Drbl++; | |
2705 | if (lerr == VGBSTAT_LCRCERR) | |
2706 | adapter->if_events.Crc++; | |
2707 | if (lerr == VGBSTAT_LOFLO) | |
2708 | adapter->if_events.oflow802++; | |
2709 | if (lerr == VGBSTAT_LUFLO) | |
2710 | adapter->if_events.uflow802++; | |
2711 | } | |
4d6f6af8 | 2712 | } |
4d6ea9c3 | 2713 | return; |
4d6f6af8 GKH |
2714 | } |
2715 | ||
4d6ea9c3 DK |
2716 | #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000 |
2717 | #define M_FAST_PATH 0x0040 | |
4d6f6af8 | 2718 | |
4d6ea9c3 | 2719 | static void slic_rcv_handler(struct adapter *adapter) |
4d6f6af8 | 2720 | { |
9092de6d | 2721 | struct net_device *netdev = adapter->netdev; |
4d6ea9c3 DK |
2722 | struct sk_buff *skb; |
2723 | struct slic_rcvbuf *rcvbuf; | |
2724 | u32 frames = 0; | |
4d6f6af8 | 2725 | |
4d6ea9c3 DK |
2726 | while ((skb = slic_rcvqueue_getnext(adapter))) { |
2727 | u32 rx_bytes; | |
4d6f6af8 | 2728 | |
4d6ea9c3 DK |
2729 | ASSERT(skb->head); |
2730 | rcvbuf = (struct slic_rcvbuf *)skb->head; | |
2731 | adapter->card->events++; | |
2732 | if (rcvbuf->status & IRHDDR_ERR) { | |
2733 | adapter->rx_errors++; | |
2734 | slic_rcv_handle_error(adapter, rcvbuf); | |
2735 | slic_rcvqueue_reinsert(adapter, skb); | |
2736 | continue; | |
2737 | } | |
4d6f6af8 | 2738 | |
4d6ea9c3 DK |
2739 | if (!slic_mac_filter(adapter, (struct ether_header *) |
2740 | rcvbuf->data)) { | |
2741 | slic_rcvqueue_reinsert(adapter, skb); | |
2742 | continue; | |
2743 | } | |
2744 | skb_pull(skb, SLIC_RCVBUF_HEADSIZE); | |
2745 | rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK); | |
2746 | skb_put(skb, rx_bytes); | |
9092de6d DK |
2747 | netdev->stats.rx_packets++; |
2748 | netdev->stats.rx_bytes += rx_bytes; | |
4d6ea9c3 DK |
2749 | #if SLIC_OFFLOAD_IP_CHECKSUM |
2750 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
2751 | #endif | |
4d6f6af8 | 2752 | |
4d6ea9c3 DK |
2753 | skb->dev = adapter->netdev; |
2754 | skb->protocol = eth_type_trans(skb, skb->dev); | |
2755 | netif_rx(skb); | |
4d6f6af8 | 2756 | |
4d6ea9c3 DK |
2757 | ++frames; |
2758 | #if SLIC_INTERRUPT_PROCESS_LIMIT | |
2759 | if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) { | |
2760 | adapter->rcv_interrupt_yields++; | |
4d6f6af8 GKH |
2761 | break; |
2762 | } | |
4d6ea9c3 | 2763 | #endif |
4d6f6af8 | 2764 | } |
4d6ea9c3 | 2765 | adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames); |
4d6f6af8 GKH |
2766 | } |
2767 | ||
4d6ea9c3 | 2768 | static void slic_xmit_complete(struct adapter *adapter) |
4d6f6af8 | 2769 | { |
4d6ea9c3 DK |
2770 | struct slic_hostcmd *hcmd; |
2771 | struct slic_rspbuf *rspbuf; | |
2772 | u32 frames = 0; | |
2773 | struct slic_handle_word slic_handle_word; | |
4d6f6af8 | 2774 | |
4d6ea9c3 DK |
2775 | do { |
2776 | rspbuf = slic_rspqueue_getnext(adapter); | |
2777 | if (!rspbuf) | |
2778 | break; | |
2779 | adapter->xmit_completes++; | |
2780 | adapter->card->events++; | |
2781 | /* | |
2782 | Get the complete host command buffer | |
2783 | */ | |
2784 | slic_handle_word.handle_token = rspbuf->hosthandle; | |
2785 | ASSERT(slic_handle_word.handle_index); | |
2786 | ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS); | |
2787 | hcmd = | |
2788 | (struct slic_hostcmd *) | |
2789 | adapter->slic_handles[slic_handle_word.handle_index]. | |
2790 | address; | |
2791 | /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */ | |
2792 | ASSERT(hcmd); | |
2793 | ASSERT(hcmd->pslic_handle == | |
2794 | &adapter->slic_handles[slic_handle_word.handle_index]); | |
2795 | if (hcmd->type == SLIC_CMD_DUMB) { | |
2796 | if (hcmd->skb) | |
2797 | dev_kfree_skb_irq(hcmd->skb); | |
2798 | slic_cmdq_putdone_irq(adapter, hcmd); | |
4d6f6af8 | 2799 | } |
4d6ea9c3 DK |
2800 | rspbuf->status = 0; |
2801 | rspbuf->hosthandle = 0; | |
2802 | frames++; | |
2803 | } while (1); | |
2804 | adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames); | |
4d6f6af8 GKH |
2805 | } |
2806 | ||
4d6ea9c3 | 2807 | static irqreturn_t slic_interrupt(int irq, void *dev_id) |
4d6f6af8 | 2808 | { |
4d6ea9c3 DK |
2809 | struct net_device *dev = (struct net_device *)dev_id; |
2810 | struct adapter *adapter = netdev_priv(dev); | |
2811 | u32 isr; | |
4d6f6af8 | 2812 | |
4d6ea9c3 DK |
2813 | if ((adapter->pshmem) && (adapter->pshmem->isr)) { |
2814 | slic_reg32_write(&adapter->slic_regs->slic_icr, | |
2815 | ICR_INT_MASK, FLUSH); | |
2816 | isr = adapter->isrcopy = adapter->pshmem->isr; | |
2817 | adapter->pshmem->isr = 0; | |
2818 | adapter->num_isrs++; | |
2819 | switch (adapter->card->state) { | |
2820 | case CARD_UP: | |
2821 | if (isr & ~ISR_IO) { | |
2822 | if (isr & ISR_ERR) { | |
2823 | adapter->error_interrupts++; | |
2824 | if (isr & ISR_RMISS) { | |
2825 | int count; | |
2826 | int pre_count; | |
2827 | int errors; | |
4d6f6af8 | 2828 | |
4d6ea9c3 DK |
2829 | struct slic_rcvqueue *rcvq = |
2830 | &adapter->rcvqueue; | |
4d6f6af8 | 2831 | |
4d6ea9c3 DK |
2832 | adapter-> |
2833 | error_rmiss_interrupts++; | |
2834 | if (!rcvq->errors) | |
2835 | rcv_count = rcvq->count; | |
2836 | pre_count = rcvq->count; | |
2837 | errors = rcvq->errors; | |
4d6f6af8 | 2838 | |
4d6ea9c3 DK |
2839 | while (rcvq->count < |
2840 | SLIC_RCVQ_FILLTHRESH) { | |
2841 | count = | |
2842 | slic_rcvqueue_fill | |
2843 | (adapter); | |
2844 | if (!count) | |
2845 | break; | |
2846 | } | |
2847 | } else if (isr & ISR_XDROP) { | |
2848 | dev_err(&dev->dev, | |
2849 | "isr & ISR_ERR [%x] " | |
2850 | "ISR_XDROP \n", isr); | |
2851 | } else { | |
2852 | dev_err(&dev->dev, | |
2853 | "isr & ISR_ERR [%x]\n", | |
2854 | isr); | |
2855 | } | |
2856 | } | |
e8bc9b7a | 2857 | |
4d6ea9c3 DK |
2858 | if (isr & ISR_LEVENT) { |
2859 | adapter->linkevent_interrupts++; | |
2860 | slic_link_event_handler(adapter); | |
2861 | } | |
4d6f6af8 | 2862 | |
4d6ea9c3 DK |
2863 | if ((isr & ISR_UPC) || |
2864 | (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { | |
2865 | adapter->upr_interrupts++; | |
2866 | slic_upr_request_complete(adapter, isr); | |
2867 | } | |
2868 | } | |
4d6f6af8 | 2869 | |
4d6ea9c3 DK |
2870 | if (isr & ISR_RCV) { |
2871 | adapter->rcv_interrupts++; | |
2872 | slic_rcv_handler(adapter); | |
2873 | } | |
4d6f6af8 | 2874 | |
4d6ea9c3 DK |
2875 | if (isr & ISR_CMD) { |
2876 | adapter->xmit_interrupts++; | |
2877 | slic_xmit_complete(adapter); | |
2878 | } | |
2879 | break; | |
4d6f6af8 | 2880 | |
4d6ea9c3 DK |
2881 | case CARD_DOWN: |
2882 | if ((isr & ISR_UPC) || | |
2883 | (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { | |
2884 | adapter->upr_interrupts++; | |
2885 | slic_upr_request_complete(adapter, isr); | |
2886 | } | |
2887 | break; | |
4d6f6af8 | 2888 | |
4d6ea9c3 DK |
2889 | default: |
2890 | break; | |
2891 | } | |
4d6f6af8 | 2892 | |
4d6ea9c3 DK |
2893 | adapter->isrcopy = 0; |
2894 | adapter->all_reg_writes += 2; | |
2895 | adapter->isr_reg_writes++; | |
2896 | slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH); | |
2897 | } else { | |
2898 | adapter->false_interrupts++; | |
4d6f6af8 | 2899 | } |
4d6ea9c3 | 2900 | return IRQ_HANDLED; |
4d6f6af8 GKH |
2901 | } |
2902 | ||
4d6ea9c3 | 2903 | #define NORMAL_ETHFRAME 0 |
4d6f6af8 | 2904 | |
4d6ea9c3 DK |
2905 | static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev) |
2906 | { | |
2907 | struct sliccard *card; | |
2908 | struct adapter *adapter = netdev_priv(dev); | |
2909 | struct slic_hostcmd *hcmd = NULL; | |
2910 | u32 status = 0; | |
2911 | u32 skbtype = NORMAL_ETHFRAME; | |
2912 | void *offloadcmd = NULL; | |
4d6f6af8 | 2913 | |
4d6ea9c3 DK |
2914 | card = adapter->card; |
2915 | ASSERT(card); | |
2916 | if ((adapter->linkstate != LINK_UP) || | |
2917 | (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) { | |
2918 | status = XMIT_FAIL_LINK_STATE; | |
2919 | goto xmit_fail; | |
4d6f6af8 | 2920 | |
4d6ea9c3 DK |
2921 | } else if (skb->len == 0) { |
2922 | status = XMIT_FAIL_ZERO_LENGTH; | |
2923 | goto xmit_fail; | |
4d6f6af8 GKH |
2924 | } |
2925 | ||
4d6ea9c3 DK |
2926 | if (skbtype == NORMAL_ETHFRAME) { |
2927 | hcmd = slic_cmdq_getfree(adapter); | |
2928 | if (!hcmd) { | |
2929 | adapter->xmitq_full = 1; | |
2930 | status = XMIT_FAIL_HOSTCMD_FAIL; | |
2931 | goto xmit_fail; | |
2932 | } | |
2933 | ASSERT(hcmd->pslic_handle); | |
2934 | ASSERT(hcmd->cmd64.hosthandle == | |
2935 | hcmd->pslic_handle->token.handle_token); | |
2936 | hcmd->skb = skb; | |
2937 | hcmd->busy = 1; | |
2938 | hcmd->type = SLIC_CMD_DUMB; | |
2939 | if (skbtype == NORMAL_ETHFRAME) | |
2940 | slic_xmit_build_request(adapter, hcmd, skb); | |
2941 | } | |
9092de6d DK |
2942 | dev->stats.tx_packets++; |
2943 | dev->stats.tx_bytes += skb->len; | |
4d6f6af8 | 2944 | |
4d6ea9c3 DK |
2945 | #ifdef DEBUG_DUMP |
2946 | if (adapter->kill_card) { | |
2947 | struct slic_host64_cmd ihcmd; | |
4d6f6af8 | 2948 | |
4d6ea9c3 DK |
2949 | ihcmd = &hcmd->cmd64; |
2950 | ||
2951 | ihcmd->flags |= 0x40; | |
2952 | adapter->kill_card = 0; /* only do this once */ | |
4d6f6af8 | 2953 | } |
4d6ea9c3 DK |
2954 | #endif |
2955 | if (hcmd->paddrh == 0) { | |
2956 | slic_reg32_write(&adapter->slic_regs->slic_cbar, | |
2957 | (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH); | |
2958 | } else { | |
2959 | slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64, | |
2960 | (hcmd->paddrl | hcmd->cmdsize), | |
2961 | &adapter->slic_regs->slic_addr_upper, | |
2962 | hcmd->paddrh, DONT_FLUSH); | |
2963 | } | |
2964 | xmit_done: | |
2965 | return NETDEV_TX_OK; | |
2966 | xmit_fail: | |
2967 | slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status); | |
2968 | goto xmit_done; | |
4d6f6af8 GKH |
2969 | } |
2970 | ||
4d6ea9c3 DK |
2971 | |
2972 | static void slic_adapter_freeresources(struct adapter *adapter) | |
4d6f6af8 | 2973 | { |
4d6ea9c3 | 2974 | slic_init_cleanup(adapter); |
4d6ea9c3 DK |
2975 | adapter->error_interrupts = 0; |
2976 | adapter->rcv_interrupts = 0; | |
2977 | adapter->xmit_interrupts = 0; | |
2978 | adapter->linkevent_interrupts = 0; | |
2979 | adapter->upr_interrupts = 0; | |
2980 | adapter->num_isrs = 0; | |
2981 | adapter->xmit_completes = 0; | |
2982 | adapter->rcv_broadcasts = 0; | |
2983 | adapter->rcv_multicasts = 0; | |
2984 | adapter->rcv_unicasts = 0; | |
2985 | } | |
4d6f6af8 | 2986 | |
4d6ea9c3 DK |
2987 | static int slic_adapter_allocresources(struct adapter *adapter) |
2988 | { | |
2989 | if (!adapter->intrregistered) { | |
2990 | int retval; | |
4d6f6af8 | 2991 | |
4d6ea9c3 DK |
2992 | spin_unlock_irqrestore(&slic_global.driver_lock.lock, |
2993 | slic_global.driver_lock.flags); | |
4d6f6af8 | 2994 | |
4d6ea9c3 DK |
2995 | retval = request_irq(adapter->netdev->irq, |
2996 | &slic_interrupt, | |
2997 | IRQF_SHARED, | |
2998 | adapter->netdev->name, adapter->netdev); | |
4d6f6af8 | 2999 | |
4d6ea9c3 DK |
3000 | spin_lock_irqsave(&slic_global.driver_lock.lock, |
3001 | slic_global.driver_lock.flags); | |
3002 | ||
3003 | if (retval) { | |
3004 | dev_err(&adapter->netdev->dev, | |
3005 | "request_irq (%s) FAILED [%x]\n", | |
3006 | adapter->netdev->name, retval); | |
3007 | return retval; | |
4d6f6af8 | 3008 | } |
4d6ea9c3 | 3009 | adapter->intrregistered = 1; |
4d6f6af8 | 3010 | } |
d1939786 | 3011 | return 0; |
4d6f6af8 GKH |
3012 | } |
3013 | ||
4d6ea9c3 DK |
3014 | /* |
3015 | * slic_if_init | |
3016 | * | |
3017 | * Perform initialization of our slic interface. | |
3018 | * | |
3019 | */ | |
3020 | static int slic_if_init(struct adapter *adapter) | |
4d6f6af8 | 3021 | { |
4d6ea9c3 DK |
3022 | struct sliccard *card = adapter->card; |
3023 | struct net_device *dev = adapter->netdev; | |
3024 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
3025 | struct slic_shmem *pshmem; | |
3026 | int rc; | |
4d6f6af8 | 3027 | |
4d6ea9c3 DK |
3028 | ASSERT(card); |
3029 | ||
3030 | /* adapter should be down at this point */ | |
3031 | if (adapter->state != ADAPT_DOWN) { | |
3032 | dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n", | |
3033 | __func__); | |
3034 | rc = -EIO; | |
3035 | goto err; | |
4d6f6af8 | 3036 | } |
4d6ea9c3 | 3037 | ASSERT(adapter->linkstate == LINK_DOWN); |
4d6f6af8 | 3038 | |
4d6ea9c3 DK |
3039 | adapter->devflags_prev = dev->flags; |
3040 | adapter->macopts = MAC_DIRECTED; | |
3041 | if (dev->flags) { | |
3042 | if (dev->flags & IFF_BROADCAST) | |
3043 | adapter->macopts |= MAC_BCAST; | |
3044 | if (dev->flags & IFF_PROMISC) | |
3045 | adapter->macopts |= MAC_PROMISC; | |
3046 | if (dev->flags & IFF_ALLMULTI) | |
3047 | adapter->macopts |= MAC_ALLMCAST; | |
3048 | if (dev->flags & IFF_MULTICAST) | |
3049 | adapter->macopts |= MAC_MCAST; | |
3050 | } | |
3051 | rc = slic_adapter_allocresources(adapter); | |
3052 | if (rc) { | |
3053 | dev_err(&dev->dev, | |
3054 | "%s: slic_adapter_allocresources FAILED %x\n", | |
3055 | __func__, rc); | |
3056 | slic_adapter_freeresources(adapter); | |
3057 | goto err; | |
3058 | } | |
4d6f6af8 | 3059 | |
4d6ea9c3 DK |
3060 | if (!adapter->queues_initialized) { |
3061 | if ((rc = slic_rspqueue_init(adapter))) | |
3062 | goto err; | |
3063 | if ((rc = slic_cmdq_init(adapter))) | |
3064 | goto err; | |
3065 | if ((rc = slic_rcvqueue_init(adapter))) | |
3066 | goto err; | |
3067 | adapter->queues_initialized = 1; | |
3068 | } | |
4d6f6af8 | 3069 | |
4d6ea9c3 DK |
3070 | slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); |
3071 | mdelay(1); | |
3072 | ||
3073 | if (!adapter->isp_initialized) { | |
3074 | pshmem = (struct slic_shmem *)adapter->phys_shmem; | |
3075 | ||
3076 | spin_lock_irqsave(&adapter->bit64reglock.lock, | |
3077 | adapter->bit64reglock.flags); | |
3078 | ||
1033f1f7 | 3079 | #if BITS_PER_LONG == 64 |
4d6ea9c3 DK |
3080 | slic_reg32_write(&slic_regs->slic_addr_upper, |
3081 | SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH); | |
3082 | slic_reg32_write(&slic_regs->slic_isp, | |
3083 | SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); | |
1033f1f7 | 3084 | #else |
4d6ea9c3 DK |
3085 | slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH); |
3086 | slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH); | |
4d6f6af8 | 3087 | #endif |
4d6ea9c3 DK |
3088 | spin_unlock_irqrestore(&adapter->bit64reglock.lock, |
3089 | adapter->bit64reglock.flags); | |
3090 | adapter->isp_initialized = 1; | |
4d6f6af8 | 3091 | } |
4d6f6af8 | 3092 | |
4d6ea9c3 DK |
3093 | adapter->state = ADAPT_UP; |
3094 | if (!card->loadtimerset) { | |
3095 | init_timer(&card->loadtimer); | |
3096 | card->loadtimer.expires = | |
3097 | jiffies + (SLIC_LOADTIMER_PERIOD * HZ); | |
3098 | card->loadtimer.data = (ulong) card; | |
3099 | card->loadtimer.function = &slic_timer_load_check; | |
3100 | add_timer(&card->loadtimer); | |
3101 | ||
3102 | card->loadtimerset = 1; | |
3103 | } | |
3104 | ||
3105 | if (!adapter->pingtimerset) { | |
3106 | init_timer(&adapter->pingtimer); | |
3107 | adapter->pingtimer.expires = | |
3108 | jiffies + (PING_TIMER_INTERVAL * HZ); | |
3109 | adapter->pingtimer.data = (ulong) dev; | |
3110 | adapter->pingtimer.function = &slic_timer_ping; | |
3111 | add_timer(&adapter->pingtimer); | |
3112 | adapter->pingtimerset = 1; | |
3113 | adapter->card->pingstatus = ISR_PINGMASK; | |
3114 | } | |
3115 | ||
3116 | /* | |
3117 | * clear any pending events, then enable interrupts | |
3118 | */ | |
3119 | adapter->isrcopy = 0; | |
3120 | adapter->pshmem->isr = 0; | |
3121 | slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH); | |
3122 | slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH); | |
3123 | ||
3124 | slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD); | |
3125 | slic_link_event_handler(adapter); | |
4d6f6af8 | 3126 | |
4d6ea9c3 DK |
3127 | err: |
3128 | return rc; | |
4d6f6af8 GKH |
3129 | } |
3130 | ||
4d6ea9c3 | 3131 | static int slic_entry_open(struct net_device *dev) |
4d6f6af8 | 3132 | { |
4d6ea9c3 DK |
3133 | struct adapter *adapter = netdev_priv(dev); |
3134 | struct sliccard *card = adapter->card; | |
3135 | u32 locked = 0; | |
3136 | int status; | |
4d6f6af8 | 3137 | |
4d6ea9c3 DK |
3138 | ASSERT(adapter); |
3139 | ASSERT(card); | |
4d6f6af8 | 3140 | |
4d6ea9c3 | 3141 | netif_stop_queue(adapter->netdev); |
4d6f6af8 | 3142 | |
4d6ea9c3 DK |
3143 | spin_lock_irqsave(&slic_global.driver_lock.lock, |
3144 | slic_global.driver_lock.flags); | |
3145 | locked = 1; | |
3146 | if (!adapter->activated) { | |
3147 | card->adapters_activated++; | |
3148 | slic_global.num_slic_ports_active++; | |
3149 | adapter->activated = 1; | |
3150 | } | |
3151 | status = slic_if_init(adapter); | |
4d6f6af8 | 3152 | |
4d6ea9c3 DK |
3153 | if (status != 0) { |
3154 | if (adapter->activated) { | |
3155 | card->adapters_activated--; | |
3156 | slic_global.num_slic_ports_active--; | |
3157 | adapter->activated = 0; | |
4d6f6af8 | 3158 | } |
4d6ea9c3 DK |
3159 | if (locked) { |
3160 | spin_unlock_irqrestore(&slic_global.driver_lock.lock, | |
3161 | slic_global.driver_lock.flags); | |
3162 | locked = 0; | |
3163 | } | |
3164 | return status; | |
3165 | } | |
3166 | if (!card->master) | |
3167 | card->master = adapter; | |
3168 | ||
3169 | if (locked) { | |
3170 | spin_unlock_irqrestore(&slic_global.driver_lock.lock, | |
3171 | slic_global.driver_lock.flags); | |
3172 | locked = 0; | |
4d6f6af8 | 3173 | } |
4d6f6af8 | 3174 | |
d1939786 | 3175 | return 0; |
4d6f6af8 GKH |
3176 | } |
3177 | ||
4d6ea9c3 | 3178 | static void slic_card_cleanup(struct sliccard *card) |
4d6f6af8 | 3179 | { |
4d6ea9c3 DK |
3180 | if (card->loadtimerset) { |
3181 | card->loadtimerset = 0; | |
3182 | del_timer(&card->loadtimer); | |
3183 | } | |
4d6f6af8 | 3184 | |
4d6ea9c3 | 3185 | slic_debug_card_destroy(card); |
4d6f6af8 | 3186 | |
4d6ea9c3 | 3187 | kfree(card); |
4d6f6af8 GKH |
3188 | } |
3189 | ||
4d6ea9c3 | 3190 | static void __devexit slic_entry_remove(struct pci_dev *pcidev) |
4d6f6af8 | 3191 | { |
4d6ea9c3 DK |
3192 | struct net_device *dev = pci_get_drvdata(pcidev); |
3193 | u32 mmio_start = 0; | |
3194 | uint mmio_len = 0; | |
3195 | struct adapter *adapter = netdev_priv(dev); | |
3196 | struct sliccard *card; | |
3197 | struct mcast_address *mcaddr, *mlist; | |
4d6f6af8 | 3198 | |
4d6ea9c3 DK |
3199 | slic_adapter_freeresources(adapter); |
3200 | slic_unmap_mmio_space(adapter); | |
3201 | unregister_netdev(dev); | |
3202 | ||
3203 | mmio_start = pci_resource_start(pcidev, 0); | |
3204 | mmio_len = pci_resource_len(pcidev, 0); | |
3205 | ||
3206 | release_mem_region(mmio_start, mmio_len); | |
3207 | ||
3208 | iounmap((void __iomem *)dev->base_addr); | |
3209 | /* free multicast addresses */ | |
3210 | mlist = adapter->mcastaddrs; | |
3211 | while (mlist) { | |
3212 | mcaddr = mlist; | |
3213 | mlist = mlist->next; | |
3214 | kfree(mcaddr); | |
4d6f6af8 | 3215 | } |
4d6ea9c3 DK |
3216 | ASSERT(adapter->card); |
3217 | card = adapter->card; | |
3218 | ASSERT(card->adapters_allocated); | |
3219 | card->adapters_allocated--; | |
3220 | adapter->allocated = 0; | |
3221 | if (!card->adapters_allocated) { | |
3222 | struct sliccard *curr_card = slic_global.slic_card; | |
3223 | if (curr_card == card) { | |
3224 | slic_global.slic_card = card->next; | |
3225 | } else { | |
3226 | while (curr_card->next != card) | |
3227 | curr_card = curr_card->next; | |
3228 | ASSERT(curr_card); | |
3229 | curr_card->next = card->next; | |
3230 | } | |
3231 | ASSERT(slic_global.num_slic_cards); | |
3232 | slic_global.num_slic_cards--; | |
3233 | slic_card_cleanup(card); | |
4d6f6af8 | 3234 | } |
20caa14c | 3235 | free_netdev(dev); |
4d6ea9c3 | 3236 | pci_release_regions(pcidev); |
d99b5ac6 | 3237 | pci_disable_device(pcidev); |
4d6f6af8 GKH |
3238 | } |
3239 | ||
4d6ea9c3 | 3240 | static int slic_entry_halt(struct net_device *dev) |
4d6f6af8 | 3241 | { |
4d6ea9c3 DK |
3242 | struct adapter *adapter = netdev_priv(dev); |
3243 | struct sliccard *card = adapter->card; | |
3244 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; | |
4d6f6af8 | 3245 | |
4d6ea9c3 DK |
3246 | spin_lock_irqsave(&slic_global.driver_lock.lock, |
3247 | slic_global.driver_lock.flags); | |
3248 | ASSERT(card); | |
3249 | netif_stop_queue(adapter->netdev); | |
3250 | adapter->state = ADAPT_DOWN; | |
3251 | adapter->linkstate = LINK_DOWN; | |
3252 | adapter->upr_list = NULL; | |
3253 | adapter->upr_busy = 0; | |
3254 | adapter->devflags_prev = 0; | |
3255 | ASSERT(card->adapter[adapter->cardindex] == adapter); | |
3256 | slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); | |
3257 | adapter->all_reg_writes++; | |
3258 | adapter->icr_reg_writes++; | |
3259 | slic_config_clear(adapter); | |
3260 | if (adapter->activated) { | |
3261 | card->adapters_activated--; | |
3262 | slic_global.num_slic_ports_active--; | |
3263 | adapter->activated = 0; | |
3264 | } | |
3265 | #ifdef AUTOMATIC_RESET | |
3266 | slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH); | |
3267 | #endif | |
3268 | /* | |
3269 | * Reset the adapter's cmd queues | |
3270 | */ | |
3271 | slic_cmdq_reset(adapter); | |
4d6f6af8 | 3272 | |
4d6ea9c3 DK |
3273 | #ifdef AUTOMATIC_RESET |
3274 | if (!card->adapters_activated) | |
3275 | slic_card_init(card, adapter); | |
3276 | #endif | |
4d6f6af8 | 3277 | |
4d6ea9c3 DK |
3278 | spin_unlock_irqrestore(&slic_global.driver_lock.lock, |
3279 | slic_global.driver_lock.flags); | |
3280 | return 0; | |
3281 | } | |
4d6f6af8 | 3282 | |
4d6ea9c3 DK |
3283 | static struct net_device_stats *slic_get_stats(struct net_device *dev) |
3284 | { | |
3285 | struct adapter *adapter = netdev_priv(dev); | |
4d6f6af8 | 3286 | |
4d6ea9c3 DK |
3287 | ASSERT(adapter); |
3288 | dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; | |
3289 | dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; | |
3290 | dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; | |
3291 | dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards; | |
3292 | dev->stats.tx_heartbeat_errors = 0; | |
3293 | dev->stats.tx_aborted_errors = 0; | |
3294 | dev->stats.tx_window_errors = 0; | |
3295 | dev->stats.tx_fifo_errors = 0; | |
3296 | dev->stats.rx_frame_errors = 0; | |
3297 | dev->stats.rx_length_errors = 0; | |
3298 | ||
3299 | return &dev->stats; | |
4d6f6af8 GKH |
3300 | } |
3301 | ||
4d6ea9c3 | 3302 | static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
4d6f6af8 | 3303 | { |
4d6ea9c3 DK |
3304 | struct adapter *adapter = netdev_priv(dev); |
3305 | struct ethtool_cmd edata; | |
3306 | struct ethtool_cmd ecmd; | |
3307 | u32 data[7]; | |
3308 | u32 intagg; | |
4d6f6af8 | 3309 | |
4d6ea9c3 DK |
3310 | ASSERT(rq); |
3311 | switch (cmd) { | |
3312 | case SIOCSLICSETINTAGG: | |
3313 | if (copy_from_user(data, rq->ifr_data, 28)) | |
3314 | return -EFAULT; | |
3315 | intagg = data[0]; | |
3316 | dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n", | |
3317 | __func__, intagg); | |
3318 | slic_intagg_set(adapter, intagg); | |
3319 | return 0; | |
4d6f6af8 | 3320 | |
4d6ea9c3 DK |
3321 | #ifdef SLIC_TRACE_DUMP_ENABLED |
3322 | case SIOCSLICTRACEDUMP: | |
3323 | { | |
3324 | u32 value; | |
3325 | DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n"); | |
3326 | ||
3327 | if (copy_from_user(data, rq->ifr_data, 28)) { | |
3328 | PRINT_ERROR | |
3329 | ("slic: copy_from_user FAILED getting initial simba param\n"); | |
3330 | return -EFAULT; | |
3331 | } | |
3332 | ||
3333 | value = data[0]; | |
3334 | if (tracemon_request == SLIC_DUMP_DONE) { | |
3335 | PRINT_ERROR | |
3336 | ("ATK Diagnostic Trace Dump Requested\n"); | |
3337 | tracemon_request = SLIC_DUMP_REQUESTED; | |
3338 | tracemon_request_type = value; | |
3339 | tracemon_timestamp = jiffies; | |
3340 | } else if ((tracemon_request == SLIC_DUMP_REQUESTED) || | |
3341 | (tracemon_request == | |
3342 | SLIC_DUMP_IN_PROGRESS)) { | |
3343 | PRINT_ERROR | |
3344 | ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n"); | |
3345 | } else { | |
3346 | PRINT_ERROR | |
3347 | ("ATK Diagnostic Trace Dump Requested\n"); | |
3348 | tracemon_request = SLIC_DUMP_REQUESTED; | |
3349 | tracemon_request_type = value; | |
3350 | tracemon_timestamp = jiffies; | |
4d6f6af8 | 3351 | } |
4d6ea9c3 | 3352 | return 0; |
4d6f6af8 | 3353 | } |
4d6ea9c3 DK |
3354 | #endif |
3355 | case SIOCETHTOOL: | |
3356 | ASSERT(adapter); | |
3357 | if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd))) | |
3358 | return -EFAULT; | |
4d6f6af8 | 3359 | |
4d6ea9c3 DK |
3360 | if (ecmd.cmd == ETHTOOL_GSET) { |
3361 | edata.supported = (SUPPORTED_10baseT_Half | | |
3362 | SUPPORTED_10baseT_Full | | |
3363 | SUPPORTED_100baseT_Half | | |
3364 | SUPPORTED_100baseT_Full | | |
3365 | SUPPORTED_Autoneg | SUPPORTED_MII); | |
3366 | edata.port = PORT_MII; | |
3367 | edata.transceiver = XCVR_INTERNAL; | |
3368 | edata.phy_address = 0; | |
3369 | if (adapter->linkspeed == LINK_100MB) | |
3370 | edata.speed = SPEED_100; | |
3371 | else if (adapter->linkspeed == LINK_10MB) | |
3372 | edata.speed = SPEED_10; | |
3373 | else | |
3374 | edata.speed = 0; | |
4d6f6af8 | 3375 | |
4d6ea9c3 DK |
3376 | if (adapter->linkduplex == LINK_FULLD) |
3377 | edata.duplex = DUPLEX_FULL; | |
3378 | else | |
3379 | edata.duplex = DUPLEX_HALF; | |
4d6f6af8 | 3380 | |
4d6ea9c3 DK |
3381 | edata.autoneg = AUTONEG_ENABLE; |
3382 | edata.maxtxpkt = 1; | |
3383 | edata.maxrxpkt = 1; | |
3384 | if (copy_to_user(rq->ifr_data, &edata, sizeof(edata))) | |
3385 | return -EFAULT; | |
4d6f6af8 | 3386 | |
4d6ea9c3 DK |
3387 | } else if (ecmd.cmd == ETHTOOL_SSET) { |
3388 | if (!capable(CAP_NET_ADMIN)) | |
3389 | return -EPERM; | |
4d6f6af8 | 3390 | |
4d6ea9c3 DK |
3391 | if (adapter->linkspeed == LINK_100MB) |
3392 | edata.speed = SPEED_100; | |
3393 | else if (adapter->linkspeed == LINK_10MB) | |
3394 | edata.speed = SPEED_10; | |
3395 | else | |
3396 | edata.speed = 0; | |
3397 | ||
3398 | if (adapter->linkduplex == LINK_FULLD) | |
3399 | edata.duplex = DUPLEX_FULL; | |
3400 | else | |
3401 | edata.duplex = DUPLEX_HALF; | |
3402 | ||
3403 | edata.autoneg = AUTONEG_ENABLE; | |
3404 | edata.maxtxpkt = 1; | |
3405 | edata.maxrxpkt = 1; | |
3406 | if ((ecmd.speed != edata.speed) || | |
3407 | (ecmd.duplex != edata.duplex)) { | |
3408 | u32 speed; | |
3409 | u32 duplex; | |
3410 | ||
3411 | if (ecmd.speed == SPEED_10) | |
3412 | speed = 0; | |
3413 | else | |
3414 | speed = PCR_SPEED_100; | |
3415 | if (ecmd.duplex == DUPLEX_FULL) | |
3416 | duplex = PCR_DUPLEX_FULL; | |
3417 | else | |
3418 | duplex = 0; | |
3419 | slic_link_config(adapter, speed, duplex); | |
3420 | slic_link_event_handler(adapter); | |
3421 | } | |
3422 | } | |
3423 | return 0; | |
3424 | default: | |
3425 | return -EOPNOTSUPP; | |
3426 | } | |
4d6f6af8 GKH |
3427 | } |
3428 | ||
4d6ea9c3 | 3429 | static void slic_config_pci(struct pci_dev *pcidev) |
4d6f6af8 | 3430 | { |
4d6ea9c3 DK |
3431 | u16 pci_command; |
3432 | u16 new_command; | |
4d6f6af8 | 3433 | |
4d6ea9c3 DK |
3434 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
3435 | ||
3436 | new_command = pci_command | PCI_COMMAND_MASTER | |
3437 | | PCI_COMMAND_MEMORY | |
3438 | | PCI_COMMAND_INVALIDATE | |
3439 | | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; | |
3440 | if (pci_command != new_command) | |
3441 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); | |
4d6f6af8 GKH |
3442 | } |
3443 | ||
4d6ea9c3 | 3444 | static int slic_card_init(struct sliccard *card, struct adapter *adapter) |
4d6f6af8 | 3445 | { |
4d6ea9c3 DK |
3446 | __iomem struct slic_regs *slic_regs = adapter->slic_regs; |
3447 | struct slic_eeprom *peeprom; | |
3448 | struct oslic_eeprom *pOeeprom; | |
3449 | dma_addr_t phys_config; | |
3450 | u32 phys_configh; | |
3451 | u32 phys_configl; | |
3452 | u32 i = 0; | |
3453 | struct slic_shmem *pshmem; | |
3454 | int status; | |
3455 | uint macaddrs = card->card_size; | |
3456 | ushort eecodesize; | |
3457 | ushort dramsize; | |
3458 | ushort ee_chksum; | |
3459 | ushort calc_chksum; | |
3460 | struct slic_config_mac *pmac; | |
3461 | unsigned char fruformat; | |
3462 | unsigned char oemfruformat; | |
3463 | struct atk_fru *patkfru; | |
3464 | union oemfru *poemfru; | |
4d6f6af8 | 3465 | |
4d6ea9c3 DK |
3466 | /* Reset everything except PCI configuration space */ |
3467 | slic_soft_reset(adapter); | |
3468 | ||
3469 | /* Download the microcode */ | |
3470 | status = slic_card_download(adapter); | |
3471 | ||
3472 | if (status != 0) { | |
3473 | dev_err(&adapter->pcidev->dev, | |
3474 | "download failed bus %d slot %d\n", | |
3475 | adapter->busnumber, adapter->slotnumber); | |
3476 | return status; | |
4d6f6af8 | 3477 | } |
4d6f6af8 | 3478 | |
4d6ea9c3 DK |
3479 | if (!card->config_set) { |
3480 | peeprom = pci_alloc_consistent(adapter->pcidev, | |
3481 | sizeof(struct slic_eeprom), | |
3482 | &phys_config); | |
4d6f6af8 | 3483 | |
4d6ea9c3 DK |
3484 | phys_configl = SLIC_GET_ADDR_LOW(phys_config); |
3485 | phys_configh = SLIC_GET_ADDR_HIGH(phys_config); | |
4d6f6af8 | 3486 | |
4d6ea9c3 DK |
3487 | if (!peeprom) { |
3488 | dev_err(&adapter->pcidev->dev, | |
3489 | "eeprom read failed to get memory " | |
3490 | "bus %d slot %d\n", adapter->busnumber, | |
3491 | adapter->slotnumber); | |
3492 | return -ENOMEM; | |
4d6f6af8 | 3493 | } else { |
4d6ea9c3 | 3494 | memset(peeprom, 0, sizeof(struct slic_eeprom)); |
4d6f6af8 | 3495 | } |
4d6ea9c3 DK |
3496 | slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); |
3497 | mdelay(1); | |
3498 | pshmem = (struct slic_shmem *)adapter->phys_shmem; | |
4d6f6af8 | 3499 | |
4d6ea9c3 DK |
3500 | spin_lock_irqsave(&adapter->bit64reglock.lock, |
3501 | adapter->bit64reglock.flags); | |
3502 | slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH); | |
3503 | slic_reg32_write(&slic_regs->slic_isp, | |
3504 | SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); | |
3505 | spin_unlock_irqrestore(&adapter->bit64reglock.lock, | |
3506 | adapter->bit64reglock.flags); | |
4d6f6af8 | 3507 | |
4d6ea9c3 | 3508 | slic_config_get(adapter, phys_configl, phys_configh); |
4d6f6af8 | 3509 | |
4d6ea9c3 DK |
3510 | for (;;) { |
3511 | if (adapter->pshmem->isr) { | |
3512 | if (adapter->pshmem->isr & ISR_UPC) { | |
3513 | adapter->pshmem->isr = 0; | |
3514 | slic_reg64_write(adapter, | |
3515 | &slic_regs->slic_isp, 0, | |
3516 | &slic_regs->slic_addr_upper, | |
3517 | 0, FLUSH); | |
3518 | slic_reg32_write(&slic_regs->slic_isr, | |
3519 | 0, FLUSH); | |
3520 | ||
3521 | slic_upr_request_complete(adapter, 0); | |
3522 | break; | |
3523 | } else { | |
3524 | adapter->pshmem->isr = 0; | |
3525 | slic_reg32_write(&slic_regs->slic_isr, | |
3526 | 0, FLUSH); | |
3527 | } | |
4d6f6af8 | 3528 | } else { |
4d6ea9c3 DK |
3529 | mdelay(1); |
3530 | i++; | |
3531 | if (i > 5000) { | |
3532 | dev_err(&adapter->pcidev->dev, | |
3533 | "%d config data fetch timed out!\n", | |
3534 | adapter->port); | |
3535 | slic_reg64_write(adapter, | |
3536 | &slic_regs->slic_isp, 0, | |
3537 | &slic_regs->slic_addr_upper, | |
3538 | 0, FLUSH); | |
3539 | return -EINVAL; | |
3540 | } | |
4d6f6af8 | 3541 | } |
4d6ea9c3 DK |
3542 | } |
3543 | ||
3544 | switch (adapter->devid) { | |
3545 | /* Oasis card */ | |
3546 | case SLIC_2GB_DEVICE_ID: | |
3547 | /* extract EEPROM data and pointers to EEPROM data */ | |
3548 | pOeeprom = (struct oslic_eeprom *) peeprom; | |
3549 | eecodesize = pOeeprom->EecodeSize; | |
3550 | dramsize = pOeeprom->DramSize; | |
3551 | pmac = pOeeprom->MacInfo; | |
3552 | fruformat = pOeeprom->FruFormat; | |
3553 | patkfru = &pOeeprom->AtkFru; | |
3554 | oemfruformat = pOeeprom->OemFruFormat; | |
3555 | poemfru = &pOeeprom->OemFru; | |
3556 | macaddrs = 2; | |
3557 | /* Minor kludge for Oasis card | |
3558 | get 2 MAC addresses from the | |
3559 | EEPROM to ensure that function 1 | |
3560 | gets the Port 1 MAC address */ | |
3561 | break; | |
3562 | default: | |
3563 | /* extract EEPROM data and pointers to EEPROM data */ | |
3564 | eecodesize = peeprom->EecodeSize; | |
3565 | dramsize = peeprom->DramSize; | |
3566 | pmac = peeprom->u2.mac.MacInfo; | |
3567 | fruformat = peeprom->FruFormat; | |
3568 | patkfru = &peeprom->AtkFru; | |
3569 | oemfruformat = peeprom->OemFruFormat; | |
3570 | poemfru = &peeprom->OemFru; | |
4d6f6af8 GKH |
3571 | break; |
3572 | } | |
4d6f6af8 | 3573 | |
4d6ea9c3 DK |
3574 | card->config.EepromValid = false; |
3575 | ||
3576 | /* see if the EEPROM is valid by checking it's checksum */ | |
3577 | if ((eecodesize <= MAX_EECODE_SIZE) && | |
3578 | (eecodesize >= MIN_EECODE_SIZE)) { | |
3579 | ||
3580 | ee_chksum = | |
3581 | *(u16 *) ((char *) peeprom + (eecodesize - 2)); | |
3582 | /* | |
3583 | calculate the EEPROM checksum | |
3584 | */ | |
3585 | calc_chksum = | |
3586 | ~slic_eeprom_cksum((char *) peeprom, | |
3587 | (eecodesize - 2)); | |
3588 | /* | |
3589 | if the ucdoe chksum flag bit worked, | |
3590 | we wouldn't need this shit | |
3591 | */ | |
3592 | if (ee_chksum == calc_chksum) | |
3593 | card->config.EepromValid = true; | |
3594 | } | |
3595 | /* copy in the DRAM size */ | |
3596 | card->config.DramSize = dramsize; | |
3597 | ||
3598 | /* copy in the MAC address(es) */ | |
3599 | for (i = 0; i < macaddrs; i++) { | |
3600 | memcpy(&card->config.MacInfo[i], | |
3601 | &pmac[i], sizeof(struct slic_config_mac)); | |
3602 | } | |
4d6f6af8 | 3603 | |
4d6ea9c3 DK |
3604 | /* copy the Alacritech FRU information */ |
3605 | card->config.FruFormat = fruformat; | |
3606 | memcpy(&card->config.AtkFru, patkfru, | |
3607 | sizeof(struct atk_fru)); | |
e9eff9d6 | 3608 | |
4d6ea9c3 DK |
3609 | pci_free_consistent(adapter->pcidev, |
3610 | sizeof(struct slic_eeprom), | |
3611 | peeprom, phys_config); | |
4d6f6af8 | 3612 | |
4d6ea9c3 DK |
3613 | if ((!card->config.EepromValid) && |
3614 | (adapter->reg_params.fail_on_bad_eeprom)) { | |
3615 | slic_reg64_write(adapter, &slic_regs->slic_isp, 0, | |
3616 | &slic_regs->slic_addr_upper, | |
3617 | 0, FLUSH); | |
3618 | dev_err(&adapter->pcidev->dev, | |
3619 | "unsupported CONFIGURATION EEPROM invalid\n"); | |
3620 | return -EINVAL; | |
3621 | } | |
4d6f6af8 | 3622 | |
4d6ea9c3 | 3623 | card->config_set = 1; |
4d6f6af8 | 3624 | } |
4d6ea9c3 DK |
3625 | |
3626 | if (slic_card_download_gbrcv(adapter)) { | |
3627 | dev_err(&adapter->pcidev->dev, | |
3628 | "unable to download GB receive microcode\n"); | |
3629 | return -EINVAL; | |
4d6f6af8 | 3630 | } |
4d6ea9c3 DK |
3631 | |
3632 | if (slic_global.dynamic_intagg) | |
3633 | slic_intagg_set(adapter, 0); | |
4d6f6af8 | 3634 | else |
4d6ea9c3 | 3635 | slic_intagg_set(adapter, intagg_delay); |
4d6f6af8 | 3636 | |
4d6ea9c3 DK |
3637 | /* |
3638 | * Initialize ping status to "ok" | |
3639 | */ | |
3640 | card->pingstatus = ISR_PINGMASK; | |
4d6f6af8 | 3641 | |
4d6ea9c3 DK |
3642 | /* |
3643 | * Lastly, mark our card state as up and return success | |
3644 | */ | |
3645 | card->state = CARD_UP; | |
3646 | card->reset_in_progress = 0; | |
4d6f6af8 | 3647 | |
4d6ea9c3 DK |
3648 | return 0; |
3649 | } | |
3650 | ||
3651 | static void slic_init_driver(void) | |
3652 | { | |
3653 | if (slic_first_init) { | |
3654 | slic_first_init = 0; | |
3655 | spin_lock_init(&slic_global.driver_lock.lock); | |
3656 | slic_debug_init(); | |
4d6f6af8 | 3657 | } |
4d6ea9c3 | 3658 | } |
4d6f6af8 | 3659 | |
4d6ea9c3 DK |
3660 | static void slic_init_adapter(struct net_device *netdev, |
3661 | struct pci_dev *pcidev, | |
3662 | const struct pci_device_id *pci_tbl_entry, | |
3663 | void __iomem *memaddr, int chip_idx) | |
3664 | { | |
3665 | ushort index; | |
3666 | struct slic_handle *pslic_handle; | |
3667 | struct adapter *adapter = netdev_priv(netdev); | |
4d6f6af8 | 3668 | |
4d6ea9c3 DK |
3669 | /* adapter->pcidev = pcidev;*/ |
3670 | adapter->vendid = pci_tbl_entry->vendor; | |
3671 | adapter->devid = pci_tbl_entry->device; | |
3672 | adapter->subsysid = pci_tbl_entry->subdevice; | |
3673 | adapter->busnumber = pcidev->bus->number; | |
3674 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); | |
3675 | adapter->functionnumber = (pcidev->devfn & 0x7); | |
3676 | adapter->memorylength = pci_resource_len(pcidev, 0); | |
3677 | adapter->slic_regs = (__iomem struct slic_regs *)memaddr; | |
3678 | adapter->irq = pcidev->irq; | |
3679 | /* adapter->netdev = netdev;*/ | |
3680 | adapter->next_netdevice = head_netdevice; | |
3681 | head_netdevice = netdev; | |
3682 | adapter->chipid = chip_idx; | |
3683 | adapter->port = 0; /*adapter->functionnumber;*/ | |
3684 | adapter->cardindex = adapter->port; | |
3685 | adapter->memorybase = memaddr; | |
3686 | spin_lock_init(&adapter->upr_lock.lock); | |
3687 | spin_lock_init(&adapter->bit64reglock.lock); | |
3688 | spin_lock_init(&adapter->adapter_lock.lock); | |
3689 | spin_lock_init(&adapter->reset_lock.lock); | |
3690 | spin_lock_init(&adapter->handle_lock.lock); | |
4d6f6af8 | 3691 | |
4d6ea9c3 DK |
3692 | adapter->card_size = 1; |
3693 | /* | |
3694 | Initialize slic_handle array | |
3695 | */ | |
3696 | ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF); | |
3697 | /* | |
3698 | Start with 1. 0 is an invalid host handle. | |
3699 | */ | |
3700 | for (index = 1, pslic_handle = &adapter->slic_handles[1]; | |
3701 | index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) { | |
3702 | ||
3703 | pslic_handle->token.handle_index = index; | |
3704 | pslic_handle->type = SLIC_HANDLE_FREE; | |
3705 | pslic_handle->next = adapter->pfree_slic_handles; | |
3706 | adapter->pfree_slic_handles = pslic_handle; | |
4d6f6af8 | 3707 | } |
4d6ea9c3 DK |
3708 | adapter->pshmem = (struct slic_shmem *) |
3709 | pci_alloc_consistent(adapter->pcidev, | |
3710 | sizeof(struct slic_shmem), | |
3711 | &adapter-> | |
3712 | phys_shmem); | |
3713 | ASSERT(adapter->pshmem); | |
4d6f6af8 | 3714 | |
4d6ea9c3 | 3715 | memset(adapter->pshmem, 0, sizeof(struct slic_shmem)); |
4d6f6af8 | 3716 | |
4d6ea9c3 DK |
3717 | return; |
3718 | } | |
4d6f6af8 | 3719 | |
4d6ea9c3 DK |
3720 | static const struct net_device_ops slic_netdev_ops = { |
3721 | .ndo_open = slic_entry_open, | |
3722 | .ndo_stop = slic_entry_halt, | |
3723 | .ndo_start_xmit = slic_xmit_start, | |
3724 | .ndo_do_ioctl = slic_ioctl, | |
3725 | .ndo_set_mac_address = slic_mac_set_address, | |
3726 | .ndo_get_stats = slic_get_stats, | |
afc4b13d | 3727 | .ndo_set_rx_mode = slic_mcast_set_list, |
4d6ea9c3 DK |
3728 | .ndo_validate_addr = eth_validate_addr, |
3729 | .ndo_change_mtu = eth_change_mtu, | |
3730 | }; | |
4d6f6af8 | 3731 | |
4d6ea9c3 DK |
3732 | static u32 slic_card_locate(struct adapter *adapter) |
3733 | { | |
3734 | struct sliccard *card = slic_global.slic_card; | |
3735 | struct physcard *physcard = slic_global.phys_card; | |
3736 | ushort card_hostid; | |
3737 | u16 __iomem *hostid_reg; | |
3738 | uint i; | |
3739 | uint rdhostid_offset = 0; | |
4d6f6af8 | 3740 | |
4d6ea9c3 DK |
3741 | switch (adapter->devid) { |
3742 | case SLIC_2GB_DEVICE_ID: | |
3743 | rdhostid_offset = SLIC_RDHOSTID_2GB; | |
3744 | break; | |
3745 | case SLIC_1GB_DEVICE_ID: | |
3746 | rdhostid_offset = SLIC_RDHOSTID_1GB; | |
3747 | break; | |
4d6f6af8 | 3748 | default: |
0ab19005 | 3749 | return -ENODEV; |
4d6f6af8 | 3750 | } |
4d6f6af8 | 3751 | |
4d6ea9c3 DK |
3752 | hostid_reg = |
3753 | (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) + | |
3754 | rdhostid_offset); | |
4d6f6af8 | 3755 | |
4d6ea9c3 DK |
3756 | /* read the 16 bit hostid from SRAM */ |
3757 | card_hostid = (ushort) readw(hostid_reg); | |
4d6f6af8 | 3758 | |
4d6ea9c3 DK |
3759 | /* Initialize a new card structure if need be */ |
3760 | if (card_hostid == SLIC_HOSTID_DEFAULT) { | |
3761 | card = kzalloc(sizeof(struct sliccard), GFP_KERNEL); | |
3762 | if (card == NULL) | |
3763 | return -ENOMEM; | |
3764 | ||
3765 | card->next = slic_global.slic_card; | |
3766 | slic_global.slic_card = card; | |
3767 | card->busnumber = adapter->busnumber; | |
3768 | card->slotnumber = adapter->slotnumber; | |
3769 | ||
3770 | /* Find an available cardnum */ | |
3771 | for (i = 0; i < SLIC_MAX_CARDS; i++) { | |
3772 | if (slic_global.cardnuminuse[i] == 0) { | |
3773 | slic_global.cardnuminuse[i] = 1; | |
3774 | card->cardnum = i; | |
3775 | break; | |
3776 | } | |
3777 | } | |
3778 | slic_global.num_slic_cards++; | |
3779 | ||
3780 | slic_debug_card_create(card); | |
3781 | } else { | |
3782 | /* Card exists, find the card this adapter belongs to */ | |
3783 | while (card) { | |
3784 | if (card->cardnum == card_hostid) | |
3785 | break; | |
3786 | card = card->next; | |
3787 | } | |
3788 | } | |
3789 | ||
3790 | ASSERT(card); | |
3791 | if (!card) | |
3792 | return -ENXIO; | |
3793 | /* Put the adapter in the card's adapter list */ | |
3794 | ASSERT(card->adapter[adapter->port] == NULL); | |
3795 | if (!card->adapter[adapter->port]) { | |
3796 | card->adapter[adapter->port] = adapter; | |
3797 | adapter->card = card; | |
3798 | } | |
3799 | ||
3800 | card->card_size = 1; /* one port per *logical* card */ | |
3801 | ||
3802 | while (physcard) { | |
3803 | for (i = 0; i < SLIC_MAX_PORTS; i++) { | |
3804 | if (!physcard->adapter[i]) | |
3805 | continue; | |
3806 | else | |
3807 | break; | |
3808 | } | |
3809 | ASSERT(i != SLIC_MAX_PORTS); | |
3810 | if (physcard->adapter[i]->slotnumber == adapter->slotnumber) | |
3811 | break; | |
3812 | physcard = physcard->next; | |
3813 | } | |
3814 | if (!physcard) { | |
3815 | /* no structure allocated for this physical card yet */ | |
3816 | physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC); | |
3817 | ASSERT(physcard); | |
3818 | ||
3819 | physcard->next = slic_global.phys_card; | |
3820 | slic_global.phys_card = physcard; | |
3821 | physcard->adapters_allocd = 1; | |
3822 | } else { | |
3823 | physcard->adapters_allocd++; | |
3824 | } | |
3825 | /* Note - this is ZERO relative */ | |
3826 | adapter->physport = physcard->adapters_allocd - 1; | |
3827 | ||
3828 | ASSERT(physcard->adapter[adapter->physport] == NULL); | |
3829 | physcard->adapter[adapter->physport] = adapter; | |
3830 | adapter->physcard = physcard; | |
4d6f6af8 GKH |
3831 | |
3832 | return 0; | |
3833 | } | |
4d6f6af8 | 3834 | |
4d6ea9c3 DK |
3835 | static int __devinit slic_entry_probe(struct pci_dev *pcidev, |
3836 | const struct pci_device_id *pci_tbl_entry) | |
4d6f6af8 | 3837 | { |
4d6ea9c3 DK |
3838 | static int cards_found; |
3839 | static int did_version; | |
3840 | int err = -ENODEV; | |
3841 | struct net_device *netdev; | |
3842 | struct adapter *adapter; | |
3843 | void __iomem *memmapped_ioaddr = NULL; | |
3844 | u32 status = 0; | |
3845 | ulong mmio_start = 0; | |
3846 | ulong mmio_len = 0; | |
3847 | struct sliccard *card = NULL; | |
3848 | int pci_using_dac = 0; | |
4d6f6af8 | 3849 | |
4d6ea9c3 | 3850 | slic_global.dynamic_intagg = dynamic_intagg; |
4d6f6af8 | 3851 | |
4d6ea9c3 | 3852 | err = pci_enable_device(pcidev); |
4d6f6af8 | 3853 | |
4d6ea9c3 DK |
3854 | if (err) |
3855 | return err; | |
4d6f6af8 | 3856 | |
4d6ea9c3 DK |
3857 | if (slic_debug > 0 && did_version++ == 0) { |
3858 | printk(KERN_DEBUG "%s\n", slic_banner); | |
3859 | printk(KERN_DEBUG "%s\n", slic_proc_version); | |
3860 | } | |
4d6f6af8 | 3861 | |
4d6ea9c3 DK |
3862 | if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) { |
3863 | pci_using_dac = 1; | |
3864 | if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) { | |
3865 | dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for " | |
3866 | "consistent allocations\n"); | |
3867 | goto err_out_disable_pci; | |
3868 | } | |
3869 | } else if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) { | |
3870 | pci_using_dac = 0; | |
3871 | pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)); | |
3872 | } else { | |
3873 | dev_err(&pcidev->dev, "no usable DMA configuration\n"); | |
3874 | goto err_out_disable_pci; | |
3875 | } | |
4d6f6af8 | 3876 | |
4d6ea9c3 DK |
3877 | err = pci_request_regions(pcidev, DRV_NAME); |
3878 | if (err) { | |
3879 | dev_err(&pcidev->dev, "can't obtain PCI resources\n"); | |
3880 | goto err_out_disable_pci; | |
3881 | } | |
4d6f6af8 | 3882 | |
4d6ea9c3 | 3883 | pci_set_master(pcidev); |
4d6f6af8 | 3884 | |
4d6ea9c3 DK |
3885 | netdev = alloc_etherdev(sizeof(struct adapter)); |
3886 | if (!netdev) { | |
3887 | err = -ENOMEM; | |
3888 | goto err_out_exit_slic_probe; | |
4d6f6af8 | 3889 | } |
4d6f6af8 | 3890 | |
4d6ea9c3 | 3891 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
4d6f6af8 | 3892 | |
4d6ea9c3 DK |
3893 | pci_set_drvdata(pcidev, netdev); |
3894 | adapter = netdev_priv(netdev); | |
3895 | adapter->netdev = netdev; | |
3896 | adapter->pcidev = pcidev; | |
3897 | if (pci_using_dac) | |
3898 | netdev->features |= NETIF_F_HIGHDMA; | |
4d6f6af8 | 3899 | |
4d6ea9c3 DK |
3900 | mmio_start = pci_resource_start(pcidev, 0); |
3901 | mmio_len = pci_resource_len(pcidev, 0); | |
3902 | ||
3903 | ||
3904 | /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/ | |
3905 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); | |
3906 | if (!memmapped_ioaddr) { | |
3907 | dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n", | |
3908 | mmio_len, mmio_start); | |
3909 | goto err_out_free_netdev; | |
4d6f6af8 | 3910 | } |
4d6ea9c3 DK |
3911 | |
3912 | slic_config_pci(pcidev); | |
3913 | ||
3914 | slic_init_driver(); | |
3915 | ||
3916 | slic_init_adapter(netdev, | |
3917 | pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found); | |
3918 | ||
3919 | status = slic_card_locate(adapter); | |
3920 | if (status) { | |
3921 | dev_err(&pcidev->dev, "cannot locate card\n"); | |
3922 | goto err_out_free_mmio_region; | |
4d6f6af8 | 3923 | } |
4d6ea9c3 DK |
3924 | |
3925 | card = adapter->card; | |
3926 | ||
3927 | if (!adapter->allocated) { | |
3928 | card->adapters_allocated++; | |
3929 | adapter->allocated = 1; | |
4d6f6af8 | 3930 | } |
4d6f6af8 | 3931 | |
4d6ea9c3 | 3932 | status = slic_card_init(card, adapter); |
4d6f6af8 | 3933 | |
4d6ea9c3 DK |
3934 | if (status != 0) { |
3935 | card->state = CARD_FAIL; | |
3936 | adapter->state = ADAPT_FAIL; | |
3937 | adapter->linkstate = LINK_DOWN; | |
3938 | dev_err(&pcidev->dev, "FAILED status[%x]\n", status); | |
3939 | } else { | |
3940 | slic_adapter_set_hwaddr(adapter); | |
4d6f6af8 GKH |
3941 | } |
3942 | ||
4d6ea9c3 DK |
3943 | netdev->base_addr = (unsigned long)adapter->memorybase; |
3944 | netdev->irq = adapter->irq; | |
3945 | netdev->netdev_ops = &slic_netdev_ops; | |
4d6f6af8 | 3946 | |
4d6ea9c3 DK |
3947 | slic_debug_adapter_create(adapter); |
3948 | ||
3949 | strcpy(netdev->name, "eth%d"); | |
3950 | err = register_netdev(netdev); | |
3951 | if (err) { | |
3952 | dev_err(&pcidev->dev, "Cannot register net device, aborting.\n"); | |
3953 | goto err_out_unmap; | |
4d6f6af8 | 3954 | } |
4d6f6af8 | 3955 | |
4d6ea9c3 DK |
3956 | cards_found++; |
3957 | ||
3958 | return status; | |
3959 | ||
3960 | err_out_unmap: | |
3961 | iounmap(memmapped_ioaddr); | |
3962 | err_out_free_mmio_region: | |
3963 | release_mem_region(mmio_start, mmio_len); | |
3964 | err_out_free_netdev: | |
3965 | free_netdev(netdev); | |
3966 | err_out_exit_slic_probe: | |
3967 | pci_release_regions(pcidev); | |
3968 | err_out_disable_pci: | |
3969 | pci_disable_device(pcidev); | |
3970 | return err; | |
3971 | } | |
4d6f6af8 GKH |
3972 | |
3973 | static struct pci_driver slic_driver = { | |
3974 | .name = DRV_NAME, | |
3975 | .id_table = slic_pci_tbl, | |
3976 | .probe = slic_entry_probe, | |
b0f434a7 | 3977 | .remove = __devexit_p(slic_entry_remove), |
4d6f6af8 GKH |
3978 | }; |
3979 | ||
3980 | static int __init slic_module_init(void) | |
3981 | { | |
4d6f6af8 GKH |
3982 | slic_init_driver(); |
3983 | ||
3984 | if (debug >= 0 && slic_debug != debug) | |
e5bac598 GKH |
3985 | printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n", |
3986 | debug); | |
4d6f6af8 GKH |
3987 | if (debug >= 0) |
3988 | slic_debug = debug; | |
3989 | ||
e8bc9b7a | 3990 | return pci_register_driver(&slic_driver); |
4d6f6af8 GKH |
3991 | } |
3992 | ||
3993 | static void __exit slic_module_cleanup(void) | |
3994 | { | |
4d6f6af8 GKH |
3995 | pci_unregister_driver(&slic_driver); |
3996 | slic_debug_cleanup(); | |
4d6f6af8 GKH |
3997 | } |
3998 | ||
3999 | module_init(slic_module_init); | |
4000 | module_exit(slic_module_cleanup); |