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1 | #ifndef DDK750_CHIP_H__ |
2 | #define DDK750_CHIP_H__ | |
3 | #define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */ | |
62fa8e10 SM |
4 | #ifndef SM750LE_REVISION_ID |
5 | #define SM750LE_REVISION_ID ((unsigned char)0xfe) | |
6 | #endif | |
81dee67e | 7 | |
f8b0dced LS |
8 | #include <linux/io.h> |
9 | ||
81dee67e | 10 | /* This is all the chips recognized by this library */ |
259fef35 | 11 | typedef enum _logical_chip_type_t { |
63de0eb0 IA |
12 | SM_UNKNOWN, |
13 | SM718, | |
14 | SM750, | |
15 | SM750LE, | |
81dee67e SM |
16 | } |
17 | logical_chip_type_t; | |
18 | ||
19 | ||
259fef35 | 20 | typedef enum _clock_type_t { |
81dee67e SM |
21 | MXCLK_PLL, |
22 | PRIMARY_PLL, | |
23 | SECONDARY_PLL, | |
24 | VGA0_PLL, | |
25 | VGA1_PLL, | |
26 | } | |
27 | clock_type_t; | |
28 | ||
259fef35 | 29 | typedef struct _pll_value_t { |
63de0eb0 IA |
30 | clock_type_t clockType; |
31 | unsigned long inputFreq; /* Input clock frequency to the PLL */ | |
81dee67e | 32 | |
63de0eb0 IA |
33 | /* Use this when clockType = PANEL_PLL */ |
34 | unsigned long M; | |
35 | unsigned long N; | |
36 | unsigned long OD; | |
37 | unsigned long POD; | |
81dee67e SM |
38 | } |
39 | pll_value_t; | |
40 | ||
41 | /* input struct to initChipParam() function */ | |
259fef35 | 42 | typedef struct _initchip_param_t { |
63de0eb0 IA |
43 | unsigned short powerMode; /* Use power mode 0 or 1 */ |
44 | unsigned short chipClock; /** | |
45 | * Speed of main chip clock in MHz unit | |
46 | * 0 = keep the current clock setting | |
47 | * Others = the new main chip clock | |
48 | */ | |
49 | unsigned short memClock; /** | |
50 | * Speed of memory clock in MHz unit | |
51 | * 0 = keep the current clock setting | |
52 | * Others = the new memory clock | |
53 | */ | |
54 | unsigned short masterClock; /** | |
55 | * Speed of master clock in MHz unit | |
56 | * 0 = keep the current clock setting | |
57 | * Others = the new master clock | |
58 | */ | |
59 | unsigned short setAllEngOff; /** | |
60 | * 0 = leave all engine state untouched. | |
61 | * 1 = make sure they are off: 2D, Overlay, | |
62 | * video alpha, alpha, hardware cursors | |
63 | */ | |
64 | unsigned char resetMemory; /** | |
65 | * 0 = Do not reset the memory controller | |
66 | * 1 = Reset the memory controller | |
67 | */ | |
81dee67e | 68 | |
63de0eb0 | 69 | /* More initialization parameter can be added if needed */ |
81dee67e SM |
70 | } |
71 | initchip_param_t; | |
72 | ||
73 | ||
74 | logical_chip_type_t getChipType(void); | |
555a6b1e IA |
75 | unsigned int calcPllValue(unsigned int request, pll_value_t *pll); |
76 | unsigned int calcPllValue2(unsigned int, pll_value_t *); | |
81dee67e | 77 | unsigned int formatPllReg(pll_value_t *pPLL); |
555a6b1e | 78 | void ddk750_set_mmio(void __iomem *, unsigned short, char); |
81dee67e SM |
79 | unsigned int ddk750_getVMSize(void); |
80 | int ddk750_initHw(initchip_param_t *); | |
81 | unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL); | |
82 | unsigned int getChipClock(void); | |
83 | void setChipClock(unsigned int); | |
84 | void setMemoryClock(unsigned int frequency); | |
85 | void setMasterClock(unsigned int frequency); | |
86 | ||
87 | ||
88 | #endif |