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staging: sm7xxfb: remove unneeded __setup
[mirror_ubuntu-zesty-kernel.git] / drivers / staging / sm7xxfb / sm7xxfb.c
CommitLineData
a8e8f89d
SM		 1/*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
10 *
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
16 * more details.
17 *
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
19 */
20
21#include <linux/io.h>
22#include <linux/fb.h>
23#include <linux/pci.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/uaccess.h>
27#include <linux/module.h>
28#include <linux/console.h>
29#include <linux/screen_info.h>
30
31#ifdef CONFIG_PM
32#include <linux/pm.h>
33#endif
34
35#include "sm7xx.h"
36
37/*
38* Private structure
39*/
40struct smtcfb_info {
41 struct pci_dev *pdev;
42 struct fb_info fb;
43 u16 chip_id;
44 u8 chip_rev_id;
45
46 void __iomem *lfb; /* linear frame buffer */
47 void __iomem *dp_regs; /* drawing processor control regs */
48 void __iomem *vp_regs; /* video processor control regs */
49 void __iomem *cp_regs; /* capture processor control regs */
50 void __iomem *mmio; /* memory map IO port */
51
52 u_int width;
53 u_int height;
54 u_int hz;
55
56 u32 colreg[17];
57};
58
74121898 59void __iomem *smtc_regbaseaddress; /* Memory Map IO starting address */
a8e8f89d
SM		 60
61static struct fb_var_screeninfo smtcfb_var = {
62 .xres = 1024,
63 .yres = 600,
64 .xres_virtual = 1024,
65 .yres_virtual = 600,
66 .bits_per_pixel = 16,
67 .red = {16, 8, 0},
68 .green = {8, 8, 0},
69 .blue = {0, 8, 0},
70 .activate = FB_ACTIVATE_NOW,
71 .height = -1,
72 .width = -1,
73 .vmode = FB_VMODE_NONINTERLACED,
74 .nonstd = 0,
75 .accel_flags = FB_ACCELF_TEXT,
76};
77
78static struct fb_fix_screeninfo smtcfb_fix = {
79 .id = "smXXXfb",
80 .type = FB_TYPE_PACKED_PIXELS,
81 .visual = FB_VISUAL_TRUECOLOR,
82 .line_length = 800 * 3,
83 .accel = FB_ACCEL_SMI_LYNX,
84 .type_aux = 0,
85 .xpanstep = 0,
86 .ypanstep = 0,
87 .ywrapstep = 0,
88};
89
90struct vesa_mode {
91 char index[6];
92 u16 lfb_width;
93 u16 lfb_height;
94 u16 lfb_depth;
95};
96
97static struct vesa_mode vesa_mode_table[] = {
98 {"0x301", 640, 480, 8},
99 {"0x303", 800, 600, 8},
100 {"0x305", 1024, 768, 8},
101 {"0x307", 1280, 1024, 8},
102
103 {"0x311", 640, 480, 16},
104 {"0x314", 800, 600, 16},
105 {"0x317", 1024, 768, 16},
106 {"0x31A", 1280, 1024, 16},
107
108 {"0x312", 640, 480, 24},
109 {"0x315", 800, 600, 24},
110 {"0x318", 1024, 768, 24},
111 {"0x31B", 1280, 1024, 24},
112};
113
11862b36 114static struct screen_info smtc_scr_info;
a8e8f89d 115
c65434eb
SM		 116static char *mode_option;
117
a8e8f89d
SM		 118/* process command line options, get vga parameter */
119static int __init sm7xx_vga_setup(char *options)
120{
121 int i;
122
123 if (!options || !*options)
124 return -EINVAL;
125
126 smtc_scr_info.lfb_width = 0;
127 smtc_scr_info.lfb_height = 0;
128 smtc_scr_info.lfb_depth = 0;
129
130 pr_debug("sm7xx_vga_setup = %s\n", options);
131
132 for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
133 if (strstr(options, vesa_mode_table[i].index)) {
134 smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
135 smtc_scr_info.lfb_height =
136 vesa_mode_table[i].lfb_height;
137 smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
138 return 0;
139 }
140 }
141
142 return -1;
143}
a8e8f89d
SM		 144
145static void sm712_setpalette(int regno, unsigned red, unsigned green,
146 unsigned blue, struct fb_info *info)
147{
148 /* set bit 5:4 = 01 (write LCD RAM only) */
149 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
150
151 smtc_mmiowb(regno, dac_reg);
152 smtc_mmiowb(red >> 10, dac_val);
153 smtc_mmiowb(green >> 10, dac_val);
154 smtc_mmiowb(blue >> 10, dac_val);
155}
156
157/* chan_to_field
158 *
159 * convert a colour value into a field position
160 *
161 * from pxafb.c
162 */
163
164static inline unsigned int chan_to_field(unsigned int chan,
165 struct fb_bitfield *bf)
166{
167 chan &= 0xffff;
168 chan >>= 16 - bf->length;
169 return chan << bf->offset;
170}
171
172static int smtc_blank(int blank_mode, struct fb_info *info)
173{
174 /* clear DPMS setting */
175 switch (blank_mode) {
176 case FB_BLANK_UNBLANK:
177 /* Screen On: HSync: On, VSync : On */
178 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
179 smtc_seqw(0x6a, 0x16);
180 smtc_seqw(0x6b, 0x02);
181 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
182 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
183 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
184 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
185 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
186 break;
187 case FB_BLANK_NORMAL:
188 /* Screen Off: HSync: On, VSync : On Soft blank */
189 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
190 smtc_seqw(0x6a, 0x16);
191 smtc_seqw(0x6b, 0x02);
192 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
193 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
194 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
195 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
196 break;
197 case FB_BLANK_VSYNC_SUSPEND:
198 /* Screen On: HSync: On, VSync : Off */
199 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
200 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
201 smtc_seqw(0x6a, 0x0c);
202 smtc_seqw(0x6b, 0x02);
203 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
204 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
205 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
206 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
207 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
208 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
209 break;
210 case FB_BLANK_HSYNC_SUSPEND:
211 /* Screen On: HSync: Off, VSync : On */
212 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
213 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
214 smtc_seqw(0x6a, 0x0c);
215 smtc_seqw(0x6b, 0x02);
216 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
217 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
218 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
219 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
220 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
221 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
222 break;
223 case FB_BLANK_POWERDOWN:
224 /* Screen On: HSync: Off, VSync : Off */
225 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
226 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
227 smtc_seqw(0x6a, 0x0c);
228 smtc_seqw(0x6b, 0x02);
229 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
230 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
231 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
232 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
233 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
234 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
235 break;
236 default:
237 return -EINVAL;
238 }
239
240 return 0;
241}
242
243static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
244 unsigned blue, unsigned trans, struct fb_info *info)
245{
246 struct smtcfb_info *sfb;
247 u32 val;
248
249 sfb = info->par;
250
251 if (regno > 255)
252 return 1;
253
254 switch (sfb->fb.fix.visual) {
255 case FB_VISUAL_DIRECTCOLOR:
256 case FB_VISUAL_TRUECOLOR:
257 /*
258 * 16/32 bit true-colour, use pseudo-palette for 16 base color
259 */
260 if (regno < 16) {
261 if (sfb->fb.var.bits_per_pixel == 16) {
262 u32 *pal = sfb->fb.pseudo_palette;
a1f6da67 263
a8e8f89d
SM		 264 val = chan_to_field(red, &sfb->fb.var.red);
265 val |= chan_to_field(green, &sfb->fb.var.green);
266 val |= chan_to_field(blue, &sfb->fb.var.blue);
267#ifdef __BIG_ENDIAN
268 pal[regno] =
269 ((red & 0xf800) >> 8) |
270 ((green & 0xe000) >> 13) |
271 ((green & 0x1c00) << 3) |
272 ((blue & 0xf800) >> 3);
273#else
274 pal[regno] = val;
275#endif
276 } else {
277 u32 *pal = sfb->fb.pseudo_palette;
a1f6da67 278
a8e8f89d
SM		 279 val = chan_to_field(red, &sfb->fb.var.red);
280 val |= chan_to_field(green, &sfb->fb.var.green);
281 val |= chan_to_field(blue, &sfb->fb.var.blue);
282#ifdef __BIG_ENDIAN
283 val =
284 (val & 0xff00ff00 >> 8) |
285 (val & 0x00ff00ff << 8);
286#endif
287 pal[regno] = val;
288 }
289 }
290 break;
291
292 case FB_VISUAL_PSEUDOCOLOR:
293 /* color depth 8 bit */
294 sm712_setpalette(regno, red, green, blue, info);
295 break;
296
297 default:
298 return 1; /* unknown type */
299 }
300
301 return 0;
a8e8f89d
SM		 302}
303
304#ifdef __BIG_ENDIAN
305static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
306 count, loff_t *ppos)
307{
308 unsigned long p = *ppos;
309
310 u32 *buffer, *dst;
311 u32 __iomem *src;
312 int c, i, cnt = 0, err = 0;
313 unsigned long total_size;
314
315 if (!info || !info->screen_base)
316 return -ENODEV;
317
318 if (info->state != FBINFO_STATE_RUNNING)
319 return -EPERM;
320
321 total_size = info->screen_size;
322
323 if (total_size == 0)
324 total_size = info->fix.smem_len;
325
326 if (p >= total_size)
327 return 0;
328
329 if (count >= total_size)
330 count = total_size;
331
332 if (count + p > total_size)
333 count = total_size - p;
334
335 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
336 if (!buffer)
337 return -ENOMEM;
338
339 src = (u32 __iomem *) (info->screen_base + p);
340
341 if (info->fbops->fb_sync)
342 info->fbops->fb_sync(info);
343
344 while (count) {
345 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
346 dst = buffer;
347 for (i = c >> 2; i--;) {
348 *dst = fb_readl(src++);
349 *dst =
350 (*dst & 0xff00ff00 >> 8) |
351 (*dst & 0x00ff00ff << 8);
352 dst++;
353 }
354 if (c & 3) {
53f54a48
SM		 355 u8 *dst8 = (u8 *)dst;
356 u8 __iomem *src8 = (u8 __iomem *)src;
a8e8f89d
SM		 357
358 for (i = c & 3; i--;) {
359 if (i & 1) {
360 *dst8++ = fb_readb(++src8);
361 } else {
362 *dst8++ = fb_readb(--src8);
363 src8 += 2;
364 }
365 }
53f54a48 366 src = (u32 __iomem *)src8;
a8e8f89d
SM		 367 }
368
369 if (copy_to_user(buf, buffer, c)) {
370 err = -EFAULT;
371 break;
372 }
373 *ppos += c;
374 buf += c;
375 cnt += c;
376 count -= c;
377 }
378
379 kfree(buffer);
380
381 return (err) ? err : cnt;
382}
383
384static ssize_t
385smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
386 loff_t *ppos)
387{
388 unsigned long p = *ppos;
389
390 u32 *buffer, *src;
391 u32 __iomem *dst;
392 int c, i, cnt = 0, err = 0;
393 unsigned long total_size;
394
395 if (!info || !info->screen_base)
396 return -ENODEV;
397
398 if (info->state != FBINFO_STATE_RUNNING)
399 return -EPERM;
400
401 total_size = info->screen_size;
402
403 if (total_size == 0)
404 total_size = info->fix.smem_len;
405
406 if (p > total_size)
407 return -EFBIG;
408
409 if (count > total_size) {
410 err = -EFBIG;
411 count = total_size;
412 }
413
414 if (count + p > total_size) {
415 if (!err)
416 err = -ENOSPC;
417
418 count = total_size - p;
419 }
420
421 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
422 if (!buffer)
423 return -ENOMEM;
424
425 dst = (u32 __iomem *) (info->screen_base + p);
426
427 if (info->fbops->fb_sync)
428 info->fbops->fb_sync(info);
429
430 while (count) {
431 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
432 src = buffer;
433
434 if (copy_from_user(src, buf, c)) {
435 err = -EFAULT;
436 break;
437 }
438
439 for (i = c >> 2; i--;) {
440 fb_writel((*src & 0xff00ff00 >> 8) |
441 (*src & 0x00ff00ff << 8), dst++);
442 src++;
443 }
444 if (c & 3) {
53f54a48
SM		 445 u8 *src8 = (u8 *)src;
446 u8 __iomem *dst8 = (u8 __iomem *)dst;
a8e8f89d
SM		 447
448 for (i = c & 3; i--;) {
449 if (i & 1) {
450 fb_writeb(*src8++, ++dst8);
451 } else {
452 fb_writeb(*src8++, --dst8);
453 dst8 += 2;
454 }
455 }
53f54a48 456 dst = (u32 __iomem *)dst8;
a8e8f89d
SM		 457 }
458
459 *ppos += c;
460 buf += c;
461 cnt += c;
462 count -= c;
463 }
464
465 kfree(buffer);
466
467 return (cnt) ? cnt : err;
468}
469#endif /* ! __BIG_ENDIAN */
470
471static void sm7xx_set_timing(struct smtcfb_info *sfb)
472{
473 int i = 0, j = 0;
c4d50767 474 u32 m_nscreenstride;
a8e8f89d
SM		 475
476 dev_dbg(&sfb->pdev->dev,
477 "sfb->width=%d sfb->height=%d sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
478 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
479
c4d50767
SM		 480 for (j = 0; j < numvgamodes; j++) {
481 if (vgamode[j].mmsizex == sfb->width &&
482 vgamode[j].mmsizey == sfb->height &&
483 vgamode[j].bpp == sfb->fb.var.bits_per_pixel &&
484 vgamode[j].hz == sfb->hz) {
a8e8f89d 485 dev_dbg(&sfb->pdev->dev,
c4d50767
SM		 486 "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n",
487 vgamode[j].mmsizex, vgamode[j].mmsizey,
488 vgamode[j].bpp, vgamode[j].hz);
a8e8f89d 489
c4d50767 490 dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j);
a8e8f89d
SM		 491
492 smtc_mmiowb(0x0, 0x3c6);
493
494 smtc_seqw(0, 0x1);
495
c4d50767 496 smtc_mmiowb(vgamode[j].init_misc, 0x3c2);
a8e8f89d
SM		 497
498 /* init SEQ register SR00 - SR04 */
499 for (i = 0; i < SIZE_SR00_SR04; i++)
c4d50767 500 smtc_seqw(i, vgamode[j].init_sr00_sr04[i]);
a8e8f89d
SM		 501
502 /* init SEQ register SR10 - SR24 */
503 for (i = 0; i < SIZE_SR10_SR24; i++)
504 smtc_seqw(i + 0x10,
c4d50767 505 vgamode[j].init_sr10_sr24[i]);
a8e8f89d
SM		 506
507 /* init SEQ register SR30 - SR75 */
508 for (i = 0; i < SIZE_SR30_SR75; i++)
509 if ((i + 0x30) != 0x62 &&
510 (i + 0x30) != 0x6a &&
511 (i + 0x30) != 0x6b)
512 smtc_seqw(i + 0x30,
c4d50767 513 vgamode[j].init_sr30_sr75[i]);
a8e8f89d
SM		 514
515 /* init SEQ register SR80 - SR93 */
516 for (i = 0; i < SIZE_SR80_SR93; i++)
517 smtc_seqw(i + 0x80,
c4d50767 518 vgamode[j].init_sr80_sr93[i]);
a8e8f89d
SM		 519
520 /* init SEQ register SRA0 - SRAF */
521 for (i = 0; i < SIZE_SRA0_SRAF; i++)
522 smtc_seqw(i + 0xa0,
c4d50767 523 vgamode[j].init_sra0_sraf[i]);
a8e8f89d
SM		 524
525 /* init Graphic register GR00 - GR08 */
526 for (i = 0; i < SIZE_GR00_GR08; i++)
c4d50767 527 smtc_grphw(i, vgamode[j].init_gr00_gr08[i]);
a8e8f89d
SM		 528
529 /* init Attribute register AR00 - AR14 */
530 for (i = 0; i < SIZE_AR00_AR14; i++)
c4d50767 531 smtc_attrw(i, vgamode[j].init_ar00_ar14[i]);
a8e8f89d
SM		 532
533 /* init CRTC register CR00 - CR18 */
534 for (i = 0; i < SIZE_CR00_CR18; i++)
c4d50767 535 smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]);
a8e8f89d
SM		 536
537 /* init CRTC register CR30 - CR4D */
538 for (i = 0; i < SIZE_CR30_CR4D; i++)
539 smtc_crtcw(i + 0x30,
c4d50767 540 vgamode[j].init_cr30_cr4d[i]);
a8e8f89d
SM		 541
542 /* init CRTC register CR90 - CRA7 */
543 for (i = 0; i < SIZE_CR90_CRA7; i++)
544 smtc_crtcw(i + 0x90,
c4d50767 545 vgamode[j].init_cr90_cra7[i]);
a8e8f89d
SM		 546 }
547 }
548 smtc_mmiowb(0x67, 0x3c2);
549
550 /* set VPR registers */
551 writel(0x0, sfb->vp_regs + 0x0C);
552 writel(0x0, sfb->vp_regs + 0x40);
553
554 /* set data width */
c4d50767 555 m_nscreenstride =
a8e8f89d
SM		 556 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
557 switch (sfb->fb.var.bits_per_pixel) {
558 case 8:
559 writel(0x0, sfb->vp_regs + 0x0);
560 break;
561 case 16:
562 writel(0x00020000, sfb->vp_regs + 0x0);
563 break;
564 case 24:
565 writel(0x00040000, sfb->vp_regs + 0x0);
566 break;
567 case 32:
568 writel(0x00030000, sfb->vp_regs + 0x0);
569 break;
570 }
c4d50767 571 writel((u32) (((m_nscreenstride + 2) << 16) | m_nscreenstride),
a8e8f89d 572 sfb->vp_regs + 0x10);
a8e8f89d
SM		 573}
574
575static void smtc_set_timing(struct smtcfb_info *sfb)
576{
577 switch (sfb->chip_id) {
578 case 0x710:
579 case 0x712:
580 case 0x720:
581 sm7xx_set_timing(sfb);
582 break;
583 }
584}
585
586static void smtcfb_setmode(struct smtcfb_info *sfb)
587{
588 switch (sfb->fb.var.bits_per_pixel) {
589 case 32:
590 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
591 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
592 sfb->fb.var.red.length = 8;
593 sfb->fb.var.green.length = 8;
594 sfb->fb.var.blue.length = 8;
595 sfb->fb.var.red.offset = 16;
596 sfb->fb.var.green.offset = 8;
597 sfb->fb.var.blue.offset = 0;
598 break;
599 case 24:
600 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
601 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
602 sfb->fb.var.red.length = 8;
603 sfb->fb.var.green.length = 8;
604 sfb->fb.var.blue.length = 8;
605 sfb->fb.var.red.offset = 16;
606 sfb->fb.var.green.offset = 8;
607 sfb->fb.var.blue.offset = 0;
608 break;
609 case 8:
610 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
611 sfb->fb.fix.line_length = sfb->fb.var.xres;
612 sfb->fb.var.red.length = 3;
613 sfb->fb.var.green.length = 3;
614 sfb->fb.var.blue.length = 2;
615 sfb->fb.var.red.offset = 5;
616 sfb->fb.var.green.offset = 2;
617 sfb->fb.var.blue.offset = 0;
618 break;
619 case 16:
620 default:
621 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
622 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
623 sfb->fb.var.red.length = 5;
624 sfb->fb.var.green.length = 6;
625 sfb->fb.var.blue.length = 5;
626 sfb->fb.var.red.offset = 11;
627 sfb->fb.var.green.offset = 5;
628 sfb->fb.var.blue.offset = 0;
629 break;
630 }
631
632 sfb->width = sfb->fb.var.xres;
633 sfb->height = sfb->fb.var.yres;
634 sfb->hz = 60;
635 smtc_set_timing(sfb);
636}
637
638static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
639{
640 /* sanity checks */
641 if (var->xres_virtual < var->xres)
642 var->xres_virtual = var->xres;
643
644 if (var->yres_virtual < var->yres)
645 var->yres_virtual = var->yres;
646
647 /* set valid default bpp */
648 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
649 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
650 var->bits_per_pixel = 16;
651
652 return 0;
653}
654
655static int smtc_set_par(struct fb_info *info)
656{
657 smtcfb_setmode(info->par);
658
659 return 0;
660}
661
662static struct fb_ops smtcfb_ops = {
663 .owner = THIS_MODULE,
664 .fb_check_var = smtc_check_var,
665 .fb_set_par = smtc_set_par,
666 .fb_setcolreg = smtc_setcolreg,
667 .fb_blank = smtc_blank,
668 .fb_fillrect = cfb_fillrect,
669 .fb_imageblit = cfb_imageblit,
670 .fb_copyarea = cfb_copyarea,
671#ifdef __BIG_ENDIAN
672 .fb_read = smtcfb_read,
673 .fb_write = smtcfb_write,
674#endif
675};
676
677/*
678 * alloc struct smtcfb_info and assign default values
679 */
680static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
681{
682 struct smtcfb_info *sfb;
683
684 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
685
686 if (!sfb)
687 return NULL;
688
689 sfb->pdev = pdev;
690
691 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
692 sfb->fb.fbops = &smtcfb_ops;
693 sfb->fb.fix = smtcfb_fix;
694 sfb->fb.var = smtcfb_var;
695 sfb->fb.pseudo_palette = sfb->colreg;
696 sfb->fb.par = sfb;
697
698 return sfb;
699}
700
701/*
702 * free struct smtcfb_info
703 */
704static void smtc_free_fb_info(struct smtcfb_info *sfb)
705{
706 kfree(sfb);
707}
708
709/*
710 * Unmap in the memory mapped IO registers
711 */
712
713static void smtc_unmap_mmio(struct smtcfb_info *sfb)
714{
74121898
SM		 715 if (sfb && smtc_regbaseaddress)
716 smtc_regbaseaddress = NULL;
a8e8f89d
SM		 717}
718
719/*
720 * Map in the screen memory
721 */
722
723static int smtc_map_smem(struct smtcfb_info *sfb,
f049a526 724 struct pci_dev *pdev, u_long smem_len)
a8e8f89d 725{
a8e8f89d
SM		 726 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
727
728#ifdef __BIG_ENDIAN
729 if (sfb->fb.var.bits_per_pixel == 32)
730 sfb->fb.fix.smem_start += 0x800000;
731#endif
732
733 sfb->fb.fix.smem_len = smem_len;
734
735 sfb->fb.screen_base = sfb->lfb;
736
737 if (!sfb->fb.screen_base) {
738 dev_err(&pdev->dev,
739 "%s: unable to map screen memory\n", sfb->fb.fix.id);
740 return -ENOMEM;
741 }
742
743 return 0;
744}
745
746/*
747 * Unmap in the screen memory
748 *
749 */
750static void smtc_unmap_smem(struct smtcfb_info *sfb)
751{
752 if (sfb && sfb->fb.screen_base) {
753 iounmap(sfb->fb.screen_base);
754 sfb->fb.screen_base = NULL;
755 }
756}
757
758/*
759 * We need to wake up the device and make sure its in linear memory mode.
760 */
761static inline void sm7xx_init_hw(void)
762{
763 outb_p(0x18, 0x3c4);
764 outb_p(0x11, 0x3c5);
765}
766
767static int smtcfb_pci_probe(struct pci_dev *pdev,
f049a526 768 const struct pci_device_id *ent)
a8e8f89d
SM		 769{
770 struct smtcfb_info *sfb;
771 u_long smem_size = 0x00800000; /* default 8MB */
772 int err;
773 unsigned long mmio_base;
774
775 dev_info(&pdev->dev, "Silicon Motion display driver.");
776
777 err = pci_enable_device(pdev); /* enable SMTC chip */
778 if (err)
779 return err;
780
781 sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
782
783 sfb = smtc_alloc_fb_info(pdev);
784
785 if (!sfb) {
786 err = -ENOMEM;
787 goto failed_free;
788 }
789
790 sfb->chip_id = ent->device;
791
792 pci_set_drvdata(pdev, sfb);
793
794 sm7xx_init_hw();
795
796 /* get mode parameter from smtc_scr_info */
797 if (smtc_scr_info.lfb_width != 0) {
798 sfb->fb.var.xres = smtc_scr_info.lfb_width;
799 sfb->fb.var.yres = smtc_scr_info.lfb_height;
800 sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
801 } else {
802 /* default resolution 1024x600 16bit mode */
803 sfb->fb.var.xres = SCREEN_X_RES;
804 sfb->fb.var.yres = SCREEN_Y_RES;
805 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
806 }
807
808#ifdef __BIG_ENDIAN
809 if (sfb->fb.var.bits_per_pixel == 24)
810 sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
811#endif
812 /* Map address and memory detection */
813 mmio_base = pci_resource_start(pdev, 0);
814 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
815
816 switch (sfb->chip_id) {
817 case 0x710:
818 case 0x712:
819 sfb->fb.fix.mmio_start = mmio_base + 0x00400000;
820 sfb->fb.fix.mmio_len = 0x00400000;
821 smem_size = SM712_VIDEOMEMORYSIZE;
822#ifdef __BIG_ENDIAN
823 sfb->lfb = ioremap(mmio_base, 0x00c00000);
824#else
825 sfb->lfb = ioremap(mmio_base, 0x00800000);
826#endif
74121898 827 sfb->mmio = (smtc_regbaseaddress =
a8e8f89d
SM		 828 sfb->lfb + 0x00700000);
829 sfb->dp_regs = sfb->lfb + 0x00408000;
830 sfb->vp_regs = sfb->lfb + 0x0040c000;
831#ifdef __BIG_ENDIAN
832 if (sfb->fb.var.bits_per_pixel == 32) {
833 sfb->lfb += 0x800000;
834 dev_info(&pdev->dev, "sfb->lfb=%p", sfb->lfb);
835 }
836#endif
74121898 837 if (!smtc_regbaseaddress) {
a8e8f89d
SM		 838 dev_err(&pdev->dev,
839 "%s: unable to map memory mapped IO!",
840 sfb->fb.fix.id);
841 err = -ENOMEM;
842 goto failed_fb;
843 }
844
845 /* set MCLK = 14.31818 * (0x16 / 0x2) */
846 smtc_seqw(0x6a, 0x16);
847 smtc_seqw(0x6b, 0x02);
848 smtc_seqw(0x62, 0x3e);
849 /* enable PCI burst */
850 smtc_seqw(0x17, 0x20);
851 /* enable word swap */
852#ifdef __BIG_ENDIAN
853 if (sfb->fb.var.bits_per_pixel == 32)
854 smtc_seqw(0x17, 0x30);
855#endif
856 break;
857 case 0x720:
858 sfb->fb.fix.mmio_start = mmio_base;
859 sfb->fb.fix.mmio_len = 0x00200000;
860 smem_size = SM722_VIDEOMEMORYSIZE;
861 sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
862 sfb->lfb = sfb->dp_regs + 0x00200000;
74121898 863 sfb->mmio = (smtc_regbaseaddress =
a8e8f89d
SM		 864 sfb->dp_regs + 0x000c0000);
865 sfb->vp_regs = sfb->dp_regs + 0x800;
866
867 smtc_seqw(0x62, 0xff);
868 smtc_seqw(0x6a, 0x0d);
869 smtc_seqw(0x6b, 0x02);
870 break;
871 default:
872 dev_err(&pdev->dev,
873 "No valid Silicon Motion display chip was detected!");
874
875 goto failed_fb;
876 }
877
878 /* can support 32 bpp */
879 if (15 == sfb->fb.var.bits_per_pixel)
880 sfb->fb.var.bits_per_pixel = 16;
881
882 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
883 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
884 err = smtc_map_smem(sfb, pdev, smem_size);
885 if (err)
886 goto failed;
887
888 smtcfb_setmode(sfb);
889
890 err = register_framebuffer(&sfb->fb);
891 if (err < 0)
892 goto failed;
893
894 dev_info(&pdev->dev,
895 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
896 sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
897 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
898
899 return 0;
900
901failed:
902 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
903
904 smtc_unmap_smem(sfb);
905 smtc_unmap_mmio(sfb);
906failed_fb:
907 smtc_free_fb_info(sfb);
908
909failed_free:
910 pci_disable_device(pdev);
911
912 return err;
913}
914
915/*
916 * 0x710 (LynxEM)
917 * 0x712 (LynxEM+)
918 * 0x720 (Lynx3DM, Lynx3DM+)
919 */
920static const struct pci_device_id smtcfb_pci_table[] = {
921 { PCI_DEVICE(0x126f, 0x710), },
922 { PCI_DEVICE(0x126f, 0x712), },
923 { PCI_DEVICE(0x126f, 0x720), },
924 {0,}
925};
926
927static void smtcfb_pci_remove(struct pci_dev *pdev)
928{
929 struct smtcfb_info *sfb;
930
931 sfb = pci_get_drvdata(pdev);
932 smtc_unmap_smem(sfb);
933 smtc_unmap_mmio(sfb);
934 unregister_framebuffer(&sfb->fb);
935 smtc_free_fb_info(sfb);
936}
937
938#ifdef CONFIG_PM
939static int smtcfb_pci_suspend(struct device *device)
940{
941 struct pci_dev *pdev = to_pci_dev(device);
942 struct smtcfb_info *sfb;
943
944 sfb = pci_get_drvdata(pdev);
945
946 /* set the hw in sleep mode use external clock and self memory refresh
947 * so that we can turn off internal PLLs later on
948 */
949 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
950 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
951
952 console_lock();
953 fb_set_suspend(&sfb->fb, 1);
954 console_unlock();
955
956 /* additionally turn off all function blocks including internal PLLs */
957 smtc_seqw(0x21, 0xff);
958
959 return 0;
960}
961
962static int smtcfb_pci_resume(struct device *device)
963{
964 struct pci_dev *pdev = to_pci_dev(device);
965 struct smtcfb_info *sfb;
966
967 sfb = pci_get_drvdata(pdev);
968
969 /* reinit hardware */
970 sm7xx_init_hw();
971 switch (sfb->chip_id) {
972 case 0x710:
973 case 0x712:
974 /* set MCLK = 14.31818 * (0x16 / 0x2) */
975 smtc_seqw(0x6a, 0x16);
976 smtc_seqw(0x6b, 0x02);
977 smtc_seqw(0x62, 0x3e);
978 /* enable PCI burst */
979 smtc_seqw(0x17, 0x20);
980#ifdef __BIG_ENDIAN
981 if (sfb->fb.var.bits_per_pixel == 32)
982 smtc_seqw(0x17, 0x30);
983#endif
984 break;
985 case 0x720:
986 smtc_seqw(0x62, 0xff);
987 smtc_seqw(0x6a, 0x0d);
988 smtc_seqw(0x6b, 0x02);
989 break;
990 }
991
992 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
993 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
994
995 smtcfb_setmode(sfb);
996
997 console_lock();
998 fb_set_suspend(&sfb->fb, 0);
999 console_unlock();
1000
1001 return 0;
1002}
1003
1004static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
1005#define SM7XX_PM_OPS (&sm7xx_pm_ops)
1006
1007#else /* !CONFIG_PM */
1008
1009#define SM7XX_PM_OPS NULL
1010
1011#endif /* !CONFIG_PM */
1012
1013static struct pci_driver smtcfb_driver = {
1014 .name = "smtcfb",
1015 .id_table = smtcfb_pci_table,
1016 .probe = smtcfb_pci_probe,
1017 .remove = smtcfb_pci_remove,
1018 .driver.pm = SM7XX_PM_OPS,
1019};
1020
c65434eb
SM		 1021static int __init sm712fb_init(void)
1022{
1023#ifndef MODULE
1024 char *option = NULL;
1025
1026 if (fb_get_options("sm712fb", &option))
1027 return -ENODEV;
1028 if (option && *option)
1029 mode_option = option;
1030#endif
1031 sm7xx_vga_setup(mode_option);
1032
1033 return pci_register_driver(&smtcfb_driver);
1034}
1035
1036module_init(sm712fb_init);
1037
1038static void __exit sm712fb_exit(void)
1039{
1040 pci_unregister_driver(&smtcfb_driver);
1041}
1042
1043module_exit(sm712fb_exit);
a8e8f89d
SM		 1044
1045MODULE_AUTHOR("Siliconmotion ");
1046MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1047MODULE_LICENSE("GPL");
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