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a17a75e2 MW |
1 | #ifndef _VME_H_ |
2 | #define _VME_H_ | |
3 | ||
4 | /* Resource Type */ | |
5 | enum vme_resource_type { | |
6 | VME_MASTER, | |
7 | VME_SLAVE, | |
42fb5031 MW |
8 | VME_DMA, |
9 | VME_LM | |
a17a75e2 MW |
10 | }; |
11 | ||
12 | /* VME Address Spaces */ | |
13 | typedef u32 vme_address_t; | |
14 | #define VME_A16 0x1 | |
15 | #define VME_A24 0x2 | |
16 | #define VME_A32 0x4 | |
17 | #define VME_A64 0x8 | |
18 | #define VME_CRCSR 0x10 | |
19 | #define VME_USER1 0x20 | |
20 | #define VME_USER2 0x40 | |
21 | #define VME_USER3 0x80 | |
22 | #define VME_USER4 0x100 | |
23 | ||
24 | #define VME_A16_MAX 0x10000ULL | |
25 | #define VME_A24_MAX 0x1000000ULL | |
26 | #define VME_A32_MAX 0x100000000ULL | |
27 | #define VME_A64_MAX 0x10000000000000000ULL | |
28 | #define VME_CRCSR_MAX 0x1000000ULL | |
29 | ||
30 | ||
31 | /* VME Cycle Types */ | |
32 | typedef u32 vme_cycle_t; | |
33 | #define VME_SCT 0x1 | |
34 | #define VME_BLT 0x2 | |
35 | #define VME_MBLT 0x4 | |
36 | #define VME_2eVME 0x8 | |
37 | #define VME_2eSST 0x10 | |
38 | #define VME_2eSSTB 0x20 | |
39 | ||
40 | #define VME_2eSST160 0x100 | |
41 | #define VME_2eSST267 0x200 | |
42 | #define VME_2eSST320 0x400 | |
43 | ||
44 | #define VME_SUPER 0x1000 | |
45 | #define VME_USER 0x2000 | |
46 | #define VME_PROG 0x4000 | |
47 | #define VME_DATA 0x8000 | |
48 | ||
49 | /* VME Data Widths */ | |
50 | typedef u32 vme_width_t; | |
51 | #define VME_D8 0x1 | |
52 | #define VME_D16 0x2 | |
53 | #define VME_D32 0x4 | |
54 | #define VME_D64 0x8 | |
55 | ||
56 | /* Arbitration Scheduling Modes */ | |
57 | typedef u32 vme_arbitration_t; | |
58 | #define VME_R_ROBIN_MODE 0x1 | |
59 | #define VME_PRIORITY_MODE 0x2 | |
60 | ||
61 | typedef u32 vme_dma_t; | |
62 | #define VME_DMA_PATTERN (1<<0) | |
63 | #define VME_DMA_PCI (1<<1) | |
64 | #define VME_DMA_VME (1<<2) | |
65 | ||
66 | typedef u32 vme_pattern_t; | |
67 | #define VME_DMA_PATTERN_BYTE (1<<0) | |
68 | #define VME_DMA_PATTERN_WORD (1<<1) | |
69 | #define VME_DMA_PATTERN_INCREMENT (1<<2) | |
70 | ||
4f723df4 MW |
71 | typedef u32 vme_dma_route_t; |
72 | #define VME_DMA_VME_TO_MEM (1<<0) | |
73 | #define VME_DMA_MEM_TO_VME (1<<1) | |
74 | #define VME_DMA_VME_TO_VME (1<<2) | |
75 | #define VME_DMA_MEM_TO_MEM (1<<3) | |
76 | #define VME_DMA_PATTERN_TO_VME (1<<4) | |
77 | #define VME_DMA_PATTERN_TO_MEM (1<<5) | |
78 | ||
a17a75e2 MW |
79 | struct vme_dma_attr { |
80 | vme_dma_t type; | |
81 | void *private; | |
82 | }; | |
83 | ||
84 | struct vme_resource { | |
85 | enum vme_resource_type type; | |
86 | struct list_head *entry; | |
87 | }; | |
88 | ||
89 | extern struct bus_type vme_bus_type; | |
90 | ||
5d6abf37 MV |
91 | /* VME_MAX_BRIDGES comes from the type of vme_bus_numbers */ |
92 | #define VME_MAX_BRIDGES (sizeof(unsigned int)*8) | |
93 | #define VME_MAX_SLOTS 32 | |
94 | ||
a37b0dad MW |
95 | #define VME_SLOT_CURRENT -1 |
96 | #define VME_SLOT_ALL -2 | |
97 | ||
8f966dc4 MV |
98 | /** |
99 | * VME device identifier structure | |
5d6abf37 | 100 | * @num: The device ID (ranges from 0 to N-1 for N devices) |
8f966dc4 MV |
101 | * @bus: The bus ID of the bus the device is on |
102 | * @slot: The slot this device is plugged into | |
103 | */ | |
a17a75e2 | 104 | struct vme_device_id { |
5d6abf37 | 105 | int num; |
a17a75e2 MW |
106 | int bus; |
107 | int slot; | |
108 | }; | |
109 | ||
8f966dc4 MV |
110 | /** |
111 | * Structure representing a VME device | |
112 | * @id: The ID of the device (currently the bus and slot number) | |
113 | * @bridge: Pointer to the bridge device this device is on | |
114 | * @dev: Internal device structure | |
5d6abf37 MV |
115 | * @drv_list: List of devices (per driver) |
116 | * @bridge_list: List of devices (per bridge) | |
8f966dc4 MV |
117 | */ |
118 | struct vme_dev { | |
119 | struct vme_device_id id; | |
120 | struct vme_bridge *bridge; | |
121 | struct device dev; | |
5d6abf37 MV |
122 | struct list_head drv_list; |
123 | struct list_head bridge_list; | |
8f966dc4 MV |
124 | }; |
125 | ||
a17a75e2 MW |
126 | struct vme_driver { |
127 | struct list_head node; | |
584721ca | 128 | const char *name; |
5d6abf37 MV |
129 | int (*match)(struct vme_dev *); |
130 | int (*probe)(struct vme_dev *); | |
131 | int (*remove)(struct vme_dev *); | |
132 | void (*shutdown)(void); | |
133 | struct device_driver driver; | |
134 | struct list_head devices; | |
a17a75e2 MW |
135 | }; |
136 | ||
ead1f3e3 | 137 | void *vme_alloc_consistent(struct vme_resource *, size_t, dma_addr_t *); |
a17a75e2 MW |
138 | void vme_free_consistent(struct vme_resource *, size_t, void *, |
139 | dma_addr_t); | |
140 | ||
141 | size_t vme_get_size(struct vme_resource *); | |
142 | ||
8f966dc4 | 143 | struct vme_resource *vme_slave_request(struct vme_dev *, vme_address_t, |
ead1f3e3 MW |
144 | vme_cycle_t); |
145 | int vme_slave_set(struct vme_resource *, int, unsigned long long, | |
a17a75e2 | 146 | unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); |
ead1f3e3 | 147 | int vme_slave_get(struct vme_resource *, int *, unsigned long long *, |
a17a75e2 MW |
148 | unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *); |
149 | void vme_slave_free(struct vme_resource *); | |
150 | ||
8f966dc4 | 151 | struct vme_resource *vme_master_request(struct vme_dev *, vme_address_t, |
ead1f3e3 MW |
152 | vme_cycle_t, vme_width_t); |
153 | int vme_master_set(struct vme_resource *, int, unsigned long long, | |
a17a75e2 | 154 | unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); |
ead1f3e3 | 155 | int vme_master_get(struct vme_resource *, int *, unsigned long long *, |
a17a75e2 MW |
156 | unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *); |
157 | ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t); | |
158 | ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t); | |
ead1f3e3 | 159 | unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int, |
a17a75e2 MW |
160 | unsigned int, loff_t); |
161 | void vme_master_free(struct vme_resource *); | |
162 | ||
8f966dc4 | 163 | struct vme_resource *vme_dma_request(struct vme_dev *, vme_dma_route_t); |
a17a75e2 MW |
164 | struct vme_dma_list *vme_new_dma_list(struct vme_resource *); |
165 | struct vme_dma_attr *vme_dma_pattern_attribute(u32, vme_pattern_t); | |
166 | struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t); | |
167 | struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, vme_address_t, | |
168 | vme_cycle_t, vme_width_t); | |
169 | void vme_dma_free_attribute(struct vme_dma_attr *); | |
170 | int vme_dma_list_add(struct vme_dma_list *, struct vme_dma_attr *, | |
171 | struct vme_dma_attr *, size_t); | |
172 | int vme_dma_list_exec(struct vme_dma_list *); | |
173 | int vme_dma_list_free(struct vme_dma_list *); | |
174 | int vme_dma_free(struct vme_resource *); | |
175 | ||
8f966dc4 | 176 | int vme_irq_request(struct vme_dev *, int, int, |
a17a75e2 | 177 | void (*callback)(int, int, void *), void *); |
8f966dc4 MV |
178 | void vme_irq_free(struct vme_dev *, int, int); |
179 | int vme_irq_generate(struct vme_dev *, int, int); | |
a17a75e2 | 180 | |
8f966dc4 | 181 | struct vme_resource * vme_lm_request(struct vme_dev *); |
42fb5031 MW |
182 | int vme_lm_count(struct vme_resource *); |
183 | int vme_lm_set(struct vme_resource *, unsigned long long, vme_address_t, | |
184 | vme_cycle_t); | |
185 | int vme_lm_get(struct vme_resource *, unsigned long long *, vme_address_t *, | |
a17a75e2 | 186 | vme_cycle_t *); |
42fb5031 MW |
187 | int vme_lm_attach(struct vme_resource *, int, void (*callback)(int)); |
188 | int vme_lm_detach(struct vme_resource *, int); | |
189 | void vme_lm_free(struct vme_resource *); | |
a17a75e2 | 190 | |
8f966dc4 | 191 | int vme_slot_get(struct vme_dev *); |
a17a75e2 | 192 | |
5d6abf37 | 193 | int vme_register_driver(struct vme_driver *, unsigned int); |
ead1f3e3 | 194 | void vme_unregister_driver(struct vme_driver *); |
a17a75e2 MW |
195 | |
196 | ||
197 | #endif /* _VME_H_ */ | |
198 |