[mirror_ubuntu-artful-kernel.git] / drivers / staging / vt6655 / device.h

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 * File: device.h
 *
 * Purpose: MAC Data structure
 *
 * Author: Tevin Chen
 *
 * Date: Mar 17, 1997
 *
 */

#ifndef __DEVICE_H__
#define __DEVICE_H__

#include <linux/module.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/string.h>
#include <linux/wait.h>
#include <linux/if_arp.h>
#include <linux/sched.h>
#include <linux/io.h>
#include <linux/if.h>
#include <linux/crc32.h>
#include <linux/uaccess.h>
#include <linux/proc_fs.h>
#include <linux/inetdevice.h>
#include <linux/reboot.h>
#include <linux/ethtool.h>
/* Include Wireless Extension definition and check version - Jean II */
#include <net/mac80211.h>
#include <linux/wireless.h>
#include <net/iw_handler.h>	/* New driver API */

#ifndef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
#define WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
#endif

/* device specific */

#include "device_cfg.h"
#include "card.h"
#include "mib.h"
#include "srom.h"
#include "desc.h"
#include "key.h"
#include "mac.h"

/*---------------------  Export Definitions -------------------------*/

#define RATE_1M		0
#define RATE_2M		1
#define RATE_5M		2
#define RATE_11M	3
#define RATE_6M		4
#define RATE_9M		5
#define RATE_12M	6
#define RATE_18M	7
#define RATE_24M	8
#define RATE_36M	9
#define RATE_48M	10
#define RATE_54M	11
#define RATE_AUTO	12
#define MAX_RATE	12

#define MAC_MAX_CONTEXT_REG     (256+128)

#define MAX_MULTICAST_ADDRESS_NUM       32
#define MULTICAST_ADDRESS_LIST_SIZE     (MAX_MULTICAST_ADDRESS_NUM * ETH_ALEN)

#define DUPLICATE_RX_CACHE_LENGTH       5

#define NUM_KEY_ENTRY                   11

#define TX_WEP_NONE                     0
#define TX_WEP_OTF                      1
#define TX_WEP_SW                       2
#define TX_WEP_SWOTP                    3
#define TX_WEP_OTPSW                    4
#define TX_WEP_SW232                    5

#define KEYSEL_WEP40                    0
#define KEYSEL_WEP104                   1
#define KEYSEL_TKIP                     2
#define KEYSEL_CCMP                     3

#define AUTO_FB_NONE            0
#define AUTO_FB_0               1
#define AUTO_FB_1               2

#define FB_RATE0                0
#define FB_RATE1                1

/* Antenna Mode */
#define ANT_A                   0
#define ANT_B                   1
#define ANT_DIVERSITY           2
#define ANT_RXD_TXA             3
#define ANT_RXD_TXB             4
#define ANT_UNKNOWN             0xFF

#define MAXCHECKHANGCNT         4

#define BB_VGA_LEVEL            4
#define BB_VGA_CHANGE_THRESHOLD 16

#ifndef RUN_AT
#define RUN_AT(x)                       (jiffies+(x))
#endif

#define MAKE_BEACON_RESERVED	10  /* (us) */

/* DMA related */
#define RESERV_AC0DMA                   4

/* BUILD OBJ mode */

#define	AVAIL_TD(p, q)	((p)->sOpts.nTxDescs[(q)] - ((p)->iTDUsed[(q)]))

#define	NUM				64

/* 0:11A 1:11B 2:11G */
#define BB_TYPE_11A    0
#define BB_TYPE_11B    1
#define BB_TYPE_11G    2

/* 0:11a, 1:11b, 2:11gb (only CCK in BasicRate), 3:11ga (OFDM in BasicRate) */
#define PK_TYPE_11A     0
#define PK_TYPE_11B     1
#define PK_TYPE_11GB    2
#define PK_TYPE_11GA    3

typedef struct __chip_info_tbl {
	CHIP_TYPE   chip_id;
	char *name;
	int         io_size;
	int         nTxQueue;
	u32         flags;
} CHIP_INFO, *PCHIP_INFO;

typedef enum {
	OWNED_BY_HOST = 0,
	OWNED_BY_NIC = 1
} DEVICE_OWNER_TYPE, *PDEVICE_OWNER_TYPE;

/* flags for options */
#define     DEVICE_FLAGS_IP_ALIGN        0x00000001UL
#define     DEVICE_FLAGS_PREAMBLE_TYPE   0x00000002UL
#define     DEVICE_FLAGS_OP_MODE         0x00000004UL
#define     DEVICE_FLAGS_PS_MODE         0x00000008UL
#define		DEVICE_FLAGS_80211h_MODE	 0x00000010UL
#define		DEVICE_FLAGS_DiversityANT	 0x00000020UL

/* flags for driver status */
#define     DEVICE_FLAGS_OPENED          0x00010000UL
#define     DEVICE_FLAGS_WOL_ENABLED     0x00080000UL
/* flags for capabilities */
#define     DEVICE_FLAGS_TX_ALIGN        0x01000000UL
#define     DEVICE_FLAGS_HAVE_CAM        0x02000000UL
#define     DEVICE_FLAGS_FLOW_CTRL       0x04000000UL

/* flags for MII status */
#define     DEVICE_LINK_FAIL             0x00000001UL
#define     DEVICE_SPEED_10              0x00000002UL
#define     DEVICE_SPEED_100             0x00000004UL
#define     DEVICE_SPEED_1000            0x00000008UL
#define     DEVICE_DUPLEX_FULL           0x00000010UL
#define     DEVICE_AUTONEG_ENABLE        0x00000020UL
#define     DEVICE_FORCED_BY_EEPROM      0x00000040UL
/* for device_set_media_duplex */
#define     DEVICE_LINK_CHANGE           0x00000001UL

typedef struct __device_opt {
	int         nRxDescs0;		/* Number of RX descriptors0 */
	int         nRxDescs1;		/* Number of RX descriptors1 */
	int         nTxDescs[2];	/* Number of TX descriptors 0, 1 */
	int         int_works;		/* interrupt limits */
	int         short_retry;
	int         long_retry;
	int         bbp_type;
	u32         flags;
} OPTIONS, *POPTIONS;

struct vnt_private {
	struct pci_dev *pcid;
	/* mac80211 */
	struct ieee80211_hw *hw;
	struct ieee80211_vif *vif;
	unsigned long key_entry_inuse;
	u32 basic_rates;
	u16 current_aid;
	int mc_list_count;
	u8 mac_hw;

/* dma addr, rx/tx pool */
	dma_addr_t                  pool_dma;
	dma_addr_t                  rd0_pool_dma;
	dma_addr_t                  rd1_pool_dma;

	dma_addr_t                  td0_pool_dma;
	dma_addr_t                  td1_pool_dma;

	dma_addr_t                  tx_bufs_dma0;
	dma_addr_t                  tx_bufs_dma1;
	dma_addr_t                  tx_beacon_dma;

	unsigned char *tx0_bufs;
	unsigned char *tx1_bufs;
	unsigned char *tx_beacon_bufs;

	CHIP_TYPE                   chip_id;

	void __iomem                *PortOffset;
	unsigned long dwIsr;
	u32                         memaddr;
	u32                         ioaddr;
	u32                         io_size;

	unsigned char byRevId;
	unsigned char byRxMode;
	unsigned short SubSystemID;
	unsigned short SubVendorID;

	spinlock_t                  lock;

	int                         nTxQueues;
	volatile int                iTDUsed[TYPE_MAXTD];

	volatile PSTxDesc           apCurrTD[TYPE_MAXTD];
	volatile PSTxDesc           apTailTD[TYPE_MAXTD];

	volatile PSTxDesc           apTD0Rings;
	volatile PSTxDesc           apTD1Rings;

	volatile PSRxDesc           aRD0Ring;
	volatile PSRxDesc           aRD1Ring;
	volatile PSRxDesc           pCurrRD[TYPE_MAXRD];

	OPTIONS                     sOpts;

	u32                         flags;

	u32                         rx_buf_sz;
	u8 rx_rate;
	int                         multicast_limit;

	u32                         rx_bytes;

	/* Version control */
	unsigned char byLocalID;
	unsigned char byRFType;

	unsigned char byMaxPwrLevel;
	unsigned char byZoneType;
	bool bZoneRegExist;
	unsigned char byOriginalZonetype;

	unsigned char abyCurrentNetAddr[ETH_ALEN]; __aligned(2)
	bool bLinkPass;          /* link status: OK or fail */

	/* Adapter statistics */
	SStatCounter                scStatistic;
	/* 802.11 counter */
	SDot11Counters              s802_11Counter;

	unsigned int	uCurrRSSI;
	unsigned char byCurrSQ;

	unsigned long dwTxAntennaSel;
	unsigned long dwRxAntennaSel;
	unsigned char byAntennaCount;
	unsigned char byRxAntennaMode;
	unsigned char byTxAntennaMode;
	bool bTxRxAntInv;

	unsigned char *pbyTmpBuff;
	unsigned int	uSIFS;    /* Current SIFS */
	unsigned int	uDIFS;    /* Current DIFS */
	unsigned int	uEIFS;    /* Current EIFS */
	unsigned int	uSlot;    /* Current SlotTime */
	unsigned int	uCwMin;   /* Current CwMin */
	unsigned int	uCwMax;   /* CwMax is fixed on 1023. */
	/* PHY parameter */
	unsigned char bySIFS;
	unsigned char byDIFS;
	unsigned char byEIFS;
	unsigned char bySlot;
	unsigned char byCWMaxMin;

	u8		byBBType; /* 0:11A, 1:11B, 2:11G */
	u8		byPacketType; /*
				       * 0:11a,1:11b,2:11gb (only CCK
				       * in BasicRate), 3:11ga (OFDM in
				       * Basic Rate)
				       */
	unsigned short wBasicRate;
	unsigned char byACKRate;
	unsigned char byTopOFDMBasicRate;
	unsigned char byTopCCKBasicRate;

	unsigned char byMinChannel;
	unsigned char byMaxChannel;

	unsigned char byPreambleType;
	unsigned char byShortPreamble;

	unsigned short wCurrentRate;
	unsigned char byShortRetryLimit;
	unsigned char byLongRetryLimit;
	enum nl80211_iftype op_mode;
	bool bBSSIDFilter;
	unsigned short wMaxTransmitMSDULifetime;

	bool bEncryptionEnable;
	bool bLongHeader;
	bool bShortSlotTime;
	bool bProtectMode;
	bool bNonERPPresent;
	bool bBarkerPreambleMd;

	bool bRadioControlOff;
	bool bRadioOff;
	bool bEnablePSMode;
	unsigned short wListenInterval;
	bool bPWBitOn;

	/* GPIO Radio Control */
	unsigned char byRadioCtl;
	unsigned char byGPIO;
	bool bHWRadioOff;
	bool bPrvActive4RadioOFF;
	bool bGPIOBlockRead;

	/* Beacon related */
	unsigned short wSeqCounter;
	unsigned short wBCNBufLen;
	bool bBeaconBufReady;
	bool bBeaconSent;
	bool bIsBeaconBufReadySet;
	unsigned int	cbBeaconBufReadySetCnt;
	bool bFixRate;
	unsigned char byCurrentCh;

	bool bAES;

	unsigned char byAutoFBCtrl;

	/* For Update BaseBand VGA Gain Offset */
	bool bUpdateBBVGA;
	unsigned int	uBBVGADiffCount;
	unsigned char byBBVGANew;
	unsigned char byBBVGACurrent;
	unsigned char abyBBVGA[BB_VGA_LEVEL];
	long                    ldBmThreshold[BB_VGA_LEVEL];

	unsigned char byBBPreEDRSSI;
	unsigned char byBBPreEDIndex;

	unsigned long dwDiagRefCount;

	/* For FOE Tuning */
	unsigned char byFOETuning;

	/* For RF Power table */
	unsigned char byCCKPwr;
	unsigned char byOFDMPwrG;
	unsigned char byCurPwr;
	char	 byCurPwrdBm;
	unsigned char abyCCKPwrTbl[CB_MAX_CHANNEL_24G+1];
	unsigned char abyOFDMPwrTbl[CB_MAX_CHANNEL+1];
	char	abyCCKDefaultPwr[CB_MAX_CHANNEL_24G+1];
	char	abyOFDMDefaultPwr[CB_MAX_CHANNEL+1];
	char	abyRegPwr[CB_MAX_CHANNEL+1];
	char	abyLocalPwr[CB_MAX_CHANNEL+1];

	/* BaseBand Loopback Use */
	unsigned char byBBCR4d;
	unsigned char byBBCRc9;
	unsigned char byBBCR88;
	unsigned char byBBCR09;

	bool bDiversityRegCtlON;
	bool bDiversityEnable;
	unsigned long ulDiversityNValue;
	unsigned long ulDiversityMValue;
	unsigned char byTMax;
	unsigned char byTMax2;
	unsigned char byTMax3;
	unsigned long ulSQ3TH;

	/* ANT diversity */
	unsigned long uDiversityCnt;
	unsigned char byAntennaState;
	unsigned long ulRatio_State0;
	unsigned long ulRatio_State1;

	/* SQ3 functions for antenna diversity */
	struct timer_list           TimerSQ3Tmax1;
	struct timer_list           TimerSQ3Tmax2;
	struct timer_list           TimerSQ3Tmax3;

	unsigned long uNumSQ3[MAX_RATE];
	unsigned short wAntDiversityMaxRate;

	unsigned char abyEEPROM[EEP_MAX_CONTEXT_SIZE]; /* unsigned long alignment */

	unsigned short wBeaconInterval;
};

static inline PDEVICE_RD_INFO alloc_rd_info(void)
{
	return kzalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC);
}

static inline PDEVICE_TD_INFO alloc_td_info(void)
{
	return kzalloc(sizeof(DEVICE_TD_INFO), GFP_ATOMIC);
}
#endif
Commit	Line	Data
5449c685 FB	1	/*
	2	* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
	3	* All rights reserved.
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License along
	16	* with this program; if not, write to the Free Software Foundation, Inc.,
	17	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
	18	*
	19	* File: device.h
	20	*
	21	* Purpose: MAC Data structure
	22	*
	23	* Author: Tevin Chen
	24	*
	25	* Date: Mar 17, 1997
	26	*
	27	*/
	28
	29	#ifndef __DEVICE_H__
	30	#define __DEVICE_H__
	31
5449c685	32	#include <linux/module.h>
5449c685	33	#include <linux/types.h>
5449c685 FB	34	#include <linux/mm.h>
	35	#include <linux/errno.h>
	36	#include <linux/ioport.h>
	37	#include <linux/pci.h>
	38	#include <linux/kernel.h>
	39	#include <linux/netdevice.h>
	40	#include <linux/etherdevice.h>
	41	#include <linux/skbuff.h>
	42	#include <linux/delay.h>
	43	#include <linux/timer.h>
	44	#include <linux/slab.h>
	45	#include <linux/interrupt.h>
5449c685 FB	46	#include <linux/string.h>
	47	#include <linux/wait.h>
	48	#include <linux/if_arp.h>
	49	#include <linux/sched.h>
cf160bc9	50	#include <linux/io.h>
5449c685	51	#include <linux/if.h>
b39d60c1	52	#include <linux/crc32.h>
cf160bc9	53	#include <linux/uaccess.h>
5449c685 FB	54	#include <linux/proc_fs.h>
	55	#include <linux/inetdevice.h>
	56	#include <linux/reboot.h>
5449c685	57	#include <linux/ethtool.h>
5449c685	58	/* Include Wireless Extension definition and check version - Jean II */
33b1c8c1	59	#include <net/mac80211.h>
5449c685	60	#include <linux/wireless.h>
81a4e959	61	#include <net/iw_handler.h> /* New driver API */
5449c685	62
5449c685 FB	63	#ifndef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
	64	#define WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
	65	#endif
5449c685	66
81a4e959	67	/* device specific */
612822f5	68
5449c685	69	#include "device_cfg.h"
33785983	70	#include "card.h"
5449c685	71	#include "mib.h"
5449c685	72	#include "srom.h"
5449c685	73	#include "desc.h"
5449c685	74	#include "key.h"
5449c685	75	#include "mac.h"
5449c685	76
5449c685 FB	77	/--------------------- Export Definitions -------------------------/
5449c685 FB	78
b0437f28 MP	79	#define RATE_1M 0
	80	#define RATE_2M 1
	81	#define RATE_5M 2
	82	#define RATE_11M 3
	83	#define RATE_6M 4
	84	#define RATE_9M 5
	85	#define RATE_12M 6
	86	#define RATE_18M 7
	87	#define RATE_24M 8
	88	#define RATE_36M 9
	89	#define RATE_48M 10
	90	#define RATE_54M 11
	91	#define RATE_AUTO 12
	92	#define MAX_RATE 12
	93
5449c685 FB	94	#define MAC_MAX_CONTEXT_REG (256+128)
	95
	96	#define MAX_MULTICAST_ADDRESS_NUM 32
078b078f	97	#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * ETH_ALEN)
5449c685	98
5449c685 FB	99	#define DUPLICATE_RX_CACHE_LENGTH 5
	100
	101	#define NUM_KEY_ENTRY 11
	102
	103	#define TX_WEP_NONE 0
	104	#define TX_WEP_OTF 1
	105	#define TX_WEP_SW 2
	106	#define TX_WEP_SWOTP 3
	107	#define TX_WEP_OTPSW 4
	108	#define TX_WEP_SW232 5
	109
	110	#define KEYSEL_WEP40 0
	111	#define KEYSEL_WEP104 1
	112	#define KEYSEL_TKIP 2
	113	#define KEYSEL_CCMP 3
	114
5449c685 FB	115	#define AUTO_FB_NONE 0
	116	#define AUTO_FB_0 1
	117	#define AUTO_FB_1 2
	118
	119	#define FB_RATE0 0
	120	#define FB_RATE1 1
	121
81a4e959	122	/* Antenna Mode */
5449c685 FB	123	#define ANT_A 0
	124	#define ANT_B 1
	125	#define ANT_DIVERSITY 2
	126	#define ANT_RXD_TXA 3
	127	#define ANT_RXD_TXB 4
	128	#define ANT_UNKNOWN 0xFF
	129
	130	#define MAXCHECKHANGCNT 4
	131
	132	#define BB_VGA_LEVEL 4
	133	#define BB_VGA_CHANGE_THRESHOLD 16
	134
5449c685 FB	135	#ifndef RUN_AT
	136	#define RUN_AT(x) (jiffies+(x))
	137	#endif
	138
c3fb4642 MP	139	#define MAKE_BEACON_RESERVED 10 /* (us) */
c3fb4642 MP	140
81a4e959	141	/* DMA related */
5449c685 FB	142	#define RESERV_AC0DMA 4
5449c685 FB	143
81a4e959	144	/* BUILD OBJ mode */
5449c685	145
4ec4aa4a	146	#define AVAIL_TD(p, q) ((p)->sOpts.nTxDescs[(q)] - ((p)->iTDUsed[(q)]))
5449c685	147
5449c685	148	#define NUM 64
5449c685	149
81a4e959	150	/* 0:11A 1:11B 2:11G */
ff8d9f08 MP	151	#define BB_TYPE_11A 0
	152	#define BB_TYPE_11B 1
	153	#define BB_TYPE_11G 2
5449c685	154
bf8918de MP	155	/* 0:11a, 1:11b, 2:11gb (only CCK in BasicRate), 3:11ga (OFDM in BasicRate) */
	156	#define PK_TYPE_11A 0
	157	#define PK_TYPE_11B 1
	158	#define PK_TYPE_11GB 2
	159	#define PK_TYPE_11GA 3
5449c685	160
4ec4aa4a JP	161	typedef struct __chip_info_tbl {
	162	CHIP_TYPE chip_id;
	163	char *name;
	164	int io_size;
	165	int nTxQueue;
	166	u32 flags;
5449c685 FB	167	} CHIP_INFO, *PCHIP_INFO;
5449c685 FB	168
5449c685	169	typedef enum {
4ec4aa4a JP	170	OWNED_BY_HOST = 0,
4ec4aa4a JP	171	OWNED_BY_NIC = 1
5449c685 FB	172	} DEVICE_OWNER_TYPE, *PDEVICE_OWNER_TYPE;
5449c685 FB	173
81a4e959	174	/* flags for options */
5449c685 FB	175	#define DEVICE_FLAGS_IP_ALIGN 0x00000001UL
	176	#define DEVICE_FLAGS_PREAMBLE_TYPE 0x00000002UL
	177	#define DEVICE_FLAGS_OP_MODE 0x00000004UL
	178	#define DEVICE_FLAGS_PS_MODE 0x00000008UL
	179	#define DEVICE_FLAGS_80211h_MODE 0x00000010UL
	180	#define DEVICE_FLAGS_DiversityANT 0x00000020UL
	181
81a4e959	182	/* flags for driver status */
5449c685 FB	183	#define DEVICE_FLAGS_OPENED 0x00010000UL
5449c685 FB	184	#define DEVICE_FLAGS_WOL_ENABLED 0x00080000UL
81a4e959	185	/* flags for capabilities */
5449c685 FB	186	#define DEVICE_FLAGS_TX_ALIGN 0x01000000UL
	187	#define DEVICE_FLAGS_HAVE_CAM 0x02000000UL
	188	#define DEVICE_FLAGS_FLOW_CTRL 0x04000000UL
	189
81a4e959	190	/* flags for MII status */
5449c685 FB	191	#define DEVICE_LINK_FAIL 0x00000001UL
	192	#define DEVICE_SPEED_10 0x00000002UL
	193	#define DEVICE_SPEED_100 0x00000004UL
	194	#define DEVICE_SPEED_1000 0x00000008UL
	195	#define DEVICE_DUPLEX_FULL 0x00000010UL
	196	#define DEVICE_AUTONEG_ENABLE 0x00000020UL
	197	#define DEVICE_FORCED_BY_EEPROM 0x00000040UL
81a4e959	198	/* for device_set_media_duplex */
5449c685 FB	199	#define DEVICE_LINK_CHANGE 0x00000001UL
5449c685 FB	200
5449c685	201	typedef struct __device_opt {
81a4e959 VK	202	int nRxDescs0; /* Number of RX descriptors0 */
	203	int nRxDescs1; /* Number of RX descriptors1 */
	204	int nTxDescs[2]; /* Number of TX descriptors 0, 1 */
	205	int int_works; /* interrupt limits */
4ec4aa4a JP	206	int short_retry;
	207	int long_retry;
	208	int bbp_type;
	209	u32 flags;
5449c685 FB	210	} OPTIONS, *POPTIONS;
5449c685 FB	211
80f598ae	212	struct vnt_private {
4ec4aa4a	213	struct pci_dev *pcid;
33b1c8c1 MP	214	/* mac80211 */
	215	struct ieee80211_hw *hw;
	216	struct ieee80211_vif *vif;
fee7506a	217	unsigned long key_entry_inuse;
67013f2c	218	u32 basic_rates;
89cf9be6	219	u16 current_aid;
67013f2c MP	220	int mc_list_count;
67013f2c MP	221	u8 mac_hw;
5449c685	222
81a4e959	223	/* dma addr, rx/tx pool */
4ec4aa4a JP	224	dma_addr_t pool_dma;
	225	dma_addr_t rd0_pool_dma;
	226	dma_addr_t rd1_pool_dma;
5449c685	227
4ec4aa4a JP	228	dma_addr_t td0_pool_dma;
4ec4aa4a JP	229	dma_addr_t td1_pool_dma;
5449c685	230
4ec4aa4a JP	231	dma_addr_t tx_bufs_dma0;
	232	dma_addr_t tx_bufs_dma1;
	233	dma_addr_t tx_beacon_dma;
5449c685	234
4ec4aa4a JP	235	unsigned char *tx0_bufs;
	236	unsigned char *tx1_bufs;
	237	unsigned char *tx_beacon_bufs;
5449c685	238
4ec4aa4a	239	CHIP_TYPE chip_id;
5449c685	240
16834405	241	void __iomem *PortOffset;
4ec4aa4a JP	242	unsigned long dwIsr;
	243	u32 memaddr;
	244	u32 ioaddr;
	245	u32 io_size;
5449c685	246
4ec4aa4a	247	unsigned char byRevId;
2359b5c2	248	unsigned char byRxMode;
4ec4aa4a JP	249	unsigned short SubSystemID;
4ec4aa4a JP	250	unsigned short SubVendorID;
5449c685	251
2359b5c2 AM	252	spinlock_t lock;
2359b5c2 AM	253
4ec4aa4a JP	254	int nTxQueues;
4ec4aa4a JP	255	volatile int iTDUsed[TYPE_MAXTD];
5449c685	256
4ec4aa4a JP	257	volatile PSTxDesc apCurrTD[TYPE_MAXTD];
4ec4aa4a JP	258	volatile PSTxDesc apTailTD[TYPE_MAXTD];
5449c685	259
4ec4aa4a JP	260	volatile PSTxDesc apTD0Rings;
4ec4aa4a JP	261	volatile PSTxDesc apTD1Rings;
5449c685	262
4ec4aa4a JP	263	volatile PSRxDesc aRD0Ring;
	264	volatile PSRxDesc aRD1Ring;
	265	volatile PSRxDesc pCurrRD[TYPE_MAXRD];
5449c685	266
4ec4aa4a	267	OPTIONS sOpts;
5449c685	268
4ec4aa4a	269	u32 flags;
5449c685	270
4ec4aa4a	271	u32 rx_buf_sz;
33b1c8c1	272	u8 rx_rate;
4ec4aa4a	273	int multicast_limit;
9a802f2e	274
4ec4aa4a JP	275	u32 rx_bytes;
4ec4aa4a JP	276
81a4e959	277	/* Version control */
4ec4aa4a JP	278	unsigned char byLocalID;
	279	unsigned char byRFType;
	280
	281	unsigned char byMaxPwrLevel;
	282	unsigned char byZoneType;
	283	bool bZoneRegExist;
	284	unsigned char byOriginalZonetype;
14676105	285
c397d46f	286	unsigned char abyCurrentNetAddr[ETH_ALEN]; __aligned(2)
81a4e959	287	bool bLinkPass; /* link status: OK or fail */
4ec4aa4a	288
81a4e959	289	/* Adapter statistics */
4ec4aa4a	290	SStatCounter scStatistic;
81a4e959	291	/* 802.11 counter */
4ec4aa4a JP	292	SDot11Counters s802_11Counter;
4ec4aa4a JP	293
4ec4aa4a JP	294	unsigned int uCurrRSSI;
	295	unsigned char byCurrSQ;
	296
	297	unsigned long dwTxAntennaSel;
	298	unsigned long dwRxAntennaSel;
	299	unsigned char byAntennaCount;
	300	unsigned char byRxAntennaMode;
	301	unsigned char byTxAntennaMode;
	302	bool bTxRxAntInv;
	303
	304	unsigned char *pbyTmpBuff;
81a4e959 VK	305	unsigned int uSIFS; /* Current SIFS */
	306	unsigned int uDIFS; /* Current DIFS */
	307	unsigned int uEIFS; /* Current EIFS */
	308	unsigned int uSlot; /* Current SlotTime */
	309	unsigned int uCwMin; /* Current CwMin */
	310	unsigned int uCwMax; /* CwMax is fixed on 1023. */
	311	/* PHY parameter */
4ec4aa4a JP	312	unsigned char bySIFS;
	313	unsigned char byDIFS;
	314	unsigned char byEIFS;
	315	unsigned char bySlot;
	316	unsigned char byCWMaxMin;
81a4e959	317
ff8d9f08	318	u8 byBBType; /* 0:11A, 1:11B, 2:11G */
bf8918de MP	319	u8 byPacketType; /*
	320	* 0:11a,1:11b,2:11gb (only CCK
	321	* in BasicRate), 3:11ga (OFDM in
	322	* Basic Rate)
	323	*/
4ec4aa4a JP	324	unsigned short wBasicRate;
	325	unsigned char byACKRate;
	326	unsigned char byTopOFDMBasicRate;
	327	unsigned char byTopCCKBasicRate;
	328
	329	unsigned char byMinChannel;
	330	unsigned char byMaxChannel;
4ec4aa4a JP	331
	332	unsigned char byPreambleType;
	333	unsigned char byShortPreamble;
	334
	335	unsigned short wCurrentRate;
4ec4aa4a JP	336	unsigned char byShortRetryLimit;
4ec4aa4a JP	337	unsigned char byLongRetryLimit;
a9873673	338	enum nl80211_iftype op_mode;
4ec4aa4a JP	339	bool bBSSIDFilter;
4ec4aa4a JP	340	unsigned short wMaxTransmitMSDULifetime;
4ec4aa4a	341
4ec4aa4a JP	342	bool bEncryptionEnable;
	343	bool bLongHeader;
	344	bool bShortSlotTime;
	345	bool bProtectMode;
	346	bool bNonERPPresent;
	347	bool bBarkerPreambleMd;
	348
4ec4aa4a JP	349	bool bRadioControlOff;
	350	bool bRadioOff;
	351	bool bEnablePSMode;
	352	unsigned short wListenInterval;
	353	bool bPWBitOn;
4ec4aa4a	354
81a4e959	355	/* GPIO Radio Control */
4ec4aa4a JP	356	unsigned char byRadioCtl;
	357	unsigned char byGPIO;
	358	bool bHWRadioOff;
	359	bool bPrvActive4RadioOFF;
	360	bool bGPIOBlockRead;
	361
81a4e959	362	/* Beacon related */
4ec4aa4a JP	363	unsigned short wSeqCounter;
	364	unsigned short wBCNBufLen;
	365	bool bBeaconBufReady;
	366	bool bBeaconSent;
	367	bool bIsBeaconBufReadySet;
	368	unsigned int cbBeaconBufReadySetCnt;
	369	bool bFixRate;
	370	unsigned char byCurrentCh;
5449c685	371
4ec4aa4a	372	bool bAES;
5449c685	373
4ec4aa4a	374	unsigned char byAutoFBCtrl;
5449c685	375
81a4e959	376	/* For Update BaseBand VGA Gain Offset */
4ec4aa4a JP	377	bool bUpdateBBVGA;
	378	unsigned int uBBVGADiffCount;
	379	unsigned char byBBVGANew;
	380	unsigned char byBBVGACurrent;
	381	unsigned char abyBBVGA[BB_VGA_LEVEL];
	382	long ldBmThreshold[BB_VGA_LEVEL];
5449c685	383
4ec4aa4a JP	384	unsigned char byBBPreEDRSSI;
4ec4aa4a JP	385	unsigned char byBBPreEDIndex;
5449c685	386
4ec4aa4a	387	unsigned long dwDiagRefCount;
5449c685	388
81a4e959	389	/* For FOE Tuning */
4ec4aa4a	390	unsigned char byFOETuning;
5449c685	391
81a4e959	392	/* For RF Power table */
4ec4aa4a JP	393	unsigned char byCCKPwr;
	394	unsigned char byOFDMPwrG;
	395	unsigned char byCurPwr;
	396	char byCurPwrdBm;
	397	unsigned char abyCCKPwrTbl[CB_MAX_CHANNEL_24G+1];
	398	unsigned char abyOFDMPwrTbl[CB_MAX_CHANNEL+1];
	399	char abyCCKDefaultPwr[CB_MAX_CHANNEL_24G+1];
	400	char abyOFDMDefaultPwr[CB_MAX_CHANNEL+1];
	401	char abyRegPwr[CB_MAX_CHANNEL+1];
	402	char abyLocalPwr[CB_MAX_CHANNEL+1];
5449c685	403
81a4e959	404	/* BaseBand Loopback Use */
4ec4aa4a JP	405	unsigned char byBBCR4d;
	406	unsigned char byBBCRc9;
	407	unsigned char byBBCR88;
	408	unsigned char byBBCR09;
5449c685	409
4ec4aa4a JP	410	bool bDiversityRegCtlON;
	411	bool bDiversityEnable;
	412	unsigned long ulDiversityNValue;
	413	unsigned long ulDiversityMValue;
	414	unsigned char byTMax;
	415	unsigned char byTMax2;
	416	unsigned char byTMax3;
	417	unsigned long ulSQ3TH;
5449c685	418
81a4e959	419	/* ANT diversity */
4ec4aa4a JP	420	unsigned long uDiversityCnt;
	421	unsigned char byAntennaState;
	422	unsigned long ulRatio_State0;
	423	unsigned long ulRatio_State1;
	424
81a4e959	425	/* SQ3 functions for antenna diversity */
4ec4aa4a JP	426	struct timer_list TimerSQ3Tmax1;
	427	struct timer_list TimerSQ3Tmax2;
	428	struct timer_list TimerSQ3Tmax3;
	429
4ec4aa4a JP	430	unsigned long uNumSQ3[MAX_RATE];
	431	unsigned short wAntDiversityMaxRate;
	432
81a4e959	433	unsigned char abyEEPROM[EEP_MAX_CONTEXT_SIZE]; /* unsigned long alignment */
4ec4aa4a	434
4ec4aa4a	435	unsigned short wBeaconInterval;
80f598ae	436	};
5449c685	437
8473f654 DN	438	static inline PDEVICE_RD_INFO alloc_rd_info(void)
	439	{
	440	return kzalloc(sizeof(DEVICE_RD_INFO), GFP_ATOMIC);
5449c685 FB	441	}
5449c685 FB	442
d1b46e75 DN	443	static inline PDEVICE_TD_INFO alloc_td_info(void)
	444	{
	445	return kzalloc(sizeof(DEVICE_TD_INFO), GFP_ATOMIC);
5449c685	446	}
5449c685	447	#endif