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5449c685 FB |
1 | /* |
2 | * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. | |
3 | * All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along | |
16 | * with this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * File: device_main.c | |
20 | * | |
21 | * Purpose: driver entry for initial, open, close, tx and rx. | |
22 | * | |
23 | * Author: Lyndon Chen | |
24 | * | |
25 | * Date: Jan 8, 2003 | |
26 | * | |
27 | * Functions: | |
28 | * | |
013a468c CC |
29 | * vt6655_probe - module initial (insmod) driver entry |
30 | * vt6655_remove - module remove entry | |
31 | * vt6655_init_info - device structure resource allocation function | |
5449c685 FB |
32 | * device_free_info - device structure resource free function |
33 | * device_get_pci_info - get allocated pci io/mem resource | |
34 | * device_print_info - print out resource | |
5449c685 | 35 | * device_rx_srv - rx service function |
5449c685 | 36 | * device_alloc_rx_buf - rx buffer pre-allocated function |
5449c685 | 37 | * device_free_tx_buf - free tx buffer function |
5449c685 FB |
38 | * device_init_rd0_ring- initial rd dma0 ring |
39 | * device_init_rd1_ring- initial rd dma1 ring | |
40 | * device_init_td0_ring- initial tx dma0 ring buffer | |
41 | * device_init_td1_ring- initial tx dma1 ring buffer | |
42 | * device_init_registers- initial MAC & BBP & RF internal registers. | |
43 | * device_init_rings- initial tx/rx ring buffer | |
5449c685 FB |
44 | * device_free_rings- free all allocated ring buffer |
45 | * device_tx_srv- tx interrupt service function | |
46 | * | |
47 | * Revision History: | |
48 | */ | |
49 | #undef __NO_VERSION__ | |
50 | ||
f805442e | 51 | #include <linux/file.h> |
5449c685 | 52 | #include "device.h" |
5449c685 | 53 | #include "card.h" |
79566eb2 | 54 | #include "channel.h" |
5449c685 | 55 | #include "baseband.h" |
5449c685 | 56 | #include "mac.h" |
5449c685 | 57 | #include "power.h" |
5449c685 | 58 | #include "rxtx.h" |
5449c685 | 59 | #include "dpc.h" |
5449c685 | 60 | #include "rf.h" |
5449c685 FB |
61 | #include <linux/delay.h> |
62 | #include <linux/kthread.h> | |
5a0e3ad6 | 63 | #include <linux/slab.h> |
5449c685 | 64 | |
5449c685 | 65 | /*--------------------- Static Definitions -------------------------*/ |
bb72dd53 AS |
66 | /* |
67 | * Define module options | |
68 | */ | |
5449c685 FB |
69 | MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>"); |
70 | MODULE_LICENSE("GPL"); | |
71 | MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver"); | |
5449c685 | 72 | |
915006cd | 73 | #define DEVICE_PARAM(N, D) |
5449c685 FB |
74 | |
75 | #define RX_DESC_MIN0 16 | |
76 | #define RX_DESC_MAX0 128 | |
77 | #define RX_DESC_DEF0 32 | |
915006cd | 78 | DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0"); |
5449c685 FB |
79 | |
80 | #define RX_DESC_MIN1 16 | |
81 | #define RX_DESC_MAX1 128 | |
82 | #define RX_DESC_DEF1 32 | |
915006cd | 83 | DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1"); |
5449c685 FB |
84 | |
85 | #define TX_DESC_MIN0 16 | |
86 | #define TX_DESC_MAX0 128 | |
87 | #define TX_DESC_DEF0 32 | |
915006cd | 88 | DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0"); |
5449c685 FB |
89 | |
90 | #define TX_DESC_MIN1 16 | |
91 | #define TX_DESC_MAX1 128 | |
92 | #define TX_DESC_DEF1 64 | |
915006cd | 93 | DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1"); |
5449c685 | 94 | |
5449c685 FB |
95 | #define INT_WORKS_DEF 20 |
96 | #define INT_WORKS_MIN 10 | |
97 | #define INT_WORKS_MAX 64 | |
98 | ||
915006cd | 99 | DEVICE_PARAM(int_works, "Number of packets per interrupt services"); |
5449c685 | 100 | |
5449c685 FB |
101 | #define RTS_THRESH_DEF 2347 |
102 | ||
5449c685 FB |
103 | #define FRAG_THRESH_DEF 2346 |
104 | ||
5449c685 FB |
105 | #define SHORT_RETRY_MIN 0 |
106 | #define SHORT_RETRY_MAX 31 | |
107 | #define SHORT_RETRY_DEF 8 | |
108 | ||
5449c685 FB |
109 | DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits"); |
110 | ||
111 | #define LONG_RETRY_MIN 0 | |
112 | #define LONG_RETRY_MAX 15 | |
113 | #define LONG_RETRY_DEF 4 | |
114 | ||
5449c685 FB |
115 | DEVICE_PARAM(LongRetryLimit, "long frame retry limits"); |
116 | ||
5449c685 FB |
117 | /* BasebandType[] baseband type selected |
118 | 0: indicate 802.11a type | |
119 | 1: indicate 802.11b type | |
120 | 2: indicate 802.11g type | |
121 | */ | |
122 | #define BBP_TYPE_MIN 0 | |
123 | #define BBP_TYPE_MAX 2 | |
124 | #define BBP_TYPE_DEF 2 | |
125 | ||
126 | DEVICE_PARAM(BasebandType, "baseband type"); | |
127 | ||
bb72dd53 AS |
128 | /* |
129 | * Static vars definitions | |
130 | */ | |
915006cd JP |
131 | static CHIP_INFO chip_info_table[] = { |
132 | { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ", | |
133 | 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN }, | |
134 | {0, NULL} | |
5449c685 FB |
135 | }; |
136 | ||
9e4c5c28 | 137 | static const struct pci_device_id vt6655_pci_id_table[] = { |
db6cb903 JL |
138 | { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table}, |
139 | { 0, } | |
5449c685 | 140 | }; |
5449c685 FB |
141 | |
142 | /*--------------------- Static Functions --------------------------*/ | |
143 | ||
013a468c | 144 | static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent); |
3f8597f4 MP |
145 | static void vt6655_init_info(struct pci_dev *pcid, |
146 | struct vnt_private **ppDevice, PCHIP_INFO); | |
147 | static void device_free_info(struct vnt_private *pDevice); | |
148 | static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid); | |
149 | static void device_print_info(struct vnt_private *pDevice); | |
5449c685 | 150 | |
3f8597f4 MP |
151 | static void device_init_rd0_ring(struct vnt_private *pDevice); |
152 | static void device_init_rd1_ring(struct vnt_private *pDevice); | |
3f8597f4 MP |
153 | static void device_init_td0_ring(struct vnt_private *pDevice); |
154 | static void device_init_td1_ring(struct vnt_private *pDevice); | |
5449c685 | 155 | |
3f8597f4 MP |
156 | static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx); |
157 | static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx); | |
158 | static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc); | |
159 | static void device_init_registers(struct vnt_private *pDevice); | |
160 | static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc); | |
161 | static void device_free_td0_ring(struct vnt_private *pDevice); | |
162 | static void device_free_td1_ring(struct vnt_private *pDevice); | |
163 | static void device_free_rd0_ring(struct vnt_private *pDevice); | |
164 | static void device_free_rd1_ring(struct vnt_private *pDevice); | |
165 | static void device_free_rings(struct vnt_private *pDevice); | |
5449c685 | 166 | |
5449c685 FB |
167 | /*--------------------- Export Variables --------------------------*/ |
168 | ||
169 | /*--------------------- Export Functions --------------------------*/ | |
170 | ||
915006cd | 171 | static char *get_chip_name(int chip_id) |
3ac9e0fd DN |
172 | { |
173 | int i; | |
6b711271 | 174 | |
3ac9e0fd DN |
175 | for (i = 0; chip_info_table[i].name != NULL; i++) |
176 | if (chip_info_table[i].chip_id == chip_id) | |
177 | break; | |
178 | return chip_info_table[i].name; | |
5449c685 FB |
179 | } |
180 | ||
f4e1b7c8 | 181 | static void vt6655_remove(struct pci_dev *pcid) |
5449c685 | 182 | { |
3f8597f4 | 183 | struct vnt_private *pDevice = pci_get_drvdata(pcid); |
5449c685 | 184 | |
3ac9e0fd DN |
185 | if (pDevice == NULL) |
186 | return; | |
187 | device_free_info(pDevice); | |
5449c685 FB |
188 | } |
189 | ||
46fa0ec0 | 190 | static void device_get_options(struct vnt_private *pDevice) |
bf76ebd9 DN |
191 | { |
192 | POPTIONS pOpts = &(pDevice->sOpts); | |
193 | ||
194 | pOpts->nRxDescs0 = RX_DESC_DEF0; | |
195 | pOpts->nRxDescs1 = RX_DESC_DEF1; | |
196 | pOpts->nTxDescs[0] = TX_DESC_DEF0; | |
197 | pOpts->nTxDescs[1] = TX_DESC_DEF1; | |
bf76ebd9 | 198 | pOpts->int_works = INT_WORKS_DEF; |
bf76ebd9 | 199 | |
bf76ebd9 DN |
200 | pOpts->short_retry = SHORT_RETRY_DEF; |
201 | pOpts->long_retry = LONG_RETRY_DEF; | |
202 | pOpts->bbp_type = BBP_TYPE_DEF; | |
5449c685 FB |
203 | } |
204 | ||
205 | static void | |
3f8597f4 MP |
206 | device_set_options(struct vnt_private *pDevice) |
207 | { | |
915006cd JP |
208 | pDevice->byShortRetryLimit = pDevice->sOpts.short_retry; |
209 | pDevice->byLongRetryLimit = pDevice->sOpts.long_retry; | |
915006cd | 210 | pDevice->byBBType = pDevice->sOpts.bbp_type; |
bf8918de | 211 | pDevice->byPacketType = pDevice->byBBType; |
5449c685 | 212 | pDevice->byAutoFBCtrl = AUTO_FB_0; |
915006cd | 213 | pDevice->bUpdateBBVGA = true; |
915006cd JP |
214 | pDevice->byPreambleType = 0; |
215 | ||
48caf5a0 JP |
216 | pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit); |
217 | pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit); | |
218 | pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType); | |
219 | pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble); | |
48caf5a0 | 220 | pr_debug(" byBBType= %d\n", (int)pDevice->byBBType); |
5449c685 FB |
221 | } |
222 | ||
bb72dd53 AS |
223 | /* |
224 | * Initialisation of MAC & BBP registers | |
225 | */ | |
5449c685 | 226 | |
3f8597f4 | 227 | static void device_init_registers(struct vnt_private *pDevice) |
5449c685 | 228 | { |
10d6f1b7 | 229 | unsigned long flags; |
915006cd JP |
230 | unsigned int ii; |
231 | unsigned char byValue; | |
915006cd JP |
232 | unsigned char byCCKPwrdBm = 0; |
233 | unsigned char byOFDMPwrdBm = 0; | |
6b711271 | 234 | |
915006cd | 235 | MACbShutdown(pDevice->PortOffset); |
a5f0eef3 | 236 | BBvSoftwareReset(pDevice); |
915006cd | 237 | |
9f34de35 MP |
238 | /* Do MACbSoftwareReset in MACvInitialize */ |
239 | MACbSoftwareReset(pDevice->PortOffset); | |
915006cd | 240 | |
9f34de35 | 241 | pDevice->bAES = false; |
915006cd | 242 | |
9f34de35 MP |
243 | /* Only used in 11g type, sync with ERP IE */ |
244 | pDevice->bProtectMode = false; | |
915006cd | 245 | |
9f34de35 MP |
246 | pDevice->bNonERPPresent = false; |
247 | pDevice->bBarkerPreambleMd = false; | |
248 | pDevice->wCurrentRate = RATE_1M; | |
249 | pDevice->byTopOFDMBasicRate = RATE_24M; | |
250 | pDevice->byTopCCKBasicRate = RATE_1M; | |
915006cd | 251 | |
9f34de35 MP |
252 | /* Target to IF pin while programming to RF chip. */ |
253 | pDevice->byRevId = 0; | |
915006cd | 254 | |
9f34de35 MP |
255 | /* init MAC */ |
256 | MACvInitialize(pDevice->PortOffset); | |
257 | ||
258 | /* Get Local ID */ | |
259 | VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID); | |
915006cd | 260 | |
10d6f1b7 | 261 | spin_lock_irqsave(&pDevice->lock, flags); |
915006cd | 262 | |
9f34de35 | 263 | SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM); |
915006cd | 264 | |
10d6f1b7 | 265 | spin_unlock_irqrestore(&pDevice->lock, flags); |
915006cd | 266 | |
9f34de35 MP |
267 | /* Get Channel range */ |
268 | pDevice->byMinChannel = 1; | |
269 | pDevice->byMaxChannel = CB_MAX_CHANNEL; | |
915006cd | 270 | |
9f34de35 MP |
271 | /* Get Antena */ |
272 | byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA); | |
273 | if (byValue & EEP_ANTINV) | |
274 | pDevice->bTxRxAntInv = true; | |
275 | else | |
276 | pDevice->bTxRxAntInv = false; | |
277 | ||
278 | byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN); | |
279 | /* if not set default is All */ | |
280 | if (byValue == 0) | |
281 | byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN); | |
282 | ||
9f34de35 MP |
283 | if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) { |
284 | pDevice->byAntennaCount = 2; | |
285 | pDevice->byTxAntennaMode = ANT_B; | |
286 | pDevice->dwTxAntennaSel = 1; | |
287 | pDevice->dwRxAntennaSel = 1; | |
288 | ||
289 | if (pDevice->bTxRxAntInv) | |
290 | pDevice->byRxAntennaMode = ANT_A; | |
915006cd | 291 | else |
9f34de35 | 292 | pDevice->byRxAntennaMode = ANT_B; |
9f34de35 | 293 | } else { |
9f34de35 MP |
294 | pDevice->byAntennaCount = 1; |
295 | pDevice->dwTxAntennaSel = 0; | |
296 | pDevice->dwRxAntennaSel = 0; | |
915006cd | 297 | |
9f34de35 MP |
298 | if (byValue & EEP_ANTENNA_AUX) { |
299 | pDevice->byTxAntennaMode = ANT_A; | |
915006cd | 300 | |
9f34de35 MP |
301 | if (pDevice->bTxRxAntInv) |
302 | pDevice->byRxAntennaMode = ANT_B; | |
303 | else | |
304 | pDevice->byRxAntennaMode = ANT_A; | |
305 | } else { | |
915006cd | 306 | pDevice->byTxAntennaMode = ANT_B; |
9f34de35 | 307 | |
1208f14a | 308 | if (pDevice->bTxRxAntInv) |
915006cd JP |
309 | pDevice->byRxAntennaMode = ANT_A; |
310 | else | |
311 | pDevice->byRxAntennaMode = ANT_B; | |
915006cd | 312 | } |
9f34de35 | 313 | } |
5449c685 | 314 | |
918185f6 MP |
315 | /* Set initial antenna mode */ |
316 | BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode); | |
317 | BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode); | |
318 | ||
9f34de35 MP |
319 | /* zonetype initial */ |
320 | pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE]; | |
915006cd | 321 | |
9f34de35 MP |
322 | if (!pDevice->bZoneRegExist) |
323 | pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE]; | |
bc5cf656 | 324 | |
48caf5a0 | 325 | pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType); |
915006cd | 326 | |
9f34de35 MP |
327 | /* Init RF module */ |
328 | RFbInit(pDevice); | |
915006cd | 329 | |
9f34de35 MP |
330 | /* Get Desire Power Value */ |
331 | pDevice->byCurPwr = 0xFF; | |
332 | pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK); | |
333 | pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG); | |
f2046f93 | 334 | |
9f34de35 MP |
335 | /* Load power Table */ |
336 | for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) { | |
337 | pDevice->abyCCKPwrTbl[ii + 1] = | |
338 | SROMbyReadEmbedded(pDevice->PortOffset, | |
339 | (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL)); | |
340 | if (pDevice->abyCCKPwrTbl[ii + 1] == 0) | |
341 | pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr; | |
5449c685 | 342 | |
9f34de35 MP |
343 | pDevice->abyOFDMPwrTbl[ii + 1] = |
344 | SROMbyReadEmbedded(pDevice->PortOffset, | |
345 | (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL)); | |
346 | if (pDevice->abyOFDMPwrTbl[ii + 1] == 0) | |
347 | pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG; | |
bc5cf656 | 348 | |
9f34de35 MP |
349 | pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm; |
350 | pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm; | |
351 | } | |
bc5cf656 | 352 | |
9f34de35 | 353 | /* recover 12,13 ,14channel for EUROPE by 11 channel */ |
f4cf678f MP |
354 | for (ii = 11; ii < 14; ii++) { |
355 | pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10]; | |
356 | pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10]; | |
9f34de35 | 357 | } |
5449c685 | 358 | |
9f34de35 MP |
359 | /* Load OFDM A Power Table */ |
360 | for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) { | |
361 | pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] = | |
362 | SROMbyReadEmbedded(pDevice->PortOffset, | |
363 | (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL)); | |
5449c685 | 364 | |
9f34de35 MP |
365 | pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] = |
366 | SROMbyReadEmbedded(pDevice->PortOffset, | |
367 | (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm)); | |
368 | } | |
5449c685 | 369 | |
9f34de35 MP |
370 | if (pDevice->byLocalID > REV_ID_VT3253_B1) { |
371 | MACvSelectPage1(pDevice->PortOffset); | |
5449c685 | 372 | |
9f34de35 MP |
373 | VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1, |
374 | (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN)); | |
5449c685 | 375 | |
9f34de35 MP |
376 | MACvSelectPage0(pDevice->PortOffset); |
377 | } | |
5449c685 | 378 | |
9f34de35 MP |
379 | /* use relative tx timeout and 802.11i D4 */ |
380 | MACvWordRegBitsOn(pDevice->PortOffset, | |
381 | MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT)); | |
5449c685 | 382 | |
9f34de35 MP |
383 | /* set performance parameter by registry */ |
384 | MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit); | |
385 | MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit); | |
5449c685 | 386 | |
9f34de35 MP |
387 | /* reset TSF counter */ |
388 | VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); | |
389 | /* enable TSF counter */ | |
390 | VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); | |
5449c685 | 391 | |
9f34de35 MP |
392 | /* initialize BBP registers */ |
393 | BBbVT3253Init(pDevice); | |
5449c685 | 394 | |
9f34de35 MP |
395 | if (pDevice->bUpdateBBVGA) { |
396 | pDevice->byBBVGACurrent = pDevice->abyBBVGA[0]; | |
397 | pDevice->byBBVGANew = pDevice->byBBVGACurrent; | |
398 | BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]); | |
399 | } | |
5449c685 | 400 | |
a5f0eef3 MP |
401 | BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode); |
402 | BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode); | |
5449c685 | 403 | |
9f34de35 MP |
404 | /* Set BB and packet type at the same time. */ |
405 | /* Set Short Slot Time, xIFS, and RSPINF. */ | |
bfa4b0fe | 406 | pDevice->wCurrentRate = RATE_54M; |
bc5cf656 | 407 | |
9f34de35 | 408 | pDevice->bRadioOff = false; |
5449c685 | 409 | |
9f34de35 MP |
410 | pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset, |
411 | EEP_OFS_RADIOCTL); | |
412 | pDevice->bHWRadioOff = false; | |
5449c685 | 413 | |
9f34de35 MP |
414 | if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) { |
415 | /* Get GPIO */ | |
416 | MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO); | |
417 | ||
418 | if (((pDevice->byGPIO & GPIO0_DATA) && | |
419 | !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) || | |
420 | (!(pDevice->byGPIO & GPIO0_DATA) && | |
421 | (pDevice->byRadioCtl & EEP_RADIOCTL_INV))) | |
915006cd | 422 | pDevice->bHWRadioOff = true; |
915006cd | 423 | } |
9f34de35 | 424 | |
bc5cf656 | 425 | if (pDevice->bHWRadioOff || pDevice->bRadioControlOff) |
915006cd | 426 | CARDbRadioPowerOff(pDevice); |
5449c685 | 427 | |
3500a1da MP |
428 | /* get Permanent network address */ |
429 | SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr); | |
48caf5a0 | 430 | pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr); |
915006cd | 431 | |
3500a1da MP |
432 | /* reset Tx pointer */ |
433 | CARDvSafeResetRx(pDevice); | |
434 | /* reset Rx pointer */ | |
435 | CARDvSafeResetTx(pDevice); | |
5449c685 | 436 | |
3500a1da MP |
437 | if (pDevice->byLocalID <= REV_ID_VT3253_A1) |
438 | MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR); | |
5449c685 | 439 | |
3500a1da MP |
440 | /* Turn On Rx DMA */ |
441 | MACvReceive0(pDevice->PortOffset); | |
442 | MACvReceive1(pDevice->PortOffset); | |
5449c685 | 443 | |
3500a1da MP |
444 | /* start the adapter */ |
445 | MACvStart(pDevice->PortOffset); | |
5449c685 FB |
446 | } |
447 | ||
3f8597f4 | 448 | static void device_print_info(struct vnt_private *pDevice) |
5449c685 | 449 | { |
bc5d431c | 450 | dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id)); |
5449c685 | 451 | |
bc5d431c MP |
452 | dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n", |
453 | pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr, | |
454 | (unsigned long)pDevice->PortOffset, pDevice->pcid->irq); | |
5449c685 FB |
455 | } |
456 | ||
3f8597f4 MP |
457 | static void vt6655_init_info(struct pci_dev *pcid, |
458 | struct vnt_private **ppDevice, | |
459 | PCHIP_INFO pChip_info) | |
460 | { | |
1bd63757 | 461 | memset(*ppDevice, 0, sizeof(**ppDevice)); |
5449c685 | 462 | |
915006cd JP |
463 | (*ppDevice)->pcid = pcid; |
464 | (*ppDevice)->chip_id = pChip_info->chip_id; | |
465 | (*ppDevice)->io_size = pChip_info->io_size; | |
466 | (*ppDevice)->nTxQueues = pChip_info->nTxQueue; | |
467 | (*ppDevice)->multicast_limit = 32; | |
5449c685 | 468 | |
915006cd | 469 | spin_lock_init(&((*ppDevice)->lock)); |
5449c685 FB |
470 | } |
471 | ||
3f8597f4 MP |
472 | static bool device_get_pci_info(struct vnt_private *pDevice, |
473 | struct pci_dev *pcid) | |
84b50762 | 474 | { |
915006cd JP |
475 | u16 pci_cmd; |
476 | u8 b; | |
477 | unsigned int cis_addr; | |
5449c685 | 478 | |
915006cd JP |
479 | pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId); |
480 | pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID); | |
481 | pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID); | |
482 | pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd)); | |
5449c685 | 483 | |
915006cd | 484 | pci_set_master(pcid); |
5449c685 | 485 | |
915006cd JP |
486 | pDevice->memaddr = pci_resource_start(pcid, 0); |
487 | pDevice->ioaddr = pci_resource_start(pcid, 1); | |
5449c685 | 488 | |
915006cd | 489 | cis_addr = pci_resource_start(pcid, 2); |
5449c685 | 490 | |
915006cd | 491 | pDevice->pcid = pcid; |
5449c685 | 492 | |
915006cd JP |
493 | pci_read_config_byte(pcid, PCI_COMMAND, &b); |
494 | pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER)); | |
5449c685 | 495 | |
915006cd | 496 | return true; |
5449c685 FB |
497 | } |
498 | ||
3f8597f4 | 499 | static void device_free_info(struct vnt_private *pDevice) |
84b50762 | 500 | { |
14e53006 MP |
501 | if (!pDevice) |
502 | return; | |
5449c685 | 503 | |
14e53006 MP |
504 | if (pDevice->mac_hw) |
505 | ieee80211_unregister_hw(pDevice->hw); | |
5449c685 | 506 | |
915006cd | 507 | if (pDevice->PortOffset) |
16834405 | 508 | iounmap(pDevice->PortOffset); |
5449c685 | 509 | |
915006cd JP |
510 | if (pDevice->pcid) |
511 | pci_release_regions(pDevice->pcid); | |
14e53006 MP |
512 | |
513 | if (pDevice->hw) | |
514 | ieee80211_free_hw(pDevice->hw); | |
5449c685 | 515 | } |
5449c685 | 516 | |
3f8597f4 | 517 | static bool device_init_rings(struct vnt_private *pDevice) |
84b50762 | 518 | { |
915006cd | 519 | void *vir_pool; |
5449c685 | 520 | |
915006cd | 521 | /*allocate all RD/TD rings a single pool*/ |
a1c6dcda | 522 | vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev, |
8b983be5 JP |
523 | pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) + |
524 | pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) + | |
525 | pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) + | |
526 | pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc), | |
a1c6dcda | 527 | &pDevice->pool_dma, GFP_ATOMIC); |
915006cd | 528 | if (vir_pool == NULL) { |
42f709ef | 529 | dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n"); |
915006cd JP |
530 | return false; |
531 | } | |
5449c685 | 532 | |
915006cd JP |
533 | pDevice->aRD0Ring = vir_pool; |
534 | pDevice->aRD1Ring = vir_pool + | |
535 | pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc); | |
536 | ||
915006cd JP |
537 | pDevice->rd0_pool_dma = pDevice->pool_dma; |
538 | pDevice->rd1_pool_dma = pDevice->rd0_pool_dma + | |
539 | pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc); | |
540 | ||
a1c6dcda | 541 | pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev, |
8b983be5 JP |
542 | pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ + |
543 | pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ + | |
544 | CB_BEACON_BUF_SIZE + | |
545 | CB_MAX_BUF_SIZE, | |
a1c6dcda QL |
546 | &pDevice->tx_bufs_dma0, |
547 | GFP_ATOMIC); | |
915006cd | 548 | if (pDevice->tx0_bufs == NULL) { |
42f709ef MP |
549 | dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n"); |
550 | ||
a1c6dcda | 551 | dma_free_coherent(&pDevice->pcid->dev, |
915006cd JP |
552 | pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) + |
553 | pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) + | |
554 | pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) + | |
555 | pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc), | |
556 | vir_pool, pDevice->pool_dma | |
557 | ); | |
558 | return false; | |
559 | } | |
5449c685 | 560 | |
915006cd JP |
561 | pDevice->td0_pool_dma = pDevice->rd1_pool_dma + |
562 | pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc); | |
5449c685 | 563 | |
915006cd JP |
564 | pDevice->td1_pool_dma = pDevice->td0_pool_dma + |
565 | pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc); | |
5449c685 | 566 | |
bb72dd53 | 567 | /* vir_pool: pvoid type */ |
915006cd JP |
568 | pDevice->apTD0Rings = vir_pool |
569 | + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) | |
570 | + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc); | |
5449c685 | 571 | |
915006cd JP |
572 | pDevice->apTD1Rings = vir_pool |
573 | + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) | |
574 | + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) | |
575 | + pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc); | |
5449c685 | 576 | |
915006cd JP |
577 | pDevice->tx1_bufs = pDevice->tx0_bufs + |
578 | pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ; | |
5449c685 | 579 | |
915006cd JP |
580 | pDevice->tx_beacon_bufs = pDevice->tx1_bufs + |
581 | pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ; | |
5449c685 | 582 | |
915006cd JP |
583 | pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs + |
584 | CB_BEACON_BUF_SIZE; | |
5449c685 | 585 | |
915006cd JP |
586 | pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 + |
587 | pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ; | |
5449c685 | 588 | |
915006cd JP |
589 | pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 + |
590 | pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ; | |
5449c685 | 591 | |
915006cd | 592 | return true; |
5449c685 FB |
593 | } |
594 | ||
3f8597f4 | 595 | static void device_free_rings(struct vnt_private *pDevice) |
84b50762 | 596 | { |
a1c6dcda | 597 | dma_free_coherent(&pDevice->pcid->dev, |
915006cd JP |
598 | pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) + |
599 | pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) + | |
600 | pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) + | |
601 | pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc) | |
602 | , | |
603 | pDevice->aRD0Ring, pDevice->pool_dma | |
604 | ); | |
605 | ||
606 | if (pDevice->tx0_bufs) | |
a1c6dcda | 607 | dma_free_coherent(&pDevice->pcid->dev, |
915006cd JP |
608 | pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ + |
609 | pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ + | |
610 | CB_BEACON_BUF_SIZE + | |
611 | CB_MAX_BUF_SIZE, | |
612 | pDevice->tx0_bufs, pDevice->tx_bufs_dma0 | |
613 | ); | |
5449c685 FB |
614 | } |
615 | ||
3f8597f4 | 616 | static void device_init_rd0_ring(struct vnt_private *pDevice) |
84b50762 | 617 | { |
915006cd JP |
618 | int i; |
619 | dma_addr_t curr = pDevice->rd0_pool_dma; | |
620 | PSRxDesc pDesc; | |
621 | ||
622 | /* Init the RD0 ring entries */ | |
623 | for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) { | |
624 | pDesc = &(pDevice->aRD0Ring[i]); | |
625 | pDesc->pRDInfo = alloc_rd_info(); | |
626 | ASSERT(pDesc->pRDInfo); | |
42f709ef MP |
627 | if (!device_alloc_rx_buf(pDevice, pDesc)) |
628 | dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n"); | |
629 | ||
915006cd JP |
630 | pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]); |
631 | pDesc->pRDInfo->curr_desc = cpu_to_le32(curr); | |
632 | pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc)); | |
633 | } | |
634 | ||
635 | if (i > 0) | |
636 | pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma); | |
637 | pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]); | |
5449c685 FB |
638 | } |
639 | ||
3f8597f4 | 640 | static void device_init_rd1_ring(struct vnt_private *pDevice) |
84b50762 | 641 | { |
915006cd JP |
642 | int i; |
643 | dma_addr_t curr = pDevice->rd1_pool_dma; | |
644 | PSRxDesc pDesc; | |
645 | ||
646 | /* Init the RD1 ring entries */ | |
647 | for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) { | |
648 | pDesc = &(pDevice->aRD1Ring[i]); | |
649 | pDesc->pRDInfo = alloc_rd_info(); | |
650 | ASSERT(pDesc->pRDInfo); | |
42f709ef MP |
651 | if (!device_alloc_rx_buf(pDevice, pDesc)) |
652 | dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n"); | |
653 | ||
915006cd JP |
654 | pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]); |
655 | pDesc->pRDInfo->curr_desc = cpu_to_le32(curr); | |
656 | pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc)); | |
657 | } | |
658 | ||
659 | if (i > 0) | |
660 | pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma); | |
661 | pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]); | |
5449c685 FB |
662 | } |
663 | ||
3f8597f4 | 664 | static void device_free_rd0_ring(struct vnt_private *pDevice) |
84b50762 | 665 | { |
915006cd | 666 | int i; |
5449c685 | 667 | |
915006cd JP |
668 | for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) { |
669 | PSRxDesc pDesc = &(pDevice->aRD0Ring[i]); | |
670 | PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo; | |
5449c685 | 671 | |
a1c6dcda QL |
672 | dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma, |
673 | pDevice->rx_buf_sz, DMA_FROM_DEVICE); | |
5449c685 | 674 | |
915006cd | 675 | dev_kfree_skb(pRDInfo->skb); |
5449c685 | 676 | |
61d566a5 | 677 | kfree(pDesc->pRDInfo); |
915006cd | 678 | } |
5449c685 FB |
679 | } |
680 | ||
3f8597f4 | 681 | static void device_free_rd1_ring(struct vnt_private *pDevice) |
84b50762 | 682 | { |
915006cd | 683 | int i; |
5449c685 | 684 | |
915006cd JP |
685 | for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) { |
686 | PSRxDesc pDesc = &(pDevice->aRD1Ring[i]); | |
687 | PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo; | |
5449c685 | 688 | |
a1c6dcda QL |
689 | dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma, |
690 | pDevice->rx_buf_sz, DMA_FROM_DEVICE); | |
5449c685 | 691 | |
915006cd | 692 | dev_kfree_skb(pRDInfo->skb); |
5449c685 | 693 | |
61d566a5 | 694 | kfree(pDesc->pRDInfo); |
915006cd | 695 | } |
5449c685 FB |
696 | } |
697 | ||
3f8597f4 | 698 | static void device_init_td0_ring(struct vnt_private *pDevice) |
84b50762 | 699 | { |
915006cd JP |
700 | int i; |
701 | dma_addr_t curr; | |
702 | PSTxDesc pDesc; | |
703 | ||
704 | curr = pDevice->td0_pool_dma; | |
705 | for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++, curr += sizeof(STxDesc)) { | |
706 | pDesc = &(pDevice->apTD0Rings[i]); | |
707 | pDesc->pTDInfo = alloc_td_info(); | |
708 | ASSERT(pDesc->pTDInfo); | |
709 | if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) { | |
710 | pDesc->pTDInfo->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ; | |
711 | pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ; | |
712 | } | |
713 | pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]); | |
714 | pDesc->pTDInfo->curr_desc = cpu_to_le32(curr); | |
715 | pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc)); | |
716 | } | |
717 | ||
718 | if (i > 0) | |
719 | pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma); | |
720 | pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]); | |
5449c685 FB |
721 | } |
722 | ||
3f8597f4 | 723 | static void device_init_td1_ring(struct vnt_private *pDevice) |
84b50762 | 724 | { |
915006cd JP |
725 | int i; |
726 | dma_addr_t curr; | |
727 | PSTxDesc pDesc; | |
728 | ||
729 | /* Init the TD ring entries */ | |
730 | curr = pDevice->td1_pool_dma; | |
731 | for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++, curr += sizeof(STxDesc)) { | |
732 | pDesc = &(pDevice->apTD1Rings[i]); | |
733 | pDesc->pTDInfo = alloc_td_info(); | |
734 | ASSERT(pDesc->pTDInfo); | |
735 | if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) { | |
736 | pDesc->pTDInfo->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ; | |
737 | pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ; | |
738 | } | |
739 | pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]); | |
740 | pDesc->pTDInfo->curr_desc = cpu_to_le32(curr); | |
741 | pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc)); | |
742 | } | |
743 | ||
744 | if (i > 0) | |
745 | pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma); | |
746 | pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]); | |
5449c685 FB |
747 | } |
748 | ||
3f8597f4 | 749 | static void device_free_td0_ring(struct vnt_private *pDevice) |
84b50762 | 750 | { |
915006cd | 751 | int i; |
6b711271 | 752 | |
915006cd JP |
753 | for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) { |
754 | PSTxDesc pDesc = &(pDevice->apTD0Rings[i]); | |
755 | PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo; | |
5449c685 | 756 | |
915006cd | 757 | if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) |
a1c6dcda QL |
758 | dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma, |
759 | pTDInfo->skb->len, DMA_TO_DEVICE); | |
5449c685 | 760 | |
915006cd JP |
761 | if (pTDInfo->skb) |
762 | dev_kfree_skb(pTDInfo->skb); | |
5449c685 | 763 | |
61d566a5 | 764 | kfree(pDesc->pTDInfo); |
915006cd | 765 | } |
5449c685 FB |
766 | } |
767 | ||
3f8597f4 | 768 | static void device_free_td1_ring(struct vnt_private *pDevice) |
84b50762 | 769 | { |
915006cd | 770 | int i; |
5449c685 | 771 | |
915006cd JP |
772 | for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) { |
773 | PSTxDesc pDesc = &(pDevice->apTD1Rings[i]); | |
774 | PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo; | |
5449c685 | 775 | |
915006cd | 776 | if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) |
a1c6dcda QL |
777 | dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma, |
778 | pTDInfo->skb->len, DMA_TO_DEVICE); | |
5449c685 | 779 | |
915006cd JP |
780 | if (pTDInfo->skb) |
781 | dev_kfree_skb(pTDInfo->skb); | |
5449c685 | 782 | |
61d566a5 | 783 | kfree(pDesc->pTDInfo); |
915006cd | 784 | } |
5449c685 FB |
785 | } |
786 | ||
5449c685 FB |
787 | /*-----------------------------------------------------------------*/ |
788 | ||
3f8597f4 | 789 | static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx) |
84b50762 | 790 | { |
915006cd JP |
791 | PSRxDesc pRD; |
792 | int works = 0; | |
5449c685 | 793 | |
915006cd JP |
794 | for (pRD = pDevice->pCurrRD[uIdx]; |
795 | pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST; | |
796 | pRD = pRD->next) { | |
915006cd JP |
797 | if (works++ > 15) |
798 | break; | |
b5eeed8c MP |
799 | |
800 | if (!pRD->pRDInfo->skb) | |
801 | break; | |
802 | ||
33b1c8c1 | 803 | if (vnt_receive_frame(pDevice, pRD)) { |
915006cd | 804 | if (!device_alloc_rx_buf(pDevice, pRD)) { |
42f709ef MP |
805 | dev_err(&pDevice->pcid->dev, |
806 | "can not allocate rx buf\n"); | |
915006cd JP |
807 | break; |
808 | } | |
809 | } | |
810 | pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC; | |
915006cd JP |
811 | } |
812 | ||
813 | pDevice->pCurrRD[uIdx] = pRD; | |
814 | ||
815 | return works; | |
5449c685 FB |
816 | } |
817 | ||
3f8597f4 | 818 | static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD) |
84b50762 | 819 | { |
915006cd | 820 | PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo; |
5449c685 | 821 | |
915006cd | 822 | pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz); |
915006cd JP |
823 | if (pRDInfo->skb == NULL) |
824 | return false; | |
825 | ASSERT(pRDInfo->skb); | |
33b1c8c1 MP |
826 | |
827 | pRDInfo->skb_dma = | |
a1c6dcda | 828 | dma_map_single(&pDevice->pcid->dev, |
33b1c8c1 | 829 | skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)), |
a1c6dcda | 830 | pDevice->rx_buf_sz, DMA_FROM_DEVICE); |
33b1c8c1 | 831 | |
915006cd JP |
832 | *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */ |
833 | ||
834 | pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz); | |
835 | pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC; | |
836 | pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz); | |
837 | pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma); | |
838 | ||
839 | return true; | |
5449c685 FB |
840 | } |
841 | ||
59918bea MP |
842 | static const u8 fallback_rate0[5][5] = { |
843 | {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M}, | |
844 | {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M}, | |
845 | {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M}, | |
846 | {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M}, | |
847 | {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M} | |
848 | }; | |
849 | ||
850 | static const u8 fallback_rate1[5][5] = { | |
851 | {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M}, | |
852 | {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M}, | |
853 | {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M}, | |
854 | {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M}, | |
855 | {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M} | |
856 | }; | |
857 | ||
858 | static int vnt_int_report_rate(struct vnt_private *priv, | |
859 | PDEVICE_TD_INFO context, u8 tsr0, u8 tsr1) | |
860 | { | |
861 | struct vnt_tx_fifo_head *fifo_head; | |
862 | struct ieee80211_tx_info *info; | |
863 | struct ieee80211_rate *rate; | |
864 | u16 fb_option; | |
865 | u8 tx_retry = (tsr0 & TSR0_NCR); | |
866 | s8 idx; | |
867 | ||
868 | if (!context) | |
869 | return -ENOMEM; | |
870 | ||
871 | if (!context->skb) | |
872 | return -EINVAL; | |
873 | ||
874 | fifo_head = (struct vnt_tx_fifo_head *)context->buf; | |
875 | fb_option = (le16_to_cpu(fifo_head->fifo_ctl) & | |
876 | (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1)); | |
877 | ||
878 | info = IEEE80211_SKB_CB(context->skb); | |
879 | idx = info->control.rates[0].idx; | |
880 | ||
881 | if (fb_option && !(tsr1 & TSR1_TERR)) { | |
882 | u8 tx_rate; | |
883 | u8 retry = tx_retry; | |
884 | ||
885 | rate = ieee80211_get_tx_rate(priv->hw, info); | |
886 | tx_rate = rate->hw_value - RATE_18M; | |
887 | ||
888 | if (retry > 4) | |
889 | retry = 4; | |
890 | ||
891 | if (fb_option & FIFOCTL_AUTO_FB_0) | |
892 | tx_rate = fallback_rate0[tx_rate][retry]; | |
893 | else if (fb_option & FIFOCTL_AUTO_FB_1) | |
894 | tx_rate = fallback_rate1[tx_rate][retry]; | |
895 | ||
896 | if (info->band == IEEE80211_BAND_5GHZ) | |
897 | idx = tx_rate - RATE_6M; | |
898 | else | |
899 | idx = tx_rate; | |
900 | } | |
901 | ||
902 | ieee80211_tx_info_clear_status(info); | |
903 | ||
904 | info->status.rates[0].count = tx_retry; | |
905 | ||
906 | if (!(tsr1 & TSR1_TERR)) { | |
907 | info->status.rates[0].idx = idx; | |
6e44dc4b MP |
908 | |
909 | if (info->flags & IEEE80211_TX_CTL_NO_ACK) | |
910 | info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; | |
911 | else | |
912 | info->flags |= IEEE80211_TX_STAT_ACK; | |
59918bea MP |
913 | } |
914 | ||
915 | return 0; | |
916 | } | |
917 | ||
3f8597f4 | 918 | static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx) |
84b50762 | 919 | { |
915006cd | 920 | PSTxDesc pTD; |
915006cd JP |
921 | int works = 0; |
922 | unsigned char byTsr0; | |
923 | unsigned char byTsr1; | |
915006cd | 924 | |
915006cd | 925 | for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) { |
915006cd JP |
926 | if (pTD->m_td0TD0.f1Owner == OWNED_BY_NIC) |
927 | break; | |
928 | if (works++ > 15) | |
929 | break; | |
930 | ||
931 | byTsr0 = pTD->m_td0TD0.byTSR0; | |
932 | byTsr1 = pTD->m_td0TD0.byTSR1; | |
933 | ||
bb72dd53 | 934 | /* Only the status of first TD in the chain is correct */ |
915006cd | 935 | if (pTD->m_td1TD1.byTCR & TCR_STP) { |
915006cd | 936 | if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) { |
915006cd JP |
937 | if (!(byTsr1 & TSR1_TERR)) { |
938 | if (byTsr0 != 0) { | |
48caf5a0 JP |
939 | pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n", |
940 | (int)uIdx, byTsr1, | |
941 | byTsr0); | |
915006cd | 942 | } |
5e0cc8a2 | 943 | } else { |
48caf5a0 JP |
944 | pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n", |
945 | (int)uIdx, byTsr1, byTsr0); | |
915006cd JP |
946 | } |
947 | } | |
948 | ||
949 | if (byTsr1 & TSR1_TERR) { | |
950 | if ((pTD->pTDInfo->byFlags & TD_FLAGS_PRIV_SKB) != 0) { | |
48caf5a0 JP |
951 | pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n", |
952 | (int)uIdx, byTsr1, byTsr0); | |
915006cd | 953 | } |
915006cd | 954 | } |
ad3fee9b MP |
955 | |
956 | vnt_int_report_rate(pDevice, pTD->pTDInfo, byTsr0, byTsr1); | |
957 | ||
915006cd JP |
958 | device_free_tx_buf(pDevice, pTD); |
959 | pDevice->iTDUsed[uIdx]--; | |
915006cd | 960 | } |
915006cd JP |
961 | } |
962 | ||
915006cd JP |
963 | pDevice->apTailTD[uIdx] = pTD; |
964 | ||
965 | return works; | |
5449c685 FB |
966 | } |
967 | ||
3f8597f4 | 968 | static void device_error(struct vnt_private *pDevice, unsigned short status) |
84b50762 | 969 | { |
915006cd | 970 | if (status & ISR_FETALERR) { |
42f709ef MP |
971 | dev_err(&pDevice->pcid->dev, "Hardware fatal error\n"); |
972 | ||
915006cd JP |
973 | MACbShutdown(pDevice->PortOffset); |
974 | return; | |
975 | } | |
5449c685 FB |
976 | } |
977 | ||
3f8597f4 | 978 | static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc) |
84b50762 | 979 | { |
915006cd JP |
980 | PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo; |
981 | struct sk_buff *skb = pTDInfo->skb; | |
5449c685 | 982 | |
bb72dd53 | 983 | /* pre-allocated buf_dma can't be unmapped. */ |
915006cd | 984 | if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) { |
a1c6dcda QL |
985 | dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma, |
986 | skb->len, DMA_TO_DEVICE); | |
915006cd | 987 | } |
5449c685 | 988 | |
3fa0917b | 989 | if (skb) |
59918bea | 990 | ieee80211_tx_status_irqsafe(pDevice->hw, skb); |
5449c685 | 991 | |
915006cd | 992 | pTDInfo->skb_dma = 0; |
70ae543b | 993 | pTDInfo->skb = NULL; |
915006cd | 994 | pTDInfo->byFlags = 0; |
5449c685 FB |
995 | } |
996 | ||
64e4fd51 MP |
997 | static void vnt_check_bb_vga(struct vnt_private *priv) |
998 | { | |
999 | long dbm; | |
1000 | int i; | |
1001 | ||
1002 | if (!priv->bUpdateBBVGA) | |
1003 | return; | |
1004 | ||
1005 | if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) | |
1006 | return; | |
1007 | ||
1008 | if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI)) | |
1009 | return; | |
1010 | ||
1011 | RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm); | |
1012 | ||
1013 | for (i = 0; i < BB_VGA_LEVEL; i++) { | |
1014 | if (dbm < priv->ldBmThreshold[i]) { | |
1015 | priv->byBBVGANew = priv->abyBBVGA[i]; | |
1016 | break; | |
1017 | } | |
1018 | } | |
1019 | ||
1020 | if (priv->byBBVGANew == priv->byBBVGACurrent) { | |
1021 | priv->uBBVGADiffCount = 1; | |
1022 | return; | |
1023 | } | |
1024 | ||
1025 | priv->uBBVGADiffCount++; | |
1026 | ||
1027 | if (priv->uBBVGADiffCount == 1) { | |
1028 | /* first VGA diff gain */ | |
1029 | BBvSetVGAGainOffset(priv, priv->byBBVGANew); | |
1030 | ||
1031 | dev_dbg(&priv->pcid->dev, | |
1032 | "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", | |
1033 | (int)dbm, priv->byBBVGANew, | |
1034 | priv->byBBVGACurrent, | |
1035 | (int)priv->uBBVGADiffCount); | |
1036 | } | |
1037 | ||
1038 | if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) { | |
1039 | dev_dbg(&priv->pcid->dev, | |
1040 | "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", | |
1041 | (int)dbm, priv->byBBVGANew, | |
1042 | priv->byBBVGACurrent, | |
1043 | (int)priv->uBBVGADiffCount); | |
1044 | ||
1045 | BBvSetVGAGainOffset(priv, priv->byBBVGANew); | |
1046 | } | |
1047 | } | |
1048 | ||
2995dfe6 | 1049 | static void vnt_interrupt_process(struct vnt_private *priv) |
84b50762 | 1050 | { |
2995dfe6 | 1051 | struct ieee80211_low_level_stats *low_stats = &priv->low_stats; |
915006cd | 1052 | int max_count = 0; |
700f6c02 | 1053 | u32 mib_counter; |
41b9e5e5 | 1054 | u32 isr; |
6cff1f6a | 1055 | unsigned long flags; |
915006cd | 1056 | |
41b9e5e5 | 1057 | MACvReadISR(priv->PortOffset, &isr); |
915006cd | 1058 | |
41b9e5e5 | 1059 | if (isr == 0) |
ff1ce1a8 | 1060 | return; |
915006cd | 1061 | |
41b9e5e5 MP |
1062 | if (isr == 0xffffffff) { |
1063 | pr_debug("isr = 0xffff\n"); | |
ff1ce1a8 | 1064 | return; |
915006cd | 1065 | } |
915006cd | 1066 | |
2995dfe6 | 1067 | MACvIntDisable(priv->PortOffset); |
6cff1f6a | 1068 | |
2995dfe6 | 1069 | spin_lock_irqsave(&priv->lock, flags); |
915006cd | 1070 | |
700f6c02 | 1071 | /* Read low level stats */ |
2995dfe6 | 1072 | MACvReadMIBCounter(priv->PortOffset, &mib_counter); |
700f6c02 MP |
1073 | |
1074 | low_stats->dot11RTSSuccessCount += mib_counter & 0xff; | |
1075 | low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff; | |
1076 | low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff; | |
1077 | low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff; | |
1078 | ||
bb72dd53 AS |
1079 | /* |
1080 | * TBD.... | |
1081 | * Must do this after doing rx/tx, cause ISR bit is slow | |
1082 | * than RD/TD write back | |
1083 | * update ISR counter | |
1084 | */ | |
41b9e5e5 MP |
1085 | while (isr && priv->vif) { |
1086 | MACvWriteISR(priv->PortOffset, isr); | |
915006cd | 1087 | |
41b9e5e5 | 1088 | if (isr & ISR_FETALERR) { |
48caf5a0 | 1089 | pr_debug(" ISR_FETALERR\n"); |
2995dfe6 MP |
1090 | VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0); |
1091 | VNSvOutPortW(priv->PortOffset + | |
1092 | MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI); | |
41b9e5e5 | 1093 | device_error(priv, isr); |
915006cd JP |
1094 | } |
1095 | ||
41b9e5e5 | 1096 | if (isr & ISR_TBTT) { |
2995dfe6 MP |
1097 | if (priv->op_mode != NL80211_IFTYPE_ADHOC) |
1098 | vnt_check_bb_vga(priv); | |
915006cd | 1099 | |
2995dfe6 MP |
1100 | priv->bBeaconSent = false; |
1101 | if (priv->bEnablePSMode) | |
1102 | PSbIsNextTBTTWakeUp((void *)priv); | |
915006cd | 1103 | |
2995dfe6 MP |
1104 | if ((priv->op_mode == NL80211_IFTYPE_AP || |
1105 | priv->op_mode == NL80211_IFTYPE_ADHOC) && | |
1106 | priv->vif->bss_conf.enable_beacon) { | |
1107 | MACvOneShotTimer1MicroSec(priv->PortOffset, | |
1108 | (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10); | |
915006cd JP |
1109 | } |
1110 | ||
4e8a7e5f | 1111 | /* TODO: adhoc PS mode */ |
915006cd JP |
1112 | |
1113 | } | |
1114 | ||
41b9e5e5 | 1115 | if (isr & ISR_BNTX) { |
2995dfe6 MP |
1116 | if (priv->op_mode == NL80211_IFTYPE_ADHOC) { |
1117 | priv->bIsBeaconBufReadySet = false; | |
1118 | priv->cbBeaconBufReadySetCnt = 0; | |
915006cd JP |
1119 | } |
1120 | ||
2995dfe6 | 1121 | priv->bBeaconSent = true; |
915006cd JP |
1122 | } |
1123 | ||
41b9e5e5 | 1124 | if (isr & ISR_RXDMA0) |
2995dfe6 | 1125 | max_count += device_rx_srv(priv, TYPE_RXDMA0); |
bc5cf656 | 1126 | |
41b9e5e5 | 1127 | if (isr & ISR_RXDMA1) |
2995dfe6 | 1128 | max_count += device_rx_srv(priv, TYPE_RXDMA1); |
bc5cf656 | 1129 | |
41b9e5e5 | 1130 | if (isr & ISR_TXDMA0) |
2995dfe6 | 1131 | max_count += device_tx_srv(priv, TYPE_TXDMA0); |
bc5cf656 | 1132 | |
41b9e5e5 | 1133 | if (isr & ISR_AC0DMA) |
2995dfe6 | 1134 | max_count += device_tx_srv(priv, TYPE_AC0DMA); |
bc5cf656 | 1135 | |
41b9e5e5 | 1136 | if (isr & ISR_SOFTTIMER1) { |
2995dfe6 MP |
1137 | if (priv->vif->bss_conf.enable_beacon) |
1138 | vnt_beacon_make(priv, priv->vif); | |
915006cd JP |
1139 | } |
1140 | ||
54fbb2da | 1141 | /* If both buffers available wake the queue */ |
2995dfe6 MP |
1142 | if (AVAIL_TD(priv, TYPE_TXDMA0) && |
1143 | AVAIL_TD(priv, TYPE_AC0DMA) && | |
1144 | ieee80211_queue_stopped(priv->hw, 0)) | |
1145 | ieee80211_wake_queues(priv->hw); | |
54fbb2da | 1146 | |
41b9e5e5 | 1147 | MACvReadISR(priv->PortOffset, &isr); |
915006cd | 1148 | |
2995dfe6 MP |
1149 | MACvReceive0(priv->PortOffset); |
1150 | MACvReceive1(priv->PortOffset); | |
915006cd | 1151 | |
2995dfe6 | 1152 | if (max_count > priv->sOpts.int_works) |
915006cd JP |
1153 | break; |
1154 | } | |
1155 | ||
2995dfe6 | 1156 | spin_unlock_irqrestore(&priv->lock, flags); |
6cff1f6a | 1157 | |
2995dfe6 | 1158 | MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); |
ff1ce1a8 MP |
1159 | } |
1160 | ||
1161 | static void vnt_interrupt_work(struct work_struct *work) | |
1162 | { | |
1163 | struct vnt_private *priv = | |
1164 | container_of(work, struct vnt_private, interrupt_work); | |
1165 | ||
1166 | if (priv->vif) | |
1167 | vnt_interrupt_process(priv); | |
1168 | } | |
1169 | ||
1170 | static irqreturn_t vnt_interrupt(int irq, void *arg) | |
1171 | { | |
1172 | struct vnt_private *priv = arg; | |
915006cd | 1173 | |
ff1ce1a8 MP |
1174 | if (priv->vif) |
1175 | schedule_work(&priv->interrupt_work); | |
1176 | ||
1177 | return IRQ_HANDLED; | |
5449c685 | 1178 | } |
915006cd | 1179 | |
67013f2c MP |
1180 | static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb) |
1181 | { | |
1182 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
1183 | PSTxDesc head_td; | |
c3125305 | 1184 | u32 dma_idx; |
67013f2c MP |
1185 | unsigned long flags; |
1186 | ||
1187 | spin_lock_irqsave(&priv->lock, flags); | |
1188 | ||
c3125305 MP |
1189 | if (ieee80211_is_data(hdr->frame_control)) |
1190 | dma_idx = TYPE_AC0DMA; | |
1191 | else | |
67013f2c MP |
1192 | dma_idx = TYPE_TXDMA0; |
1193 | ||
1194 | if (AVAIL_TD(priv, dma_idx) < 1) { | |
1195 | spin_unlock_irqrestore(&priv->lock, flags); | |
1196 | return -ENOMEM; | |
1197 | } | |
1198 | ||
1199 | head_td = priv->apCurrTD[dma_idx]; | |
1200 | ||
b5745290 | 1201 | head_td->m_td1TD1.byTCR = 0; |
67013f2c MP |
1202 | |
1203 | head_td->pTDInfo->skb = skb; | |
1204 | ||
c3125305 MP |
1205 | if (dma_idx == TYPE_AC0DMA) |
1206 | head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB; | |
1207 | ||
67013f2c MP |
1208 | priv->apCurrTD[dma_idx] = head_td->next; |
1209 | ||
1210 | spin_unlock_irqrestore(&priv->lock, flags); | |
1211 | ||
1212 | vnt_generate_fifo_header(priv, dma_idx, head_td, skb); | |
1213 | ||
1214 | if (MACbIsRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PS)) | |
1215 | MACbPSWakeup(priv->PortOffset); | |
1216 | ||
1217 | spin_lock_irqsave(&priv->lock, flags); | |
1218 | ||
1219 | priv->bPWBitOn = false; | |
1220 | ||
b5745290 MP |
1221 | /* Set TSR1 & ReqCount in TxDescHead */ |
1222 | head_td->m_td1TD1.byTCR |= (TCR_STP | TCR_EDP | EDMSDU); | |
1223 | head_td->m_td1TD1.wReqCount = | |
1224 | cpu_to_le16((u16)head_td->pTDInfo->dwReqCount); | |
1225 | ||
187e2a81 MP |
1226 | head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma); |
1227 | ||
d65d2b25 MP |
1228 | /* Poll Transmit the adapter */ |
1229 | wmb(); | |
1230 | head_td->m_td0TD0.f1Owner = OWNED_BY_NIC; | |
1231 | wmb(); /* second memory barrier */ | |
1232 | ||
c3125305 | 1233 | if (head_td->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) |
67013f2c | 1234 | MACvTransmitAC0(priv->PortOffset); |
c3125305 | 1235 | else |
67013f2c MP |
1236 | MACvTransmit0(priv->PortOffset); |
1237 | ||
d65d2b25 MP |
1238 | priv->iTDUsed[dma_idx]++; |
1239 | ||
67013f2c MP |
1240 | spin_unlock_irqrestore(&priv->lock, flags); |
1241 | ||
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | static void vnt_tx_80211(struct ieee80211_hw *hw, | |
1246 | struct ieee80211_tx_control *control, | |
1247 | struct sk_buff *skb) | |
1248 | { | |
1249 | struct vnt_private *priv = hw->priv; | |
1250 | ||
1251 | ieee80211_stop_queues(hw); | |
1252 | ||
1253 | if (vnt_tx_packet(priv, skb)) { | |
1254 | ieee80211_free_txskb(hw, skb); | |
1255 | ||
1256 | ieee80211_wake_queues(hw); | |
1257 | } | |
1258 | } | |
1259 | ||
1260 | static int vnt_start(struct ieee80211_hw *hw) | |
1261 | { | |
1262 | struct vnt_private *priv = hw->priv; | |
1263 | int ret; | |
1264 | ||
1265 | priv->rx_buf_sz = PKT_BUF_SZ; | |
1266 | if (!device_init_rings(priv)) | |
1267 | return -ENOMEM; | |
1268 | ||
ff1ce1a8 | 1269 | ret = request_irq(priv->pcid->irq, &vnt_interrupt, |
67013f2c MP |
1270 | IRQF_SHARED, "vt6655", priv); |
1271 | if (ret) { | |
1272 | dev_dbg(&priv->pcid->dev, "failed to start irq\n"); | |
1273 | return ret; | |
1274 | } | |
1275 | ||
1276 | dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n"); | |
1277 | device_init_rd0_ring(priv); | |
1278 | device_init_rd1_ring(priv); | |
67013f2c MP |
1279 | device_init_td0_ring(priv); |
1280 | device_init_td1_ring(priv); | |
1281 | ||
1282 | device_init_registers(priv); | |
1283 | ||
1284 | dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n"); | |
1285 | MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); | |
1286 | ||
1287 | ieee80211_wake_queues(hw); | |
1288 | ||
1289 | return 0; | |
1290 | } | |
1291 | ||
1292 | static void vnt_stop(struct ieee80211_hw *hw) | |
1293 | { | |
1294 | struct vnt_private *priv = hw->priv; | |
1295 | ||
1296 | ieee80211_stop_queues(hw); | |
1297 | ||
ff1ce1a8 MP |
1298 | cancel_work_sync(&priv->interrupt_work); |
1299 | ||
67013f2c MP |
1300 | MACbShutdown(priv->PortOffset); |
1301 | MACbSoftwareReset(priv->PortOffset); | |
1302 | CARDbRadioPowerOff(priv); | |
1303 | ||
1304 | device_free_td0_ring(priv); | |
1305 | device_free_td1_ring(priv); | |
1306 | device_free_rd0_ring(priv); | |
1307 | device_free_rd1_ring(priv); | |
67013f2c MP |
1308 | device_free_rings(priv); |
1309 | ||
1310 | free_irq(priv->pcid->irq, priv); | |
1311 | } | |
1312 | ||
1313 | static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |
1314 | { | |
1315 | struct vnt_private *priv = hw->priv; | |
1316 | ||
1317 | priv->vif = vif; | |
1318 | ||
1319 | switch (vif->type) { | |
1320 | case NL80211_IFTYPE_STATION: | |
67013f2c MP |
1321 | break; |
1322 | case NL80211_IFTYPE_ADHOC: | |
1323 | MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); | |
1324 | ||
1325 | MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); | |
1326 | ||
1327 | break; | |
1328 | case NL80211_IFTYPE_AP: | |
1329 | MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); | |
1330 | ||
1331 | MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); | |
1332 | ||
1333 | break; | |
1334 | default: | |
1335 | return -EOPNOTSUPP; | |
1336 | } | |
1337 | ||
1338 | priv->op_mode = vif->type; | |
1339 | ||
1340 | return 0; | |
1341 | } | |
1342 | ||
1343 | static void vnt_remove_interface(struct ieee80211_hw *hw, | |
1344 | struct ieee80211_vif *vif) | |
1345 | { | |
1346 | struct vnt_private *priv = hw->priv; | |
1347 | ||
1348 | switch (vif->type) { | |
1349 | case NL80211_IFTYPE_STATION: | |
67013f2c MP |
1350 | break; |
1351 | case NL80211_IFTYPE_ADHOC: | |
1352 | MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); | |
1353 | MACvRegBitsOff(priv->PortOffset, | |
1354 | MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); | |
1355 | MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); | |
1356 | break; | |
1357 | case NL80211_IFTYPE_AP: | |
1358 | MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); | |
1359 | MACvRegBitsOff(priv->PortOffset, | |
1360 | MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); | |
1361 | MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); | |
1362 | break; | |
1363 | default: | |
1364 | break; | |
1365 | } | |
1366 | ||
1367 | priv->op_mode = NL80211_IFTYPE_UNSPECIFIED; | |
1368 | } | |
1369 | ||
1370 | ||
1371 | static int vnt_config(struct ieee80211_hw *hw, u32 changed) | |
1372 | { | |
1373 | struct vnt_private *priv = hw->priv; | |
1374 | struct ieee80211_conf *conf = &hw->conf; | |
1375 | u8 bb_type; | |
1376 | ||
1377 | if (changed & IEEE80211_CONF_CHANGE_PS) { | |
1378 | if (conf->flags & IEEE80211_CONF_PS) | |
1379 | PSvEnablePowerSaving(priv, conf->listen_interval); | |
1380 | else | |
1381 | PSvDisablePowerSaving(priv); | |
1382 | } | |
1383 | ||
1384 | if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || | |
1385 | (conf->flags & IEEE80211_CONF_OFFCHANNEL)) { | |
d7a4cfa8 | 1386 | set_channel(priv, conf->chandef.chan); |
67013f2c MP |
1387 | |
1388 | if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ) | |
1389 | bb_type = BB_TYPE_11A; | |
1390 | else | |
1391 | bb_type = BB_TYPE_11G; | |
1392 | ||
1393 | if (priv->byBBType != bb_type) { | |
1394 | priv->byBBType = bb_type; | |
1395 | ||
bfb6c863 | 1396 | CARDbSetPhyParameter(priv, priv->byBBType); |
67013f2c MP |
1397 | } |
1398 | } | |
1399 | ||
1400 | if (changed & IEEE80211_CONF_CHANGE_POWER) { | |
1401 | if (priv->byBBType == BB_TYPE_11B) | |
1402 | priv->wCurrentRate = RATE_1M; | |
1403 | else | |
1404 | priv->wCurrentRate = RATE_54M; | |
1405 | ||
1406 | RFbSetPower(priv, priv->wCurrentRate, | |
1407 | conf->chandef.chan->hw_value); | |
1408 | } | |
1409 | ||
1410 | return 0; | |
1411 | } | |
1412 | ||
1413 | static void vnt_bss_info_changed(struct ieee80211_hw *hw, | |
1414 | struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf, | |
1415 | u32 changed) | |
1416 | { | |
1417 | struct vnt_private *priv = hw->priv; | |
1418 | ||
1419 | priv->current_aid = conf->aid; | |
1420 | ||
664a5c1d MP |
1421 | if (changed & BSS_CHANGED_BSSID) { |
1422 | unsigned long flags; | |
1423 | ||
1424 | spin_lock_irqsave(&priv->lock, flags); | |
1425 | ||
67013f2c MP |
1426 | MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid); |
1427 | ||
664a5c1d MP |
1428 | spin_unlock_irqrestore(&priv->lock, flags); |
1429 | } | |
1430 | ||
67013f2c MP |
1431 | if (changed & BSS_CHANGED_BASIC_RATES) { |
1432 | priv->basic_rates = conf->basic_rates; | |
1433 | ||
1434 | CARDvUpdateBasicTopRate(priv); | |
1435 | ||
1436 | dev_dbg(&priv->pcid->dev, | |
1437 | "basic rates %x\n", conf->basic_rates); | |
1438 | } | |
1439 | ||
1440 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
1441 | if (conf->use_short_preamble) { | |
1442 | MACvEnableBarkerPreambleMd(priv->PortOffset); | |
1443 | priv->byPreambleType = true; | |
1444 | } else { | |
1445 | MACvDisableBarkerPreambleMd(priv->PortOffset); | |
1446 | priv->byPreambleType = false; | |
1447 | } | |
1448 | } | |
1449 | ||
1450 | if (changed & BSS_CHANGED_ERP_CTS_PROT) { | |
1451 | if (conf->use_cts_prot) | |
1452 | MACvEnableProtectMD(priv->PortOffset); | |
1453 | else | |
1454 | MACvDisableProtectMD(priv->PortOffset); | |
1455 | } | |
1456 | ||
1457 | if (changed & BSS_CHANGED_ERP_SLOT) { | |
1458 | if (conf->use_short_slot) | |
1459 | priv->bShortSlotTime = true; | |
1460 | else | |
1461 | priv->bShortSlotTime = false; | |
1462 | ||
bfb6c863 | 1463 | CARDbSetPhyParameter(priv, priv->byBBType); |
67013f2c MP |
1464 | BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]); |
1465 | } | |
1466 | ||
1467 | if (changed & BSS_CHANGED_TXPOWER) | |
1468 | RFbSetPower(priv, priv->wCurrentRate, | |
1469 | conf->chandef.chan->hw_value); | |
1470 | ||
1471 | if (changed & BSS_CHANGED_BEACON_ENABLED) { | |
1472 | dev_dbg(&priv->pcid->dev, | |
1473 | "Beacon enable %d\n", conf->enable_beacon); | |
1474 | ||
1475 | if (conf->enable_beacon) { | |
1476 | vnt_beacon_enable(priv, vif, conf); | |
1477 | ||
84c00afe MK |
1478 | MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR, |
1479 | TCR_AUTOBCNTX); | |
67013f2c | 1480 | } else { |
84c00afe MK |
1481 | MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, |
1482 | TCR_AUTOBCNTX); | |
67013f2c MP |
1483 | } |
1484 | } | |
1485 | ||
1486 | if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) { | |
1487 | if (conf->assoc) { | |
1488 | CARDbUpdateTSF(priv, conf->beacon_rate->hw_value, | |
032ed34a | 1489 | conf->sync_tsf); |
67013f2c MP |
1490 | |
1491 | CARDbSetBeaconPeriod(priv, conf->beacon_int); | |
1492 | ||
738487ff | 1493 | CARDvSetFirstNextTBTT(priv, conf->beacon_int); |
c7b14ea0 MP |
1494 | } else { |
1495 | VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, | |
1496 | TFTCTL_TSFCNTRST); | |
1497 | VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, | |
1498 | TFTCTL_TSFCNTREN); | |
67013f2c MP |
1499 | } |
1500 | } | |
1501 | } | |
1502 | ||
1503 | static u64 vnt_prepare_multicast(struct ieee80211_hw *hw, | |
1504 | struct netdev_hw_addr_list *mc_list) | |
1505 | { | |
1506 | struct vnt_private *priv = hw->priv; | |
1507 | struct netdev_hw_addr *ha; | |
1508 | u64 mc_filter = 0; | |
1509 | u32 bit_nr = 0; | |
1510 | ||
1511 | netdev_hw_addr_list_for_each(ha, mc_list) { | |
1512 | bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
1513 | ||
1514 | mc_filter |= 1ULL << (bit_nr & 0x3f); | |
1515 | } | |
1516 | ||
1517 | priv->mc_list_count = mc_list->count; | |
1518 | ||
1519 | return mc_filter; | |
1520 | } | |
1521 | ||
1522 | static void vnt_configure(struct ieee80211_hw *hw, | |
1523 | unsigned int changed_flags, unsigned int *total_flags, u64 multicast) | |
1524 | { | |
1525 | struct vnt_private *priv = hw->priv; | |
1526 | u8 rx_mode = 0; | |
1527 | ||
1528 | *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_PROMISC_IN_BSS | | |
1529 | FIF_BCN_PRBRESP_PROMISC; | |
1530 | ||
1531 | VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode); | |
1532 | ||
1533 | dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode); | |
1534 | ||
1535 | if (changed_flags & FIF_PROMISC_IN_BSS) { | |
1536 | /* unconditionally log net taps */ | |
1537 | if (*total_flags & FIF_PROMISC_IN_BSS) | |
1538 | rx_mode |= RCR_UNICAST; | |
1539 | else | |
1540 | rx_mode &= ~RCR_UNICAST; | |
1541 | } | |
1542 | ||
1543 | if (changed_flags & FIF_ALLMULTI) { | |
1544 | if (*total_flags & FIF_ALLMULTI) { | |
95775d12 MP |
1545 | unsigned long flags; |
1546 | ||
1547 | spin_lock_irqsave(&priv->lock, flags); | |
1548 | ||
67013f2c MP |
1549 | if (priv->mc_list_count > 2) { |
1550 | MACvSelectPage1(priv->PortOffset); | |
1551 | ||
1552 | VNSvOutPortD(priv->PortOffset + | |
1553 | MAC_REG_MAR0, 0xffffffff); | |
1554 | VNSvOutPortD(priv->PortOffset + | |
1555 | MAC_REG_MAR0 + 4, 0xffffffff); | |
1556 | ||
1557 | MACvSelectPage0(priv->PortOffset); | |
1558 | } else { | |
1559 | MACvSelectPage1(priv->PortOffset); | |
1560 | ||
1561 | VNSvOutPortD(priv->PortOffset + | |
1562 | MAC_REG_MAR0, (u32)multicast); | |
1563 | VNSvOutPortD(priv->PortOffset + | |
1564 | MAC_REG_MAR0 + 4, | |
1565 | (u32)(multicast >> 32)); | |
1566 | ||
1567 | MACvSelectPage0(priv->PortOffset); | |
1568 | } | |
1569 | ||
95775d12 MP |
1570 | spin_unlock_irqrestore(&priv->lock, flags); |
1571 | ||
67013f2c MP |
1572 | rx_mode |= RCR_MULTICAST | RCR_BROADCAST; |
1573 | } else { | |
1574 | rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST); | |
1575 | } | |
1576 | } | |
1577 | ||
1578 | if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) { | |
1579 | rx_mode |= RCR_MULTICAST | RCR_BROADCAST; | |
1580 | ||
1581 | if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) | |
1582 | rx_mode &= ~RCR_BSSID; | |
1583 | else | |
1584 | rx_mode |= RCR_BSSID; | |
1585 | } | |
1586 | ||
1587 | VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode); | |
1588 | ||
1589 | dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode); | |
1590 | } | |
1591 | ||
1592 | static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |
1593 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, | |
1594 | struct ieee80211_key_conf *key) | |
1595 | { | |
1596 | struct vnt_private *priv = hw->priv; | |
1597 | ||
1598 | switch (cmd) { | |
1599 | case SET_KEY: | |
1600 | if (vnt_set_keys(hw, sta, vif, key)) | |
1601 | return -EOPNOTSUPP; | |
1602 | break; | |
1603 | case DISABLE_KEY: | |
1604 | if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) | |
1605 | clear_bit(key->hw_key_idx, &priv->key_entry_inuse); | |
1606 | default: | |
1607 | break; | |
1608 | } | |
1609 | ||
1610 | return 0; | |
1611 | } | |
1612 | ||
700f6c02 MP |
1613 | static int vnt_get_stats(struct ieee80211_hw *hw, |
1614 | struct ieee80211_low_level_stats *stats) | |
1615 | { | |
1616 | struct vnt_private *priv = hw->priv; | |
1617 | ||
1618 | memcpy(stats, &priv->low_stats, sizeof(*stats)); | |
1619 | ||
1620 | return 0; | |
1621 | } | |
1622 | ||
67013f2c MP |
1623 | static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
1624 | { | |
1625 | struct vnt_private *priv = hw->priv; | |
1626 | u64 tsf; | |
1627 | ||
738487ff | 1628 | CARDbGetCurrentTSF(priv, &tsf); |
67013f2c MP |
1629 | |
1630 | return tsf; | |
1631 | } | |
1632 | ||
1633 | static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
1634 | u64 tsf) | |
1635 | { | |
1636 | struct vnt_private *priv = hw->priv; | |
1637 | ||
738487ff | 1638 | CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int); |
67013f2c MP |
1639 | } |
1640 | ||
1641 | static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |
1642 | { | |
1643 | struct vnt_private *priv = hw->priv; | |
1644 | ||
1645 | /* reset TSF counter */ | |
1646 | VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); | |
1647 | } | |
1648 | ||
1649 | static const struct ieee80211_ops vnt_mac_ops = { | |
1650 | .tx = vnt_tx_80211, | |
1651 | .start = vnt_start, | |
1652 | .stop = vnt_stop, | |
1653 | .add_interface = vnt_add_interface, | |
1654 | .remove_interface = vnt_remove_interface, | |
1655 | .config = vnt_config, | |
1656 | .bss_info_changed = vnt_bss_info_changed, | |
1657 | .prepare_multicast = vnt_prepare_multicast, | |
1658 | .configure_filter = vnt_configure, | |
1659 | .set_key = vnt_set_key, | |
700f6c02 | 1660 | .get_stats = vnt_get_stats, |
67013f2c MP |
1661 | .get_tsf = vnt_get_tsf, |
1662 | .set_tsf = vnt_set_tsf, | |
1663 | .reset_tsf = vnt_reset_tsf, | |
1664 | }; | |
1665 | ||
b7c9cd45 | 1666 | static int vnt_init(struct vnt_private *priv) |
67013f2c MP |
1667 | { |
1668 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr); | |
1669 | ||
3d75b9e2 MP |
1670 | vnt_init_bands(priv); |
1671 | ||
67013f2c MP |
1672 | if (ieee80211_register_hw(priv->hw)) |
1673 | return -ENODEV; | |
1674 | ||
1675 | priv->mac_hw = true; | |
1676 | ||
1677 | CARDbRadioPowerOff(priv); | |
1678 | ||
1679 | return 0; | |
1680 | } | |
1681 | ||
1682 | static int | |
1683 | vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) | |
1684 | { | |
1685 | PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data; | |
1686 | struct vnt_private *priv; | |
1687 | struct ieee80211_hw *hw; | |
1688 | struct wiphy *wiphy; | |
1689 | int rc; | |
1690 | ||
1691 | dev_notice(&pcid->dev, | |
1692 | "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION); | |
1693 | ||
1694 | dev_notice(&pcid->dev, | |
1695 | "Copyright (c) 2003 VIA Networking Technologies, Inc.\n"); | |
1696 | ||
1697 | hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops); | |
1698 | if (!hw) { | |
1699 | dev_err(&pcid->dev, "could not register ieee80211_hw\n"); | |
1700 | return -ENOMEM; | |
1701 | } | |
1702 | ||
1703 | priv = hw->priv; | |
1704 | ||
1705 | vt6655_init_info(pcid, &priv, pChip_info); | |
1706 | ||
1707 | priv->hw = hw; | |
1708 | ||
1709 | SET_IEEE80211_DEV(priv->hw, &pcid->dev); | |
1710 | ||
1711 | if (pci_enable_device(pcid)) { | |
1712 | device_free_info(priv); | |
1713 | return -ENODEV; | |
1714 | } | |
1715 | ||
1716 | dev_dbg(&pcid->dev, | |
1717 | "Before get pci_info memaddr is %x\n", priv->memaddr); | |
1718 | ||
1719 | if (!device_get_pci_info(priv, pcid)) { | |
1720 | dev_err(&pcid->dev, ": Failed to find PCI device.\n"); | |
1721 | device_free_info(priv); | |
1722 | return -ENODEV; | |
1723 | } | |
1724 | ||
1725 | #ifdef DEBUG | |
1726 | dev_dbg(&pcid->dev, | |
1727 | "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n", | |
1728 | priv->memaddr, priv->ioaddr, priv->io_size); | |
1729 | { | |
1730 | int i; | |
1731 | u32 bar, len; | |
1732 | u32 address[] = { | |
1733 | PCI_BASE_ADDRESS_0, | |
1734 | PCI_BASE_ADDRESS_1, | |
1735 | PCI_BASE_ADDRESS_2, | |
1736 | PCI_BASE_ADDRESS_3, | |
1737 | PCI_BASE_ADDRESS_4, | |
1738 | PCI_BASE_ADDRESS_5, | |
1739 | 0}; | |
1740 | for (i = 0; address[i]; i++) { | |
1741 | pci_read_config_dword(pcid, address[i], &bar); | |
1742 | ||
1743 | dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar); | |
1744 | ||
1745 | if (!bar) { | |
1746 | dev_dbg(&pcid->dev, | |
1747 | "bar %d not implemented\n", i); | |
1748 | continue; | |
1749 | } | |
1750 | ||
1751 | if (bar & PCI_BASE_ADDRESS_SPACE_IO) { | |
1752 | /* This is IO */ | |
1753 | ||
1754 | len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff); | |
1755 | len = len & ~(len - 1); | |
1756 | ||
1757 | dev_dbg(&pcid->dev, | |
1758 | "IO space: len in IO %x, BAR %d\n", | |
1759 | len, i); | |
1760 | } else { | |
1761 | len = bar & 0xfffffff0; | |
1762 | len = ~len + 1; | |
1763 | ||
1764 | dev_dbg(&pcid->dev, | |
1765 | "len in MEM %x, BAR %d\n", len, i); | |
1766 | } | |
1767 | } | |
1768 | } | |
1769 | #endif | |
1770 | ||
1771 | priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK, | |
1772 | priv->io_size); | |
1773 | if (!priv->PortOffset) { | |
1774 | dev_err(&pcid->dev, ": Failed to IO remapping ..\n"); | |
1775 | device_free_info(priv); | |
1776 | return -ENODEV; | |
1777 | } | |
1778 | ||
1779 | rc = pci_request_regions(pcid, DEVICE_NAME); | |
1780 | if (rc) { | |
1781 | dev_err(&pcid->dev, ": Failed to find PCI device\n"); | |
1782 | device_free_info(priv); | |
1783 | return -ENODEV; | |
1784 | } | |
1785 | ||
ff1ce1a8 MP |
1786 | INIT_WORK(&priv->interrupt_work, vnt_interrupt_work); |
1787 | ||
67013f2c MP |
1788 | /* do reset */ |
1789 | if (!MACbSoftwareReset(priv->PortOffset)) { | |
1790 | dev_err(&pcid->dev, ": Failed to access MAC hardware..\n"); | |
1791 | device_free_info(priv); | |
1792 | return -ENODEV; | |
1793 | } | |
1794 | /* initial to reload eeprom */ | |
1795 | MACvInitialize(priv->PortOffset); | |
1796 | MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); | |
1797 | ||
1f51d580 MP |
1798 | /* Get RFType */ |
1799 | priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE); | |
1800 | priv->byRFType &= RF_MASK; | |
1801 | ||
1802 | dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType); | |
1803 | ||
67013f2c MP |
1804 | device_get_options(priv); |
1805 | device_set_options(priv); | |
1806 | /* Mask out the options cannot be set to the chip */ | |
1807 | priv->sOpts.flags &= pChip_info->flags; | |
1808 | ||
1809 | /* Enable the chip specified capabilities */ | |
1810 | priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL); | |
67013f2c MP |
1811 | |
1812 | wiphy = priv->hw->wiphy; | |
1813 | ||
1814 | wiphy->frag_threshold = FRAG_THRESH_DEF; | |
1815 | wiphy->rts_threshold = RTS_THRESH_DEF; | |
1816 | wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | | |
1817 | BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP); | |
1818 | ||
1819 | priv->hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | | |
1820 | IEEE80211_HW_REPORTS_TX_ACK_STATUS | | |
1821 | IEEE80211_HW_SIGNAL_DBM | | |
1822 | IEEE80211_HW_TIMING_BEACON_ONLY; | |
1823 | ||
1824 | priv->hw->max_signal = 100; | |
1825 | ||
1826 | if (vnt_init(priv)) | |
1827 | return -ENODEV; | |
1828 | ||
1829 | device_print_info(priv); | |
1830 | pci_set_drvdata(pcid, priv); | |
1831 | ||
1832 | return 0; | |
1833 | } | |
1834 | ||
5449c685 | 1835 | /*------------------------------------------------------------------*/ |
5449c685 | 1836 | |
000fe0f5 MP |
1837 | #ifdef CONFIG_PM |
1838 | static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state) | |
1839 | { | |
1840 | struct vnt_private *priv = pci_get_drvdata(pcid); | |
1841 | unsigned long flags; | |
1842 | ||
1843 | spin_lock_irqsave(&priv->lock, flags); | |
1844 | ||
1845 | pci_save_state(pcid); | |
1846 | ||
1847 | MACbShutdown(priv->PortOffset); | |
1848 | ||
1849 | pci_disable_device(pcid); | |
1850 | pci_set_power_state(pcid, pci_choose_state(pcid, state)); | |
1851 | ||
1852 | spin_unlock_irqrestore(&priv->lock, flags); | |
1853 | ||
1854 | return 0; | |
1855 | } | |
1856 | ||
1857 | static int vt6655_resume(struct pci_dev *pcid) | |
1858 | { | |
1859 | ||
1860 | pci_set_power_state(pcid, PCI_D0); | |
1861 | pci_enable_wake(pcid, PCI_D0, 0); | |
1862 | pci_restore_state(pcid); | |
1863 | ||
1864 | return 0; | |
1865 | } | |
1866 | #endif | |
1867 | ||
013a468c | 1868 | MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table); |
5449c685 FB |
1869 | |
1870 | static struct pci_driver device_driver = { | |
34381c22 PH |
1871 | .name = DEVICE_NAME, |
1872 | .id_table = vt6655_pci_id_table, | |
1873 | .probe = vt6655_probe, | |
1874 | .remove = vt6655_remove, | |
5449c685 | 1875 | #ifdef CONFIG_PM |
000fe0f5 MP |
1876 | .suspend = vt6655_suspend, |
1877 | .resume = vt6655_resume, | |
5449c685 | 1878 | #endif |
5449c685 FB |
1879 | }; |
1880 | ||
e75e8cac | 1881 | module_pci_driver(device_driver); |