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5449c685 FB |
1 | /* |
2 | * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. | |
3 | * All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
5449c685 FB |
15 | * File: mac.c |
16 | * | |
17 | * Purpose: MAC routines | |
18 | * | |
19 | * Author: Tevin Chen | |
20 | * | |
21 | * Date: May 21, 1996 | |
22 | * | |
23 | * Functions: | |
5449c685 FB |
24 | * MACbIsRegBitsOn - Test if All test Bits On |
25 | * MACbIsRegBitsOff - Test if All test Bits Off | |
26 | * MACbIsIntDisable - Test if MAC interrupt disable | |
5449c685 | 27 | * MACvSetShortRetryLimit - Set 802.11 Short Retry limit |
5449c685 | 28 | * MACvSetLongRetryLimit - Set 802.11 Long Retry limit |
5449c685 | 29 | * MACvSetLoopbackMode - Set MAC Loopback Mode |
5449c685 FB |
30 | * MACvSaveContext - Save Context of MAC Registers |
31 | * MACvRestoreContext - Restore Context of MAC Registers | |
5449c685 FB |
32 | * MACbSoftwareReset - Software Reset MAC |
33 | * MACbSafeRxOff - Turn Off MAC Rx | |
34 | * MACbSafeTxOff - Turn Off MAC Tx | |
35 | * MACbSafeStop - Stop MAC function | |
36 | * MACbShutdown - Shut down MAC | |
37 | * MACvInitialize - Initialize MAC | |
789d1aef JM |
38 | * MACvSetCurrRxDescAddr - Set Rx Descriptors Address |
39 | * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address | |
40 | * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address | |
5449c685 FB |
41 | * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC |
42 | * | |
43 | * Revision History: | |
44 | * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53 | |
5150d01e KH |
45 | * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& |
46 | * MACvEnableBusSusEn() | |
5449c685 FB |
47 | * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry |
48 | * | |
49 | */ | |
50 | ||
5449c685 | 51 | #include "tmacro.h" |
5449c685 | 52 | #include "mac.h" |
5449c685 | 53 | |
5449c685 FB |
54 | /* |
55 | * Description: | |
56 | * Test if all test bits on | |
57 | * | |
58 | * Parameters: | |
59 | * In: | |
c2d845de | 60 | * io_base - Base Address for MAC |
5449c685 FB |
61 | * byRegOfs - Offset of MAC Register |
62 | * byTestBits - Test bits | |
63 | * Out: | |
64 | * none | |
65 | * | |
5a5a2a6a | 66 | * Return Value: true if all test bits On; otherwise false |
5449c685 FB |
67 | * |
68 | */ | |
f9f853af | 69 | bool MACbIsRegBitsOn(struct vnt_private *priv, unsigned char byRegOfs, |
d4855fe1 | 70 | unsigned char byTestBits) |
5449c685 | 71 | { |
c2d845de | 72 | void __iomem *io_base = priv->PortOffset; |
5449c685 | 73 | |
f205e8d1 | 74 | return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits; |
5449c685 FB |
75 | } |
76 | ||
77 | /* | |
78 | * Description: | |
79 | * Test if all test bits off | |
80 | * | |
81 | * Parameters: | |
82 | * In: | |
c2d845de | 83 | * io_base - Base Address for MAC |
5449c685 FB |
84 | * byRegOfs - Offset of MAC Register |
85 | * byTestBits - Test bits | |
86 | * Out: | |
87 | * none | |
88 | * | |
5a5a2a6a | 89 | * Return Value: true if all test bits Off; otherwise false |
5449c685 FB |
90 | * |
91 | */ | |
f9f853af | 92 | bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs, |
d4855fe1 | 93 | unsigned char byTestBits) |
5449c685 | 94 | { |
c2d845de | 95 | void __iomem *io_base = priv->PortOffset; |
5449c685 | 96 | |
f205e8d1 | 97 | return !(ioread8(io_base + byRegOfs) & byTestBits); |
5449c685 FB |
98 | } |
99 | ||
100 | /* | |
101 | * Description: | |
102 | * Test if MAC interrupt disable | |
103 | * | |
104 | * Parameters: | |
105 | * In: | |
c2d845de | 106 | * io_base - Base Address for MAC |
5449c685 FB |
107 | * Out: |
108 | * none | |
109 | * | |
5a5a2a6a | 110 | * Return Value: true if interrupt is disable; otherwise false |
5449c685 FB |
111 | * |
112 | */ | |
f9f853af | 113 | bool MACbIsIntDisable(struct vnt_private *priv) |
5449c685 | 114 | { |
c2d845de | 115 | void __iomem *io_base = priv->PortOffset; |
5449c685 | 116 | |
e52ab0ec | 117 | if (ioread32(io_base + MAC_REG_IMR)) |
c3504bfd | 118 | return false; |
5449c685 | 119 | |
c3504bfd | 120 | return true; |
5449c685 FB |
121 | } |
122 | ||
5449c685 FB |
123 | /* |
124 | * Description: | |
125 | * Set 802.11 Short Retry Limit | |
126 | * | |
127 | * Parameters: | |
128 | * In: | |
c2d845de | 129 | * io_base - Base Address for MAC |
5449c685 FB |
130 | * byRetryLimit- Retry Limit |
131 | * Out: | |
132 | * none | |
133 | * | |
134 | * Return Value: none | |
135 | * | |
136 | */ | |
5150d01e KH |
137 | void MACvSetShortRetryLimit(struct vnt_private *priv, |
138 | unsigned char byRetryLimit) | |
5449c685 | 139 | { |
c2d845de | 140 | void __iomem *io_base = priv->PortOffset; |
9ab81fb7 | 141 | /* set SRT */ |
3b8eb64c | 142 | iowrite8(byRetryLimit, io_base + MAC_REG_SRT); |
5449c685 FB |
143 | } |
144 | ||
5449c685 FB |
145 | /* |
146 | * Description: | |
147 | * Set 802.11 Long Retry Limit | |
148 | * | |
149 | * Parameters: | |
150 | * In: | |
c2d845de | 151 | * io_base - Base Address for MAC |
5449c685 FB |
152 | * byRetryLimit- Retry Limit |
153 | * Out: | |
154 | * none | |
155 | * | |
156 | * Return Value: none | |
157 | * | |
158 | */ | |
5150d01e KH |
159 | void MACvSetLongRetryLimit(struct vnt_private *priv, |
160 | unsigned char byRetryLimit) | |
5449c685 | 161 | { |
c2d845de | 162 | void __iomem *io_base = priv->PortOffset; |
9ab81fb7 | 163 | /* set LRT */ |
3b8eb64c | 164 | iowrite8(byRetryLimit, io_base + MAC_REG_LRT); |
5449c685 FB |
165 | } |
166 | ||
5449c685 FB |
167 | /* |
168 | * Description: | |
169 | * Set MAC Loopback mode | |
170 | * | |
171 | * Parameters: | |
172 | * In: | |
c2d845de | 173 | * io_base - Base Address for MAC |
5449c685 FB |
174 | * byLoopbackMode - Loopback Mode |
175 | * Out: | |
176 | * none | |
177 | * | |
178 | * Return Value: none | |
179 | * | |
180 | */ | |
f9f853af | 181 | void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode) |
5449c685 | 182 | { |
c2d845de | 183 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 184 | |
c3504bfd | 185 | byLoopbackMode <<= 6; |
9ab81fb7 | 186 | /* set TCR */ |
58fe2702 MP |
187 | iowrite8((ioread8(io_base + MAC_REG_TEST) & 0x3f) | byLoopbackMode, |
188 | io_base + MAC_REG_TEST); | |
5449c685 FB |
189 | } |
190 | ||
5449c685 FB |
191 | /* |
192 | * Description: | |
193 | * Save MAC registers to context buffer | |
194 | * | |
195 | * Parameters: | |
196 | * In: | |
c2d845de | 197 | * io_base - Base Address for MAC |
5449c685 | 198 | * Out: |
70715017 | 199 | * cxt_buf - Context buffer |
5449c685 FB |
200 | * |
201 | * Return Value: none | |
202 | * | |
203 | */ | |
70715017 | 204 | void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf) |
5449c685 | 205 | { |
c2d845de | 206 | void __iomem *io_base = priv->PortOffset; |
5449c685 | 207 | |
9ab81fb7 | 208 | /* read page0 register */ |
70715017 | 209 | memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0); |
5449c685 | 210 | |
c2d845de | 211 | MACvSelectPage1(io_base); |
5449c685 | 212 | |
9ab81fb7 | 213 | /* read page1 register */ |
70715017 | 214 | memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base, |
7e5120e9 | 215 | MAC_MAX_CONTEXT_SIZE_PAGE1); |
5449c685 | 216 | |
c2d845de | 217 | MACvSelectPage0(io_base); |
5449c685 FB |
218 | } |
219 | ||
220 | /* | |
221 | * Description: | |
222 | * Restore MAC registers from context buffer | |
223 | * | |
224 | * Parameters: | |
225 | * In: | |
c2d845de | 226 | * io_base - Base Address for MAC |
70715017 | 227 | * cxt_buf - Context buffer |
5449c685 FB |
228 | * Out: |
229 | * none | |
230 | * | |
231 | * Return Value: none | |
232 | * | |
233 | */ | |
70715017 | 234 | void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf) |
5449c685 | 235 | { |
c2d845de | 236 | void __iomem *io_base = priv->PortOffset; |
5449c685 | 237 | |
c2d845de | 238 | MACvSelectPage1(io_base); |
9ab81fb7 | 239 | /* restore page1 */ |
46331952 MP |
240 | memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, |
241 | MAC_MAX_CONTEXT_SIZE_PAGE1); | |
bc5cf656 | 242 | |
c2d845de | 243 | MACvSelectPage0(io_base); |
5449c685 | 244 | |
9ab81fb7 | 245 | /* restore RCR,TCR,IMR... */ |
46331952 MP |
246 | memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR, |
247 | MAC_REG_ISR - MAC_REG_RCR); | |
bc5cf656 | 248 | |
9ab81fb7 | 249 | /* restore MAC Config. */ |
46331952 MP |
250 | memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT, |
251 | MAC_REG_PAGE1SEL - MAC_REG_LRT); | |
bc5cf656 | 252 | |
3b8eb64c | 253 | iowrite8(*(cxt_buf + MAC_REG_CFG), io_base + MAC_REG_CFG); |
5449c685 | 254 | |
9ab81fb7 | 255 | /* restore PS Config. */ |
46331952 MP |
256 | memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG, |
257 | MAC_REG_BBREGCTL - MAC_REG_PSCFG); | |
5449c685 | 258 | |
9ab81fb7 | 259 | /* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */ |
e2ad8e23 MP |
260 | iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0), |
261 | io_base + MAC_REG_TXDMAPTR0); | |
262 | iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR), | |
263 | io_base + MAC_REG_AC0DMAPTR); | |
264 | iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR), | |
265 | io_base + MAC_REG_BCNDMAPTR); | |
266 | iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0), | |
267 | io_base + MAC_REG_RXDMAPTR0); | |
268 | iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1), | |
269 | io_base + MAC_REG_RXDMAPTR1); | |
5449c685 FB |
270 | } |
271 | ||
5449c685 FB |
272 | /* |
273 | * Description: | |
274 | * Software Reset MAC | |
275 | * | |
276 | * Parameters: | |
277 | * In: | |
c2d845de | 278 | * io_base - Base Address for MAC |
5449c685 FB |
279 | * Out: |
280 | * none | |
281 | * | |
5a5a2a6a | 282 | * Return Value: true if Reset Success; otherwise false |
5449c685 FB |
283 | * |
284 | */ | |
f9f853af | 285 | bool MACbSoftwareReset(struct vnt_private *priv) |
5449c685 | 286 | { |
c2d845de | 287 | void __iomem *io_base = priv->PortOffset; |
c3504bfd JP |
288 | unsigned short ww; |
289 | ||
9ab81fb7 | 290 | /* turn on HOSTCR_SOFTRST, just write 0x01 to reset */ |
3b8eb64c | 291 | iowrite8(0x01, io_base + MAC_REG_HOSTCR); |
c3504bfd JP |
292 | |
293 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
f205e8d1 | 294 | if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST)) |
c3504bfd JP |
295 | break; |
296 | } | |
297 | if (ww == W_MAX_TIMEOUT) | |
298 | return false; | |
299 | return true; | |
5449c685 FB |
300 | } |
301 | ||
302 | /* | |
303 | * Description: | |
5150d01e KH |
304 | * save some important register's value, then do reset, then restore |
305 | * register's value | |
5449c685 FB |
306 | * |
307 | * Parameters: | |
308 | * In: | |
c2d845de | 309 | * io_base - Base Address for MAC |
5449c685 FB |
310 | * Out: |
311 | * none | |
312 | * | |
5a5a2a6a | 313 | * Return Value: true if success; otherwise false |
5449c685 FB |
314 | * |
315 | */ | |
f9f853af | 316 | bool MACbSafeSoftwareReset(struct vnt_private *priv) |
5449c685 | 317 | { |
bee80f29 | 318 | unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0 + MAC_MAX_CONTEXT_SIZE_PAGE1]; |
c3504bfd JP |
319 | bool bRetVal; |
320 | ||
9ab81fb7 MS |
321 | /* PATCH.... |
322 | * save some important register's value, then do | |
323 | * reset, then restore register's value | |
324 | */ | |
325 | /* save MAC context */ | |
f9f853af | 326 | MACvSaveContext(priv, abyTmpRegData); |
9ab81fb7 | 327 | /* do reset */ |
f9f853af | 328 | bRetVal = MACbSoftwareReset(priv); |
9ab81fb7 | 329 | /* restore MAC context, except CR0 */ |
f9f853af | 330 | MACvRestoreContext(priv, abyTmpRegData); |
c3504bfd JP |
331 | |
332 | return bRetVal; | |
5449c685 FB |
333 | } |
334 | ||
335 | /* | |
336 | * Description: | |
b1797dfd | 337 | * Turn Off MAC Rx |
5449c685 FB |
338 | * |
339 | * Parameters: | |
340 | * In: | |
c2d845de | 341 | * io_base - Base Address for MAC |
5449c685 FB |
342 | * Out: |
343 | * none | |
344 | * | |
5a5a2a6a | 345 | * Return Value: true if success; otherwise false |
5449c685 FB |
346 | * |
347 | */ | |
f9f853af | 348 | bool MACbSafeRxOff(struct vnt_private *priv) |
5449c685 | 349 | { |
c2d845de | 350 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 351 | unsigned short ww; |
c3504bfd | 352 | |
9ab81fb7 | 353 | /* turn off wow temp for turn off Rx safely */ |
c3504bfd | 354 | |
9ab81fb7 | 355 | /* Clear RX DMA0,1 */ |
e2ad8e23 MP |
356 | iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0); |
357 | iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1); | |
c3504bfd | 358 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
e52ab0ec | 359 | if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN)) |
c3504bfd JP |
360 | break; |
361 | } | |
362 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 363 | pr_debug(" DBG_PORT80(0x10)\n"); |
a4ef27ad | 364 | return false; |
c3504bfd JP |
365 | } |
366 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
e52ab0ec | 367 | if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN)) |
c3504bfd JP |
368 | break; |
369 | } | |
370 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 371 | pr_debug(" DBG_PORT80(0x11)\n"); |
a4ef27ad | 372 | return false; |
c3504bfd JP |
373 | } |
374 | ||
9ab81fb7 | 375 | /* try to safe shutdown RX */ |
c2d845de | 376 | MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON); |
9ab81fb7 | 377 | /* W_MAX_TIMEOUT is the timeout period */ |
c3504bfd | 378 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
f205e8d1 | 379 | if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST)) |
c3504bfd JP |
380 | break; |
381 | } | |
382 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 383 | pr_debug(" DBG_PORT80(0x12)\n"); |
a4ef27ad | 384 | return false; |
c3504bfd JP |
385 | } |
386 | return true; | |
5449c685 FB |
387 | } |
388 | ||
389 | /* | |
390 | * Description: | |
b1797dfd | 391 | * Turn Off MAC Tx |
5449c685 FB |
392 | * |
393 | * Parameters: | |
394 | * In: | |
c2d845de | 395 | * io_base - Base Address for MAC |
5449c685 FB |
396 | * Out: |
397 | * none | |
398 | * | |
5a5a2a6a | 399 | * Return Value: true if success; otherwise false |
5449c685 FB |
400 | * |
401 | */ | |
f9f853af | 402 | bool MACbSafeTxOff(struct vnt_private *priv) |
5449c685 | 403 | { |
c2d845de | 404 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 405 | unsigned short ww; |
c3504bfd | 406 | |
9ab81fb7 MS |
407 | /* Clear TX DMA */ |
408 | /* Tx0 */ | |
e2ad8e23 | 409 | iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0); |
9ab81fb7 | 410 | /* AC0 */ |
e2ad8e23 | 411 | iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL); |
c3504bfd | 412 | |
c3504bfd | 413 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
e52ab0ec | 414 | if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN)) |
c3504bfd JP |
415 | break; |
416 | } | |
417 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 418 | pr_debug(" DBG_PORT80(0x20)\n"); |
a4ef27ad | 419 | return false; |
c3504bfd JP |
420 | } |
421 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
e52ab0ec | 422 | if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN)) |
c3504bfd JP |
423 | break; |
424 | } | |
425 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 426 | pr_debug(" DBG_PORT80(0x21)\n"); |
a4ef27ad | 427 | return false; |
c3504bfd JP |
428 | } |
429 | ||
9ab81fb7 | 430 | /* try to safe shutdown TX */ |
c2d845de | 431 | MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON); |
c3504bfd | 432 | |
9ab81fb7 | 433 | /* W_MAX_TIMEOUT is the timeout period */ |
c3504bfd | 434 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
f205e8d1 | 435 | if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST)) |
c3504bfd JP |
436 | break; |
437 | } | |
438 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 439 | pr_debug(" DBG_PORT80(0x24)\n"); |
a4ef27ad | 440 | return false; |
c3504bfd JP |
441 | } |
442 | return true; | |
5449c685 FB |
443 | } |
444 | ||
445 | /* | |
446 | * Description: | |
447 | * Stop MAC function | |
448 | * | |
449 | * Parameters: | |
450 | * In: | |
c2d845de | 451 | * io_base - Base Address for MAC |
5449c685 FB |
452 | * Out: |
453 | * none | |
454 | * | |
5a5a2a6a | 455 | * Return Value: true if success; otherwise false |
5449c685 FB |
456 | * |
457 | */ | |
f9f853af | 458 | bool MACbSafeStop(struct vnt_private *priv) |
5449c685 | 459 | { |
c2d845de | 460 | void __iomem *io_base = priv->PortOffset; |
e1c484db | 461 | |
c2d845de | 462 | MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX); |
c3504bfd | 463 | |
f9f853af | 464 | if (!MACbSafeRxOff(priv)) { |
48caf5a0 | 465 | pr_debug(" MACbSafeRxOff == false)\n"); |
f9f853af | 466 | MACbSafeSoftwareReset(priv); |
c3504bfd JP |
467 | return false; |
468 | } | |
f9f853af | 469 | if (!MACbSafeTxOff(priv)) { |
48caf5a0 | 470 | pr_debug(" MACbSafeTxOff == false)\n"); |
f9f853af | 471 | MACbSafeSoftwareReset(priv); |
c3504bfd JP |
472 | return false; |
473 | } | |
474 | ||
c2d845de | 475 | MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN); |
c3504bfd JP |
476 | |
477 | return true; | |
5449c685 FB |
478 | } |
479 | ||
480 | /* | |
481 | * Description: | |
482 | * Shut Down MAC | |
483 | * | |
484 | * Parameters: | |
485 | * In: | |
c2d845de | 486 | * io_base - Base Address for MAC |
5449c685 FB |
487 | * Out: |
488 | * none | |
489 | * | |
5a5a2a6a | 490 | * Return Value: true if success; otherwise false |
5449c685 FB |
491 | * |
492 | */ | |
f9f853af | 493 | bool MACbShutdown(struct vnt_private *priv) |
5449c685 | 494 | { |
c2d845de | 495 | void __iomem *io_base = priv->PortOffset; |
9ab81fb7 | 496 | /* disable MAC IMR */ |
c2d845de | 497 | MACvIntDisable(io_base); |
f9f853af | 498 | MACvSetLoopbackMode(priv, MAC_LB_INTERNAL); |
9ab81fb7 | 499 | /* stop the adapter */ |
f9f853af MP |
500 | if (!MACbSafeStop(priv)) { |
501 | MACvSetLoopbackMode(priv, MAC_LB_NONE); | |
c3504bfd JP |
502 | return false; |
503 | } | |
f9f853af | 504 | MACvSetLoopbackMode(priv, MAC_LB_NONE); |
c3504bfd | 505 | return true; |
5449c685 FB |
506 | } |
507 | ||
508 | /* | |
509 | * Description: | |
510 | * Initialize MAC | |
511 | * | |
512 | * Parameters: | |
513 | * In: | |
c2d845de | 514 | * io_base - Base Address for MAC |
5449c685 FB |
515 | * Out: |
516 | * none | |
517 | * | |
518 | * Return Value: none | |
519 | * | |
520 | */ | |
f9f853af | 521 | void MACvInitialize(struct vnt_private *priv) |
5449c685 | 522 | { |
c2d845de | 523 | void __iomem *io_base = priv->PortOffset; |
9ab81fb7 | 524 | /* clear sticky bits */ |
c2d845de | 525 | MACvClearStckDS(io_base); |
9ab81fb7 | 526 | /* disable force PME-enable */ |
3b8eb64c | 527 | iowrite8(PME_OVR, io_base + MAC_REG_PMC1); |
9ab81fb7 | 528 | /* only 3253 A */ |
c3504bfd | 529 | |
9ab81fb7 | 530 | /* do reset */ |
f9f853af | 531 | MACbSoftwareReset(priv); |
c3504bfd | 532 | |
9ab81fb7 | 533 | /* reset TSF counter */ |
3b8eb64c | 534 | iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL); |
9ab81fb7 | 535 | /* enable TSF counter */ |
3b8eb64c | 536 | iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL); |
5449c685 FB |
537 | } |
538 | ||
539 | /* | |
540 | * Description: | |
541 | * Set the chip with current rx descriptor address | |
542 | * | |
543 | * Parameters: | |
544 | * In: | |
c2d845de | 545 | * io_base - Base Address for MAC |
28029472 | 546 | * curr_desc_addr - Descriptor Address |
5449c685 FB |
547 | * Out: |
548 | * none | |
549 | * | |
550 | * Return Value: none | |
551 | * | |
552 | */ | |
28029472 | 553 | void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr) |
5449c685 | 554 | { |
c2d845de | 555 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 556 | unsigned short ww; |
ebc9bd83 | 557 | unsigned char org_dma_ctl; |
c3504bfd | 558 | |
ebc9bd83 MP |
559 | org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL0); |
560 | if (org_dma_ctl & DMACTL_RUN) | |
3b8eb64c | 561 | iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0 + 2); |
bc5cf656 | 562 | |
c3504bfd | 563 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
f205e8d1 | 564 | if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN)) |
c3504bfd JP |
565 | break; |
566 | } | |
bc5cf656 | 567 | |
28029472 | 568 | iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR0); |
ebc9bd83 | 569 | if (org_dma_ctl & DMACTL_RUN) |
3b8eb64c | 570 | iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0); |
5449c685 FB |
571 | } |
572 | ||
573 | /* | |
574 | * Description: | |
575 | * Set the chip with current rx descriptor address | |
576 | * | |
577 | * Parameters: | |
578 | * In: | |
c2d845de | 579 | * io_base - Base Address for MAC |
28029472 | 580 | * curr_desc_addr - Descriptor Address |
5449c685 FB |
581 | * Out: |
582 | * none | |
583 | * | |
584 | * Return Value: none | |
585 | * | |
586 | */ | |
28029472 | 587 | void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 curr_desc_addr) |
5449c685 | 588 | { |
c2d845de | 589 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 590 | unsigned short ww; |
ebc9bd83 | 591 | unsigned char org_dma_ctl; |
c3504bfd | 592 | |
ebc9bd83 MP |
593 | org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL1); |
594 | if (org_dma_ctl & DMACTL_RUN) | |
3b8eb64c | 595 | iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1 + 2); |
bc5cf656 | 596 | |
c3504bfd | 597 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
f205e8d1 | 598 | if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN)) |
c3504bfd JP |
599 | break; |
600 | } | |
bc5cf656 | 601 | |
28029472 | 602 | iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR1); |
ebc9bd83 | 603 | if (org_dma_ctl & DMACTL_RUN) |
3b8eb64c | 604 | iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1); |
bc5cf656 | 605 | |
5449c685 FB |
606 | } |
607 | ||
608 | /* | |
609 | * Description: | |
610 | * Set the chip with current tx0 descriptor address | |
611 | * | |
612 | * Parameters: | |
613 | * In: | |
c2d845de | 614 | * io_base - Base Address for MAC |
28029472 | 615 | * curr_desc_addr - Descriptor Address |
5449c685 FB |
616 | * Out: |
617 | * none | |
618 | * | |
619 | * Return Value: none | |
620 | * | |
621 | */ | |
f9f853af | 622 | void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv, |
28029472 | 623 | u32 curr_desc_addr) |
5449c685 | 624 | { |
c2d845de | 625 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 626 | unsigned short ww; |
ebc9bd83 | 627 | unsigned char org_dma_ctl; |
c3504bfd | 628 | |
ebc9bd83 MP |
629 | org_dma_ctl = ioread8(io_base + MAC_REG_TXDMACTL0); |
630 | if (org_dma_ctl & DMACTL_RUN) | |
3b8eb64c | 631 | iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0 + 2); |
bc5cf656 | 632 | |
c3504bfd | 633 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
f205e8d1 | 634 | if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN)) |
c3504bfd JP |
635 | break; |
636 | } | |
bc5cf656 | 637 | |
28029472 | 638 | iowrite32(curr_desc_addr, io_base + MAC_REG_TXDMAPTR0); |
ebc9bd83 | 639 | if (org_dma_ctl & DMACTL_RUN) |
3b8eb64c | 640 | iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0); |
5449c685 FB |
641 | } |
642 | ||
643 | /* | |
644 | * Description: | |
645 | * Set the chip with current AC0 descriptor address | |
646 | * | |
647 | * Parameters: | |
648 | * In: | |
c2d845de | 649 | * io_base - Base Address for MAC |
28029472 | 650 | * curr_desc_addr - Descriptor Address |
5449c685 FB |
651 | * Out: |
652 | * none | |
653 | * | |
654 | * Return Value: none | |
655 | * | |
656 | */ | |
9ab81fb7 | 657 | /* TxDMA1 = AC0DMA */ |
f9f853af | 658 | void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv, |
28029472 | 659 | u32 curr_desc_addr) |
5449c685 | 660 | { |
c2d845de | 661 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 662 | unsigned short ww; |
ebc9bd83 | 663 | unsigned char org_dma_ctl; |
c3504bfd | 664 | |
ebc9bd83 MP |
665 | org_dma_ctl = ioread8(io_base + MAC_REG_AC0DMACTL); |
666 | if (org_dma_ctl & DMACTL_RUN) | |
3b8eb64c | 667 | iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL + 2); |
bc5cf656 | 668 | |
c3504bfd | 669 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
f205e8d1 | 670 | if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN)) |
c3504bfd JP |
671 | break; |
672 | } | |
4188e586 | 673 | if (ww == W_MAX_TIMEOUT) |
48caf5a0 | 674 | pr_debug(" DBG_PORT80(0x26)\n"); |
28029472 | 675 | iowrite32(curr_desc_addr, io_base + MAC_REG_AC0DMAPTR); |
ebc9bd83 | 676 | if (org_dma_ctl & DMACTL_RUN) |
3b8eb64c | 677 | iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL); |
5449c685 FB |
678 | } |
679 | ||
f9f853af | 680 | void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv, |
28029472 | 681 | u32 curr_desc_addr) |
5449c685 | 682 | { |
bc5cf656 | 683 | if (iTxType == TYPE_AC0DMA) |
28029472 | 684 | MACvSetCurrAC0DescAddrEx(priv, curr_desc_addr); |
bc5cf656 | 685 | else if (iTxType == TYPE_TXDMA0) |
28029472 | 686 | MACvSetCurrTx0DescAddrEx(priv, curr_desc_addr); |
5449c685 FB |
687 | } |
688 | ||
689 | /* | |
690 | * Description: | |
691 | * Micro Second Delay via MAC | |
692 | * | |
693 | * Parameters: | |
694 | * In: | |
c2d845de | 695 | * io_base - Base Address for MAC |
5449c685 FB |
696 | * uDelay - Delay time (timer resolution is 4 us) |
697 | * Out: | |
698 | * none | |
699 | * | |
700 | * Return Value: none | |
701 | * | |
702 | */ | |
f9f853af | 703 | void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay) |
5449c685 | 704 | { |
c2d845de | 705 | void __iomem *io_base = priv->PortOffset; |
c3504bfd JP |
706 | unsigned char byValue; |
707 | unsigned int uu, ii; | |
708 | ||
3b8eb64c | 709 | iowrite8(0, io_base + MAC_REG_TMCTL0); |
e2ad8e23 | 710 | iowrite32(uDelay, io_base + MAC_REG_TMDATA0); |
3b8eb64c | 711 | iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL0); |
9ab81fb7 | 712 | for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */ |
c3504bfd | 713 | for (uu = 0; uu < uDelay; uu++) { |
17c4c51e | 714 | byValue = ioread8(io_base + MAC_REG_TMCTL0); |
c3504bfd JP |
715 | if ((byValue == 0) || |
716 | (byValue & TMCTL_TSUSP)) { | |
3b8eb64c | 717 | iowrite8(0, io_base + MAC_REG_TMCTL0); |
c3504bfd JP |
718 | return; |
719 | } | |
720 | } | |
721 | } | |
3b8eb64c | 722 | iowrite8(0, io_base + MAC_REG_TMCTL0); |
5449c685 FB |
723 | } |
724 | ||
5449c685 FB |
725 | /* |
726 | * Description: | |
727 | * Micro Second One shot timer via MAC | |
728 | * | |
729 | * Parameters: | |
730 | * In: | |
c2d845de | 731 | * io_base - Base Address for MAC |
5449c685 FB |
732 | * uDelay - Delay time |
733 | * Out: | |
734 | * none | |
735 | * | |
736 | * Return Value: none | |
737 | * | |
738 | */ | |
5150d01e KH |
739 | void MACvOneShotTimer1MicroSec(struct vnt_private *priv, |
740 | unsigned int uDelayTime) | |
5449c685 | 741 | { |
c2d845de | 742 | void __iomem *io_base = priv->PortOffset; |
f9f853af | 743 | |
3b8eb64c | 744 | iowrite8(0, io_base + MAC_REG_TMCTL1); |
e2ad8e23 | 745 | iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1); |
3b8eb64c | 746 | iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL1); |
5449c685 FB |
747 | } |
748 | ||
0e7997c1 | 749 | void MACvSetMISCFifo(struct vnt_private *priv, unsigned short offset, |
efa21f9d | 750 | u32 data) |
5449c685 | 751 | { |
c2d845de | 752 | void __iomem *io_base = priv->PortOffset; |
f9f853af | 753 | |
0e7997c1 | 754 | if (offset > 273) |
c3504bfd | 755 | return; |
0e7997c1 | 756 | iowrite16(offset, io_base + MAC_REG_MISCFFNDEX); |
efa21f9d | 757 | iowrite32(data, io_base + MAC_REG_MISCFFDATA); |
54a14e62 | 758 | iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL); |
5449c685 FB |
759 | } |
760 | ||
f9f853af | 761 | bool MACbPSWakeup(struct vnt_private *priv) |
5449c685 | 762 | { |
c2d845de | 763 | void __iomem *io_base = priv->PortOffset; |
c3504bfd | 764 | unsigned int ww; |
9ab81fb7 | 765 | /* Read PSCTL */ |
f9f853af | 766 | if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS)) |
c3504bfd | 767 | return true; |
bc5cf656 | 768 | |
9ab81fb7 | 769 | /* Disable PS */ |
c2d845de | 770 | MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN); |
c3504bfd | 771 | |
9ab81fb7 | 772 | /* Check if SyncFlushOK */ |
c3504bfd | 773 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
e206939f | 774 | if (ioread8(io_base + MAC_REG_PSCTL) & PSCTL_WAKEDONE) |
c3504bfd JP |
775 | break; |
776 | } | |
777 | if (ww == W_MAX_TIMEOUT) { | |
48caf5a0 | 778 | pr_debug(" DBG_PORT80(0x33)\n"); |
c3504bfd JP |
779 | return false; |
780 | } | |
781 | return true; | |
5449c685 FB |
782 | } |
783 | ||
784 | /* | |
785 | * Description: | |
786 | * Set the Key by MISCFIFO | |
787 | * | |
788 | * Parameters: | |
789 | * In: | |
c2d845de | 790 | * io_base - Base Address for MAC |
5449c685 FB |
791 | * |
792 | * Out: | |
793 | * none | |
794 | * | |
795 | * Return Value: none | |
796 | * | |
797 | */ | |
798 | ||
f9f853af | 799 | void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl, |
d4855fe1 GB |
800 | unsigned int uEntryIdx, unsigned int uKeyIdx, |
801 | unsigned char *pbyAddr, u32 *pdwKey, | |
802 | unsigned char byLocalID) | |
5449c685 | 803 | { |
c2d845de | 804 | void __iomem *io_base = priv->PortOffset; |
0e7997c1 | 805 | unsigned short offset; |
efa21f9d | 806 | u32 data; |
c3504bfd JP |
807 | int ii; |
808 | ||
809 | if (byLocalID <= 1) | |
810 | return; | |
811 | ||
6f675264 | 812 | pr_debug("%s\n", __func__); |
0e7997c1 MP |
813 | offset = MISCFIFO_KEYETRY0; |
814 | offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); | |
c3504bfd | 815 | |
efa21f9d MP |
816 | data = 0; |
817 | data |= wKeyCtl; | |
818 | data <<= 16; | |
819 | data |= MAKEWORD(*(pbyAddr + 4), *(pbyAddr + 5)); | |
0e7997c1 | 820 | pr_debug("1. offset: %d, Data: %X, KeyCtl:%X\n", |
efa21f9d | 821 | offset, data, wKeyCtl); |
c3504bfd | 822 | |
0e7997c1 | 823 | iowrite16(offset, io_base + MAC_REG_MISCFFNDEX); |
efa21f9d | 824 | iowrite32(data, io_base + MAC_REG_MISCFFDATA); |
54a14e62 | 825 | iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL); |
0e7997c1 | 826 | offset++; |
c3504bfd | 827 | |
efa21f9d MP |
828 | data = 0; |
829 | data |= *(pbyAddr + 3); | |
830 | data <<= 8; | |
831 | data |= *(pbyAddr + 2); | |
832 | data <<= 8; | |
833 | data |= *(pbyAddr + 1); | |
834 | data <<= 8; | |
835 | data |= *pbyAddr; | |
836 | pr_debug("2. offset: %d, Data: %X\n", offset, data); | |
c3504bfd | 837 | |
0e7997c1 | 838 | iowrite16(offset, io_base + MAC_REG_MISCFFNDEX); |
efa21f9d | 839 | iowrite32(data, io_base + MAC_REG_MISCFFDATA); |
54a14e62 | 840 | iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL); |
0e7997c1 | 841 | offset++; |
c3504bfd | 842 | |
0e7997c1 | 843 | offset += (uKeyIdx * 4); |
c3504bfd | 844 | for (ii = 0; ii < 4; ii++) { |
9ab81fb7 | 845 | /* always push 128 bits */ |
0e7997c1 MP |
846 | pr_debug("3.(%d) offset: %d, Data: %X\n", |
847 | ii, offset + ii, *pdwKey); | |
848 | iowrite16(offset + ii, io_base + MAC_REG_MISCFFNDEX); | |
e2ad8e23 | 849 | iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA); |
54a14e62 | 850 | iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL); |
c3504bfd | 851 | } |
5449c685 FB |
852 | } |
853 | ||
5449c685 FB |
854 | /* |
855 | * Description: | |
856 | * Disable the Key Entry by MISCFIFO | |
857 | * | |
858 | * Parameters: | |
859 | * In: | |
c2d845de | 860 | * io_base - Base Address for MAC |
5449c685 FB |
861 | * |
862 | * Out: | |
863 | * none | |
864 | * | |
865 | * Return Value: none | |
866 | * | |
867 | */ | |
f9f853af | 868 | void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx) |
5449c685 | 869 | { |
c2d845de | 870 | void __iomem *io_base = priv->PortOffset; |
0e7997c1 | 871 | unsigned short offset; |
5449c685 | 872 | |
0e7997c1 MP |
873 | offset = MISCFIFO_KEYETRY0; |
874 | offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE); | |
5449c685 | 875 | |
0e7997c1 | 876 | iowrite16(offset, io_base + MAC_REG_MISCFFNDEX); |
e2ad8e23 | 877 | iowrite32(0, io_base + MAC_REG_MISCFFDATA); |
54a14e62 | 878 | iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL); |
5449c685 | 879 | } |