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81eb669b
DC		 1/* Cypress West Bridge API header file (cyasprotocol.h)
2## ===========================
3## Copyright (C) 2010 Cypress Semiconductor
4##
5## This program is free software; you can redistribute it and/or
6## modify it under the terms of the GNU General Public License
7## as published by the Free Software Foundation; either version 2
8## of the License, or (at your option) any later version.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin Street
18## Fifth Floor, Boston, MA 02110-1301, USA.
19## ===========================
20*/
21
22#ifndef _INCLUDED_CYASPROTOCOL_H_
23#define _INCLUDED_CYASPROTOCOL_H_
24
25/*
26 * Constants defining the per context buffer sizes
27 */
28#ifndef __doxygen__
29#define CY_CTX_GEN_MAX_DATA_SIZE (8)
30#define CY_CTX_RES_MAX_DATA_SIZE (8)
31#define CY_CTX_STR_MAX_DATA_SIZE (64)
32#define CY_CTX_USB_MAX_DATA_SIZE (130 + 23)
33#define CY_CTX_TUR_MAX_DATA_SIZE (12)
34#endif
35
36/* Summary
37 This response indicates a command has been processed
38 and returned a status.
39
40 Direction
41 West Bridge -> P Port Processor
42 P Port Processor -> West Bridge
43
44 Length (in transfers)
45 1
46
47 Mailbox0
48 * Context = all
49 * Response Code = 0
50
51 D0
52 * 0 = success (CY_AS_ERROR_SUCCESS)
53 * non-zero = error code
54
55 Description
56 This response indicates that a request was processed
57 and no data was generated as a result of the request
58 beyond a single 16 bit status value. This response
59 contains the 16 bit data value.
60 */
61#define CY_RESP_SUCCESS_FAILURE (0)
62
63/* Summary
64 This response indicates an invalid request was sent
65
66 Direction
67 West Bridge -> P Port Processor
68 P Port Processor -> West Bridge
69
70 Length (in transfers)
71 1
72
73 Mailbox0
74 * Context = all
75 * Response Code = 1
76
77 D0
78 * Mailbox contents for invalid request
79
80 Description
81 This response is returned when a request is sent
82 that contains an invalid
83 context or request code.
84*/
85#define CY_RESP_INVALID_REQUEST (1)
86
87/* Summary
88 This response indicates a request of invalid length was sent
89
90 Direction
91 West Bridge -> P Port Processor
92 P Port Processor -> West Bridge
93
94 Length (in transfers)
95 1
96
97 Mailbox0
98 * Context = all
99 * Response Code = 2
100
101 D0
102 * Mailbox contenxt for invalid request
103 * Length for invalid request
104
105 Description
106 The software API and firmware sends requests across the
107 P Port to West Bridge interface on different contexts.
108 Each contexts has a maximum size of the request packet
109 that can be received. The size of a request can be
110 determined during the first cycle of a request transfer.
111 If the request is larger than can be handled by the
112 receiving context this response is returned. Note that
113 the complete request is received before this response is
114 sent, but that the request is dropped after this response
115 is sent.
116*/
117#define CY_RESP_INVALID_LENGTH (2)
118
119
120/* Summary
121 This response indicates a request was made to an
122 invalid storage address.
123
124 Direction
125 West Bridge -> P Port Processor
126
127 Length (in transfers)
128 1
129
130 Mailbox0
131 * Context = all
132 * Response Code = 0
133
134 D0
135 Bits 15 - 12 : Media Type
136 * 0 = NAND
137 * 1 = SD Flash
138 * 2 = MMC Flash
139 * 3 = CE-ATA
140
141 Bits 11 - 8 : Zero based device index
142
143 Bits 7 - 0 : Zero based unit index
144
145 D1
146 Upper 16 bits of block address
147
148 D2
149 Lower 16 bits of block address
150
151 D3
152 Portion of address that is invalid
153 * 0 = Media Type
154 * 1 = Device Index
155 * 2 = Unit Index
156 * 3 = Block Address
157
158 Description
159 This response indicates a request to an invalid storage media
160 address
161 */
162#define CY_RESP_NO_SUCH_ADDRESS (3)
163
164
165/******************************************************/
166
167/*@@General requests
168 Summary
169 The general requests include:
170 * CY_RQT_GET_FIRMWARE_VERSION
171 * CY_RQT_SET_TRACE_LEVEL
172 * CY_RQT_INITIALIZATION_COMPLETE
173 * CY_RQT_READ_MCU_REGISTER
174 * CY_RQT_WRITE_MCU_REGISTER
175 * CY_RQT_STORAGE_MEDIA_CHANGED
176 * CY_RQT_CONTROL_ANTIOCH_HEARTBEAT
177 * CY_RQT_PREPARE_FOR_STANDBY
178 * CY_RQT_ENTER_SUSPEND_MODE
179 * CY_RQT_OUT_OF_SUSPEND
180 * CY_RQT_GET_GPIO_STATE
181 * CY_RQT_SET_GPIO_STATE
182 * CY_RQT_SET_SD_CLOCK_FREQ
183 * CY_RQT_WB_DEVICE_MISMATCH
184 * CY_RQT_BOOTLOAD_NO_FIRMWARE
185 * CY_RQT_RESERVE_LNA_BOOT_AREA
186 * CY_RQT_ABORT_P2S_XFER
187 */
188
189#ifndef __doxygen__
190#define CY_RQT_GENERAL_RQT_CONTEXT (0)
191#endif
192
193/* Summary
194 This command returns the firmware version number,
195 media types supported and debug/release mode information.
196
197 Direction
198 P Port Processor-> West Bridge
199
200 Length (in transfers)
201 1
202
203 MailBox0
204 * Context = 0
205 * Request Code = 0
206
207 Description
208 The response contains the 16-bit major version, the
209 16-bit minor version, the 16 bit build number, media
210 types supported and release/debug mode information.
211
212 Responses
213 * CY_RESP_FIRMWARE_VERSION
214 */
215#define CY_RQT_GET_FIRMWARE_VERSION (0)
216
217
218/* Summary
219 This command changes the trace level and trace information
220 destination within the West Bridge firmware.
221
222 Direction
223 P Port Processor-> West Bridge
224
225 Length (in transfers)
226 1
227
228 MailBox0
229 * Context = 0
230 * Request Code = 1
231
232 D0
233 Trace Level
234 * 0 = no trace information
235 * 1 = state information
236 * 2 = function call
237 * 3 = function call with args/return value
238
239 D1
240 Bits 12 - 15 : MediaType
241 * 0 = NAND
242 * 1 = SDIO Flash
243 * 2 = MMC Flash
244 * 3 = CE-ATA
245
246 Bits 8 - 11 : Zero based device index
247
248 Bits 0 - 7 : Zero based unit index
249
250 Description
251 The West Bridge firmware contains debugging facilities that can
252 be used to trace the execution of the firmware. This request
253 sets the level of tracing information that is stored and the
254 location where it is stored.
255
256 Responses
257 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
258 * CY_RESP_NO_SUCH_ADDRESS
259 */
260#define CY_RQT_SET_TRACE_LEVEL (1)
261
262/* Summary
263 This command indicates that the firmware is up and ready
264 for communications with the P port processor.
265
266 Direction
267 West Bridge -> P Port Processor
268
269 Length (in transfers)
270 2
271
272 Mailbox0
273 * Context = 0
274 * Request Code = 3
275
276 D0
277 Major Version
278
279 D1
280 Minor Version
281
282 D2
283 Build Number
284
285 D3
286 Bits 15-8: Media types supported on Bus 1.
287 Bits 7-0: Media types supported on Bus 0.
288 Bits 8, 0: NAND support.
289 * 0: NAND is not supported.
290 * 1: NAND is supported.
291 Bits 9, 1: SD memory card support.
292 * 0: SD memory card is not supported.
293 * 1: SD memory card is supported.
294 Bits 10, 2: MMC card support.
295 * 0: MMC card is not supported.
296 * 1: MMC card is supported.
297 Bits 11, 3: CEATA drive support
298 * 0: CEATA drive is not supported.
299 * 1: CEATA drive is supported.
300 Bits 12, 4: SD IO card support.
301 * 0: SD IO card is not supported.
302 * 1: SD IO card is supported.
303
304 D4
305 Bits 15 - 8 : MTP information
306 * 0 : MTP not supported in firmware
307 * 1 : MTP supported in firmware
308 Bits 7 - 0 : Debug/Release mode information.
309 * 0 : Release mode
310 * 1 : Debug mode
311
312 Description
313 When the West Bridge firmware is loaded it being by performing
314 initialization. Initialization must be complete before West
315 Bridge is ready to accept requests from the P port processor.
316 This request is sent from West Bridge to the P port processor
317 to indicate that initialization is complete.
318
319 Responses
320 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
321*/
322#define CY_RQT_INITIALIZATION_COMPLETE (3)
323
324/* Summary
325 This command requests the firmware to read and return the contents
326 of a MCU accessible
327 register.
328
329 Direction
330 P Port Processor -> West Bridge
331
332 Length (in transfers)
333 1
334
335 Mailbox0
336 * Context = 0
337 * Request code = 4
338
339 D0
340 Address of register to read
341
342 Description
343 This debug command allows the processor to read the contents of
344 a MCU accessible register.
345
346 Responses
347 * CY_RESP_MCU_REGISTER_DATA
348 */
349#define CY_RQT_READ_MCU_REGISTER (4)
350
351/* Summary
352 This command requests the firmware to write to an MCU
353 accessible register.
354
355 Direction
356 P Port Processor -> West Bridge
357
358 Length (in transfers)
359 1
360
361 Mailbox0
362 * Context = 0
363 * Request code = 5
364
365 D0
366 Address of register to be written
367
368 D1
369 Bits 15 - 8 : Mask to be applied to existing data.
370 Bits 7 - 0 : Data to be ORed with masked data.
371
372 Description
373 This debug command allows the processor to write to an MCU
374 accessible register.
375 Note: This has to be used with caution, and is supported by
376 the firmware only in special debug builds.
377
378 Responses
379 * CY_RESP_SUCCESS_FAILURE
380 */
381#define CY_RQT_WRITE_MCU_REGISTER (5)
382
383/* Summary
384 This command tells the West Bridge firmware that a change in
385 storage media has been detected.
386
387 Direction
388 P Port Processor -> West Bridge
389
390 Length (in transfers)
391 1
392
393 Mailbox0
394 * Context = 0
395 * Request code = 6
396
397 Description
398 If the insertion or removal of SD or MMC cards is detected by
399 hardware external to West Bridge, this command is used to tell
400 the West Bridge firmware to re-initialize the storage controlled
401 by the device.
402
403 Responses
404 * CY_RESP_SUCCESS_FAILURE
405*/
406#define CY_RQT_STORAGE_MEDIA_CHANGED (6)
407
408/* Summary
409 This command enables/disables the periodic heartbeat message
410 from the West Bridge firmware to the processor.
411
412 Direction
413 P Port Processor -> West Bridge
414
415 Length (in transfers)
416 1
417
418 Mailbox0
419 * Context = 0
420 * Request code = 7
421
422 Description
423 This command enables/disables the periodic heartbeat message
424 from the West Bridge firmware to the processor. The heartbeat
425 message is left enabled by default, and can lead to a loss
426 in performance on the P port interface.
427
428 Responses
429 * CY_RESP_SUCCESS_FAILURE
430 */
431#define CY_RQT_CONTROL_ANTIOCH_HEARTBEAT (7)
432
433/* Summary
434 This command requests the West Bridge firmware to prepare for
435 the device going into standby
436 mode.
437
438 Direction
439 P Port Processor -> West Bridge
440
441 Length (in transfers)
442 1
443
444 Mailbox0
445 * Context = 0
446 * Request code = 8
447
448 Description
449 This command is sent by the processor to the West Bridge as
450 preparation for going into standby mode. The request allows the
451 firmware to complete any pending/cached storage operations before
452 going into the low power state.
453
454 Responses
455 * CY_RESP_SUCCESS_FAILURE
456 */
457#define CY_RQT_PREPARE_FOR_STANDBY (8)
458
459/* Summary
460 Requests the firmware to go into suspend mode.
461
462 Direction
463 P Port Processor -> West Bridge
464
465 Length (in transfers)
466 1
467
468 Mailbox0
469 * Context = 0
470 * Request code = 9
471
472 D0
473 Bits 7-0: Wakeup control information.
474
475 Description
476 This command is sent by the processor to the West Bridge to
477 request the device to be placed in suspend mode. The firmware
478 will complete any pending/cached storage operations before
479 going into the low power state.
480
481 Responses
482 * CY_RESP_SUCCESS_FAILURE
483 */
484#define CY_RQT_ENTER_SUSPEND_MODE (9)
485
486/* Summary
487 Indicates that the device has left suspend mode.
488
489 Direction
490 West Bridge -> P Port Processor
491
492 Length (in transfers)
493 1
494
495 Mailbox0
496 * Context = 0
497 * Request code = 10
498
499 Description
500 This message is sent by the West Bridge to the Processor
501 to indicate that the device has woken up from suspend mode,
502 and is ready to accept new requests.
503
504 Responses
505 * CY_RESP_SUCCESS_FAILURE
506 */
507#define CY_RQT_OUT_OF_SUSPEND (10)
508
509/* Summary
510 Request to get the current state of an West Bridge GPIO pin.
511
512 Direction
513 P Port Processor -> West Bridge
514
515 Length (in transfers)
516 1
517
518 Mailbox0
519 * Context = 0
520 * Request code = 11
521
522 D0
523 Bits 15 - 8 : GPIO pin identifier
524
525 Responses
526 * CY_RESP_GPIO_STATE
527
528 Description
529 Request from the processor to get the current state of
530 an West Bridge GPIO pin.
531 */
532#define CY_RQT_GET_GPIO_STATE (11)
533
534/* Summary
535 Request to update the output value on an West Bridge
536 GPIO pin.
537
538 Direction
539 P Port Processor -> West Bridge
540
541 Length (in transfers)
542 1
543
544 Mailbox0
545 * Context = 0
546 * Request code = 12
547
548 D0
549 Bits 15 - 8 : GPIO pin identifier
550 Bit 0 : Desired output state
551
552 Responses
553 * CY_RESP_SUCCESS_FAILURE
554
555 Description
556 Request from the processor to update the output value on
557 an West Bridge GPIO pin.
558 */
559#define CY_RQT_SET_GPIO_STATE (12)
560
561/* Summary
562 Set the clock frequency on the SD interface of the West
563 Bridge device.
564
565 Direction
566 P Port Processor -> West Bridge
567
568 Length (in transfers)
569 1
570
571 Mailbox0
572 * Context = 0
573 * Request code = 13
574
575 D0
576 Bit 8: Type of SD/MMC media
577 0 = low speed media
578 1 = high speed media
579 Bit 0: Clock frequency selection
580 0 = Default frequency
581 1 = Alternate frequency (24 MHz in both cases)
582
583 Description
584 This request is sent by the processor to set the operating clock
585 frequency used on the SD interface of the device.
586
587 Responses
588 * CY_RESP_SUCCESS_FAILURE
589 */
590#define CY_RQT_SET_SD_CLOCK_FREQ (13)
591
592/* Summary
593 Indicates the firmware downloaded to West Bridge cannot
594 run on the active device.
595
596 Direction
597 West Bridge -> P Port processor
598
599 Length (in transfers)
600 1
601
602 Mailbox0
603 * Context = 0
604 * Request code = 14
605
606 Description
607 Some versions of West Bridge firmware can only run on specific
608 types/versions of the West Bridge device. This error is
609 returned when a firmware image is downloaded onto a device that
610 does not support it.
611
612 Responses
613 * None
614 */
615#define CY_RQT_WB_DEVICE_MISMATCH (14)
616
617/* Summary
618 This command is indicates that no firmware was found in the
619 storage media.
620
621 Direction
622 West Bridge -> P Port Processor
623
624 Length (in transfers)
625 1
626
627 Mailbox0
628 * Context = 0
629 * Request code = 15
630
631 Description
632 The command is received only in case of silicon with bootloader
633 ROM. The device sends the request if there is no firmware image
634 found in the storage media or the image is corrupted. The
635 device is waiting for P port to download a valid firmware image.
636
637 Responses
638 * None
639 */
640#define CY_RQT_BOOTLOAD_NO_FIRMWARE (15)
641
642/* Summary
643 This command reserves first numzones zones of nand device for
644 storing processor boot image.
645
646 Direction
647 P Port Processor-> West Bridge
648
649 Length (in transfers)
650 1
651
652 MailBox0
653 * Context = 0
654 * Request Code = 16
655
656 D0
657 Bits 7-0: numzones
658
659 Description
660 The first numzones zones in nand device will be used for storing
661 proc boot image. LNA firmware in Astoria will work on this nand
662 area and boots the processor which will then use the remaining
663 nand for usual purposes.
664
665 Responses
666 * CY_RESP_SUCCESS_FAILURE
667 */
668#define CY_RQT_RESERVE_LNA_BOOT_AREA (16)
669
670/* Summary
671 This command cancels the processing of a P2S operation in
672 firmware.
673
674 Direction
675 P Port Processor -> West Bridge
676
677 Length (in transfers)
678 1
679
680 MailBox0
681 * Context = 0
682 * Request Code = 17
683
684 Responses
685 * CY_RESP_SUCCESS_FAILURE
686*/
687#define CY_RQT_ABORT_P2S_XFER (17)
688
689/*
690 * Used for debugging, ignore for normal operations
691 */
692#ifndef __doxygen__
693#define CY_RQT_DEBUG_MESSAGE (127)
694#endif
695
696/******************************************************/
697
698/*@@General responses
699 Summary
700 The general responses include:
701 * CY_RESP_FIRMWARE_VERSION
702 * CY_RESP_MCU_REGISTER_DATA
703 * CY_RESP_GPIO_STATE
704 */
705
706
707/* Summary
708 This response indicates success and contains the firmware
709 version number, media types supported by the firmware and
710 release/debug mode information.
711
712 Direction
713 West Bridge -> P Port Processor
714
715 Length (in transfers)
716 2
717
718 MailBox0
719 * Context = 0
720 * Response Code = 16
721
722 D0
723 Major Version
724
725 D1
726 Minor Version
727
728 D2
729 Build Number
730
731 D3
732 Bits 15-8: Media types supported on Bus 1.
733 Bits 7-0: Media types supported on Bus 0.
734 Bits 8, 0: NAND support.
735 * 0: NAND is not supported.
736 * 1: NAND is supported.
737 Bits 9, 1: SD memory card support.
738 * 0: SD memory card is not supported.
739 * 1: SD memory card is supported.
740 Bits 10, 2: MMC card support.
741 * 0: MMC card is not supported.
742 * 1: MMC card is supported.
743 Bits 11, 3: CEATA drive support
744 * 0: CEATA drive is not supported.
745 * 1: CEATA drive is supported.
746 Bits 12, 4: SD IO card support.
747 * 0: SD IO card is not supported.
748 * 1: SD IO card is supported.
749
750 D4
751 Bits 15 - 8 : MTP information
752 * 0 : MTP not supported in firmware
753 * 1 : MTP supported in firmware
754 Bits 7 - 0 : Debug/Release mode information.
755 * 0 : Release mode
756 * 1 : Debug mode
757
758 Description
25985edc 759 This response is sent to return the firmware version
81eb669b
DC		 760 number to the requestor.
761 */
762#define CY_RESP_FIRMWARE_VERSION (16)
763
764/* Summary
765 This response returns the contents of a MCU accessible
766 register to the processor.
767
768 Direction
769 West Bridge -> P Port Processor
770
771 Length (in transfers)
772 1
773
774 MailBox0
775 * Context = 0
776 * Response code = 17
777
778 D0
779 Bits 7 - 0 : MCU register contents
780
781 Description
782 This response is sent by the firmware in response to the
783 CY_RQT_READ_MCU_REGISTER
784 command.
785 */
786#define CY_RESP_MCU_REGISTER_DATA (17)
787
788/* Summary
789 Reports the current state of an West Bridge GPIO pin.
790
791 Direction
792 West Bridge -> P Port Processor
793
794 Length (in transfers)
795 1
796
797 MailBox0
798 * Context = 0
799 * Request code = 18
800
801 D0
802 Bit 0: Current state of the GP input pin
803
804 Description
805 This response is sent by the West Bridge to report the
806 current state observed on a general purpose input pin.
807 */
808#define CY_RESP_GPIO_STATE (18)
809
810
811/* Summary
812 This command notifies West Bridge the polarity of the
813 SD power pin
814
815 Direction
816 P Port Processor -> West Bridge
817
818 Length (in transfers)
819 1
820
821 MailBox0
822 * Context = 0
823 * Request Code = 19
824 D0: CyAnMiscActivehigh / CyAnMiscActivelow
825
826 Responses
827 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
828
829 */
830
831#define CY_RQT_SDPOLARITY (19)
832
833/******************************/
834
835/*@@Resource requests
836 Summary
837
838 The resource requests include:
839 * CY_RQT_ACQUIRE_RESOURCE
840 * CY_RQT_RELEASE_RESOURCE
841 */
842
843
844
845
846
847#ifndef __doxygen__
848#define CY_RQT_RESOURCE_RQT_CONTEXT (1)
849#endif
850
851
852/* Summary
853 This command is a request from the P port processor
854 for ownership of a resource.
855
856 Direction
857 P Port Processor -> West Bridge
858
859 Length (in transfers)
860 1
861
862 MailBox0
863 * Context = 1
864 * Request Code = 0
865
866 D0
867 Resource
868 * 0 = USB
869 * 1 = SDIO/MMC
870 * 2 = NAND
871
872 D1
873 Force Flag
874 * 0 = Normal
875 * 1 = Force
876
877 Description
878 The resource may be the USB pins, the SDIO/MMC bus,
879 or the NAND bus.
880
881 Responses
882 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
883 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RELEASED
884 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_RESOURCE
885 */
886#define CY_RQT_ACQUIRE_RESOURCE (0)
887
888
889/* Summary
890 This command is a request from the P port processor
891 to release ownership of a resource.
892
893 Direction
894 P Port Processor -> West Bridge
895
896 Length (in transfers)
897 1
898
899 MailBox0
900 * Context = 1
901 * Request Code = 1
902
903 D0
904 Resource
905 * 0 = USB
906 * 1 = SDIO/MMC
907 * 2 = NAND
908
909 Description
910 The resource may be the USB pins, the SDIO/MMC bus, or
911 the NAND bus.
912
913 Responses
914 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
915 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_OWNER
916 */
917#define CY_RQT_RELEASE_RESOURCE (1)
918
919
920/****************************/
921
922/*@@Storage requests
923 Summary
924 The storage commands include:
925 * CY_RQT_START_STORAGE
926 * CY_RQT_STOP_STORAGE
927 * CY_RQT_CLAIM_STORAGE
928 * CY_RQT_RELEASE_STORAGE
929 * CY_RQT_QUERY_MEDIA
930 * CY_RQT_QUERY_DEVICE
931 * CY_RQT_QUERY_UNIT
932 * CY_RQT_READ_BLOCK
933 * CY_RQT_WRITE_BLOCK
934 * CY_RQT_MEDIA_CHANGED
935 * CY_RQT_ANTIOCH_CLAIM
936 * CY_RQT_ANTIOCH_RELEASE
937 * CY_RQT_SD_INTERFACE_CONTROL
938 * CY_RQT_SD_REGISTER_READ
939 * CY_RQT_CHECK_CARD_LOCK
940 * CY_RQT_QUERY_BUS
941 * CY_RQT_PARTITION_STORAGE
942 * CY_RQT_PARTITION_ERASE
943 * CY_RQT_GET_TRANSFER_AMOUNT
944 * CY_RQT_ERASE
945 * CY_RQT_SDIO_READ_DIRECT
946 * CY_RQT_SDIO_WRITE_DIRECT
947 * CY_RQT_SDIO_READ_EXTENDED
948 * CY_RQT_SDIO_WRITE_EXTENDED
949 * CY_RQT_SDIO_INIT_FUNCTION
950 * CY_RQT_SDIO_QUERY_CARD
951 * CY_RQT_SDIO_GET_TUPLE
952 * CY_RQT_SDIO_ABORT_IO
953 * CY_RQT_SDIO_INTR
954 * CY_RQT_SDIO_SUSPEND
955 * CY_RQT_SDIO_RESUME
956 * CY_RQT_SDIO_RESET_DEV
957 * CY_RQT_P2S_DMA_START
958 */
959#ifndef __doxygen__
960#define CY_RQT_STORAGE_RQT_CONTEXT (2)
961#endif
962
963/* Summary
964 This command requests initialization of the storage stack.
965
966 Direction
967 P Port Processor -> West Bridge
968
969 Length (in transfers)
970 1
971
972 MailBox0
973 * Context = 2
974 * Request Code = 0
975
976 Description
977 This command is required before any other storage related command
978 can be send to the West Bridge firmware.
979
980 Responses
981 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
982 * CY_RESP_SUCCESS_FAILURE:CY_ERR_ALREADY_RUNNING
983 */
984#define CY_RQT_START_STORAGE (0)
985
986
987/* Summary
988 This command requests shutdown of the storage stack.
989
990 Direction
991 P Port Processor -> West Bridge
992
993 Length (in transfers)
994 1
995
996 MailBox0
997 * Context = 2
998 * Request Code = 1
999
1000 Responses
1001 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1002 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RUNNING
1003 */
1004#define CY_RQT_STOP_STORAGE (1)
1005
1006
1007/* Summary
1008 This command requests ownership of the given media
1009 type by the P port processor.
1010
1011 Direction
1012 P Port Processor -> West Bridge
1013
1014 Length (in transfers)
1015 1
1016
1017 MailBox0
1018 * Context = 2
1019 * Request Code = 2
1020
1021 D0
1022 Bits 12 - 15 : Bus Index
1023 Bits 8 - 11 : Zero based device index
1024
1025 Responses
1026 * CY_RESP_MEDIA_CLAIMED_RELEASED
1027 * CY_RESP_NO_SUCH_ADDRESS
1028 */
1029#define CY_RQT_CLAIM_STORAGE (2)
1030
1031
1032/* Summary
1033 This command releases ownership of a given media type
1034 by the P port processor.
1035
1036 Direction
1037 P Port Processor -> West Bridge
1038
1039 Length (in transfers)
1040 1
1041
1042 MailBox0
1043 * Context = 2
1044 * Request Code = 3
1045
1046 D0
1047 Bits 12 - 15 : Bus Index
1048 Bits 8 - 11 : Zero based device index
1049
1050 Responses
1051 * CY_RESP_MEDIA_CLAIMED_RELEASED
1052 * CY_RESP_NO_SUCH_ADDRESS
1053 */
1054#define CY_RQT_RELEASE_STORAGE (3)
1055
1056
1057/* Summary
1058 This command returns the total number of logical devices
1059 of the given type of media.
1060
1061 Direction
1062 P Port Processor -> West Bridge
1063
1064 Length (in transfers)
1065 1
1066
1067 MailBox0
1068 * Context = 2
1069 * Request Code = 4
1070
1071 D0
1072 Bits 12 - 15 : MediaType
1073 * 0 = NAND
1074 * 1 = SDIO Flash
1075 * 2 = MMC Flash
1076 * 3 = CE-ATA
1077
1078 Bits 8 - 11 : Not Used
1079
1080 Bits 0 - 7 : Not Used
1081
1082 Responses
1083 * CY_RESP_MEDIA_DESCRIPTOR
1084 * CY_RESP_NO_SUCH_ADDRESS
1085 */
1086#define CY_RQT_QUERY_MEDIA (4)
1087
1088
1089/* Summary
1090 This command queries a given device to determine
1091 information about the number of logical units on
1092 the given device.
1093
1094 Direction
1095 P Port Processor -> West Bridge
1096
1097 Length (in transfers)
1098 1
1099
1100 MailBox0
1101 * Context = 2
1102 * Request Code = 5
1103
1104 D0
1105 Bits 12 - 15 : Bus index
1106 Bits 8 - 11 : Zero based device index
1107 Bits 0 - 7 : Not Used
1108
1109 Responses
1110 * CY_RESP_DEVICE_DESCRIPTOR
1111 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE
1112 * CY_RESP_NO_SUCH_ADDRESS
1113 */
1114#define CY_RQT_QUERY_DEVICE (5)
1115
1116
1117/* Summary
1118 This command queries a given device to determine
1119 information about the size and location of a logical unit
1120 located on a physical device.
1121
1122 Direction
1123 P Port Processor -> West Bridge
1124
1125 Length (in transfers)
1126 1
1127
1128 MailBox0
1129 * Context = 2
1130 * Request Code = 6
1131
1132 D0
1133 Bits 12 - 15 : Bus index
1134 Bits 8 - 11 : Zero based device index
1135 Bits 0 - 7 : Zero based unit index
1136
1137 Responses
1138 * CY_RESP_UNIT_DESCRIPTOR
1139 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE
1140 * CY_RESP_NO_SUCH_ADDRESS
1141 */
1142#define CY_RQT_QUERY_UNIT (6)
1143
1144
1145/* Summary
1146 This command initiates the read of a specific block
1147 from the given media,
1148 device and unit.
1149
1150 Direction
1151 P Port Processor -> West Bridge
1152
1153 Length (in transfers)
1154 2
1155
1156 MailBox0
1157 * Context = 2
1158 * Request Code = 7
1159
1160 D0
1161 Bits 12 - 15 : Bus index
1162 Bits 8 - 11 : Zero based device index
1163 Bits 0 - 7 : Zero based unit index
1164
1165 D1
1166 Upper 16 bits of block address
1167
1168 D2
1169 Lower 16 bits of block address
1170
1171 D3
1172 BIT 8 - 15 : Upper 8 bits of Number of blocks
1173
1174 BIT 0 - 7 : Reserved
1175
1176 * D4 *
1177 BITS 8 - 15 : Lower 8 bits of Number of blocks
1178 BITS 1 - 7 : Not Used
1179 BIT 0 : Indicates whether this command is a
1180 part of a P2S only burst.
1181
1182 Responses
1183 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1184 * CY_RESP_ANTIOCH_DEFERRED_ERROR
1185 */
1186#define CY_RQT_READ_BLOCK (7)
1187
1188
1189/* Summary
1190 This command initiates the write of a specific block
1191 from the given media, device and unit.
1192
1193 Direction
1194 P Port Processor -> West Bridge
1195
1196 Length (in transfers)
1197 2
1198
1199 MailBox0
1200 * Context = 2
1201 * Request Code = 8
1202
1203 D0
1204 Bits 12 - 15 : Bus index
1205 Bits 8 - 11 : Zero based device index
1206 Bits 0 - 7 : Zero based unit index
1207
1208 D1
1209 Upper 16 bits of block address
1210
1211 D2
1212 Lower 16 bits of block address
1213
1214 D3
1215 BIT 8 - 15 : Upper 8 bits of Number of blocks
1216
1217 BIT 0 - 7 : Reserved
1218
1219 * D4 *
1220 BITS 8 - 15 : Lower 8 bits of Number of blocks
1221 BITS 1 - 7 : Not Used
1222 BIT 0 : Indicates whether this command is a
1223 part of a P2S only burst.
1224
1225 Responses
1226 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1227 * CY_RESP_ANTIOCH_DEFERRED_ERROR
1228 */
1229#define CY_RQT_WRITE_BLOCK (8)
1230
1231/* Summary
1232 This request is sent when the West Bridge device detects
1233 a change in the status of the media.
1234
1235 Direction
1236 West Bridge -> P Port Processor
1237
1238 Length (in transfers)
1239 1
1240
1241 Mailbox0
1242 * Context = 2
1243 * Request Code = 9
1244
1245 D0
1246 Bits 12 - 15 : Bus index
1247 Bits 0 - 7 : Media type
1248
1249 D1
1250 Bit 0 : Action
1251 * 0 = Inserted
1252 * 1 = Removed
1253
1254 Description
1255 When the media manager detects the insertion or removal
1256 of a media from the West Bridge port, this request is sent
1257 from the West Bridge device to the P Port processor to
1258 inform the processor of the change in status of the media.
1259 This request is sent for both an insert operation and a
1260 removal operation.
1261
1262 Responses
1263 * CY_RESPO_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1264*/
1265#define CY_RQT_MEDIA_CHANGED (9)
1266
1267/* Summary
1268 This request is sent when the USB module wishes to claim
1269 storage media.
1270
1271 Direction
1272 West Bridge -> P Port Processor
1273
1274 Length (in transfers)
1275 1
1276
1277 Mailbox0
1278 * Context = 2
1279 * Request Code = 10
1280
1281 D0
1282 Bit 0:
1283 * 0 = do not release NAND
1284 * 1 = release NAND
1285
1286 Bit 1:
1287 * 0 = do not release SD Flash
1288 * 1 = release SD Flash
1289
1290 Bit 2:
1291 * 0 = do not release MMC flash
1292 * 1 = release MMC flash
1293
1294 Bit 3:
1295 * 0 = do not release CE-ATA storage
1296 * 1 = release CE-ATA storage
1297
1298 Bit 8:
1299 * 0 = do not release storage on bus 0
1300 * 1 = release storage on bus 0
1301
1302 Bit 9:
1303 * 0 = do not release storage on bus 1
1304 * 1 = release storage on bus 1
1305
1306 Description
1307 When the USB cable is attached to the West Bridge device,
1308 West Bridge will enumerate the storage devices per the USB
1309 initialization of West Bridge. In order for West Bridge to
1310 respond to requests received via USB for the mass storage
1311 devices, the USB module must claim the storeage. This
1312 request is a request to the P port processor to release the
1313 storage medium. The medium will not be visible on the USB
1314 host, until it has been released by the processor.
1315*/
1316#define CY_RQT_ANTIOCH_CLAIM (10)
1317
1318/* Summary
1319 This request is sent when the P port has asked West Bridge to
1320 release storage media, and the West Bridge device has
1321 completed this.
1322
1323 Direction
1324 West Bridge -> P Port Processor
1325
1326 Length (in transfers)
1327 1
1328
1329 Mailbox0
1330 * Context = 2
1331 * Request Code = 11
1332
1333 D0
1334 Bit 0:
1335 * 0 = No change in ownership of NAND storage
1336 * 1 = NAND ownership has been given to processor
1337
1338 Bit 1:
1339 * 0 = No change in ownership of SD storage
1340 * 1 = SD ownership has been given to processor
1341
1342 Bit 2:
1343 * 0 = No change in ownership of MMC storage
1344 * 1 = MMC ownership has been given to processor
1345
1346 Bit 3:
1347 * 0 = No change in ownership of CE-ATA storage
1348 * 1 = CE-ATA ownership has been given to processor
1349
1350 Bit 4:
1351 * 0 = No change in ownership of SD IO device
1352 * 1 = SD IO device ownership has been given to processor
1353
1354 Bit 8:
1355 * 0 = No change in ownership of storage on bus 0
1356 * 1 = Bus 0 ownership has been given to processor
1357
1358 Bit 9:
1359 * 0 = No change in ownership of storage on bus 1
1360 * 1 = Bus 1 ownership has been given to processor
1361
1362 Description
1363 When the P port asks for control of a particular media, West
1364 Bridge may be able to release the media immediately. West
1365 Bridge may also need to complete the flush of buffers before
1366 releasing the media. In the later case, West Bridge will
1367 indicated a release is not possible immediately and West Bridge
1368 will send this request to the P port when the release has been
1369 completed.
1370*/
1371#define CY_RQT_ANTIOCH_RELEASE (11)
1372
1373/* Summary
1374 This request is sent by the Processor to enable/disable the
1375 handling of SD card detection and SD card write protection
1376 by the firmware.
1377
1378 Direction
1379 P Port Processor -> West Bridge
1380
1381 Length (in transfers)
1382 1
1383
1384 Mailbox0
1385 * Context = 2
1386 * Request code = 12
1387
1388 D0
1389 Bit 8: Enable/disable handling of card detection.
1390 Bit 1: SDAT_3 = 0, GIPO_0 = 1
1391 Bit 0: Enable/disable handling of write protection.
1392
1393 Description
1394 This request is sent by the Processor to enable/disable
1395 the handling of SD card detection and SD card write
1396 protection by the firmware.
1397 */
1398#define CY_RQT_SD_INTERFACE_CONTROL (12)
1399
1400/* Summary
1401 Request from the processor to read a register on the SD
1402 card, and return the contents.
1403
1404 Direction
1405 P Port Processor -> West Bridge
1406
1407 Length (in transfers)
1408 1
1409
1410 Mailbox0
1411 * Context = 2
1412 * Request code = 13
1413
1414 D0
1415 Bits 12 - 15 : MediaType
1416 * 0 = Reserved
1417 * 1 = SDIO Flash
1418 * 2 = MMC Flash
1419 * 3 = Reserved
1420
1421 Bits 8 - 11 : Zero based device index
1422 Bits 0 - 7 : Type of register to read
1423
1424 Description
1425 This request is sent by the processor to instruct the
1426 West Bridge to read a register on the SD/MMC card, and
1427 send the contents back through the CY_RESP_SD_REGISTER_DATA
1428 response.
1429 */
1430#define CY_RQT_SD_REGISTER_READ (13)
1431
1432/* Summary
1433 Check if the SD/MMC card connected to West Bridge is
1434 password locked.
1435
1436 Direction
1437 P Port Processor -> West Bridge
1438
1439 Length (in transfers)
1440 1
1441
1442 Mailbox0
1443 * Context = 2
1444 * Request code = 14
1445
1446 D0
1447 Bits 12 - 15 : Bus index
1448 Bits 8 - 11 : Zero based device index
1449
1450 Description
1451 This request is sent by the processor to check if the
1452 SD/MMC connected to the West Bridge is locked with a
1453 password.
1454 */
1455#define CY_RQT_CHECK_CARD_LOCK (14)
1456
1457/* Summary
1458 This command returns the total number of logical devices on the
1459 given bus
1460
1461 Direction
1462 P Port Processor -> West Bridge
1463
1464 Length (in transfers)
1465 1
1466
1467 MailBox0
1468 * Context = 2
1469 * Request Code = 15
1470
1471 D0
1472 Bits 12 - 15 : Bus Number
1473
1474 Bits 0 - 11: Not Used
1475
1476 Responses
1477 * CY_RESP_BUS_DESCRIPTOR
1478 * CY_RESP_NO_SUCH_BUS
1479 */
1480#define CY_RQT_QUERY_BUS (15)
1481
1482/* Summary
1483 Divide a storage device into two partitions.
1484
1485 Direction
1486 P Port Processor -> West Bridge
1487
1488 Length (in transfers)
1489 1
1490
1491 MailBox0
1492 * Context = 2
1493 * Request code = 16
1494
1495 D0
1496 Bits 12 - 15 : Bus number
1497 Bits 8 - 11 : Device number
1498 Bits 0 - 7 : Not used
1499
1500 D1
1501 Size of partition 0 (MS word)
1502
1503 D2
1504 Size of partition 0 (LS word)
1505
1506 Responses
1507 * CY_RESP_SUCCESS_FAILURE
1508 */
1509#define CY_RQT_PARTITION_STORAGE (16)
1510
1511/* Summary
1512 Remove the partition table and unify all partitions on
1513 a storage device.
1514
1515 Direction
1516 P Port Processor -> West Bridge
1517
1518 Length (in transfers)
1519 1
1520
1521 MailBox0
1522 * Context = 2
1523 * Request code = 17
1524
1525 D0
1526 Bits 12 - 15 : Bus number
1527 Bits 8 - 11 : Device number
1528
1529 Responses
1530 * CY_RESP_SUCCESS_FAILURE
1531 */
1532#define CY_RQT_PARTITION_ERASE (17)
1533
1534/* Summary
1535 Requests the current transfer amount.
1536
1537 Direction
1538 P Port Processor -> West Bridge
1539
1540 Length (in transfers)
1541 1
1542
1543 MailBox0
1544 * Context = 2
1545 * Request code = 18
1546
1547 D0
1548 Bits 12 - 15 : Bus number
1549 Bits 8 - 11 : Device number
1550
1551 Responses
1552 * CY_RESP_TRANSFER_COUNT
1553 */
1554#define CY_RQT_GET_TRANSFER_AMOUNT (18)
1555
1556/* Summary
1557 Erases.
1558
1559 Direction
1560 P Port Processor -> West Bridge
1561
1562 Length (in transfers)
1563 2
1564
1565 MailBox0
1566 * Context = 2
1567 * Request code = 19
1568
1569 D0
1570 Bits 12 - 15 : Bus index
1571 Bits 8 - 11 : Zero based device index
1572 Bits 0 - 7 : Zero based unit index
1573
1574 D1
1575 Upper 16 bits of erase unit
1576
1577 D2
1578 Lower 16 bits of erase unit
1579
1580 D3
1581 BIT 8 - 15 : Upper 8 bits of Number of erase units
1582 BIT 0 - 7 : Reserved
1583
1584 * D4 *
1585 BIT 8 - 15 : Lower 8 bits of Number of erase units
1586 BIT 0 - 7 : Not Used
1587
1588 Responses
1589 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1590 */
1591#define CY_RQT_ERASE (19)
1592
1593/* Summary
1594 This command reads 1 byte from an SDIO card.
1595
1596 Direction
1597 P Port Processor -> West Bridge
1598
1599 Length (in transfers)
1600 1
1601
1602 MailBox0
1603 * Context = 2
1604 * Request Code = 23
1605
1606 D0
1607 Bits 12 - 15 : Bus index
1608 Bits 8 - 11 : Zero based device index
1609 Bits 0 - 7 : Zero based function number
1610
1611 D1
1612 Bits 8 - 15 : 0
1613 Bit 7 : 0 to indicate a read
1614 Bits 4 - 6 : Function number
1615 Bit 3 : 0
1616 Bit 2 : 1 if SDIO interrupt needs to be re-enabled.
1617 Bits 0 - 1 : Two Most significant bits of Read address
1618
1619 D2
1620 Bits 1 - 15 : 15 Least significant bits of Read address
1621 Bit 0 : 0
1622
1623
1624 Responses
1625 * CY_RESP_SUCCESS_FAILURE
1626 * CY_RESP_SDIO_DIRECT
1627*/
1628#define CY_RQT_SDIO_READ_DIRECT (23)
1629
1630/* Summary
1631 This command writes 1 byte to an SDIO card.
1632
1633 Direction
1634 P Port Processor -> West Bridge
1635
1636 Length (in transfers)
1637 1
1638
1639 MailBox0
1640 * Context = 2
1641 * Request Code = 24
1642
1643 D0
1644 Bits 12 - 15 : Bus index
1645 Bits 8 - 11 : Zero based device index
1646 Bits 0 - 7 : Zero based function number
1647
1648 D1
1649 Bits 8 - 15 : Data to write
1650 Bit 7 : 1 to indicate a write
1651 Bits 4 - 6 : Function number
1652 Bit 3 : 1 if Read after write is enabled
1653 Bit 2 : 1 if SDIO interrupt needs to be re-enabled.
1654 Bits 0 - 1 : Two Most significant bits of write address
1655
1656 D2
1657 Bits 1 - 15 : 15 Least significant bits of write address
1658 Bit 0 : 0
1659
1660
1661 Responses
1662 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1663 * CY_RESP_SDIO_DIRECT
1664*/
1665#define CY_RQT_SDIO_WRITE_DIRECT (24)
1666
1667/* Summary
1668 This command reads performs a multi block/byte read from
1669 an SDIO card.
1670
1671 Direction
1672 P Port Processor -> West Bridge
1673
1674 Length (in transfers)
1675 1
1676
1677 MailBox0
1678 * Context = 2
1679 * Request Code = 25
1680
1681 D0
1682 Bits 12 - 15 : Bus index
1683 Bits 8 - 11 : Zero based device index
1684 Bits 0 - 7 : Zero based function number
1685
1686 D1
1687 Bit 15 : 0 to indicate a read
1688 Bit 12 - 14 : Function Number
1689 Bit 11 : Block Mode
1690 Bit 10 : OpCode
1691 Bits 0 - 9 : 10 Most significant bits of Read address
1692
1693 D2
1694 Bits 9 - 15 : 7 Least significant bits of address
1695 Bits 0 - 8 : Block/Byte Count
1696
1697
1698 Responses
1699 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1700 * CY_RESP_SDIO_EXT
1701*/
1702#define CY_RQT_SDIO_READ_EXTENDED (25)
1703
1704/* Summary
1705 This command reads performs a multi block/byte write
1706 to an SDIO card.
1707
1708 Direction
1709 P Port Processor -> West Bridge
1710
1711 Length (in transfers)
1712 1
1713
1714 MailBox0
1715 * Context = 2
1716 * Request Code = 26
1717
1718 D0
1719 Bits 12 - 15 : Bus index
1720 Bits 8 - 11 : Zero based device index
1721 Bits 0 - 7 : Zero based function number
1722
1723 D1
1724 Bit 15 : 1 to indicate a write
1725 Bit 12 - 14 : Function Number
1726 Bit 11 : Block Mode
1727 Bit 10 : OpCode
1728 Bits 0 - 9 : 10 Most significant bits of Read address
1729
1730 D2
1731 Bits 9 - 15 : 7 Least significant bits of address
1732 Bits 0 - 8 : Block/Byte Count
1733
1734
1735 Responses
1736 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1737 * CY_RESP_SDIO_EXT
1738*/
1739#define CY_RQT_SDIO_WRITE_EXTENDED (26)
1740
1741/* Summary
1742 This command initialises an IO function on the SDIO card.
1743
1744 Direction
1745 P Port Processor -> West Bridge
1746
1747 Length (in transfers)
1748 1
1749
1750 MailBox0
1751 * Context = 2
1752 * Request Code = 27
1753
1754 D0
1755 Bits 12 - 15 : Bus index
1756 Bits 8 - 11 : Zero based device index
1757 Bits 0 - 7 : Zero based function number
1758
1759
1760 Responses
1761 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1762*/
1763#define CY_RQT_SDIO_INIT_FUNCTION (27)
1764
1765/* Summary
1766 This command gets properties of the SDIO card.
1767
1768 Direction
1769 P Port Processor -> West Bridge
1770
1771 Length (in transfers)
1772 1
1773
1774 MailBox0
1775 * Context = 2
1776 * Request Code = 28
1777
1778 D0
1779 Bits 12 - 15 : Bus index
1780 Bits 8 - 11 : Zero based device index
1781 Bits 0 - 7 : Zero
1782
1783 Responses
1784 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1785 * CY_RESP_QUERY_CARD
1786*/
1787#define CY_RQT_SDIO_QUERY_CARD (28)
1788
1789/* Summary
1790 This command reads a tuple from the CIS of an SDIO card.
1791
1792 Direction
1793 P Port Processor -> West Bridge
1794
1795 Length (in transfers)
1796 1
1797
1798 MailBox0
1799 * Context = 2
1800 * Request Code = 29
1801
1802 D0
1803 Bits 12 - 15 : Bus index
1804 Bits 8 - 11 : Zero based device index
1805 Bits 0 - 7 : Zero based function number
1806
1807 D1
1808 Bits 8 - 15 : Tuple ID to read
1809
1810 Responses
1811 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1812 * CY_RESP_SDIO_GET_TUPLE
1813*/
1814#define CY_RQT_SDIO_GET_TUPLE (29)
1815
1816/* Summary
1817 This command Aborts an IO operation.
1818
1819 Direction
1820 P Port Processor -> West Bridge
1821
1822 Length (in transfers)
1823 1
1824
1825 MailBox0
1826 * Context = 2
1827 * Request Code = 30
1828
1829 D0
1830 Bits 12 - 15 : Bus index
1831 Bits 8 - 11 : Zero based device index
1832 Bits 0 - 7 : Zero based function number
1833
1834
1835 Responses
1836 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1837*/
1838#define CY_RQT_SDIO_ABORT_IO (30)
1839
1840/* Summary
1841 SDIO Interrupt request sent to the processor from the West Bridge device.
1842
1843 Direction
1844 West Bridge ->P Port Processor
1845
1846 Length (in transfers)
1847 1
1848
1849 MailBox0
1850 * Context = 2
1851 * Request Code = 31
1852
1853 D0
1854 Bits 0 - 7 : Bus Index
1855
1856 Responses
1857 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1858*/
1859#define CY_RQT_SDIO_INTR (31)
1860
1861/* Summary
1862 This command Suspends an IO operation.
1863
1864 Direction
1865 P Port Processor -> West Bridge
1866
1867 Length (in transfers)
1868 1
1869
1870 MailBox0
1871 * Context = 2
1872 * Request Code = 32
1873
1874 D0
1875 Bits 12 - 15 : Bus index
1876 Bits 8 - 11 : Zero based device index
1877 Bits 0 - 7 : Zero based function number
1878
1879 Responses
1880 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1881*/
1882#define CY_RQT_SDIO_SUSPEND (32)
1883
1884/* Summary
1885 This command resumes a suspended operation.
1886
1887 Direction
1888 P Port Processor -> West Bridge
1889
1890 Length (in transfers)
1891 1
1892
1893 MailBox0
1894 * Context = 2
1895 * Request Code = 33
1896
1897 D0
1898 Bits 12 - 15 : Bus index
1899 Bits 8 - 11 : Zero based device index
1900 Bits 0 - 7 : Zero based function number
1901
1902 Responses
1903 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1904 * CY_RESP_SDIO_RESUME
1905*/
1906#define CY_RQT_SDIO_RESUME (33)
1907
1908/* Summary
1909 This command resets an SDIO device.
1910
1911 Direction
1912 P Port Processor -> West Bridge
1913
1914 Length (in transfers)
1915 1
1916
1917 MailBox0
1918 * Context = 2
1919 * Request Code = 34
1920
1921 D0
1922 Bits 12 - 15 : Bus index
1923 Bits 8 - 11 : Zero based device index
1924 Bits 0 - 7 : 0
1925
1926 Responses
1927 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1928*/
1929#define CY_RQT_SDIO_RESET_DEV (34)
1930
1931/* Summary
1932 This command asks the API to start the DMA transfer
1933 for a P2S operation.
1934
1935 Direction
1936 West Bridge -> P Port Processor
1937
1938 Length (in transfers)
1939 1
1940
1941 MailBox0
1942 * Context = 2
1943 * Request code = 35
1944
1945 Responses
1946 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
1947*/
1948#define CY_RQT_P2S_DMA_START (35)
1949
1950/******************************************************/
1951
1952/*@@Storage responses
1953 Summary
1954 The storage responses include:
1955 * CY_RESP_MEDIA_CLAIMED_RELEASED
1956 * CY_RESP_MEDIA_DESCRIPTOR
1957 * CY_RESP_DEVICE_DESCRIPTOR
1958 * CY_RESP_UNIT_DESCRIPTOR
1959 * CY_RESP_ANTIOCH_DEFERRED_ERROR
1960 * CY_RESP_SD_REGISTER_DATA
1961 * CY_RESP_SD_LOCK_STATUS
1962 * CY_RESP_BUS_DESCRIPTOR
1963 * CY_RESP_TRANSFER_COUNT
1964 * CY_RESP_SDIO_EXT
1965 * CY_RESP_SDIO_INIT_FUNCTION
1966 * CY_RESP_SDIO_QUERY_CARD
1967 * CY_RESP_SDIO_GET_TUPLE
1968 * CY_RESP_SDIO_DIRECT
1969 * CY_RESP_SDIO_INVALID_FUNCTION
1970 * CY_RESP_SDIO_RESUME
1971 */
1972
1973/* Summary
1974 Based on the request sent, the state of a given media was
1975 changed as indicated by this response.
1976
1977 Direction
1978 West Bridge -> P Port Processor
1979
1980 Length (in transfers)
1981 1
1982
1983 MailBox0
1984 * Context = 2
1985 * Response Code = 16
1986
1987 D0
1988 Bits 12 - 15 : Bus index
1989 Bits 8 - 11 : Zero based device index
1990
1991 D1
1992 State of Media
1993 * 0 = released
1994 * 1 = claimed
1995 */
1996#define CY_RESP_MEDIA_CLAIMED_RELEASED (16)
1997
1998
1999/* Summary
2000 This response gives the number of physical devices
2001 associated with a given media type.
2002
2003 Direction
2004 West Bridge -> P Port Processor
2005
2006 Length (in transfers)
2007 1
2008
2009 MailBox0
2010 * Context = 2
2011 * Response Code = 17
2012
2013 D0
2014 Media Type
2015 Bits 12 - 15
2016 * 0 = NAND
2017 * 1 = SDIO Flash
2018 * 2 = MMC Flash
2019 * 3 = CE-ATA
2020
2021 D1
2022 Number of devices
2023 */
2024#define CY_RESP_MEDIA_DESCRIPTOR (17)
2025
2026
2027/* Summary
2028 This response gives description of a physical device.
2029
2030 Direction
2031 West Bridge -> P Port Processor
2032
2033 Length (in transfers)
2034 2
2035
2036 MailBox0
2037 * Context = 2
2038 * Response Code = 18
2039
2040 D0
2041 Bits 12 - 15 : Bus index
2042 Bits 8 - 11 : Zero based device index
2043 Bits 0 - 7 : Type of media present on bus
2044
2045 D1
2046 Block Size in bytes
2047
2048 D2
2049 Bit 15 : Is device removable
2050 Bit 9 : Is device password locked
2051 Bit 8 : Is device writeable
2052 Bits 0 - 7 : Number Of Units
2053
2054 D3
2055 ERASE_UNIT_SIZE high 16 bits
2056
2057 D4
2058 ERASE_UNIT_SIZE low 16 bits
2059
2060 */
2061#define CY_RESP_DEVICE_DESCRIPTOR (18)
2062
2063
2064/* Summary
2065 This response gives description of a unit on a
2066 physical device.
2067
2068 Direction
2069 West Bridge -> P Port Processor
2070
2071 Length (in transfers)
2072 6
2073
2074 MailBox0
2075 * Context = 2
2076 * Response Code = 19
2077
2078 D0
2079 Bits 12 - 15 : Bus index
2080 Bits 8 - 11 : Zero based device index
2081 Bits 0 - 7 : Zero based unit index
2082
2083 D1
2084 Bits 0 - 7 : Media type
2085 * 1 = NAND
2086 * 2 = SD FLASH
2087 * 4 = MMC FLASH
2088 * 8 = CEATA
2089 * 16 = SD IO
2090
2091 D2
2092 Block Size in bytes
2093
2094 D3
2095 Start Block Low 16 bits
2096
2097 D4
2098 Start Block High 16 bits
2099
2100 D5
2101 Unit Size Low 16 bits
2102
2103 D6
2104 Unit Size High 16 bits
2105 */
2106#define CY_RESP_UNIT_DESCRIPTOR (19)
2107
2108
2109/* Summary
2110 This response is sent as error status for P2S
2111 Storage operation.
2112
2113 Direction
2114 West Bridge -> P Port Processor
2115
2116 Length (in transfers)
2117 2
2118
2119 Mailbox0
2120 * Context = 2
2121 * Request Code = 20
2122
2123 D0
2124 Bit 8 : Type of operation (Read / Write)
2125 Bits 7 - 0 : Error code
2126
2127 D1
2128 Bits 12 - 15 : Bus index
2129 Bits 8 - 11 : Zero based device index
2130 Bits 0 - 7 : Zero based unit index
2131
2132 *D2 - D3*
2133 Address where the error occurred.
2134
2135 D4
2136 Length of the operation in blocks.
2137
2138 Description
2139 This error is returned by the West Bridge to the
2140 processor if a storage operation fails due to a
2141 medium error.
2142*/
2143#define CY_RESP_ANTIOCH_DEFERRED_ERROR (20)
2144
2145/* Summary
2146 Contents of a register on the SD/MMC card connected to
2147 West Bridge.
2148
2149 Direction
2150 West Bridge -> P Port Processor
2151
2152 Length (in transfers)
2153 Variable
2154
2155 Mailbox0
2156 * Context = 2
2157 * Request code = 21
2158
2159 D0
2160 Length of data in bytes
2161
2162 D1 - Dn
2163 The register contents
2164
2165 Description
2166 This is the response to a CY_RQT_SD_REGISTER_READ
2167 request.
2168*/
2169#define CY_RESP_SD_REGISTER_DATA (21)
2170
2171/* Summary
2172 Status of whether the SD card is password locked.
2173
2174 Direction
2175 West Bridge -> P Port Processor
2176
2177 Length (in transfers)
2178 1
2179
2180 Mailbox0
2181 * Context = 2
2182 * Request code = 22
2183
2184 D0
2185 Bit 0 : The card's lock status
2186
2187 Description
2188 Status of whether the SD card is password locked.
2189*/
2190#define CY_RESP_SD_LOCK_STATUS (22)
2191
2192
2193/* Summary
2194 This response gives the types of physical devices
2195 attached to a given bus.
2196
2197 Direction
2198 West Bridge -> P Port Processor
2199
2200 Length (in transfers)
2201 1
2202
2203 MailBox0
2204 * Context = 2
2205 * Response Code = 23
2206
2207 D0
2208 Bus Number
2209 Bits 12 - 15
2210
2211 D1
2212 Media present on addressed bus
2213 */
2214#define CY_RESP_BUS_DESCRIPTOR (23)
2215
2216/* Summary
2217 Amount of data read/written through the USB mass
2218 storage/MTP device.
2219
2220 Direction
2221 West Bridge -> P Port Processor
2222
2223 Length (in transfers)
2224 2
2225
2226 MailBox0
2227 * Context = 2
2228 * Request code = 24
2229
2230 D0
2231 MS 16 bits of number of sectors written
2232
2233 D1
2234 LS 16 bits of number of sectors written
2235
2236 D2
2237 MS 16 bits of number of sectors read
2238
2239 D3
2240 LS 16 bits of number of sectors read
2241
2242 Description
2243 This is the response to the CY_RQT_GET_TRANSFER_AMOUNT
2244 request, and represents the number of sectors of data
2245 that has been written to or read from the storage device
2246 through the USB Mass storage or MTP interface.
2247 */
2248#define CY_RESP_TRANSFER_COUNT (24)
2249
2250/* Summary
2251 Status of SDIO Extended read/write operation.
2252
2253 Direction
2254 West Bridge -> P Port Processor
2255
2256 Length (in transfers)
2257 1
2258
2259 Mailbox0
2260 * Context = 2
2261 * Request code = 34
2262
2263 D0
2264 Bit 8 : 1 if Read response, 0 if write response
2265 Bits 0-7: Error Status
2266
2267 Description
2268 Status of SDIO Extended read write operation.
2269*/
2270
2271#define CY_RESP_SDIO_EXT (34)
2272
2273/* Summary
2274 Status of SDIO operation to Initialize a function
2275
2276 Direction
2277 West Bridge -> P Port Processor
2278
2279 Length (in transfers)
2280 2
2281
2282 Mailbox0
2283 * Context = 2
2284 * Request code = 35
2285
2286
2287 D0
2288 Bits 8-15 : Function Interface Code
2289 Bits 0-7: Extended Function Interface Code
2290
2291 D1
2292 Bits 0-15 : Function Block Size
2293
2294 D2
2295 Bits 0-15 : Most significant Word of Function PSN
2296
2297 D3
2298 Bits 0-15 : Least significant Word of Function PSN
2299
2300 D4
2301 Bit 15 : CSA Enabled Status
2302 Bit 14 : CSA Support Status
2303 Bit 9 : CSA No Format Status
2304 Bit 8 : CSA Write Protect Status
2305 Bit 0 : Function Wake Up Support status
2306
2307 Description
2308 Status of SDIO Function Initialization operation.
2309*/
2310#define CY_RESP_SDIO_INIT_FUNCTION (35)
2311
2312/* Summary
2313 Status of SDIO operation to query the Card
2314
2315 Direction
2316 West Bridge -> P Port Processor
2317
2318 Length (in transfers)
2319 2
2320
2321 Mailbox0
2322 * Context = 2
2323 * Request code = 36
2324
2325
2326 D0
2327 Bits 8-15 : Number of IO functions present
2328 Bit 0: 1 if memory is present
2329
2330 D1
2331 Bits 0-15 : Card Manufacturer ID
2332
2333 D2
2334 Bits 0-15 : Card Manufacturer Additional Information
2335
2336 D3
2337 Bits 0-15 : Function 0 Block Size
2338
2339 D4
2340 Bits 8-15 :SDIO Card Capability register
2341 Bits 0-7: SDIO Version
2342
2343
2344 Description
2345 Status of SDIO Card Query operation.
2346 */
2347#define CY_RESP_SDIO_QUERY_CARD (36)
2348/* Summary
2349 Status of SDIO CIS read operation
2350
2351 Direction
2352 West Bridge -> P Port Processor
2353
2354 Length (in transfers)
2355 1
2356
2357 Mailbox0
2358 * Context = 2
2359 * Request code = 37
2360
2361 D0
2362 Bit 8 : 1
2363 Bits 0-7: Error Status
2364
2365 D1
2366 Bits 0 - 7 : Size of data read.
2367
2368 Description
2369 Status of SDIO Get Tuple Read operation.
2370 */
2371#define CY_RESP_SDIO_GET_TUPLE (37)
2372
2373/* Summary
2374 Status of SDIO Direct read/write operation.
2375
2376 Direction
2377 West Bridge -> P Port Processor
2378
2379 Length (in transfers)
2380 1
2381
2382 Mailbox0
2383 * Context = 2
2384 * Request code = 38
2385
2386 D0
2387 Bit 8 : Error Status
2388 Bits 0-7: Data Read(If any)
2389
2390 Description
2391 Status of SDIO Direct read write operation.
2392
2393*/
2394#define CY_RESP_SDIO_DIRECT (38)
2395
2396/* Summary
2397 Indicates an un-initialized function has been used for IO
2398
2399 Direction
2400 West Bridge -> P Port Processor
2401
2402 Length (in transfers)
2403 1
2404
2405 Mailbox0
2406 * Context = 2
2407 * Request code = 39
2408
2409 Description
2410 Indicates an IO request on an uninitialized function.
2411*/
2412#define CY_RESP_SDIO_INVALID_FUNCTION (39)
2413
2414/* Summary
2415 Response to a Resume request
2416
2417 Direction
2418 West Bridge -> P Port Processor
2419
2420 Length (in transfers)
2421 1
2422
2423 Mailbox0
2424 * Context = 2
2425 * Request code = 40
2426
2427 D0
2428 Bits 8-15 : Error Status
2429 Bit 0: 1 if data is available. 0 otherwise.
2430
2431 Description
2432 Response to a Resume request. Indicates if data is
2433 available after resum or not.
2434*/
2435#define CY_RESP_SDIO_RESUME (40)
2436
2437/******************************************************/
2438
2439/*@@USB requests
2440 Summary
2441 The USB requests include:
2442 * CY_RQT_START_USB
2443 * CY_RQT_STOP_USB
2444 * CY_RQT_SET_CONNECT_STATE
2445 * CY_RQT_GET_CONNECT_STATE
2446 * CY_RQT_SET_USB_CONFIG
2447 * CY_RQT_GET_USB_CONFIG
2448 * CY_RQT_STALL_ENDPOINT
2449 * CY_RQT_GET_STALL
2450 * CY_RQT_SET_DESCRIPTOR
2451 * CY_RQT_GET_DESCRIPTOR
2452 * CY_RQT_SET_USB_CONFIG_REGISTERS
2453 * CY_RQT_USB_EVENT
2454 * CY_RQT_USB_EP_DATA
2455 * CY_RQT_ENDPOINT_SET_NAK
2456 * CY_RQT_GET_ENDPOINT_NAK
2457 * CY_RQT_ACK_SETUP_PACKET
2458 * CY_RQT_SCSI_INQUIRY_COMMAND
2459 * CY_RQT_SCSI_START_STOP_COMMAND
2460 * CY_RQT_SCSI_UNKNOWN_COMMAND
2461 * CY_RQT_USB_REMOTE_WAKEUP
2462 * CY_RQT_CLEAR_DESCRIPTORS
2463 * CY_RQT_USB_STORAGE_MONITOR
2464 * CY_RQT_USB_ACTIVITY_UPDATE
2465 * CY_RQT_MS_PARTITION_SELECT
2466 */
2467#ifndef __doxygen__
2468#define CY_RQT_USB_RQT_CONTEXT (3)
2469#endif
2470
2471/* Summary
2472 This command requests initialization of the USB stack.
2473
2474 Direction
2475 P Port Processor -> West Bridge
2476
2477 Length (in transfers)
2478 1
2479
2480 MailBox0
2481 * Context = 3
2482 * Request Code = 0
2483
2484 Description
2485 This command is required before any other USB related command can be
2486 sent to the West Bridge firmware.
2487
2488 Responses
2489 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2490 * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING
2491 */
2492#define CY_RQT_START_USB (0)
2493
2494
2495/* Summary
2496 This command requests shutdown of the USB stack.
2497
2498 Direction
2499 P Port Processor -> West Bridge
2500
2501 Length (in transfers)
2502 1
2503
2504 MailBox0
2505 * Context = 3
2506 * Request Code = 1
2507
2508 Responses
2509 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2510 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
2511 */
2512#define CY_RQT_STOP_USB (1)
2513
2514
2515/* Summary
2516 This command requests that the USB pins be connected
2517 or disconnected to/from the West Bridge device.
2518
2519 Direction
2520 P Port Processor -> West Bridge
2521
2522 Length (in transfers)
2523 1
2524
2525 MailBox0
2526 * Context = 3
2527 * Request Code = 2
2528
2529 D0
2530 Desired Connect State
2531 * 0 = DISCONNECTED
2532 * 1 = CONNECTED
2533
2534 Responses
2535 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2536 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
2537 */
2538#define CY_RQT_SET_CONNECT_STATE (2)
2539
2540
2541/* Summary
2542 This command requests the connection state of the
2543 West Bridge USB pins.
2544
2545 Direction
2546 P Port Processor -> West Bridge
2547
2548 Length (in transfers)
2549 1
2550
2551 MailBox0
2552 * Context = 3
2553 * Request Code = 3
2554
2555 Responses
2556 * CY_RESP_CONNECT_STATE
2557 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
2558 */
2559#define CY_RQT_GET_CONNECT_STATE (3)
2560
2561
2562/* Summary
2563 This request configures the USB subsystem.
2564
2565 Direction
2566 P Port Processor -> West Bridge
2567
2568 Length (in transfers)
2569 2
2570
2571 MailBox0
2572 * Context = 3
2573 * Request Code = 4
2574
2575 D0
2576 Bits 8 - 15: Media to enumerate (bit mask)
2577 Bits 0 - 7: Enumerate Mass Storage (bit mask)
2578 * 1 = Enumerate device on bus 0
2579 * 2 = Enumerate device on bus 1
2580
2581 D1
2582 Enumeration Methodology
2583 * 1 = West Bridge enumeration
2584 * 0 = P Port enumeration
2585
2586 D2
2587 Mass storage interface number - Interface number to
2588 be used for the mass storage interface
2589
2590 D3
2591 Mass storage callbacks
2592 * 1 = relay to P port
2593 * 0 = completely handle in firmware
2594
2595 Description
2596 This indicates how enumeration should be handled.
2597 Enumeration can be handled by the West Bridge device
2598 or by the P port processor.
2599
2600 Responses
2601 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2602 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_MASK
2603 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_STORAGE_MEDIA
2604 */
2605#define CY_RQT_SET_USB_CONFIG (4)
2606
2607
2608/* Summary
2609 This request retrieves the current USB configuration from
2610 the West Bridge device.
2611
2612 Direction
2613 P Port Processor -> West Bridge
2614
2615 Length (in transfers)
2616 1
2617
2618 MailBox0
2619 * Context = 3
2620 * Request Code = 5
2621
2622 Responses
2623 * CY_RESP_USB_CONFIG
2624 */
2625#define CY_RQT_GET_USB_CONFIG (5)
2626
2627
2628/* Summary
2629 This request stalls the given endpoint.
2630
2631 Direction
2632 P Port Processor -> West Bridge
2633
2634 Length (in transfers)
2635 1
2636
2637 MailBox0
2638 * Context = 3
2639 * Request Code = 6
2640
2641 D0
2642 Endpoint Number
2643
2644 D1
2645 * 1 = Stall Endpoint
2646 * 0 = Clear Stall
2647
2648 Responses
2649 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2650 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2651 */
2652#define CY_RQT_STALL_ENDPOINT (6)
2653
2654
2655/* Summary
2656 This request retrieves the stall status of the
2657 requested endpoint.
2658
2659 Direction
2660 P Port Processor -> West Bridge
2661
2662 Length (in transfers)
2663 1
2664
2665 MailBox0
2666 * Context = 3
2667 * Request Code = 7
2668
2669 D0
2670 Endpoint number
2671
2672 Responses
2673 * CY_RESP_ENDPOINT_STALL
2674 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2675 */
2676#define CY_RQT_GET_STALL (7)
2677
2678
2679/* Summary
2680 This command sets the contents of a descriptor.
2681
2682 Direction
2683 P Port Processor -> West Bridge
2684
2685 Length (in transfers)
2686 1
2687
2688 MailBox0
2689 * Context = 3
2690 * Request Code = 8
2691
2692 D0
2693 Bit 15 - Bit 8
2694 Descriptor Index
2695
2696 Bit 7 - Bit 0
2697 Descriptor Type
2698 * Device = 1
2699 * Device Qualifier = 2
2700 * Full Speed Configuration = 3
2701 * High Speed Configuration = 4
2702
2703 * D1 - DN *
2704 Actual data for the descriptor
2705
2706 Responses
2707 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2708 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE
2709 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX
2710 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_LENGTH
2711 */
2712#define CY_RQT_SET_DESCRIPTOR (8)
2713
2714/* Summary
2715 This command gets the contents of a descriptor.
2716
2717 Direction
2718 P Port Processor -> West Bridge
2719
2720 Length (in transfers)
2721 1
2722
2723 MailBox0
2724 * Context = 3
2725 * Request Code = 9
2726
2727 D0
2728 Bit 15 - Bit 8
2729 Descriptor Index
2730
2731 Bit 7 - Bit 0
2732 Descriptor Type
2733 * Device = 1
2734 * Device Qualifier = 2
2735 * Full Speed Configuration = 3
2736 * High Speed Configuration = 4
2737
2738 Responses
2739 * CY_RESP_USB_DESCRIPTOR
2740 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE
2741 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX
2742 */
2743#define CY_RQT_GET_DESCRIPTOR (9)
2744
2745/* Summary
2746 This request is sent from the P port processor to the
2747 West Bridge device to physically configure the endpoints
2748 in the device.
2749
2750 Direction
2751 P Port Processor -> West Bridge
2752
2753 Length (in transfers)
2754 3
2755
2756 MailBox0
2757 * Context = 3
2758 * Request Code = 10
2759
2760 D0
2761 Bit 15 - Bit 8
2762 EP1OUTCFG register value
2763 Bit 7 - Bit 0
2764 EP1INCFG register value
2765
2766 * D1 - D2 *
2767 PEPxCFS register values where x = 3, 5, 7, 9
2768
2769 * D3 - D7 *
2770 LEPxCFG register values where x = 3, 5, 7, 9, 10,
2771 11, 12, 13, 14, 15
2772
2773 Responses
2774 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2775*/
2776#define CY_RQT_SET_USB_CONFIG_REGISTERS (10)
2777
2778/* Summary
2779 This request is sent to the P port processor when a
2780 USB event occurs and needs to be relayed to the
2781 P port.
2782
2783 Direction
2784 West Bridge -> P Port Processor
2785
2786 Length (in transfers)
2787 1
2788
2789 Mailbox0
2790 * Context = 3
2791 * Request Code = 11
2792
2793 D0
2794 Event Type
2795 * 0 = Reserved
2796 * 1 = Reserved
2797 * 2 = USB Suspend
2798 * 3 = USB Resume
2799 * 4 = USB Reset
2800 * 5 = USB Set Configuration
2801 * 6 = USB Speed change
2802
2803 D1
2804 If EventTYpe is USB Speed change
2805 * 0 = Full Speed
2806 * 1 = High Speed
2807
2808 If EventType is USB Set Configuration
2809 * The number of the configuration to use
2810 * (may be zero to unconfigure)
2811
2812 Responses
2813 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2814*/
2815#define CY_RQT_USB_EVENT (11)
2816
2817/* Summary
2818 This request is sent in both directions to transfer
2819 endpoint data for endpoints 0 and 1.
2820
2821 Direction
2822 West Bridge -> P Port Processor
2823 P Port Processor -> West Bridge
2824
2825 Length (in transfers)
2826 Variable
2827
2828 Mailbox0
2829 * Context = 3
2830 * Request Code = 12
2831
2832 D0
2833 Bit 15 - 14 Data Type
2834 * 0 = Setup (payload should be the 8 byte setup packet)
2835 * 1 = Data
2836 * 2 = Status (payload should be empty)
2837
2838 Bit 13 Endpoint Number (only 0 and 1 supported)
2839 Bit 12 First Packet (only supported for Host ->
2840 West Bridge traffic)
2841 Bit 11 Last Packet (only supported for Host ->
2842 West Bridge traffic)
2843
2844 Bit 9 - 0 Data Length (real max data length is 64 bytes
2845 for EP0 and EP1)
2846
2847 *D1-Dn*
2848 Endpoint data
2849*/
2850#define CY_RQT_USB_EP_DATA (12)
2851
2852
2853/* Summary
2854 This request sets the NAK bit on an endpoint.
2855
2856 Direction
2857 P Port Processor -> West Bridge
2858
2859 Length (in transfers)
2860 1
2861
2862 MailBox0
2863 * Context = 3
2864 * Request Code = 13
2865
2866 D0
2867 Endpoint Number
2868
2869 D1
2870 * 1 = NAK Endpoint
2871 * 0 = Clear NAK
2872
2873 Responses
2874 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2875 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2876 */
2877#define CY_RQT_ENDPOINT_SET_NAK (13)
2878
2879
2880/* Summary
2881 This request retrieves the NAK config status of the
2882 requested endpoint.
2883
2884 Direction
2885 P Port Processor -> West Bridge
2886
2887 Length (in transfers)
2888 1
2889
2890 MailBox0
2891 * Context = 3
2892 * Request Code = 14
2893
2894 D0
2895 Endpoint number
2896
2897 Responses
2898 * CY_RESP_ENDPOINT_NAK
2899 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT
2900 */
2901#define CY_RQT_GET_ENDPOINT_NAK (14)
2902
2903/* Summary
2904 This request acknowledges a setup packet that does not
2905 require any data transfer.
2906
2907 Direction
2908 P Port Processor -> West Bridge
2909
2910 Length (in transfers)
2911 1
2912
2913 MailBox
2914 * Context = 3
2915 * Request Code = 15
2916
2917 Responses
2918 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
2919*/
2920#define CY_RQT_ACK_SETUP_PACKET (15)
2921
2922/* Summary
2923 This request is sent when the USB storage driver within
2924 West Bridge receives an Inquiry request.
2925
2926 Direction
2927 West Bridge -> P Port Processor
2928
2929 Length (in transfers)
2930 x - variable
2931
2932 Mailbox0
2933 * Context = 3
2934 * Request Code = 16
2935
2936 D0
2937 Bits 12 - 15 : Bus index
2938 Bits 8 - 11 : Zero based device index
2939 Bits 0 - 7 : Media type being addressed
2940
2941 D1
2942 Bits 8 : EVPD bit from request
2943 Bits 0 - 7 : Codepage from the inquiry request
2944
2945 D2
2946 Length of the inquiry response in bytes
2947
2948 * D3 - Dn *
2949 The inquiry response
2950
2951 Description
2952 When the West Bridge firmware receives an SCSI Inquiry
2953 request from the USB host, the response to this mass
2954 storage command is created by West Bridge and forwarded to
2955 the P port processor. The P port processor may change
2956 this response before it is returned to the USB host. This
2957 request is the method by which this may happen.
2958*/
2959#define CY_RQT_SCSI_INQUIRY_COMMAND (16)
2960
2961/* Summary
2962 This request is sent when the USB storage driver within
2963 West Bridge receives a Start/Stop request.
2964
2965 Direction
2966 West Bridge -> P Port Processor
2967
2968 Length (in transfers)
2969 1
2970
2971 Mailbox0
2972 * Context = 3
2973 * Request Code = 17
2974
2975 D0
2976 Bits 12 - 15 : Bus index
2977 Bits 8 - 11 : Zero based device index
2978 Bits 0 - 7 : Media type being addressed
2979
2980 D1
2981 Bit 1
2982 * LoEj Bit (See SCSI-3 specification)
2983
2984 Bit 0
2985 * Start Bit (See SCSI-3 specification)
2986
2987 Description
2988 When the West Bridge firmware received a SCSI Start/Stop
2989 request from the USB host, this request is relayed to the
2990 P port processor. This request is used to relay the command.
2991 The USB firmware will not response to the USB command until
2992 the response to this request is recevied by the firmware.
2993*/
2994#define CY_RQT_SCSI_START_STOP_COMMAND (17)
2995
2996/* Summary
2997 This request is sent when the USB storage driver
2998 receives an unknown CBW on mass storage.
2999
3000 Direction
3001 West Bridge -> P Port Processor
3002
3003 Length (in transfers)
3004 4
3005
3006 Mailbox0
3007 * Context = 3
3008 * Request Code = 18
3009
3010 D0
3011 Bits 12 - 15 : MediaType
3012 * 0 = NAND
3013 * 1 = SDIO Flash
3014 * 2 = MMC Flash
3015 * 3 = CE-ATA
3016
3017 D1
3018 The length of the request in bytes
3019
3020 D2 - Dn
3021 CBW command block from the SCSI host controller.
3022
3023 Description
3024 When the firmware recevies a SCSI request that is not
3025 understood, this request is relayed to the
3026 P port processor.
3027*/
3028#define CY_RQT_SCSI_UNKNOWN_COMMAND (18)
3029
3030/* Summary
3031 Request the West Bridge to signal remote wakeup
3032 to the USB host.
3033
3034 Direction
3035 P Port Processor -> West Bridge
3036
3037 Length (in transfers)
3038 1
3039
3040 Mailbox0
3041 * Context = 3
3042 * Request code = 19
3043
3044 Description
3045 Request from the processor to West Bridge, to signal
3046 remote wakeup to the USB host.
3047
3048 Responses
3049 * CY_RESP_SUCCESS_FAILURE
3050 */
3051#define CY_RQT_USB_REMOTE_WAKEUP (19)
3052
3053/* Summary
3054 Request the West Bridge to clear all descriptors tha
3055 were set previously
3056 using the Set Descriptor calls.
3057
3058 Direction
3059 P Port Processor -> West Bridge
3060
3061 Length (in transfers)
3062 1
3063
3064 Mailbox0
3065 * Context = 3
3066 * Request code = 20
3067
3068 Description
3069 Request from the processor to West Bridge, to clear
3070 all descriptor information that was previously stored
3071 on the West Bridge using CyAnUsbSetDescriptor calls.
3072
3073 Responses
3074 * CY_RESP_SUCCESS_FAILURE
3075 */
3076#define CY_RQT_CLEAR_DESCRIPTORS (20)
3077
3078/* Summary
3079 Request the West Bridge to monitor USB to storage activity
3080 and send periodic updates.
3081
3082 Direction
3083 P Port Processor -> West Bridge
3084
3085 Length (in transfers)
3086 2
3087
3088 Mailbox0
3089 * Context = 3
3090 * Request code = 21
3091
3092 D0
3093 Upper 16 bits of write threshold
3094
3095 D1
3096 Lower 16 bits of write threshold
3097
3098 D2
3099 Upper 16 bits of read threshold
3100
3101 D3
3102 Lower 16 bits of read threshold
3103
3104 Description
3105 Request from the processor to West Bridge, to start
3106 monitoring the level of read/write activity on the
3107 USB mass storage drive and to set the threshold
3108 level at which progress reports are sent.
3109
3110 Responses
3111 * CY_RESP_SUCCESS_FAILURE
3112 */
3113#define CY_RQT_USB_STORAGE_MONITOR (21)
3114
3115/* Summary
3116 Event from the West Bridge showing that U2S activity
3117 since the last event has crossed the threshold.
3118
3119 Direction
3120 West Bridge -> P Port Processor
3121
3122 Length (in transfers)
3123 2
3124
3125 Mailbox0
3126 * Context = 3
3127 * Request code = 22
3128
3129 D0
3130 Upper 16 bits of sectors written since last event.
3131
3132 D1
3133 Lower 16 bits of sectors written since last event.
3134
3135 D2
3136 Upper 16 bits of sectors read since last event.
3137
3138 D3
3139 Lower 16 bits of sectors read since last event.
3140
3141 Description
3142 Event notification from the West Bridge indicating
3143 that the number of read/writes on the USB mass
3144 storage device have crossed a pre-defined threshold
3145 level.
3146
3147 Responses
3148 * CY_RESP_SUCCESS_FAILURE
3149 */
3150#define CY_RQT_USB_ACTIVITY_UPDATE (22)
3151
3152/* Summary
3153 Request to select the partitions to be enumerated on a
3154 storage device with partitions.
3155
3156 Direction
3157 P Port Processor -> West Bridge
3158
3159 Length (in transfers)
3160 1
3161
3162 Mailbox0
3163 * Context = 3
3164 * Request code = 23
3165
3166 D0
3167 Bits 8-15 : Bus index
3168 Bits 0- 7 : Device index
3169
3170 D1
3171 Bits 8-15 : Control whether to enumerate partition 1.
3172 Bits 0- 7 : Control whether to enumerate partition 0.
3173
3174 Responses
3175 * CY_RESP_SUCCESS_FAILURE
3176 */
3177#define CY_RQT_MS_PARTITION_SELECT (23)
3178
3179/************/
3180
3181/*@@USB responses
3182 Summary
3183 The USB responses include:
3184 * CY_RESP_USB_CONFIG
3185 * CY_RESP_ENDPOINT_CONFIG
3186 * CY_RESP_ENDPOINT_STALL
3187 * CY_RESP_CONNECT_STATE
3188 * CY_RESP_USB_DESCRIPTOR
3189 * CY_RESP_USB_INVALID_EVENT
3190 * CY_RESP_ENDPOINT_NAK
3191 * CY_RESP_INQUIRY_DATA
3192 * CY_RESP_UNKNOWN_SCSI_COMMAND
3193 */
3194
3195/* Summary
3196 This response contains the enumeration configuration
3197 information for the USB module.
3198
3199 Direction
3200 8051->P
3201
3202 Length (in transfers)
3203 1
3204
3205 MailBox0
3206 * Context = 3
3207 * Response Code = 32
3208
3209 D0
3210 Bits 8 - 15: Media to enumerate (bit mask)
3211 Bits 0 - 7: Buses to enumerate (bit mask)
3212 * 1 = Bus 0
3213 * 2 = Bus 1
3214
3215 D1
3216 Enumeration Methodology
3217 * 0 = West Bridge enumeration
3218 * 1 = P Port enumeration
3219
3220 D2
3221 Bits 7 - 0 : Interface Count - the number of interfaces
3222 Bits 15 - 8 : Mass storage callbacks
3223
3224 */
3225#define CY_RESP_USB_CONFIG (32)
3226
3227
3228/* Summary
3229 This response contains the configuration information
3230 for the specified endpoint.
3231
3232 Direction
3233 8051->P
3234
3235 Length (in transfers)
3236 1
3237
3238 MailBox0
3239 * Context = 3
3240 * Response Code = 33
3241
3242 D0
3243 Bits 15 - 12 : Endpoint Number (0 - 15)
3244
3245 Bits 11 - 10 : Endpoint Type
3246 * 0 = Control
3247 * 1 = Bulk
3248 * 2 = Interrupt
3249 * 3 = Isochronous
3250
3251 Bits 9 : Endpoint Size
3252 * 0 = 512
3253 * 1 = 1024
3254
3255 Bits 8 - 7 : Buffering
3256 * 0 = Double
3257 * 1 = Triple
3258 * 2 = Quad
3259
3260 Bits 6 : Bit Direction
3261 * 0 = Input
3262 * 1 = Output
3263 */
3264#define CY_RESP_ENDPOINT_CONFIG (33)
3265
3266
3267/* Summary
3268 This response contains the stall status for
3269 the specified endpoint.
3270
3271 Direction
3272 8051->P
3273
3274 Length (in transfers)
3275 1
3276
3277 MailBox0
3278 * Context = 3
3279 * Response Code = 34
3280
3281 D0
3282 Stall status
3283 * 0 = Active
3284 * 1 = Stalled
3285 */
3286#define CY_RESP_ENDPOINT_STALL (34)
3287
3288
3289/* Summary
3290 This response contains the connected/disconnected
3291 state of the West Bridge USB pins.
3292
3293 Direction
3294 8051->P
3295
3296 Length (in transfers)
3297 1
3298
3299 MailBox0
3300 * Context = 3
3301 * Response Code = 35
3302
3303 D0
3304 Connect state
3305 * 0 = Disconnected
3306 * 1 = Connected
3307 */
3308#define CY_RESP_CONNECT_STATE (35)
3309
3310/* Summary
3311 This response contains the information
3312 about the USB configuration
3313
3314 Direction
3315 West Bridge -> P Port Processor
3316
3317 Length
3318 x bytes
3319
3320 Mailbox0
3321 * Context = 3
3322 * Response Code = 36
3323
3324 D0
3325 Length in bytes of the descriptor
3326
3327 * D1 - DN *
3328 Descriptor contents
3329*/
3330#define CY_RESP_USB_DESCRIPTOR (36)
3331
3332/* Summary
3333 This response is sent in response to a bad USB event code
3334
3335 Direction
3336 P Port Processor -> West Bridge
3337
3338 Length
3339 1 word (2 bytes)
3340
3341 Mailbox0
3342 * Context = 3
3343 * Response Code = 37
3344
3345 D0
3346 The invalid event code in the request
3347*/
3348#define CY_RESP_USB_INVALID_EVENT (37)
3349
3350/* Summary
3351 This response contains the current NAK status of
3352 a USB endpoint.
3353
3354 Direction
3355 West Bridge -> P port processor
3356
3357 Length
3358 1 transfer
3359
3360 Mailbox0
3361 * Context = 3
3362 * Response Code = 38
3363
3364 D0
3365 The NAK status of the endpoint
3366 1 : NAK bit set
3367 0 : NAK bit clear
3368*/
3369#define CY_RESP_ENDPOINT_NAK (38)
3370
3371/* Summary
3372 This response gives the contents of the inquiry
3373 data back to West Bridge to returns to the USB host.
3374
3375 Direction
3376 West Bridge -> P Port Processor
3377
3378 Length
3379 Variable
3380
3381 MailBox0
3382 * Context = 3
3383 * Response Code = 39
3384
3385 D0
3386 Length of the inquiry response
3387
3388 *D1 - Dn*
3389 Inquiry data
3390*/
3391#define CY_RESP_INQUIRY_DATA (39)
3392
3393/* Summary
3394 This response gives the status of an unknown SCSI command.
3395 This also gives three bytes of sense information.
3396
3397 Direction
3398 P Port Processor -> West Bridge
3399
3400 Length (in transfers)
3401 1
3402
3403 Mailbox0
3404 * Context = 3
3405 * Response Code = 40
3406
3407 D0
3408 The length of the reply in bytes
3409
3410 D1
3411 * Status of the command
3412 * Sense Key
3413
3414 D2
3415 * Additional Sense Code (ASC)
3416 * Additional Sense Code Qualifier (ASCQ)
3417*/
3418#define CY_RESP_UNKNOWN_SCSI_COMMAND (40)
3419/*******************************************************/
3420
3421/*@@Turbo requests
3422 Summary
3423 The Turbo requests include:
3424 * CY_RQT_START_MTP
3425 * CY_RQT_STOP_MTP
3426 * CY_RQT_INIT_SEND_OBJECT
3427 * CY_RQT_CANCEL_SEND_OBJECT
3428 * CY_RQT_INIT_GET_OBJECT
3429 * CY_RQT_CANCEL_GET_OBJECT
3430 * CY_RQT_SEND_BLOCK_TABLE
3431 * CY_RQT_MTP_EVENT
3432 * CY_RQT_TURBO_CMD_FROM_HOST
3433 * CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST
3434 * CY_RQT_TURBO_SWITCH_ENDPOINT
3435 * CY_RQT_TURBO_START_WRITE_DMA
3436 * CY_RQT_ENABLE_USB_PATH
3437 * CY_RQT_CANCEL_ASYNC_TRANSFER
3438 */
3439#ifndef __doxygen__
3440#define CY_RQT_TUR_RQT_CONTEXT (4)
3441#endif
3442
3443/* Summary
3444 This command requests initialization of the MTP stack.
3445
3446 Direction
3447 P Port Processor -> West Bridge
3448
3449 Length (in transfers)
3450 1
3451
3452 MailBox0
3453 * Context = 4
3454 * Request Code = 0
3455
3456 Description
3457 This command is required before any other MTP related
3458 command can be sent to the West Bridge firmware.
3459
3460 Responses
3461 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3462 * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING
3463 */
3464#define CY_RQT_START_MTP (0)
3465
3466/* Summary
3467 This command requests shutdown of the MTP stack.
3468
3469 Direction
3470 P Port Processor -> West Bridge
3471
3472 Length (in transfers)
3473 1
3474
3475 MailBox0
3476 * Context = 4
3477 * Request Code = 1
3478
3479 Responses
3480 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3481 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3482 */
3483#define CY_RQT_STOP_MTP (1)
3484
3485/* Summary
3486 This command sets up an MTP SendObject operation.
3487
3488 Direction
3489 P Port Processor -> West Bridge
3490
3491 Length (in transfers)
3492 1
3493
3494 MailBox0
3495 * Context = 4
3496 * Request Code = 2
3497
3498 D0
3499 Total bytes for send object Low 16 bits
3500
3501 D1
3502 Total bytes for send object High 16 bits
3503
3504 Responses
3505 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3506 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3507 */
3508#define CY_RQT_INIT_SEND_OBJECT (2)
3509
3510/* Summary
3511 This command cancels West Bridges handling of
3512 an ongoing MTP SendObject operation. This
3513 does NOT send an MTP response.
3514
3515 Direction
3516 P Port Processor -> West Bridge
3517
3518 Length (in transfers)
3519 1
3520
3521 MailBox0
3522 * Context = 4
3523 * Request Code = 3
3524
3525 Responses
3526 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3527 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3528 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING
3529 */
3530#define CY_RQT_CANCEL_SEND_OBJECT (3)
3531
3532/* Summary
3533 This command sets up an MTP GetObject operation.
3534
3535 Direction
3536 P Port Processor -> West Bridge
3537
3538 Length (in transfers)
3539 2
3540
3541 MailBox0
3542 * Context = 4
3543 * Request Code = 4
3544
3545 D0
3546 Total bytes for get object Low 16 bits
3547
3548 D1
3549 Total bytes for get object High 16 bits
3550
3551 D2
3552 Transaction Id for get object Low 16 bits
3553
3554 D3
3555 Transaction Id for get object High 16 bits
3556
3557 Responses
3558 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3559 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3560 */
3561#define CY_RQT_INIT_GET_OBJECT (4)
3562
3563/* Summary
3564 This command notifies West Bridge of a new
3565 BlockTable transfer.
3566
3567 Direction
3568 P Port Processor -> West Bridge
3569
3570 Length (in transfers)
3571 1
3572
3573 MailBox0
3574 * Context = 4
3575 * Request Code = 5
3576
3577 Responses
3578 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3579 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3580 */
3581#define CY_RQT_SEND_BLOCK_TABLE (5)
3582
3583/* Summary
3584 This request is sent to the P port processor when a MTP event occurs
3585 and needs to be relayed to the P port.
3586
3587 Direction
3588 West Bridge -> P Port Processor
3589
3590 Length (in transfers)
3591 2
3592
3593 Mailbox0
3594 * Context = 4
3595 * Request Code = 6
3596
3597 D0
3598 Bits 15 - 8 : Return Status for GetObject/SendObject
3599 Bits 7 - 0 : Event Type
3600 * 0 = MTP SendObject Complete
3601 * 1 = MTP GetObject Complete
3602 * 2 = BlockTable Needed
3603
3604 D1
3605 Lower 16 bits of the length of the data that got transferred
3606 in the Turbo Endpoint.(Applicable to "MTP SendObject Complete"
3607 and "MTP GetObject Complete" events)
3608
3609 D2
3610 Upper 16 bits of the length of the data that got transferred
3611 in the Turbo Endpoint. (Applicable to "MTP SendObject Complete"
3612 and "MTP GetObject Complete" events)
3613
3614 D3
3615 Lower 16 bits of the Transaction Id of the MTP_SEND_OBJECT
3616 command. (Applicable to "MTP SendObject Complete" event)
3617
3618 D4
3619 Upper 16 bits of the Transaction Id of the MTP_SEND_OBJECT
3620 command. (Applicable to "MTP SendObject Complete" event)
3621
3622 Responses
3623 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3624*/
3625#define CY_RQT_MTP_EVENT (6)
3626
3627/* Summary
3628 This request is sent to the P port processor when a command
3629 is received from Host in a Turbo Endpoint. Upon receiving
3630 this event, P port should read the data from the endpoint as
3631 soon as possible.
3632
3633 Direction
3634 West Bridge -> P Port Processor
3635
3636 Length (in transfers)
3637 1
3638
3639 Mailbox0
3640 * Context = 4
3641 * Request Code = 7
3642
3643 D0
3644 This contains the EP number. (This will be always two now).
3645
3646 D1
3647 Length of the data available in the Turbo Endpoint.
3648
3649 Responses
3650 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3651*/
3652#define CY_RQT_TURBO_CMD_FROM_HOST (7)
3653
3654/* Summary
3655 This request is sent to the West Bridge when the P port
3656 needs to send data to the Host in a Turbo Endpoint.
3657 Upon receiving this event, Firmware will make the end point
25985edc 3658 available for the P port. If the length is zero, then
81eb669b
DC		 3659 firmware will send a zero length packet.
3660
3661 Direction
3662 P Port Processor -> West Bridge
3663
3664 Length (in transfers)
3665 2
3666
3667 Mailbox0
3668 * Context = 4
3669 * Request Code = 8
3670
3671 D0
3672 This contains the EP number. (This will be always six now).
3673
3674 D1
3675 Lower 16 bits of the length of the data that needs to be
3676 sent in the Turbo Endpoint.
3677
3678 D2
3679 Upper 16 bits of the length of the data that needs to be
3680 sent in the Turbo Endpoint.
3681
3682 Responses
3683 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3684*/
3685#define CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST (8)
3686
3687/* Summary
3688 This command cancels West Bridges handling of
3689 an ongoing MTP GetObject operation. This
3690 does NOT send an MTP response.
3691
3692 Direction
3693 P Port Processor -> West Bridge
3694
3695 Length (in transfers)
3696 1
3697
3698 MailBox0
3699 * Context = 4
3700 * Request Code = 9
3701
3702 Responses
3703 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3704 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3705 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING
3706 */
3707#define CY_RQT_CANCEL_GET_OBJECT (9)
3708
3709/* Summary
3710 This command switches a Turbo endpoint
3711 from the U port to the P port. If no data
3712 is in the endpoint the endpoint is
3713 primed to switch as soon as data is placed
3714 in the endpoint. The endpoint will continue
3715 to switch until all data has been transferd.
3716
3717 Direction
3718 P Port Processor -> West Bridge
3719
3720 Length (in transfers)
3721 2
3722
3723 MailBox0
3724 * Context = 4
3725 * Request Code = 10
3726
3727 D0
3728 Whether the read is a packet read.
3729
3730 D1
3731 Lower 16 bits of the length of the data to switch
3732 the Turbo Endpoint for.
3733
3734 D2
3735 Upper 16 bits of the length of the data to switch
3736 the Turbo Endpoint for.
3737
3738 Responses
3739 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3740 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING
3741 */
3742#define CY_RQT_TURBO_SWITCH_ENDPOINT (10)
3743
3744/* Summary
3745 This command requests the API to start the DMA
3746 transfer of a packet of MTP data to the Antioch.
3747
3748 Direction
3749 West Bridge -> P Port Processor
3750
3751 Length (in transfers)
3752 1
3753
3754 MailBox0
3755 * Context = 4
3756 * Request Code = 11
3757
3758 Responses
3759 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3760 */
3761#define CY_RQT_TURBO_START_WRITE_DMA (11)
3762
3763/* Summary
3764 This command requests the firmware to switch the
3765 internal data paths to enable USB access to the
3766 Mass storage / MTP endpoints.
3767
3768 Direction
3769 P Port Processor -> West Bridge
3770
3771 Length (in transfers)
3772 1
3773
3774 MailBox0
3775 * Context = 4
3776 * Request code = 12
3777
3778 Responses
3779 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS
3780 */
3781#define CY_RQT_ENABLE_USB_PATH (12)
3782
3783/* Summary
3784 Request to cancel an asynchronous MTP write from
3785 the processor side.
3786
3787 Direction
3788 P Port processor -> West Bridge
3789
3790 Length (in transfers)
3791 1
3792
3793 Mailbox0
3794 * Context = 4
3795 * Request code = 13
3796
3797 D0
3798 * EP number
3799
3800 Description
3801 This is a request to the firmware to update internal
3802 state so that a pending write on the MTP endpoint
3803 can be cancelled.
3804 */
3805#define CY_RQT_CANCEL_ASYNC_TRANSFER (13)
3806
3807/******************************************************/
3808
3809/*@@Turbo responses
3810 Summary
3811 The Turbo responses include:
3812 * CY_RESP_MTP_INVALID_EVENT
3813 */
3814
3815/* Summary
3816 This response is sent in response to a bad MTP event code
3817
3818 Direction
3819 P Port Processor -> West Bridge
3820
3821 Length
3822 1 word (2 bytes)
3823
3824 Mailbox0
3825 * Context = 4
3826 * Response Code = 16
3827
3828 D0
3829 The invalid event code in the request
3830*/
3831#define CY_RESP_MTP_INVALID_EVENT (16)
3832
3833#ifndef __doxygen__
3834#define CY_RQT_CONTEXT_COUNT (5)
3835#endif
3836
3837#endif /* _INCLUDED_CYASPROTOCOL_H_ */
3838
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