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00b3ed16 GKH |
1 | /* hfa384x.h |
2 | * | |
3 | * Defines the constants and data structures for the hfa384x | |
4 | * | |
5 | * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. | |
6 | * -------------------------------------------------------------------- | |
7 | * | |
8 | * linux-wlan | |
9 | * | |
10 | * The contents of this file are subject to the Mozilla Public | |
11 | * License Version 1.1 (the "License"); you may not use this file | |
12 | * except in compliance with the License. You may obtain a copy of | |
13 | * the License at http://www.mozilla.org/MPL/ | |
14 | * | |
15 | * Software distributed under the License is distributed on an "AS | |
16 | * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or | |
17 | * implied. See the License for the specific language governing | |
18 | * rights and limitations under the License. | |
19 | * | |
20 | * Alternatively, the contents of this file may be used under the | |
21 | * terms of the GNU Public License version 2 (the "GPL"), in which | |
22 | * case the provisions of the GPL are applicable instead of the | |
23 | * above. If you wish to allow the use of your version of this file | |
24 | * only under the terms of the GPL and not to allow others to use | |
25 | * your version of this file under the MPL, indicate your decision | |
26 | * by deleting the provisions above and replace them with the notice | |
27 | * and other provisions required by the GPL. If you do not delete | |
28 | * the provisions above, a recipient may use your version of this | |
29 | * file under either the MPL or the GPL. | |
30 | * | |
31 | * -------------------------------------------------------------------- | |
32 | * | |
33 | * Inquiries regarding the linux-wlan Open Source project can be | |
34 | * made directly to: | |
35 | * | |
36 | * AbsoluteValue Systems Inc. | |
37 | * info@linux-wlan.com | |
38 | * http://www.linux-wlan.com | |
39 | * | |
40 | * -------------------------------------------------------------------- | |
41 | * | |
42 | * Portions of the development of this software were funded by | |
43 | * Intersil Corporation as part of PRISM(R) chipset product development. | |
44 | * | |
45 | * -------------------------------------------------------------------- | |
46 | * | |
47 | * [Implementation and usage notes] | |
48 | * | |
49 | * [References] | |
50 | * CW10 Programmer's Manual v1.5 | |
51 | * IEEE 802.11 D10.0 | |
52 | * | |
53 | * -------------------------------------------------------------------- | |
54 | */ | |
55 | ||
56 | #ifndef _HFA384x_H | |
57 | #define _HFA384x_H | |
58 | ||
e573aaa4 | 59 | #define HFA384x_FIRMWARE_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c)) |
00b3ed16 | 60 | |
28b17a4b | 61 | #include <linux/if_ether.h> |
2e380275 | 62 | #include <linux/usb.h> |
28b17a4b | 63 | |
00b3ed16 | 64 | /*--- Mins & Maxs -----------------------------------*/ |
71508ee4 | 65 | #define HFA384x_PORTID_MAX ((u16)7) |
0548cad1 | 66 | #define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX + 1)) |
71508ee4 AG |
67 | #define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */ |
68 | #define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */ | |
69 | #define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK*/ | |
70 | #define HFA384x_SCANRESULT_MAX ((u16)31) | |
71 | #define HFA384x_HSCANRESULT_MAX ((u16)31) | |
72 | #define HFA384x_CHINFORESULT_MAX ((u16)16) | |
73 | #define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */ | |
74 | #define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN | |
75 | #define HFA384x_USB_RWMEM_MAXLEN 2048 | |
00b3ed16 GKH |
76 | |
77 | /*--- Support Constants -----------------------------*/ | |
aaad4303 SP |
78 | #define HFA384x_PORTTYPE_IBSS ((u16)0) |
79 | #define HFA384x_PORTTYPE_BSS ((u16)1) | |
aaad4303 | 80 | #define HFA384x_PORTTYPE_PSUEDOIBSS ((u16)3) |
7f6e0e44 MM |
81 | #define HFA384x_WEPFLAGS_PRIVINVOKED ((u16)BIT(0)) |
82 | #define HFA384x_WEPFLAGS_EXCLUDE ((u16)BIT(1)) | |
83 | #define HFA384x_WEPFLAGS_DISABLE_TXCRYPT ((u16)BIT(4)) | |
84 | #define HFA384x_WEPFLAGS_DISABLE_RXCRYPT ((u16)BIT(7)) | |
eec0d0dc GH |
85 | #define HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM ((u16)3) |
86 | #define HFA384x_PORTSTATUS_DISABLED ((u16)1) | |
aaad4303 SP |
87 | #define HFA384x_RATEBIT_1 ((u16)1) |
88 | #define HFA384x_RATEBIT_2 ((u16)2) | |
89 | #define HFA384x_RATEBIT_5dot5 ((u16)4) | |
90 | #define HFA384x_RATEBIT_11 ((u16)8) | |
00b3ed16 | 91 | |
00b3ed16 GKH |
92 | /*--- MAC Internal memory constants and macros ------*/ |
93 | /* masks and macros used to manipulate MAC internal memory addresses. */ | |
94 | /* MAC internal memory addresses are 23 bit quantities. The MAC uses | |
95 | * a paged address space where the upper 16 bits are the page number | |
96 | * and the lower 7 bits are the offset. There are various Host API | |
97 | * elements that require two 16-bit quantities to specify a MAC | |
98 | * internal memory address. Unfortunately, some of the API's use a | |
99 | * page/offset format where the offset value is JUST the lower seven | |
100 | * bits and the page is the remaining 16 bits. Some of the API's | |
101 | * assume that the 23 bit address has been split at the 16th bit. We | |
102 | * refer to these two formats as AUX format and CMD format. The | |
103 | * macros below help handle some of this. | |
104 | */ | |
105 | ||
00b3ed16 GKH |
106 | /* Mask bits for discarding unwanted pieces in a flat address */ |
107 | #define HFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80) | |
108 | #define HFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f) | |
109 | #define HFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000) | |
110 | #define HFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff) | |
111 | ||
e573aaa4 | 112 | /* Mask bits for discarding unwanted pieces in AUX format |
95842bc9 JR |
113 | * 16-bit address parts |
114 | */ | |
00b3ed16 GKH |
115 | #define HFA384x_ADDR_AUX_PAGE_MASK (0xffff) |
116 | #define HFA384x_ADDR_AUX_OFF_MASK (0x007f) | |
117 | ||
00b3ed16 | 118 | /* Make a 32-bit flat address from AUX format 16-bit page and offset */ |
e573aaa4 | 119 | #define HFA384x_ADDR_AUX_MKFLAT(p, o) \ |
65dbeefd GS |
120 | ((((u32)(((u16)(p)) & HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \ |
121 | ((u32)(((u16)(o)) & HFA384x_ADDR_AUX_OFF_MASK))) | |
00b3ed16 | 122 | |
00b3ed16 GKH |
123 | /* Make CMD format offset and page from a 32-bit flat address */ |
124 | #define HFA384x_ADDR_CMD_MKPAGE(f) \ | |
061eab5c | 125 | ((u16)((((u32)(f)) & HFA384x_ADDR_FLAT_CMD_PAGE_MASK) >> 16)) |
00b3ed16 | 126 | #define HFA384x_ADDR_CMD_MKOFF(f) \ |
65dbeefd | 127 | ((u16)(((u32)(f)) & HFA384x_ADDR_FLAT_CMD_OFF_MASK)) |
00b3ed16 | 128 | |
00b3ed16 GKH |
129 | /*--- Controller Memory addresses -------------------*/ |
130 | #define HFA3842_PDA_BASE (0x007f0000UL) | |
131 | #define HFA3841_PDA_BASE (0x003f0000UL) | |
132 | #define HFA3841_PDA_BOGUS_BASE (0x00390000UL) | |
133 | ||
134 | /*--- Driver Download states -----------------------*/ | |
135 | #define HFA384x_DLSTATE_DISABLED 0 | |
136 | #define HFA384x_DLSTATE_RAMENABLED 1 | |
137 | #define HFA384x_DLSTATE_FLASHENABLED 2 | |
00b3ed16 | 138 | |
00b3ed16 | 139 | /*--- Register Field Masks --------------------------*/ |
71508ee4 AG |
140 | #define HFA384x_CMD_AINFO ((u16)(BIT(14) | BIT(13) \ |
141 | | BIT(12) | BIT(11) \ | |
142 | | BIT(10) | BIT(9) \ | |
143 | | BIT(8))) | |
144 | #define HFA384x_CMD_MACPORT ((u16)(BIT(10) | BIT(9) | \ | |
145 | BIT(8))) | |
7f6e0e44 | 146 | #define HFA384x_CMD_PROGMODE ((u16)(BIT(9) | BIT(8))) |
71508ee4 AG |
147 | #define HFA384x_CMD_CMDCODE ((u16)(BIT(5) | BIT(4) | \ |
148 | BIT(3) | BIT(2) | \ | |
149 | BIT(1) | BIT(0))) | |
7f6e0e44 | 150 | |
71508ee4 AG |
151 | #define HFA384x_STATUS_RESULT ((u16)(BIT(14) | BIT(13) \ |
152 | | BIT(12) | BIT(11) \ | |
153 | | BIT(10) | BIT(9) \ | |
154 | | BIT(8))) | |
7f6e0e44 | 155 | |
00b3ed16 GKH |
156 | /*--- Command Code Constants --------------------------*/ |
157 | /*--- Controller Commands --------------------------*/ | |
aaad4303 SP |
158 | #define HFA384x_CMDCODE_INIT ((u16)0x00) |
159 | #define HFA384x_CMDCODE_ENABLE ((u16)0x01) | |
160 | #define HFA384x_CMDCODE_DISABLE ((u16)0x02) | |
00b3ed16 GKH |
161 | |
162 | /*--- Regulate Commands --------------------------*/ | |
aaad4303 | 163 | #define HFA384x_CMDCODE_INQ ((u16)0x11) |
00b3ed16 GKH |
164 | |
165 | /*--- Configure Commands --------------------------*/ | |
aaad4303 | 166 | #define HFA384x_CMDCODE_DOWNLD ((u16)0x22) |
00b3ed16 GKH |
167 | |
168 | /*--- Debugging Commands -----------------------------*/ | |
eec0d0dc | 169 | #define HFA384x_CMDCODE_MONITOR ((u16)(0x38)) |
aaad4303 SP |
170 | #define HFA384x_MONITOR_ENABLE ((u16)(0x0b)) |
171 | #define HFA384x_MONITOR_DISABLE ((u16)(0x0f)) | |
00b3ed16 GKH |
172 | |
173 | /*--- Result Codes --------------------------*/ | |
aaad4303 | 174 | #define HFA384x_CMD_ERR ((u16)(0x7F)) |
00b3ed16 GKH |
175 | |
176 | /*--- Programming Modes -------------------------- | |
3e27dfa2 SP |
177 | * MODE 0: Disable programming |
178 | * MODE 1: Enable volatile memory programming | |
179 | * MODE 2: Enable non-volatile memory programming | |
180 | * MODE 3: Program non-volatile memory section | |
181 | *------------------------------------------------- | |
182 | */ | |
aaad4303 SP |
183 | #define HFA384x_PROGMODE_DISABLE ((u16)0x00) |
184 | #define HFA384x_PROGMODE_RAM ((u16)0x01) | |
185 | #define HFA384x_PROGMODE_NV ((u16)0x02) | |
186 | #define HFA384x_PROGMODE_NVWRITE ((u16)0x03) | |
00b3ed16 | 187 | |
00b3ed16 GKH |
188 | /*--- Record ID Constants --------------------------*/ |
189 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
190 | * Configuration RIDs: Network Parameters, Static Configuration Entities |
191 | *-------------------------------------------------------------------- | |
192 | */ | |
aaad4303 SP |
193 | #define HFA384x_RID_CNFPORTTYPE ((u16)0xFC00) |
194 | #define HFA384x_RID_CNFOWNMACADDR ((u16)0xFC01) | |
195 | #define HFA384x_RID_CNFDESIREDSSID ((u16)0xFC02) | |
196 | #define HFA384x_RID_CNFOWNCHANNEL ((u16)0xFC03) | |
197 | #define HFA384x_RID_CNFOWNSSID ((u16)0xFC04) | |
aaad4303 | 198 | #define HFA384x_RID_CNFMAXDATALEN ((u16)0xFC07) |
00b3ed16 GKH |
199 | |
200 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
201 | * Configuration RID lengths: Network Params, Static Config Entities |
202 | * This is the length of JUST the DATA part of the RID (does not | |
203 | * include the len or code fields) | |
204 | *-------------------------------------------------------------------- | |
205 | */ | |
aaad4303 SP |
206 | #define HFA384x_RID_CNFOWNMACADDR_LEN ((u16)6) |
207 | #define HFA384x_RID_CNFDESIREDSSID_LEN ((u16)34) | |
aaad4303 | 208 | #define HFA384x_RID_CNFOWNSSID_LEN ((u16)34) |
00b3ed16 GKH |
209 | |
210 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
211 | * Configuration RIDs: Network Parameters, Dynamic Configuration Entities |
212 | *-------------------------------------------------------------------- | |
213 | */ | |
aaad4303 SP |
214 | #define HFA384x_RID_CREATEIBSS ((u16)0xFC81) |
215 | #define HFA384x_RID_FRAGTHRESH ((u16)0xFC82) | |
216 | #define HFA384x_RID_RTSTHRESH ((u16)0xFC83) | |
217 | #define HFA384x_RID_TXRATECNTL ((u16)0xFC84) | |
218 | #define HFA384x_RID_PROMISCMODE ((u16)0xFC85) | |
00b3ed16 GKH |
219 | |
220 | /*---------------------------------------------------------------------- | |
3e27dfa2 SP |
221 | * Information RIDs: NIC Information |
222 | *---------------------------------------------------------------------- | |
223 | */ | |
aaad4303 SP |
224 | #define HFA384x_RID_MAXLOADTIME ((u16)0xFD00) |
225 | #define HFA384x_RID_DOWNLOADBUFFER ((u16)0xFD01) | |
226 | #define HFA384x_RID_PRIIDENTITY ((u16)0xFD02) | |
227 | #define HFA384x_RID_PRISUPRANGE ((u16)0xFD03) | |
228 | #define HFA384x_RID_PRI_CFIACTRANGES ((u16)0xFD04) | |
229 | #define HFA384x_RID_NICSERIALNUMBER ((u16)0xFD0A) | |
230 | #define HFA384x_RID_NICIDENTITY ((u16)0xFD0B) | |
231 | #define HFA384x_RID_MFISUPRANGE ((u16)0xFD0C) | |
232 | #define HFA384x_RID_CFISUPRANGE ((u16)0xFD0D) | |
aaad4303 SP |
233 | #define HFA384x_RID_STAIDENTITY ((u16)0xFD20) |
234 | #define HFA384x_RID_STASUPRANGE ((u16)0xFD21) | |
235 | #define HFA384x_RID_STA_MFIACTRANGES ((u16)0xFD22) | |
236 | #define HFA384x_RID_STA_CFIACTRANGES ((u16)0xFD23) | |
00b3ed16 GKH |
237 | |
238 | /*---------------------------------------------------------------------- | |
3e27dfa2 SP |
239 | * Information RID Lengths: NIC Information |
240 | * This is the length of JUST the DATA part of the RID (does not | |
241 | * include the len or code fields) | |
242 | *--------------------------------------------------------------------- | |
243 | */ | |
aaad4303 | 244 | #define HFA384x_RID_NICSERIALNUMBER_LEN ((u16)12) |
00b3ed16 GKH |
245 | |
246 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
247 | * Information RIDs: MAC Information |
248 | *-------------------------------------------------------------------- | |
249 | */ | |
aaad4303 SP |
250 | #define HFA384x_RID_PORTSTATUS ((u16)0xFD40) |
251 | #define HFA384x_RID_CURRENTSSID ((u16)0xFD41) | |
252 | #define HFA384x_RID_CURRENTBSSID ((u16)0xFD42) | |
aaad4303 | 253 | #define HFA384x_RID_CURRENTTXRATE ((u16)0xFD44) |
aaad4303 SP |
254 | #define HFA384x_RID_SHORTRETRYLIMIT ((u16)0xFD48) |
255 | #define HFA384x_RID_LONGRETRYLIMIT ((u16)0xFD49) | |
256 | #define HFA384x_RID_MAXTXLIFETIME ((u16)0xFD4A) | |
aaad4303 SP |
257 | #define HFA384x_RID_PRIVACYOPTIMP ((u16)0xFD4F) |
258 | #define HFA384x_RID_DBMCOMMSQUALITY ((u16)0xFD51) | |
00b3ed16 GKH |
259 | |
260 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
261 | * Information RID Lengths: MAC Information |
262 | * This is the length of JUST the DATA part of the RID (does not | |
263 | * include the len or code fields) | |
264 | *-------------------------------------------------------------------- | |
265 | */ | |
71508ee4 | 266 | #define HFA384x_RID_DBMCOMMSQUALITY_LEN \ |
62e493c4 | 267 | ((u16)sizeof(struct hfa384x_dbmcommsquality)) |
71508ee4 | 268 | #define HFA384x_RID_JOINREQUEST_LEN \ |
f0ffa0e2 | 269 | ((u16)sizeof(struct hfa384x_JoinRequest_data)) |
40a67411 | 270 | |
00b3ed16 | 271 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
272 | * Information RIDs: Modem Information |
273 | *-------------------------------------------------------------------- | |
274 | */ | |
aaad4303 | 275 | #define HFA384x_RID_CURRENTCHANNEL ((u16)0xFDC1) |
00b3ed16 GKH |
276 | |
277 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
278 | * API ENHANCEMENTS (NOT ALREADY IMPLEMENTED) |
279 | *-------------------------------------------------------------------- | |
280 | */ | |
aaad4303 SP |
281 | #define HFA384x_RID_CNFWEPDEFAULTKEYID ((u16)0xFC23) |
282 | #define HFA384x_RID_CNFWEPDEFAULTKEY0 ((u16)0xFC24) | |
283 | #define HFA384x_RID_CNFWEPDEFAULTKEY1 ((u16)0xFC25) | |
284 | #define HFA384x_RID_CNFWEPDEFAULTKEY2 ((u16)0xFC26) | |
285 | #define HFA384x_RID_CNFWEPDEFAULTKEY3 ((u16)0xFC27) | |
286 | #define HFA384x_RID_CNFWEPFLAGS ((u16)0xFC28) | |
aaad4303 | 287 | #define HFA384x_RID_CNFAUTHENTICATION ((u16)0xFC2A) |
aaad4303 | 288 | #define HFA384x_RID_CNFROAMINGMODE ((u16)0xFC2D) |
aaad4303 | 289 | #define HFA384x_RID_CNFAPBCNint ((u16)0xFC33) |
eec0d0dc GH |
290 | #define HFA384x_RID_CNFDBMADJUST ((u16)0xFC46) |
291 | #define HFA384x_RID_CNFWPADATA ((u16)0xFC48) | |
aaad4303 SP |
292 | #define HFA384x_RID_CNFBASICRATES ((u16)0xFCB3) |
293 | #define HFA384x_RID_CNFSUPPRATES ((u16)0xFCB4) | |
e573aaa4 | 294 | #define HFA384x_RID_CNFPASSIVESCANCTRL ((u16)0xFCBA) |
eec0d0dc | 295 | #define HFA384x_RID_TXPOWERMAX ((u16)0xFCBE) |
aaad4303 SP |
296 | #define HFA384x_RID_JOINREQUEST ((u16)0xFCE2) |
297 | #define HFA384x_RID_AUTHENTICATESTA ((u16)0xFCE3) | |
eec0d0dc | 298 | #define HFA384x_RID_HOSTSCAN ((u16)0xFCE5) |
aaad4303 SP |
299 | |
300 | #define HFA384x_RID_CNFWEPDEFAULTKEY_LEN ((u16)6) | |
301 | #define HFA384x_RID_CNFWEP128DEFAULTKEY_LEN ((u16)14) | |
40a67411 | 302 | |
00b3ed16 | 303 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
304 | * PD Record codes |
305 | *-------------------------------------------------------------------- | |
306 | */ | |
aaad4303 SP |
307 | #define HFA384x_PDR_PCB_PARTNUM ((u16)0x0001) |
308 | #define HFA384x_PDR_PDAVER ((u16)0x0002) | |
309 | #define HFA384x_PDR_NIC_SERIAL ((u16)0x0003) | |
310 | #define HFA384x_PDR_MKK_MEASUREMENTS ((u16)0x0004) | |
311 | #define HFA384x_PDR_NIC_RAMSIZE ((u16)0x0005) | |
312 | #define HFA384x_PDR_MFISUPRANGE ((u16)0x0006) | |
313 | #define HFA384x_PDR_CFISUPRANGE ((u16)0x0007) | |
314 | #define HFA384x_PDR_NICID ((u16)0x0008) | |
aaad4303 | 315 | #define HFA384x_PDR_MAC_ADDRESS ((u16)0x0101) |
aaad4303 SP |
316 | #define HFA384x_PDR_REGDOMAIN ((u16)0x0103) |
317 | #define HFA384x_PDR_ALLOWED_CHANNEL ((u16)0x0104) | |
318 | #define HFA384x_PDR_DEFAULT_CHANNEL ((u16)0x0105) | |
aaad4303 | 319 | #define HFA384x_PDR_TEMPTYPE ((u16)0x0107) |
aaad4303 SP |
320 | #define HFA384x_PDR_IFR_SETTING ((u16)0x0200) |
321 | #define HFA384x_PDR_RFR_SETTING ((u16)0x0201) | |
322 | #define HFA384x_PDR_HFA3861_BASELINE ((u16)0x0202) | |
323 | #define HFA384x_PDR_HFA3861_SHADOW ((u16)0x0203) | |
324 | #define HFA384x_PDR_HFA3861_IFRF ((u16)0x0204) | |
325 | #define HFA384x_PDR_HFA3861_CHCALSP ((u16)0x0300) | |
326 | #define HFA384x_PDR_HFA3861_CHCALI ((u16)0x0301) | |
eec0d0dc | 327 | #define HFA384x_PDR_MAX_TX_POWER ((u16)0x0302) |
aaad4303 SP |
328 | #define HFA384x_PDR_MASTER_CHAN_LIST ((u16)0x0303) |
329 | #define HFA384x_PDR_3842_NIC_CONFIG ((u16)0x0400) | |
330 | #define HFA384x_PDR_USB_ID ((u16)0x0401) | |
331 | #define HFA384x_PDR_PCI_ID ((u16)0x0402) | |
332 | #define HFA384x_PDR_PCI_IFCONF ((u16)0x0403) | |
333 | #define HFA384x_PDR_PCI_PMCONF ((u16)0x0404) | |
334 | #define HFA384x_PDR_RFENRGY ((u16)0x0406) | |
335 | #define HFA384x_PDR_USB_POWER_TYPE ((u16)0x0407) | |
aaad4303 SP |
336 | #define HFA384x_PDR_USB_MAX_POWER ((u16)0x0409) |
337 | #define HFA384x_PDR_USB_MANUFACTURER ((u16)0x0410) | |
eec0d0dc GH |
338 | #define HFA384x_PDR_USB_PRODUCT ((u16)0x0411) |
339 | #define HFA384x_PDR_ANT_DIVERSITY ((u16)0x0412) | |
340 | #define HFA384x_PDR_HFO_DELAY ((u16)0x0413) | |
341 | #define HFA384x_PDR_SCALE_THRESH ((u16)0x0414) | |
aaad4303 SP |
342 | |
343 | #define HFA384x_PDR_HFA3861_MANF_TESTSP ((u16)0x0900) | |
344 | #define HFA384x_PDR_HFA3861_MANF_TESTI ((u16)0x0901) | |
345 | #define HFA384x_PDR_END_OF_PDA ((u16)0x0000) | |
00b3ed16 | 346 | |
00b3ed16 GKH |
347 | /*--- Register Test/Get/Set Field macros ------------------------*/ |
348 | ||
71508ee4 AG |
349 | #define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8)) |
350 | #define HFA384x_CMD_MACPORT_SET(value) \ | |
351 | ((u16)HFA384x_CMD_AINFO_SET(value)) | |
352 | #define HFA384x_CMD_PROGMODE_SET(value) \ | |
353 | ((u16)HFA384x_CMD_AINFO_SET((u16)value)) | |
aaad4303 SP |
354 | #define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value)) |
355 | ||
aaad4303 | 356 | #define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8) |
acb7e242 | 357 | |
00b3ed16 GKH |
358 | /* Host Maintained State Info */ |
359 | #define HFA384x_STATE_PREINIT 0 | |
360 | #define HFA384x_STATE_INIT 1 | |
361 | #define HFA384x_STATE_RUNNING 2 | |
362 | ||
00b3ed16 GKH |
363 | /*-------------------------------------------------------------*/ |
364 | /* Commonly used basic types */ | |
b2119911 | 365 | struct hfa384x_bytestr { |
e573aaa4 MM |
366 | u16 len; |
367 | u8 data[0]; | |
b2119911 | 368 | } __packed; |
00b3ed16 | 369 | |
03c2975b | 370 | struct hfa384x_bytestr32 { |
e573aaa4 MM |
371 | u16 len; |
372 | u8 data[32]; | |
03c2975b | 373 | } __packed; |
00b3ed16 GKH |
374 | |
375 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
376 | * Configuration Record Structures: |
377 | * Network Parameters, Static Configuration Entities | |
378 | *-------------------------------------------------------------------- | |
379 | */ | |
00b3ed16 GKH |
380 | |
381 | /*-- Hardware/Firmware Component Information ----------*/ | |
5f046456 | 382 | struct hfa384x_compident { |
e573aaa4 MM |
383 | u16 id; |
384 | u16 variant; | |
385 | u16 major; | |
386 | u16 minor; | |
5f046456 | 387 | } __packed; |
e573aaa4 | 388 | |
65f170c6 | 389 | struct hfa384x_caplevel { |
e573aaa4 MM |
390 | u16 role; |
391 | u16 id; | |
392 | u16 variant; | |
393 | u16 bottom; | |
394 | u16 top; | |
65f170c6 | 395 | } __packed; |
00b3ed16 | 396 | |
00b3ed16 GKH |
397 | /*-- Configuration Record: cnfAuthentication --*/ |
398 | #define HFA384x_CNFAUTHENTICATION_OPENSYSTEM 0x0001 | |
399 | #define HFA384x_CNFAUTHENTICATION_SHAREDKEY 0x0002 | |
eec0d0dc | 400 | #define HFA384x_CNFAUTHENTICATION_LEAP 0x0004 |
00b3ed16 | 401 | |
00b3ed16 | 402 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
403 | * Configuration Record Structures: |
404 | * Network Parameters, Dynamic Configuration Entities | |
405 | *-------------------------------------------------------------------- | |
406 | */ | |
00b3ed16 | 407 | |
00b3ed16 | 408 | #define HFA384x_CREATEIBSS_JOINCREATEIBSS 0 |
00b3ed16 GKH |
409 | |
410 | /*-- Configuration Record: HostScanRequest (data portion only) --*/ | |
935cbfb2 | 411 | struct hfa384x_HostScanRequest_data { |
e573aaa4 MM |
412 | u16 channelList; |
413 | u16 txRate; | |
03c2975b | 414 | struct hfa384x_bytestr32 ssid; |
935cbfb2 | 415 | } __packed; |
00b3ed16 GKH |
416 | |
417 | /*-- Configuration Record: JoinRequest (data portion only) --*/ | |
f0ffa0e2 | 418 | struct hfa384x_JoinRequest_data { |
e573aaa4 MM |
419 | u8 bssid[WLAN_BSSID_LEN]; |
420 | u16 channel; | |
f0ffa0e2 | 421 | } __packed; |
00b3ed16 GKH |
422 | |
423 | /*-- Configuration Record: authenticateStation (data portion only) --*/ | |
17fb19f0 | 424 | struct hfa384x_authenticateStation_data { |
e573aaa4 MM |
425 | u8 address[ETH_ALEN]; |
426 | u16 status; | |
427 | u16 algorithm; | |
17fb19f0 | 428 | } __packed; |
00b3ed16 | 429 | |
00b3ed16 | 430 | /*-- Configuration Record: WPAData (data portion only) --*/ |
a2a44803 | 431 | struct hfa384x_WPAData { |
e573aaa4 | 432 | u16 datalen; |
5dd8acc8 | 433 | u8 data[0]; /* max 80 */ |
a2a44803 | 434 | } __packed; |
00b3ed16 | 435 | |
00b3ed16 | 436 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
437 | * Information Record Structures: NIC Information |
438 | *-------------------------------------------------------------------- | |
439 | */ | |
00b3ed16 | 440 | |
00b3ed16 GKH |
441 | /*-- Information Record: DownLoadBuffer --*/ |
442 | /* NOTE: The page and offset are in AUX format */ | |
b71db740 | 443 | struct hfa384x_downloadbuffer { |
e573aaa4 MM |
444 | u16 page; |
445 | u16 offset; | |
446 | u16 len; | |
b71db740 | 447 | } __packed; |
00b3ed16 | 448 | |
00b3ed16 | 449 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
450 | * Information Record Structures: NIC Information |
451 | *-------------------------------------------------------------------- | |
452 | */ | |
00b3ed16 | 453 | |
aaad4303 | 454 | #define HFA384x_PSTATUS_CONN_IBSS ((u16)3) |
00b3ed16 GKH |
455 | |
456 | /*-- Information Record: commsquality --*/ | |
a1e95045 | 457 | struct hfa384x_commsquality { |
e573aaa4 MM |
458 | u16 CQ_currBSS; |
459 | u16 ASL_currBSS; | |
460 | u16 ANL_currFC; | |
a1e95045 | 461 | } __packed; |
00b3ed16 GKH |
462 | |
463 | /*-- Information Record: dmbcommsquality --*/ | |
62e493c4 | 464 | struct hfa384x_dbmcommsquality { |
e573aaa4 MM |
465 | u16 CQdbm_currBSS; |
466 | u16 ASLdbm_currBSS; | |
467 | u16 ANLdbm_currFC; | |
62e493c4 | 468 | } __packed; |
00b3ed16 | 469 | |
00b3ed16 | 470 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
471 | * FRAME STRUCTURES: Communication Frames |
472 | *-------------------------------------------------------------------- | |
473 | * Communication Frames: Transmit Frames | |
474 | *-------------------------------------------------------------------- | |
475 | */ | |
00b3ed16 | 476 | /*-- Communication Frame: Transmit Frame Structure --*/ |
eb76afc9 | 477 | struct hfa384x_tx_frame { |
e573aaa4 MM |
478 | u16 status; |
479 | u16 reserved1; | |
480 | u16 reserved2; | |
481 | u32 sw_support; | |
482 | u8 tx_retrycount; | |
483 | u8 tx_rate; | |
484 | u16 tx_control; | |
00b3ed16 GKH |
485 | |
486 | /*-- 802.11 Header Information --*/ | |
487 | ||
e573aaa4 MM |
488 | u16 frame_control; |
489 | u16 duration_id; | |
490 | u8 address1[6]; | |
491 | u8 address2[6]; | |
492 | u8 address3[6]; | |
493 | u16 sequence_control; | |
494 | u8 address4[6]; | |
495 | u16 data_len; /* little endian format */ | |
00b3ed16 GKH |
496 | |
497 | /*-- 802.3 Header Information --*/ | |
498 | ||
e573aaa4 MM |
499 | u8 dest_addr[6]; |
500 | u8 src_addr[6]; | |
501 | u16 data_length; /* big endian format */ | |
eb76afc9 | 502 | } __packed; |
00b3ed16 | 503 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
504 | * Communication Frames: Field Masks for Transmit Frames |
505 | *-------------------------------------------------------------------- | |
506 | */ | |
00b3ed16 | 507 | /*-- Status Field --*/ |
7f6e0e44 MM |
508 | #define HFA384x_TXSTATUS_ACKERR ((u16)BIT(5)) |
509 | #define HFA384x_TXSTATUS_FORMERR ((u16)BIT(3)) | |
510 | #define HFA384x_TXSTATUS_DISCON ((u16)BIT(2)) | |
511 | #define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1)) | |
512 | #define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0)) | |
00b3ed16 | 513 | /*-- Transmit Control Field --*/ |
71508ee4 AG |
514 | #define HFA384x_TX_MACPORT ((u16)(BIT(10) | \ |
515 | BIT(9) | BIT(8))) | |
7f6e0e44 MM |
516 | #define HFA384x_TX_STRUCTYPE ((u16)(BIT(4) | BIT(3))) |
517 | #define HFA384x_TX_TXEX ((u16)BIT(2)) | |
518 | #define HFA384x_TX_TXOK ((u16)BIT(1)) | |
00b3ed16 | 519 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
520 | * Communication Frames: Test/Get/Set Field Values for Transmit Frames |
521 | *-------------------------------------------------------------------- | |
522 | */ | |
00b3ed16 GKH |
523 | /*-- Status Field --*/ |
524 | #define HFA384x_TXSTATUS_ISERROR(v) \ | |
65dbeefd | 525 | (((u16)(v)) & \ |
05235ce2 GS |
526 | (HFA384x_TXSTATUS_ACKERR | HFA384x_TXSTATUS_FORMERR | \ |
527 | HFA384x_TXSTATUS_DISCON | HFA384x_TXSTATUS_AGEDERR | \ | |
00b3ed16 GKH |
528 | HFA384x_TXSTATUS_RETRYERR)) |
529 | ||
6e81f6f1 | 530 | #define HFA384x_TX_SET(v, m, s) ((((u16)(v)) << ((u16)(s))) & ((u16)(m))) |
00b3ed16 | 531 | |
00b3ed16 | 532 | #define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) |
71508ee4 AG |
533 | #define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \ |
534 | HFA384x_TX_STRUCTYPE, 3) | |
00b3ed16 | 535 | #define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) |
00b3ed16 GKH |
536 | #define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) |
537 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
538 | * Communication Frames: Receive Frames |
539 | *-------------------------------------------------------------------- | |
540 | */ | |
00b3ed16 | 541 | /*-- Communication Frame: Receive Frame Structure --*/ |
70adf509 | 542 | struct hfa384x_rx_frame { |
00b3ed16 | 543 | /*-- MAC rx descriptor (hfa384x byte order) --*/ |
e573aaa4 MM |
544 | u16 status; |
545 | u32 time; | |
546 | u8 silence; | |
547 | u8 signal; | |
548 | u8 rate; | |
549 | u8 rx_flow; | |
550 | u16 reserved1; | |
551 | u16 reserved2; | |
00b3ed16 GKH |
552 | |
553 | /*-- 802.11 Header Information (802.11 byte order) --*/ | |
8cbe56e0 | 554 | __le16 frame_control; |
e573aaa4 MM |
555 | u16 duration_id; |
556 | u8 address1[6]; | |
557 | u8 address2[6]; | |
558 | u8 address3[6]; | |
559 | u16 sequence_control; | |
560 | u8 address4[6]; | |
8cbe56e0 | 561 | __le16 data_len; /* hfa384x (little endian) format */ |
00b3ed16 GKH |
562 | |
563 | /*-- 802.3 Header Information --*/ | |
e573aaa4 MM |
564 | u8 dest_addr[6]; |
565 | u8 src_addr[6]; | |
566 | u16 data_length; /* IEEE? (big endian) format */ | |
70adf509 | 567 | } __packed; |
00b3ed16 | 568 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
569 | * Communication Frames: Field Masks for Receive Frames |
570 | *-------------------------------------------------------------------- | |
571 | */ | |
00b3ed16 GKH |
572 | |
573 | /*-- Status Fields --*/ | |
71508ee4 AG |
574 | #define HFA384x_RXSTATUS_MACPORT ((u16)(BIT(10) | \ |
575 | BIT(9) | \ | |
576 | BIT(8))) | |
7f6e0e44 | 577 | #define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0)) |
00b3ed16 | 578 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
579 | * Communication Frames: Test/Get/Set Field Values for Receive Frames |
580 | *-------------------------------------------------------------------- | |
581 | */ | |
71508ee4 AG |
582 | #define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) \ |
583 | & HFA384x_RXSTATUS_MACPORT) >> 8)) | |
584 | #define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) \ | |
585 | & HFA384x_RXSTATUS_FCSERR)) | |
00b3ed16 | 586 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
587 | * FRAME STRUCTURES: Information Types and Information Frame Structures |
588 | *-------------------------------------------------------------------- | |
589 | * Information Types | |
590 | *-------------------------------------------------------------------- | |
591 | */ | |
aaad4303 | 592 | #define HFA384x_IT_HANDOVERADDR ((u16)0xF000UL) |
aaad4303 SP |
593 | #define HFA384x_IT_COMMTALLIES ((u16)0xF100UL) |
594 | #define HFA384x_IT_SCANRESULTS ((u16)0xF101UL) | |
595 | #define HFA384x_IT_CHINFORESULTS ((u16)0xF102UL) | |
596 | #define HFA384x_IT_HOSTSCANRESULTS ((u16)0xF103UL) | |
597 | #define HFA384x_IT_LINKSTATUS ((u16)0xF200UL) | |
598 | #define HFA384x_IT_ASSOCSTATUS ((u16)0xF201UL) | |
599 | #define HFA384x_IT_AUTHREQ ((u16)0xF202UL) | |
600 | #define HFA384x_IT_PSUSERCNT ((u16)0xF203UL) | |
601 | #define HFA384x_IT_KEYIDCHANGED ((u16)0xF204UL) | |
eec0d0dc GH |
602 | #define HFA384x_IT_ASSOCREQ ((u16)0xF205UL) |
603 | #define HFA384x_IT_MICFAILURE ((u16)0xF206UL) | |
00b3ed16 GKH |
604 | |
605 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
606 | * Information Frames Structures |
607 | *-------------------------------------------------------------------- | |
608 | * Information Frames: Notification Frame Structures | |
609 | *-------------------------------------------------------------------- | |
610 | */ | |
00b3ed16 GKH |
611 | |
612 | /*-- Inquiry Frame, Diagnose: Communication Tallies --*/ | |
07e23b67 | 613 | struct hfa384x_CommTallies16 { |
e573aaa4 MM |
614 | u16 txunicastframes; |
615 | u16 txmulticastframes; | |
616 | u16 txfragments; | |
617 | u16 txunicastoctets; | |
618 | u16 txmulticastoctets; | |
619 | u16 txdeferredtrans; | |
620 | u16 txsingleretryframes; | |
621 | u16 txmultipleretryframes; | |
622 | u16 txretrylimitexceeded; | |
623 | u16 txdiscards; | |
624 | u16 rxunicastframes; | |
625 | u16 rxmulticastframes; | |
626 | u16 rxfragments; | |
627 | u16 rxunicastoctets; | |
628 | u16 rxmulticastoctets; | |
629 | u16 rxfcserrors; | |
630 | u16 rxdiscardsnobuffer; | |
631 | u16 txdiscardswrongsa; | |
632 | u16 rxdiscardswepundecr; | |
633 | u16 rxmsginmsgfrag; | |
634 | u16 rxmsginbadmsgfrag; | |
07e23b67 | 635 | } __packed; |
e573aaa4 | 636 | |
cfc6cb1f | 637 | struct hfa384x_CommTallies32 { |
e573aaa4 MM |
638 | u32 txunicastframes; |
639 | u32 txmulticastframes; | |
640 | u32 txfragments; | |
641 | u32 txunicastoctets; | |
642 | u32 txmulticastoctets; | |
643 | u32 txdeferredtrans; | |
644 | u32 txsingleretryframes; | |
645 | u32 txmultipleretryframes; | |
646 | u32 txretrylimitexceeded; | |
647 | u32 txdiscards; | |
648 | u32 rxunicastframes; | |
649 | u32 rxmulticastframes; | |
650 | u32 rxfragments; | |
651 | u32 rxunicastoctets; | |
652 | u32 rxmulticastoctets; | |
653 | u32 rxfcserrors; | |
654 | u32 rxdiscardsnobuffer; | |
655 | u32 txdiscardswrongsa; | |
656 | u32 rxdiscardswepundecr; | |
657 | u32 rxmsginmsgfrag; | |
658 | u32 rxmsginbadmsgfrag; | |
cfc6cb1f | 659 | } __packed; |
00b3ed16 GKH |
660 | |
661 | /*-- Inquiry Frame, Diagnose: Scan Results & Subfields--*/ | |
4400334b | 662 | struct hfa384x_ScanResultSub { |
e573aaa4 MM |
663 | u16 chid; |
664 | u16 anl; | |
665 | u16 sl; | |
666 | u8 bssid[WLAN_BSSID_LEN]; | |
667 | u16 bcnint; | |
668 | u16 capinfo; | |
03c2975b | 669 | struct hfa384x_bytestr32 ssid; |
e573aaa4 MM |
670 | u8 supprates[10]; /* 802.11 info element */ |
671 | u16 proberesp_rate; | |
4400334b | 672 | } __packed; |
e573aaa4 | 673 | |
dc0bb002 | 674 | struct hfa384x_ScanResult { |
e573aaa4 MM |
675 | u16 rsvd; |
676 | u16 scanreason; | |
4400334b | 677 | struct hfa384x_ScanResultSub result[HFA384x_SCANRESULT_MAX]; |
dc0bb002 | 678 | } __packed; |
00b3ed16 GKH |
679 | |
680 | /*-- Inquiry Frame, Diagnose: ChInfo Results & Subfields--*/ | |
1bc4292a | 681 | struct hfa384x_ChInfoResultSub { |
e573aaa4 MM |
682 | u16 chid; |
683 | u16 anl; | |
684 | u16 pnl; | |
685 | u16 active; | |
1bc4292a | 686 | } __packed; |
00b3ed16 | 687 | |
7f6e0e44 MM |
688 | #define HFA384x_CHINFORESULT_BSSACTIVE BIT(0) |
689 | #define HFA384x_CHINFORESULT_PCFACTIVE BIT(1) | |
00b3ed16 | 690 | |
0fddae8e | 691 | struct hfa384x_ChInfoResult { |
e573aaa4 | 692 | u16 scanchannels; |
1bc4292a | 693 | struct hfa384x_ChInfoResultSub result[HFA384x_CHINFORESULT_MAX]; |
0fddae8e | 694 | } __packed; |
00b3ed16 GKH |
695 | |
696 | /*-- Inquiry Frame, Diagnose: Host Scan Results & Subfields--*/ | |
b353d11a | 697 | struct hfa384x_HScanResultSub { |
e573aaa4 MM |
698 | u16 chid; |
699 | u16 anl; | |
700 | u16 sl; | |
701 | u8 bssid[WLAN_BSSID_LEN]; | |
702 | u16 bcnint; | |
703 | u16 capinfo; | |
03c2975b | 704 | struct hfa384x_bytestr32 ssid; |
e573aaa4 MM |
705 | u8 supprates[10]; /* 802.11 info element */ |
706 | u16 proberesp_rate; | |
707 | u16 atim; | |
b353d11a | 708 | } __packed; |
e573aaa4 | 709 | |
f8f2821e | 710 | struct hfa384x_HScanResult { |
e573aaa4 MM |
711 | u16 nresult; |
712 | u16 rsvd; | |
b353d11a | 713 | struct hfa384x_HScanResultSub result[HFA384x_HSCANRESULT_MAX]; |
f8f2821e | 714 | } __packed; |
00b3ed16 GKH |
715 | |
716 | /*-- Unsolicited Frame, MAC Mgmt: LinkStatus --*/ | |
717 | ||
aaad4303 SP |
718 | #define HFA384x_LINK_NOTCONNECTED ((u16)0) |
719 | #define HFA384x_LINK_CONNECTED ((u16)1) | |
720 | #define HFA384x_LINK_DISCONNECTED ((u16)2) | |
721 | #define HFA384x_LINK_AP_CHANGE ((u16)3) | |
722 | #define HFA384x_LINK_AP_OUTOFRANGE ((u16)4) | |
723 | #define HFA384x_LINK_AP_INRANGE ((u16)5) | |
724 | #define HFA384x_LINK_ASSOCFAIL ((u16)6) | |
00b3ed16 | 725 | |
a8eb5139 | 726 | struct hfa384x_LinkStatus { |
e573aaa4 | 727 | u16 linkstatus; |
a8eb5139 | 728 | } __packed; |
00b3ed16 GKH |
729 | |
730 | /*-- Unsolicited Frame, MAC Mgmt: AssociationStatus (--*/ | |
731 | ||
aaad4303 SP |
732 | #define HFA384x_ASSOCSTATUS_STAASSOC ((u16)1) |
733 | #define HFA384x_ASSOCSTATUS_REASSOC ((u16)2) | |
aaad4303 | 734 | #define HFA384x_ASSOCSTATUS_AUTHFAIL ((u16)5) |
00b3ed16 | 735 | |
5383f13e | 736 | struct hfa384x_AssocStatus { |
e573aaa4 MM |
737 | u16 assocstatus; |
738 | u8 sta_addr[ETH_ALEN]; | |
00b3ed16 | 739 | /* old_ap_addr is only valid if assocstatus == 2 */ |
e573aaa4 MM |
740 | u8 old_ap_addr[ETH_ALEN]; |
741 | u16 reason; | |
742 | u16 reserved; | |
5383f13e | 743 | } __packed; |
00b3ed16 GKH |
744 | |
745 | /*-- Unsolicited Frame, MAC Mgmt: AuthRequest (AP Only) --*/ | |
746 | ||
b9820e0c | 747 | struct hfa384x_AuthRequest { |
e573aaa4 MM |
748 | u8 sta_addr[ETH_ALEN]; |
749 | u16 algorithm; | |
b9820e0c | 750 | } __packed; |
00b3ed16 | 751 | |
00b3ed16 GKH |
752 | /*-- Unsolicited Frame, MAC Mgmt: PSUserCount (AP Only) --*/ |
753 | ||
013e69eb | 754 | struct hfa384x_PSUserCount { |
e573aaa4 | 755 | u16 usercnt; |
013e69eb | 756 | } __packed; |
00b3ed16 | 757 | |
44049d81 | 758 | struct hfa384x_KeyIDChanged { |
e573aaa4 MM |
759 | u8 sta_addr[ETH_ALEN]; |
760 | u16 keyid; | |
44049d81 | 761 | } __packed; |
00b3ed16 GKH |
762 | |
763 | /*-- Collection of all Inf frames ---------------*/ | |
f745ea61 | 764 | union hfa384x_infodata { |
07e23b67 | 765 | struct hfa384x_CommTallies16 commtallies16; |
cfc6cb1f | 766 | struct hfa384x_CommTallies32 commtallies32; |
dc0bb002 | 767 | struct hfa384x_ScanResult scanresult; |
0fddae8e | 768 | struct hfa384x_ChInfoResult chinforesult; |
f8f2821e | 769 | struct hfa384x_HScanResult hscanresult; |
a8eb5139 | 770 | struct hfa384x_LinkStatus linkstatus; |
5383f13e | 771 | struct hfa384x_AssocStatus assocstatus; |
b9820e0c | 772 | struct hfa384x_AuthRequest authreq; |
013e69eb | 773 | struct hfa384x_PSUserCount psusercnt; |
44049d81 | 774 | struct hfa384x_KeyIDChanged keyidchanged; |
f745ea61 | 775 | } __packed; |
e573aaa4 | 776 | |
f69de9e3 | 777 | struct hfa384x_InfFrame { |
e573aaa4 MM |
778 | u16 framelen; |
779 | u16 infotype; | |
f745ea61 | 780 | union hfa384x_infodata info; |
f69de9e3 | 781 | } __packed; |
00b3ed16 | 782 | |
00b3ed16 | 783 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
784 | * USB Packet structures and constants. |
785 | *-------------------------------------------------------------------- | |
786 | */ | |
00b3ed16 | 787 | |
00b3ed16 GKH |
788 | /* Should be sent to the bulkout endpoint */ |
789 | #define HFA384x_USB_TXFRM 0 | |
790 | #define HFA384x_USB_CMDREQ 1 | |
791 | #define HFA384x_USB_WRIDREQ 2 | |
792 | #define HFA384x_USB_RRIDREQ 3 | |
793 | #define HFA384x_USB_WMEMREQ 4 | |
794 | #define HFA384x_USB_RMEMREQ 5 | |
795 | ||
796 | /* Received from the bulkin endpoint */ | |
00b3ed16 GKH |
797 | #define HFA384x_USB_ISTXFRM(a) (((a) & 0x9000) == 0x1000) |
798 | #define HFA384x_USB_ISRXFRM(a) (!((a) & 0x9000)) | |
799 | #define HFA384x_USB_INFOFRM 0x8000 | |
800 | #define HFA384x_USB_CMDRESP 0x8001 | |
801 | #define HFA384x_USB_WRIDRESP 0x8002 | |
802 | #define HFA384x_USB_RRIDRESP 0x8003 | |
803 | #define HFA384x_USB_WMEMRESP 0x8004 | |
804 | #define HFA384x_USB_RMEMRESP 0x8005 | |
805 | #define HFA384x_USB_BUFAVAIL 0x8006 | |
806 | #define HFA384x_USB_ERROR 0x8007 | |
807 | ||
808 | /*------------------------------------*/ | |
809 | /* Request (bulk OUT) packet contents */ | |
810 | ||
2f1014f7 | 811 | struct hfa384x_usb_txfrm { |
eb76afc9 | 812 | struct hfa384x_tx_frame desc; |
e573aaa4 | 813 | u8 data[WLAN_DATA_MAXLEN]; |
2f1014f7 | 814 | } __packed; |
00b3ed16 | 815 | |
a6dcbdfe | 816 | struct hfa384x_usb_cmdreq { |
e573aaa4 MM |
817 | u16 type; |
818 | u16 cmd; | |
819 | u16 parm0; | |
820 | u16 parm1; | |
821 | u16 parm2; | |
822 | u8 pad[54]; | |
a6dcbdfe | 823 | } __packed; |
00b3ed16 | 824 | |
3bc070f6 | 825 | struct hfa384x_usb_wridreq { |
e573aaa4 MM |
826 | u16 type; |
827 | u16 frmlen; | |
828 | u16 rid; | |
829 | u8 data[HFA384x_RIDDATA_MAXLEN]; | |
3bc070f6 | 830 | } __packed; |
00b3ed16 | 831 | |
5b9f240e | 832 | struct hfa384x_usb_rridreq { |
e573aaa4 MM |
833 | u16 type; |
834 | u16 frmlen; | |
835 | u16 rid; | |
836 | u8 pad[58]; | |
5b9f240e | 837 | } __packed; |
00b3ed16 | 838 | |
f0e15d40 | 839 | struct hfa384x_usb_wmemreq { |
e573aaa4 MM |
840 | u16 type; |
841 | u16 frmlen; | |
842 | u16 offset; | |
843 | u16 page; | |
844 | u8 data[HFA384x_USB_RWMEM_MAXLEN]; | |
f0e15d40 | 845 | } __packed; |
00b3ed16 | 846 | |
94ec5464 | 847 | struct hfa384x_usb_rmemreq { |
e573aaa4 MM |
848 | u16 type; |
849 | u16 frmlen; | |
850 | u16 offset; | |
851 | u16 page; | |
852 | u8 pad[56]; | |
94ec5464 | 853 | } __packed; |
00b3ed16 GKH |
854 | |
855 | /*------------------------------------*/ | |
856 | /* Response (bulk IN) packet contents */ | |
857 | ||
684b2e08 | 858 | struct hfa384x_usb_rxfrm { |
70adf509 | 859 | struct hfa384x_rx_frame desc; |
e573aaa4 | 860 | u8 data[WLAN_DATA_MAXLEN]; |
684b2e08 | 861 | } __packed; |
00b3ed16 | 862 | |
e20a7ca1 | 863 | struct hfa384x_usb_infofrm { |
e573aaa4 | 864 | u16 type; |
f69de9e3 | 865 | struct hfa384x_InfFrame info; |
e20a7ca1 | 866 | } __packed; |
00b3ed16 | 867 | |
385a79df | 868 | struct hfa384x_usb_statusresp { |
e573aaa4 MM |
869 | u16 type; |
870 | u16 status; | |
871 | u16 resp0; | |
872 | u16 resp1; | |
873 | u16 resp2; | |
385a79df | 874 | } __packed; |
00b3ed16 | 875 | |
a988c9f3 | 876 | struct hfa384x_usb_rridresp { |
e573aaa4 MM |
877 | u16 type; |
878 | u16 frmlen; | |
879 | u16 rid; | |
880 | u8 data[HFA384x_RIDDATA_MAXLEN]; | |
a988c9f3 | 881 | } __packed; |
00b3ed16 | 882 | |
1ed54806 | 883 | struct hfa384x_usb_rmemresp { |
e573aaa4 MM |
884 | u16 type; |
885 | u16 frmlen; | |
886 | u8 data[HFA384x_USB_RWMEM_MAXLEN]; | |
1ed54806 | 887 | } __packed; |
00b3ed16 | 888 | |
c4d8a0a8 | 889 | struct hfa384x_usb_bufavail { |
e573aaa4 MM |
890 | u16 type; |
891 | u16 frmlen; | |
c4d8a0a8 | 892 | } __packed; |
00b3ed16 | 893 | |
d4734c30 | 894 | struct hfa384x_usb_error { |
e573aaa4 MM |
895 | u16 type; |
896 | u16 errortype; | |
d4734c30 | 897 | } __packed; |
00b3ed16 GKH |
898 | |
899 | /*----------------------------------------------------------*/ | |
900 | /* Unions for packaging all the known packet types together */ | |
901 | ||
4012684a | 902 | union hfa384x_usbout { |
a78d1312 | 903 | __le16 type; |
2f1014f7 | 904 | struct hfa384x_usb_txfrm txfrm; |
a6dcbdfe | 905 | struct hfa384x_usb_cmdreq cmdreq; |
3bc070f6 | 906 | struct hfa384x_usb_wridreq wridreq; |
5b9f240e | 907 | struct hfa384x_usb_rridreq rridreq; |
f0e15d40 | 908 | struct hfa384x_usb_wmemreq wmemreq; |
94ec5464 | 909 | struct hfa384x_usb_rmemreq rmemreq; |
4012684a | 910 | } __packed; |
00b3ed16 | 911 | |
3e4180c3 | 912 | union hfa384x_usbin { |
a78d1312 | 913 | __le16 type; |
684b2e08 | 914 | struct hfa384x_usb_rxfrm rxfrm; |
2f1014f7 | 915 | struct hfa384x_usb_txfrm txfrm; |
e20a7ca1 | 916 | struct hfa384x_usb_infofrm infofrm; |
385a79df | 917 | struct hfa384x_usb_statusresp cmdresp; |
2c8079de | 918 | struct hfa384x_usb_statusresp wridresp; |
a988c9f3 | 919 | struct hfa384x_usb_rridresp rridresp; |
499c1cc9 | 920 | struct hfa384x_usb_statusresp wmemresp; |
1ed54806 | 921 | struct hfa384x_usb_rmemresp rmemresp; |
c4d8a0a8 | 922 | struct hfa384x_usb_bufavail bufavail; |
d4734c30 | 923 | struct hfa384x_usb_error usberror; |
e573aaa4 | 924 | u8 boguspad[3000]; |
3e4180c3 | 925 | } __packed; |
00b3ed16 | 926 | |
76e3e7c4 | 927 | /*-------------------------------------------------------------------- |
3e27dfa2 SP |
928 | * PD record structures. |
929 | *-------------------------------------------------------------------- | |
930 | */ | |
76e3e7c4 | 931 | |
e0696aa8 | 932 | struct hfa384x_pdr_pcb_partnum { |
75f49e07 | 933 | u8 num[8]; |
e0696aa8 | 934 | } __packed; |
76e3e7c4 | 935 | |
caeabb80 | 936 | struct hfa384x_pdr_pcb_tracenum { |
75f49e07 | 937 | u8 num[8]; |
caeabb80 | 938 | } __packed; |
76e3e7c4 | 939 | |
66e7bdb6 | 940 | struct hfa384x_pdr_nic_serial { |
75f49e07 | 941 | u8 num[12]; |
66e7bdb6 | 942 | } __packed; |
76e3e7c4 | 943 | |
ee9f7626 | 944 | struct hfa384x_pdr_mkk_measurements { |
75f49e07 MT |
945 | double carrier_freq; |
946 | double occupied_band; | |
947 | double power_density; | |
948 | double tx_spur_f1; | |
949 | double tx_spur_f2; | |
950 | double tx_spur_f3; | |
951 | double tx_spur_f4; | |
952 | double tx_spur_l1; | |
953 | double tx_spur_l2; | |
954 | double tx_spur_l3; | |
955 | double tx_spur_l4; | |
956 | double rx_spur_f1; | |
957 | double rx_spur_f2; | |
958 | double rx_spur_l1; | |
959 | double rx_spur_l2; | |
ee9f7626 | 960 | } __packed; |
76e3e7c4 | 961 | |
02eebae4 | 962 | struct hfa384x_pdr_nic_ramsize { |
75f49e07 | 963 | u8 size[12]; /* units of KB */ |
02eebae4 | 964 | } __packed; |
76e3e7c4 | 965 | |
9127692f | 966 | struct hfa384x_pdr_mfisuprange { |
75f49e07 MT |
967 | u16 id; |
968 | u16 variant; | |
969 | u16 bottom; | |
970 | u16 top; | |
9127692f | 971 | } __packed; |
76e3e7c4 | 972 | |
4ae2996f | 973 | struct hfa384x_pdr_cfisuprange { |
75f49e07 MT |
974 | u16 id; |
975 | u16 variant; | |
976 | u16 bottom; | |
977 | u16 top; | |
4ae2996f | 978 | } __packed; |
76e3e7c4 | 979 | |
e9ee92c7 | 980 | struct hfa384x_pdr_nicid { |
75f49e07 MT |
981 | u16 id; |
982 | u16 variant; | |
983 | u16 major; | |
984 | u16 minor; | |
e9ee92c7 | 985 | } __packed; |
76e3e7c4 | 986 | |
1c0c8eba | 987 | struct hfa384x_pdr_refdac_measurements { |
75f49e07 | 988 | u16 value[0]; |
1c0c8eba | 989 | } __packed; |
76e3e7c4 | 990 | |
de95929c | 991 | struct hfa384x_pdr_vgdac_measurements { |
75f49e07 | 992 | u16 value[0]; |
de95929c | 993 | } __packed; |
76e3e7c4 | 994 | |
dac1445d | 995 | struct hfa384x_pdr_level_comp_measurements { |
75f49e07 | 996 | u16 value[0]; |
dac1445d | 997 | } __packed; |
76e3e7c4 | 998 | |
75f49e07 MT |
999 | typedef struct hfa384x_pdr_mac_address { |
1000 | u8 addr[6]; | |
7d3864d1 | 1001 | } __packed hfa384x_pdr_mac_address_t; |
76e3e7c4 | 1002 | |
75f49e07 MT |
1003 | typedef struct hfa384x_pdr_mkk_callname { |
1004 | u8 callname[8]; | |
7d3864d1 | 1005 | } __packed hfa384x_pdr_mkk_callname_t; |
76e3e7c4 | 1006 | |
75f49e07 MT |
1007 | typedef struct hfa384x_pdr_regdomain { |
1008 | u16 numdomains; | |
1009 | u16 domain[5]; | |
7d3864d1 | 1010 | } __packed hfa384x_pdr_regdomain_t; |
76e3e7c4 | 1011 | |
75f49e07 MT |
1012 | typedef struct hfa384x_pdr_allowed_channel { |
1013 | u16 ch_bitmap; | |
7d3864d1 | 1014 | } __packed hfa384x_pdr_allowed_channel_t; |
76e3e7c4 | 1015 | |
75f49e07 MT |
1016 | typedef struct hfa384x_pdr_default_channel { |
1017 | u16 channel; | |
7d3864d1 | 1018 | } __packed hfa384x_pdr_default_channel_t; |
76e3e7c4 | 1019 | |
75f49e07 MT |
1020 | typedef struct hfa384x_pdr_privacy_option { |
1021 | u16 available; | |
7d3864d1 | 1022 | } __packed hfa384x_pdr_privacy_option_t; |
76e3e7c4 | 1023 | |
75f49e07 MT |
1024 | typedef struct hfa384x_pdr_temptype { |
1025 | u16 type; | |
7d3864d1 | 1026 | } __packed hfa384x_pdr_temptype_t; |
76e3e7c4 | 1027 | |
75f49e07 MT |
1028 | typedef struct hfa384x_pdr_refdac_setup { |
1029 | u16 ch_value[14]; | |
7d3864d1 | 1030 | } __packed hfa384x_pdr_refdac_setup_t; |
76e3e7c4 | 1031 | |
75f49e07 MT |
1032 | typedef struct hfa384x_pdr_vgdac_setup { |
1033 | u16 ch_value[14]; | |
7d3864d1 | 1034 | } __packed hfa384x_pdr_vgdac_setup_t; |
76e3e7c4 | 1035 | |
75f49e07 MT |
1036 | typedef struct hfa384x_pdr_level_comp_setup { |
1037 | u16 ch_value[14]; | |
7d3864d1 | 1038 | } __packed hfa384x_pdr_level_comp_setup_t; |
76e3e7c4 | 1039 | |
75f49e07 MT |
1040 | typedef struct hfa384x_pdr_trimdac_setup { |
1041 | u16 trimidac; | |
1042 | u16 trimqdac; | |
7d3864d1 | 1043 | } __packed hfa384x_pdr_trimdac_setup_t; |
76e3e7c4 | 1044 | |
75f49e07 MT |
1045 | typedef struct hfa384x_pdr_ifr_setting { |
1046 | u16 value[3]; | |
7d3864d1 | 1047 | } __packed hfa384x_pdr_ifr_setting_t; |
76e3e7c4 | 1048 | |
75f49e07 MT |
1049 | typedef struct hfa384x_pdr_rfr_setting { |
1050 | u16 value[3]; | |
7d3864d1 | 1051 | } __packed hfa384x_pdr_rfr_setting_t; |
76e3e7c4 | 1052 | |
75f49e07 MT |
1053 | typedef struct hfa384x_pdr_hfa3861_baseline { |
1054 | u16 value[50]; | |
7d3864d1 | 1055 | } __packed hfa384x_pdr_hfa3861_baseline_t; |
76e3e7c4 | 1056 | |
75f49e07 MT |
1057 | typedef struct hfa384x_pdr_hfa3861_shadow { |
1058 | u32 value[32]; | |
7d3864d1 | 1059 | } __packed hfa384x_pdr_hfa3861_shadow_t; |
76e3e7c4 | 1060 | |
75f49e07 MT |
1061 | typedef struct hfa384x_pdr_hfa3861_ifrf { |
1062 | u32 value[20]; | |
7d3864d1 | 1063 | } __packed hfa384x_pdr_hfa3861_ifrf_t; |
76e3e7c4 | 1064 | |
75f49e07 MT |
1065 | typedef struct hfa384x_pdr_hfa3861_chcalsp { |
1066 | u16 value[14]; | |
7d3864d1 | 1067 | } __packed hfa384x_pdr_hfa3861_chcalsp_t; |
76e3e7c4 | 1068 | |
75f49e07 MT |
1069 | typedef struct hfa384x_pdr_hfa3861_chcali { |
1070 | u16 value[17]; | |
7d3864d1 | 1071 | } __packed hfa384x_pdr_hfa3861_chcali_t; |
76e3e7c4 | 1072 | |
75f49e07 MT |
1073 | typedef struct hfa384x_pdr_hfa3861_nic_config { |
1074 | u16 config_bitmap; | |
7d3864d1 | 1075 | } __packed hfa384x_pdr_nic_config_t; |
76e3e7c4 | 1076 | |
75f49e07 MT |
1077 | typedef struct hfa384x_pdr_hfo_delay { |
1078 | u8 hfo_delay; | |
7d3864d1 | 1079 | } __packed hfa384x_hfo_delay_t; |
76e3e7c4 | 1080 | |
75f49e07 MT |
1081 | typedef struct hfa384x_pdr_hfa3861_manf_testsp { |
1082 | u16 value[30]; | |
7d3864d1 | 1083 | } __packed hfa384x_pdr_hfa3861_manf_testsp_t; |
76e3e7c4 | 1084 | |
75f49e07 MT |
1085 | typedef struct hfa384x_pdr_hfa3861_manf_testi { |
1086 | u16 value[30]; | |
7d3864d1 | 1087 | } __packed hfa384x_pdr_hfa3861_manf_testi_t; |
76e3e7c4 | 1088 | |
75f49e07 MT |
1089 | typedef struct hfa384x_end_of_pda { |
1090 | u16 crc; | |
7d3864d1 | 1091 | } __packed hfa384x_pdr_end_of_pda_t; |
76e3e7c4 | 1092 | |
75f49e07 MT |
1093 | typedef struct hfa384x_pdrec { |
1094 | u16 len; /* in words */ | |
1095 | u16 code; | |
76e3e7c4 | 1096 | union pdr { |
e0696aa8 | 1097 | struct hfa384x_pdr_pcb_partnum pcb_partnum; |
caeabb80 | 1098 | struct hfa384x_pdr_pcb_tracenum pcb_tracenum; |
66e7bdb6 | 1099 | struct hfa384x_pdr_nic_serial nic_serial; |
ee9f7626 | 1100 | struct hfa384x_pdr_mkk_measurements mkk_measurements; |
02eebae4 | 1101 | struct hfa384x_pdr_nic_ramsize nic_ramsize; |
9127692f | 1102 | struct hfa384x_pdr_mfisuprange mfisuprange; |
4ae2996f | 1103 | struct hfa384x_pdr_cfisuprange cfisuprange; |
e9ee92c7 | 1104 | struct hfa384x_pdr_nicid nicid; |
1c0c8eba | 1105 | struct hfa384x_pdr_refdac_measurements refdac_measurements; |
de95929c | 1106 | struct hfa384x_pdr_vgdac_measurements vgdac_measurements; |
dac1445d | 1107 | struct hfa384x_pdr_level_comp_measurements level_compc_measurements; |
75f49e07 MT |
1108 | hfa384x_pdr_mac_address_t mac_address; |
1109 | hfa384x_pdr_mkk_callname_t mkk_callname; | |
1110 | hfa384x_pdr_regdomain_t regdomain; | |
1111 | hfa384x_pdr_allowed_channel_t allowed_channel; | |
1112 | hfa384x_pdr_default_channel_t default_channel; | |
1113 | hfa384x_pdr_privacy_option_t privacy_option; | |
1114 | hfa384x_pdr_temptype_t temptype; | |
1115 | hfa384x_pdr_refdac_setup_t refdac_setup; | |
1116 | hfa384x_pdr_vgdac_setup_t vgdac_setup; | |
1117 | hfa384x_pdr_level_comp_setup_t level_comp_setup; | |
1118 | hfa384x_pdr_trimdac_setup_t trimdac_setup; | |
1119 | hfa384x_pdr_ifr_setting_t ifr_setting; | |
1120 | hfa384x_pdr_rfr_setting_t rfr_setting; | |
1121 | hfa384x_pdr_hfa3861_baseline_t hfa3861_baseline; | |
1122 | hfa384x_pdr_hfa3861_shadow_t hfa3861_shadow; | |
1123 | hfa384x_pdr_hfa3861_ifrf_t hfa3861_ifrf; | |
1124 | hfa384x_pdr_hfa3861_chcalsp_t hfa3861_chcalsp; | |
1125 | hfa384x_pdr_hfa3861_chcali_t hfa3861_chcali; | |
1126 | hfa384x_pdr_nic_config_t nic_config; | |
1127 | hfa384x_hfo_delay_t hfo_delay; | |
1128 | hfa384x_pdr_hfa3861_manf_testsp_t hfa3861_manf_testsp; | |
1129 | hfa384x_pdr_hfa3861_manf_testi_t hfa3861_manf_testi; | |
1130 | hfa384x_pdr_end_of_pda_t end_of_pda; | |
76e3e7c4 KR |
1131 | |
1132 | } data; | |
7d3864d1 | 1133 | } __packed hfa384x_pdrec_t; |
76e3e7c4 | 1134 | |
00b3ed16 GKH |
1135 | #ifdef __KERNEL__ |
1136 | /*-------------------------------------------------------------------- | |
3e27dfa2 SP |
1137 | * --- MAC state structure, argument to all functions -- |
1138 | * --- Also, a collection of support types -- | |
1139 | *-------------------------------------------------------------------- | |
1140 | */ | |
e573aaa4 MM |
1141 | typedef struct hfa384x_statusresult { |
1142 | u16 status; | |
1143 | u16 resp0; | |
1144 | u16 resp1; | |
1145 | u16 resp2; | |
00b3ed16 GKH |
1146 | } hfa384x_cmdresult_t; |
1147 | ||
00b3ed16 GKH |
1148 | /* USB Control Exchange (CTLX): |
1149 | * A queue of the structure below is maintained for all of the | |
1150 | * Request/Response type USB packets supported by Prism2. | |
1151 | */ | |
1152 | /* The following hfa384x_* structures are arguments to | |
1153 | * the usercb() for the different CTLX types. | |
1154 | */ | |
e573aaa4 MM |
1155 | typedef struct hfa384x_rridresult { |
1156 | u16 rid; | |
1157 | const void *riddata; | |
1158 | unsigned int riddata_len; | |
00b3ed16 GKH |
1159 | } hfa384x_rridresult_t; |
1160 | ||
1161 | enum ctlx_state { | |
e573aaa4 | 1162 | CTLX_START = 0, /* Start state, not queued */ |
00b3ed16 | 1163 | |
e573aaa4 | 1164 | CTLX_COMPLETE, /* CTLX successfully completed */ |
00b3ed16 GKH |
1165 | CTLX_REQ_FAILED, /* OUT URB completed w/ error */ |
1166 | ||
1167 | CTLX_PENDING, /* Queued, data valid */ | |
1168 | CTLX_REQ_SUBMITTED, /* OUT URB submitted */ | |
1169 | CTLX_REQ_COMPLETE, /* OUT URB complete */ | |
1170 | CTLX_RESP_COMPLETE /* IN URB received */ | |
1171 | }; | |
e573aaa4 | 1172 | typedef enum ctlx_state CTLX_STATE; |
00b3ed16 GKH |
1173 | |
1174 | struct hfa384x_usbctlx; | |
1175 | struct hfa384x; | |
1176 | ||
e573aaa4 | 1177 | typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *); |
00b3ed16 | 1178 | |
5dd8acc8 | 1179 | typedef void (*ctlx_usercb_t) (struct hfa384x *hw, |
e573aaa4 | 1180 | void *ctlxresult, void *usercb_data); |
00b3ed16 | 1181 | |
e573aaa4 MM |
1182 | typedef struct hfa384x_usbctlx { |
1183 | struct list_head list; | |
00b3ed16 | 1184 | |
e573aaa4 | 1185 | size_t outbufsize; |
4012684a | 1186 | union hfa384x_usbout outbuf; /* pkt buf for OUT */ |
3e4180c3 | 1187 | union hfa384x_usbin inbuf; /* pkt buf for IN(a copy) */ |
00b3ed16 | 1188 | |
e573aaa4 | 1189 | CTLX_STATE state; /* Tracks running state */ |
00b3ed16 | 1190 | |
e573aaa4 MM |
1191 | struct completion done; |
1192 | volatile int reapable; /* Food for the reaper task */ | |
00b3ed16 | 1193 | |
e573aaa4 MM |
1194 | ctlx_cmdcb_t cmdcb; /* Async command callback */ |
1195 | ctlx_usercb_t usercb; /* Async user callback, */ | |
1196 | void *usercb_data; /* at CTLX completion */ | |
00b3ed16 | 1197 | |
e573aaa4 | 1198 | int variant; /* Identifies cmd variant */ |
00b3ed16 GKH |
1199 | } hfa384x_usbctlx_t; |
1200 | ||
e573aaa4 MM |
1201 | typedef struct hfa384x_usbctlxq { |
1202 | spinlock_t lock; | |
1203 | struct list_head pending; | |
1204 | struct list_head active; | |
1205 | struct list_head completing; | |
1206 | struct list_head reapable; | |
00b3ed16 | 1207 | } hfa384x_usbctlxq_t; |
00b3ed16 | 1208 | |
e573aaa4 MM |
1209 | typedef struct hfa484x_metacmd { |
1210 | u16 cmd; | |
00b3ed16 | 1211 | |
e573aaa4 MM |
1212 | u16 parm0; |
1213 | u16 parm1; | |
1214 | u16 parm2; | |
00b3ed16 | 1215 | |
00b3ed16 GKH |
1216 | hfa384x_cmdresult_t result; |
1217 | } hfa384x_metacmd_t; | |
1218 | ||
00b3ed16 | 1219 | #define MAX_GRP_ADDR 32 |
71508ee4 | 1220 | #define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */ |
00b3ed16 | 1221 | |
71508ee4 AG |
1222 | #define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */ |
1223 | #define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */ | |
1224 | #define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */ | |
1225 | #define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */ | |
1226 | #define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */ | |
1227 | #define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */ | |
00b3ed16 GKH |
1228 | |
1229 | /* XXX These are going away ASAP */ | |
c84b528c | 1230 | struct prism2sta_authlist { |
e573aaa4 MM |
1231 | unsigned int cnt; |
1232 | u8 addr[WLAN_AUTH_MAX][ETH_ALEN]; | |
1233 | u8 assoc[WLAN_AUTH_MAX]; | |
c84b528c | 1234 | }; |
00b3ed16 | 1235 | |
4d10ece3 | 1236 | struct prism2sta_accesslist { |
e573aaa4 MM |
1237 | unsigned int modify; |
1238 | unsigned int cnt; | |
1239 | u8 addr[WLAN_ACCESS_MAX][ETH_ALEN]; | |
1240 | unsigned int cnt1; | |
1241 | u8 addr1[WLAN_ACCESS_MAX][ETH_ALEN]; | |
4d10ece3 | 1242 | }; |
00b3ed16 | 1243 | |
e573aaa4 | 1244 | typedef struct hfa384x { |
00b3ed16 | 1245 | /* USB support data */ |
e573aaa4 MM |
1246 | struct usb_device *usb; |
1247 | struct urb rx_urb; | |
1248 | struct sk_buff *rx_urb_skb; | |
1249 | struct urb tx_urb; | |
1250 | struct urb ctlx_urb; | |
4012684a | 1251 | union hfa384x_usbout txbuff; |
e573aaa4 MM |
1252 | hfa384x_usbctlxq_t ctlxq; |
1253 | struct timer_list reqtimer; | |
1254 | struct timer_list resptimer; | |
00b3ed16 | 1255 | |
e573aaa4 | 1256 | struct timer_list throttle; |
00b3ed16 | 1257 | |
e573aaa4 MM |
1258 | struct tasklet_struct reaper_bh; |
1259 | struct tasklet_struct completion_bh; | |
00b3ed16 | 1260 | |
e573aaa4 | 1261 | struct work_struct usb_work; |
00b3ed16 | 1262 | |
e573aaa4 | 1263 | unsigned long usb_flags; |
00b3ed16 GKH |
1264 | #define THROTTLE_RX 0 |
1265 | #define THROTTLE_TX 1 | |
1266 | #define WORK_RX_HALT 2 | |
1267 | #define WORK_TX_HALT 3 | |
1268 | #define WORK_RX_RESUME 4 | |
1269 | #define WORK_TX_RESUME 5 | |
1270 | ||
e573aaa4 MM |
1271 | unsigned short req_timer_done:1; |
1272 | unsigned short resp_timer_done:1; | |
00b3ed16 | 1273 | |
e573aaa4 MM |
1274 | int endp_in; |
1275 | int endp_out; | |
00b3ed16 | 1276 | |
e573aaa4 MM |
1277 | int sniff_fcs; |
1278 | int sniff_channel; | |
1279 | int sniff_truncate; | |
1280 | int sniffhdr; | |
00b3ed16 | 1281 | |
e573aaa4 | 1282 | wait_queue_head_t cmdq; /* wait queue itself */ |
00b3ed16 GKH |
1283 | |
1284 | /* Controller state */ | |
e573aaa4 MM |
1285 | u32 state; |
1286 | u32 isap; | |
1287 | u8 port_enabled[HFA384x_NUMPORTS_MAX]; | |
00b3ed16 GKH |
1288 | |
1289 | /* Download support */ | |
e573aaa4 | 1290 | unsigned int dlstate; |
b71db740 | 1291 | struct hfa384x_downloadbuffer bufinfo; |
e573aaa4 | 1292 | u16 dltimeout; |
00b3ed16 | 1293 | |
1a6dfce7 | 1294 | int scanflag; /* to signal scan complete */ |
e573aaa4 MM |
1295 | int join_ap; /* are we joined to a specific ap */ |
1296 | int join_retries; /* number of join retries till we fail */ | |
f0ffa0e2 | 1297 | struct hfa384x_JoinRequest_data joinreq; /* join request saved data */ |
00b3ed16 | 1298 | |
c9573a8d | 1299 | struct wlandevice *wlandev; |
00b3ed16 | 1300 | /* Timer to allow for the deferred processing of linkstatus messages */ |
e573aaa4 | 1301 | struct work_struct link_bh; |
00b3ed16 | 1302 | |
e573aaa4 | 1303 | struct work_struct commsqual_bh; |
a1e95045 | 1304 | struct hfa384x_commsquality qual; |
e573aaa4 | 1305 | struct timer_list commsqual_timer; |
00b3ed16 | 1306 | |
aaad4303 SP |
1307 | u16 link_status; |
1308 | u16 link_status_new; | |
e573aaa4 | 1309 | struct sk_buff_head authq; |
00b3ed16 | 1310 | |
cb3126e6 KR |
1311 | u32 txrate; |
1312 | ||
00b3ed16 GKH |
1313 | /* And here we have stuff that used to be in priv */ |
1314 | ||
1315 | /* State variables */ | |
e573aaa4 MM |
1316 | unsigned int presniff_port_type; |
1317 | u16 presniff_wepflags; | |
1318 | u32 dot11_desired_bss_type; | |
00b3ed16 | 1319 | |
e573aaa4 | 1320 | int dbmadjust; |
00b3ed16 GKH |
1321 | |
1322 | /* Group Addresses - right now, there are up to a total | |
5f0730fd JR |
1323 | * of MAX_GRP_ADDR group addresses |
1324 | */ | |
e573aaa4 MM |
1325 | u8 dot11_grp_addr[MAX_GRP_ADDR][ETH_ALEN]; |
1326 | unsigned int dot11_grpcnt; | |
00b3ed16 GKH |
1327 | |
1328 | /* Component Identities */ | |
5f046456 SP |
1329 | struct hfa384x_compident ident_nic; |
1330 | struct hfa384x_compident ident_pri_fw; | |
1331 | struct hfa384x_compident ident_sta_fw; | |
1332 | struct hfa384x_compident ident_ap_fw; | |
e573aaa4 | 1333 | u16 mm_mods; |
00b3ed16 GKH |
1334 | |
1335 | /* Supplier compatibility ranges */ | |
65f170c6 SP |
1336 | struct hfa384x_caplevel cap_sup_mfi; |
1337 | struct hfa384x_caplevel cap_sup_cfi; | |
1338 | struct hfa384x_caplevel cap_sup_pri; | |
1339 | struct hfa384x_caplevel cap_sup_sta; | |
1340 | struct hfa384x_caplevel cap_sup_ap; | |
00b3ed16 GKH |
1341 | |
1342 | /* Actor compatibility ranges */ | |
65f170c6 | 1343 | struct hfa384x_caplevel cap_act_pri_cfi; /* |
71508ee4 AG |
1344 | * pri f/w to controller |
1345 | * interface | |
1346 | */ | |
1347 | ||
65f170c6 | 1348 | struct hfa384x_caplevel cap_act_sta_cfi; /* |
71508ee4 AG |
1349 | * sta f/w to controller |
1350 | * interface | |
1351 | */ | |
1352 | ||
65f170c6 | 1353 | struct hfa384x_caplevel cap_act_sta_mfi; /* sta f/w to modem interface */ |
71508ee4 | 1354 | |
65f170c6 | 1355 | struct hfa384x_caplevel cap_act_ap_cfi; /* |
71508ee4 AG |
1356 | * ap f/w to controller |
1357 | * interface | |
1358 | */ | |
1359 | ||
65f170c6 | 1360 | struct hfa384x_caplevel cap_act_ap_mfi; /* ap f/w to modem interface */ |
00b3ed16 | 1361 | |
e573aaa4 | 1362 | u32 psusercount; /* Power save user count. */ |
cfc6cb1f | 1363 | struct hfa384x_CommTallies32 tallies; /* Communication tallies. */ |
e573aaa4 | 1364 | u8 comment[WLAN_COMMENT_MAX + 1]; /* User comment */ |
00b3ed16 GKH |
1365 | |
1366 | /* Channel Info request results (AP only) */ | |
1367 | struct { | |
e573aaa4 MM |
1368 | atomic_t done; |
1369 | u8 count; | |
0fddae8e | 1370 | struct hfa384x_ChInfoResult results; |
00b3ed16 GKH |
1371 | } channel_info; |
1372 | ||
f69de9e3 | 1373 | struct hfa384x_InfFrame *scanresults; |
00b3ed16 | 1374 | |
c84b528c | 1375 | struct prism2sta_authlist authlist; /* Authenticated station list. */ |
4d10ece3 VH |
1376 | unsigned int accessmode; /* Access mode. */ |
1377 | struct prism2sta_accesslist allow; /* Allowed station list. */ | |
1378 | struct prism2sta_accesslist deny; /* Denied station list. */ | |
00b3ed16 GKH |
1379 | |
1380 | } hfa384x_t; | |
1381 | ||
5dd8acc8 SK |
1382 | void hfa384x_create(hfa384x_t *hw, struct usb_device *usb); |
1383 | void hfa384x_destroy(hfa384x_t *hw); | |
00b3ed16 | 1384 | |
00b3ed16 | 1385 | int |
5dd8acc8 | 1386 | hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis); |
5dd8acc8 SK |
1387 | int hfa384x_drvr_disable(hfa384x_t *hw, u16 macport); |
1388 | int hfa384x_drvr_enable(hfa384x_t *hw, u16 macport); | |
1389 | int hfa384x_drvr_flashdl_enable(hfa384x_t *hw); | |
1390 | int hfa384x_drvr_flashdl_disable(hfa384x_t *hw); | |
1391 | int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len); | |
1392 | int hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); | |
1393 | int hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr); | |
1394 | int hfa384x_drvr_ramdl_disable(hfa384x_t *hw); | |
1395 | int hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len); | |
1396 | int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len); | |
1397 | int hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len); | |
1398 | ||
1399 | static inline int hfa384x_drvr_getconfig16(hfa384x_t *hw, u16 rid, void *val) | |
00b3ed16 | 1400 | { |
e573aaa4 | 1401 | int result = 0; |
7489df36 | 1402 | |
aaad4303 | 1403 | result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16)); |
e573aaa4 | 1404 | if (result == 0) |
0e21fa46 | 1405 | *((u16 *)val) = le16_to_cpu(*((u16 *)val)); |
00b3ed16 GKH |
1406 | return result; |
1407 | } | |
1408 | ||
5dd8acc8 | 1409 | static inline int hfa384x_drvr_setconfig16(hfa384x_t *hw, u16 rid, u16 val) |
00b3ed16 | 1410 | { |
18c7f792 | 1411 | u16 value = cpu_to_le16(val); |
7489df36 | 1412 | |
00b3ed16 GKH |
1413 | return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); |
1414 | } | |
1415 | ||
00b3ed16 | 1416 | int |
5dd8acc8 | 1417 | hfa384x_drvr_setconfig_async(hfa384x_t *hw, |
e573aaa4 MM |
1418 | u16 rid, |
1419 | void *buf, | |
1420 | u16 len, ctlx_usercb_t usercb, void *usercb_data); | |
00b3ed16 GKH |
1421 | |
1422 | static inline int | |
5dd8acc8 | 1423 | hfa384x_drvr_setconfig16_async(hfa384x_t *hw, u16 rid, u16 val) |
00b3ed16 | 1424 | { |
18c7f792 | 1425 | u16 value = cpu_to_le16(val); |
7489df36 | 1426 | |
00b3ed16 | 1427 | return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), |
e573aaa4 | 1428 | NULL, NULL); |
00b3ed16 GKH |
1429 | } |
1430 | ||
5dd8acc8 SK |
1431 | int hfa384x_drvr_start(hfa384x_t *hw); |
1432 | int hfa384x_drvr_stop(hfa384x_t *hw); | |
00b3ed16 | 1433 | int |
5dd8acc8 | 1434 | hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb, |
f6b43c2e SD |
1435 | union p80211_hdr *p80211_hdr, |
1436 | struct p80211_metawep *p80211_wep); | |
c9573a8d | 1437 | void hfa384x_tx_timeout(struct wlandevice *wlandev); |
5dd8acc8 SK |
1438 | |
1439 | int hfa384x_cmd_initialize(hfa384x_t *hw); | |
1440 | int hfa384x_cmd_enable(hfa384x_t *hw, u16 macport); | |
1441 | int hfa384x_cmd_disable(hfa384x_t *hw, u16 macport); | |
1442 | int hfa384x_cmd_allocate(hfa384x_t *hw, u16 len); | |
1443 | int hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable); | |
00b3ed16 | 1444 | int |
5dd8acc8 | 1445 | hfa384x_cmd_download(hfa384x_t *hw, |
e573aaa4 | 1446 | u16 mode, u16 lowaddr, u16 highaddr, u16 codelen); |
00b3ed16 | 1447 | |
71508ee4 | 1448 | #endif /*__KERNEL__ */ |
00b3ed16 | 1449 | |
71508ee4 | 1450 | #endif /*_HFA384x_H */ |