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00b3ed16 | 1 | /* src/prism2/driver/hfa384x_usb.c |
d3fcb8a2 SP |
2 | * |
3 | * Functions that talk to the USB variantof the Intersil hfa384x MAC | |
4 | * | |
5 | * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved. | |
6 | * -------------------------------------------------------------------- | |
7 | * | |
8 | * linux-wlan | |
9 | * | |
10 | * The contents of this file are subject to the Mozilla Public | |
11 | * License Version 1.1 (the "License"); you may not use this file | |
12 | * except in compliance with the License. You may obtain a copy of | |
13 | * the License at http://www.mozilla.org/MPL/ | |
14 | * | |
15 | * Software distributed under the License is distributed on an "AS | |
16 | * IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or | |
17 | * implied. See the License for the specific language governing | |
18 | * rights and limitations under the License. | |
19 | * | |
20 | * Alternatively, the contents of this file may be used under the | |
21 | * terms of the GNU Public License version 2 (the "GPL"), in which | |
22 | * case the provisions of the GPL are applicable instead of the | |
23 | * above. If you wish to allow the use of your version of this file | |
24 | * only under the terms of the GPL and not to allow others to use | |
25 | * your version of this file under the MPL, indicate your decision | |
26 | * by deleting the provisions above and replace them with the notice | |
27 | * and other provisions required by the GPL. If you do not delete | |
28 | * the provisions above, a recipient may use your version of this | |
29 | * file under either the MPL or the GPL. | |
30 | * | |
31 | * -------------------------------------------------------------------- | |
32 | * | |
33 | * Inquiries regarding the linux-wlan Open Source project can be | |
34 | * made directly to: | |
35 | * | |
36 | * AbsoluteValue Systems Inc. | |
37 | * info@linux-wlan.com | |
38 | * http://www.linux-wlan.com | |
39 | * | |
40 | * -------------------------------------------------------------------- | |
41 | * | |
42 | * Portions of the development of this software were funded by | |
43 | * Intersil Corporation as part of PRISM(R) chipset product development. | |
44 | * | |
45 | * -------------------------------------------------------------------- | |
46 | * | |
47 | * This file implements functions that correspond to the prism2/hfa384x | |
48 | * 802.11 MAC hardware and firmware host interface. | |
49 | * | |
50 | * The functions can be considered to represent several levels of | |
51 | * abstraction. The lowest level functions are simply C-callable wrappers | |
52 | * around the register accesses. The next higher level represents C-callable | |
53 | * prism2 API functions that match the Intersil documentation as closely | |
54 | * as is reasonable. The next higher layer implements common sequences | |
55 | * of invocations of the API layer (e.g. write to bap, followed by cmd). | |
56 | * | |
57 | * Common sequences: | |
58 | * hfa384x_drvr_xxx Highest level abstractions provided by the | |
59 | * hfa384x code. They are driver defined wrappers | |
60 | * for common sequences. These functions generally | |
61 | * use the services of the lower levels. | |
62 | * | |
63 | * hfa384x_drvr_xxxconfig An example of the drvr level abstraction. These | |
64 | * functions are wrappers for the RID get/set | |
65 | * sequence. They call copy_[to|from]_bap() and | |
66 | * cmd_access(). These functions operate on the | |
67 | * RIDs and buffers without validation. The caller | |
68 | * is responsible for that. | |
69 | * | |
70 | * API wrapper functions: | |
71 | * hfa384x_cmd_xxx functions that provide access to the f/w commands. | |
72 | * The function arguments correspond to each command | |
73 | * argument, even command arguments that get packed | |
74 | * into single registers. These functions _just_ | |
75 | * issue the command by setting the cmd/parm regs | |
76 | * & reading the status/resp regs. Additional | |
77 | * activities required to fully use a command | |
78 | * (read/write from/to bap, get/set int status etc.) | |
79 | * are implemented separately. Think of these as | |
80 | * C-callable prism2 commands. | |
81 | * | |
82 | * Lowest Layer Functions: | |
83 | * hfa384x_docmd_xxx These functions implement the sequence required | |
84 | * to issue any prism2 command. Primarily used by the | |
85 | * hfa384x_cmd_xxx functions. | |
86 | * | |
87 | * hfa384x_bap_xxx BAP read/write access functions. | |
88 | * Note: we usually use BAP0 for non-interrupt context | |
89 | * and BAP1 for interrupt context. | |
90 | * | |
91 | * hfa384x_dl_xxx download related functions. | |
92 | * | |
93 | * Driver State Issues: | |
94 | * Note that there are two pairs of functions that manage the | |
95 | * 'initialized' and 'running' states of the hw/MAC combo. The four | |
96 | * functions are create(), destroy(), start(), and stop(). create() | |
97 | * sets up the data structures required to support the hfa384x_* | |
98 | * functions and destroy() cleans them up. The start() function gets | |
99 | * the actual hardware running and enables the interrupts. The stop() | |
100 | * function shuts the hardware down. The sequence should be: | |
101 | * create() | |
102 | * start() | |
103 | * . | |
104 | * . Do interesting things w/ the hardware | |
105 | * . | |
106 | * stop() | |
107 | * destroy() | |
108 | * | |
109 | * Note that destroy() can be called without calling stop() first. | |
110 | * -------------------------------------------------------------------- | |
111 | */ | |
00b3ed16 | 112 | |
00b3ed16 GKH |
113 | #include <linux/module.h> |
114 | #include <linux/kernel.h> | |
115 | #include <linux/sched.h> | |
116 | #include <linux/types.h> | |
117 | #include <linux/slab.h> | |
118 | #include <linux/wireless.h> | |
119 | #include <linux/netdevice.h> | |
120 | #include <linux/timer.h> | |
ef1a0ed7 | 121 | #include <linux/io.h> |
00b3ed16 GKH |
122 | #include <linux/delay.h> |
123 | #include <asm/byteorder.h> | |
ef1a0ed7 | 124 | #include <linux/bitops.h> |
00b3ed16 GKH |
125 | #include <linux/list.h> |
126 | #include <linux/usb.h> | |
ae26230b | 127 | #include <linux/byteorder/generic.h> |
00b3ed16 | 128 | |
00b3ed16 GKH |
129 | #include "p80211types.h" |
130 | #include "p80211hdr.h" | |
131 | #include "p80211mgmt.h" | |
132 | #include "p80211conv.h" | |
133 | #include "p80211msg.h" | |
134 | #include "p80211netdev.h" | |
135 | #include "p80211req.h" | |
136 | #include "p80211metadef.h" | |
137 | #include "p80211metastruct.h" | |
138 | #include "hfa384x.h" | |
139 | #include "prism2mgmt.h" | |
140 | ||
21dc0f89 MM |
141 | enum cmd_mode { |
142 | DOWAIT = 0, | |
143 | DOASYNC | |
00b3ed16 | 144 | }; |
00b3ed16 | 145 | |
6c37e1f9 | 146 | #define THROTTLE_JIFFIES (HZ / 8) |
2d200d9f MM |
147 | #define URB_ASYNC_UNLINK 0 |
148 | #define USB_QUEUE_BULK 0 | |
00b3ed16 | 149 | |
6c37e1f9 | 150 | #define ROUNDUP64(a) (((a) + 63) & ~63) |
00b3ed16 | 151 | |
00b3ed16 | 152 | #ifdef DEBUG_USB |
21dc0f89 | 153 | static void dbprint_urb(struct urb *urb); |
00b3ed16 GKH |
154 | #endif |
155 | ||
5a919c78 SP |
156 | static void hfa384x_int_rxmonitor(struct wlandevice *wlandev, |
157 | struct hfa384x_usb_rxfrm *rxfrm); | |
00b3ed16 | 158 | |
21dc0f89 | 159 | static void hfa384x_usb_defer(struct work_struct *data); |
00b3ed16 | 160 | |
5a2214e2 | 161 | static int submit_rx_urb(struct hfa384x *hw, gfp_t flags); |
00b3ed16 | 162 | |
5a2214e2 | 163 | static int submit_tx_urb(struct hfa384x *hw, struct urb *tx_urb, gfp_t flags); |
00b3ed16 GKH |
164 | |
165 | /*---------------------------------------------------*/ | |
166 | /* Callbacks */ | |
21dc0f89 MM |
167 | static void hfa384x_usbout_callback(struct urb *urb); |
168 | static void hfa384x_ctlxout_callback(struct urb *urb); | |
169 | static void hfa384x_usbin_callback(struct urb *urb); | |
00b3ed16 GKH |
170 | |
171 | static void | |
3e4180c3 | 172 | hfa384x_usbin_txcompl(struct wlandevice *wlandev, union hfa384x_usbin *usbin); |
00b3ed16 | 173 | |
c9573a8d | 174 | static void hfa384x_usbin_rx(struct wlandevice *wlandev, struct sk_buff *skb); |
00b3ed16 | 175 | |
5a919c78 SP |
176 | static void hfa384x_usbin_info(struct wlandevice *wlandev, |
177 | union hfa384x_usbin *usbin); | |
00b3ed16 | 178 | |
5a2214e2 | 179 | static void hfa384x_usbin_ctlx(struct hfa384x *hw, union hfa384x_usbin *usbin, |
00b3ed16 GKH |
180 | int urb_status); |
181 | ||
182 | /*---------------------------------------------------*/ | |
183 | /* Functions to support the prism2 usb command queue */ | |
184 | ||
5a2214e2 | 185 | static void hfa384x_usbctlxq_run(struct hfa384x *hw); |
00b3ed16 | 186 | |
21dc0f89 | 187 | static void hfa384x_usbctlx_reqtimerfn(unsigned long data); |
00b3ed16 | 188 | |
21dc0f89 | 189 | static void hfa384x_usbctlx_resptimerfn(unsigned long data); |
00b3ed16 | 190 | |
21dc0f89 | 191 | static void hfa384x_usb_throttlefn(unsigned long data); |
00b3ed16 | 192 | |
21dc0f89 | 193 | static void hfa384x_usbctlx_completion_task(unsigned long data); |
00b3ed16 | 194 | |
21dc0f89 | 195 | static void hfa384x_usbctlx_reaper_task(unsigned long data); |
00b3ed16 | 196 | |
5a919c78 SP |
197 | static int hfa384x_usbctlx_submit(struct hfa384x *hw, |
198 | struct hfa384x_usbctlx *ctlx); | |
00b3ed16 | 199 | |
5a919c78 SP |
200 | static void unlocked_usbctlx_complete(struct hfa384x *hw, |
201 | struct hfa384x_usbctlx *ctlx); | |
00b3ed16 | 202 | |
21dc0f89 | 203 | struct usbctlx_completor { |
83f91687 | 204 | int (*complete)(struct usbctlx_completor *); |
00b3ed16 | 205 | }; |
00b3ed16 GKH |
206 | |
207 | static int | |
5a2214e2 | 208 | hfa384x_usbctlx_complete_sync(struct hfa384x *hw, |
a10d36b0 | 209 | struct hfa384x_usbctlx *ctlx, |
631c8dec | 210 | struct usbctlx_completor *completor); |
00b3ed16 GKH |
211 | |
212 | static int | |
5a2214e2 | 213 | unlocked_usbctlx_cancel_async(struct hfa384x *hw, struct hfa384x_usbctlx *ctlx); |
00b3ed16 | 214 | |
5a919c78 SP |
215 | static void hfa384x_cb_status(struct hfa384x *hw, |
216 | const struct hfa384x_usbctlx *ctlx); | |
00b3ed16 | 217 | |
00b3ed16 | 218 | static int |
385a79df | 219 | usbctlx_get_status(const struct hfa384x_usb_statusresp *cmdresp, |
501f5f96 | 220 | struct hfa384x_cmdresult *result); |
00b3ed16 GKH |
221 | |
222 | static void | |
a988c9f3 | 223 | usbctlx_get_rridresult(const struct hfa384x_usb_rridresp *rridresp, |
b3fd890e | 224 | struct hfa384x_rridresult *result); |
00b3ed16 GKH |
225 | |
226 | /*---------------------------------------------------*/ | |
227 | /* Low level req/resp CTLX formatters and submitters */ | |
228 | static int | |
5a2214e2 | 229 | hfa384x_docmd(struct hfa384x *hw, |
631c8dec | 230 | enum cmd_mode mode, |
e2f503c4 | 231 | struct hfa384x_metacmd *cmd, |
21dc0f89 | 232 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); |
00b3ed16 GKH |
233 | |
234 | static int | |
5a2214e2 | 235 | hfa384x_dorrid(struct hfa384x *hw, |
631c8dec | 236 | enum cmd_mode mode, |
21dc0f89 MM |
237 | u16 rid, |
238 | void *riddata, | |
239 | unsigned int riddatalen, | |
240 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); | |
00b3ed16 GKH |
241 | |
242 | static int | |
5a2214e2 | 243 | hfa384x_dowrid(struct hfa384x *hw, |
631c8dec | 244 | enum cmd_mode mode, |
21dc0f89 MM |
245 | u16 rid, |
246 | void *riddata, | |
247 | unsigned int riddatalen, | |
248 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); | |
00b3ed16 GKH |
249 | |
250 | static int | |
5a2214e2 | 251 | hfa384x_dormem(struct hfa384x *hw, |
631c8dec | 252 | enum cmd_mode mode, |
21dc0f89 MM |
253 | u16 page, |
254 | u16 offset, | |
255 | void *data, | |
256 | unsigned int len, | |
257 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); | |
00b3ed16 GKH |
258 | |
259 | static int | |
5a2214e2 | 260 | hfa384x_dowmem(struct hfa384x *hw, |
631c8dec | 261 | enum cmd_mode mode, |
21dc0f89 MM |
262 | u16 page, |
263 | u16 offset, | |
264 | void *data, | |
265 | unsigned int len, | |
266 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data); | |
00b3ed16 | 267 | |
21dc0f89 | 268 | static int hfa384x_isgood_pdrcode(u16 pdrcode); |
00b3ed16 | 269 | |
173bf7e3 | 270 | static inline const char *ctlxstr(enum ctlx_state s) |
00b3ed16 | 271 | { |
d6ae4a99 | 272 | static const char * const ctlx_str[] = { |
00b3ed16 GKH |
273 | "Initial state", |
274 | "Complete", | |
275 | "Request failed", | |
276 | "Request pending", | |
277 | "Request packet submitted", | |
278 | "Request packet completed", | |
279 | "Response packet completed" | |
280 | }; | |
281 | ||
282 | return ctlx_str[s]; | |
283 | }; | |
284 | ||
5a2214e2 | 285 | static inline struct hfa384x_usbctlx *get_active_ctlx(struct hfa384x *hw) |
00b3ed16 | 286 | { |
a10d36b0 | 287 | return list_entry(hw->ctlxq.active.next, struct hfa384x_usbctlx, list); |
00b3ed16 GKH |
288 | } |
289 | ||
00b3ed16 | 290 | #ifdef DEBUG_USB |
21dc0f89 | 291 | void dbprint_urb(struct urb *urb) |
00b3ed16 | 292 | { |
a7cf7bae MM |
293 | pr_debug("urb->pipe=0x%08x\n", urb->pipe); |
294 | pr_debug("urb->status=0x%08x\n", urb->status); | |
295 | pr_debug("urb->transfer_flags=0x%08x\n", urb->transfer_flags); | |
21dc0f89 | 296 | pr_debug("urb->transfer_buffer=0x%08x\n", |
75f49e07 | 297 | (unsigned int)urb->transfer_buffer); |
21dc0f89 | 298 | pr_debug("urb->transfer_buffer_length=0x%08x\n", |
75f49e07 | 299 | urb->transfer_buffer_length); |
a7cf7bae MM |
300 | pr_debug("urb->actual_length=0x%08x\n", urb->actual_length); |
301 | pr_debug("urb->bandwidth=0x%08x\n", urb->bandwidth); | |
21dc0f89 | 302 | pr_debug("urb->setup_packet(ctl)=0x%08x\n", |
75f49e07 MT |
303 | (unsigned int)urb->setup_packet); |
304 | pr_debug("urb->start_frame(iso/irq)=0x%08x\n", urb->start_frame); | |
a7cf7bae MM |
305 | pr_debug("urb->interval(irq)=0x%08x\n", urb->interval); |
306 | pr_debug("urb->error_count(iso)=0x%08x\n", urb->error_count); | |
307 | pr_debug("urb->timeout=0x%08x\n", urb->timeout); | |
308 | pr_debug("urb->context=0x%08x\n", (unsigned int)urb->context); | |
75f49e07 | 309 | pr_debug("urb->complete=0x%08x\n", (unsigned int)urb->complete); |
00b3ed16 GKH |
310 | } |
311 | #endif | |
312 | ||
00b3ed16 | 313 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
314 | * submit_rx_urb |
315 | * | |
316 | * Listen for input data on the BULK-IN pipe. If the pipe has | |
317 | * stalled then schedule it to be reset. | |
318 | * | |
319 | * Arguments: | |
320 | * hw device struct | |
321 | * memflags memory allocation flags | |
322 | * | |
323 | * Returns: | |
324 | * error code from submission | |
325 | * | |
326 | * Call context: | |
327 | * Any | |
328 | *---------------------------------------------------------------- | |
329 | */ | |
5a2214e2 | 330 | static int submit_rx_urb(struct hfa384x *hw, gfp_t memflags) |
00b3ed16 GKH |
331 | { |
332 | struct sk_buff *skb; | |
333 | int result; | |
334 | ||
3e4180c3 | 335 | skb = dev_alloc_skb(sizeof(union hfa384x_usbin)); |
e2e77528 | 336 | if (!skb) { |
00b3ed16 GKH |
337 | result = -ENOMEM; |
338 | goto done; | |
339 | } | |
340 | ||
341 | /* Post the IN urb */ | |
342 | usb_fill_bulk_urb(&hw->rx_urb, hw->usb, | |
21dc0f89 | 343 | hw->endp_in, |
3e4180c3 | 344 | skb->data, sizeof(union hfa384x_usbin), |
21dc0f89 | 345 | hfa384x_usbin_callback, hw->wlandev); |
00b3ed16 GKH |
346 | |
347 | hw->rx_urb_skb = skb; | |
348 | ||
349 | result = -ENOLINK; | |
631c8dec | 350 | if (!hw->wlandev->hwremoved && |
3f2d6564 | 351 | !test_bit(WORK_RX_HALT, &hw->usb_flags)) { |
5850c251 | 352 | result = usb_submit_urb(&hw->rx_urb, memflags); |
00b3ed16 GKH |
353 | |
354 | /* Check whether we need to reset the RX pipe */ | |
355 | if (result == -EPIPE) { | |
263b8bb9 | 356 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
357 | "%s rx pipe stalled: requesting reset\n", |
358 | hw->wlandev->netdev->name); | |
21dc0f89 | 359 | if (!test_and_set_bit(WORK_RX_HALT, &hw->usb_flags)) |
00b3ed16 GKH |
360 | schedule_work(&hw->usb_work); |
361 | } | |
362 | } | |
363 | ||
364 | /* Don't leak memory if anything should go wrong */ | |
365 | if (result != 0) { | |
366 | dev_kfree_skb(skb); | |
367 | hw->rx_urb_skb = NULL; | |
368 | } | |
369 | ||
21dc0f89 | 370 | done: |
00b3ed16 GKH |
371 | return result; |
372 | } | |
373 | ||
374 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
375 | * submit_tx_urb |
376 | * | |
377 | * Prepares and submits the URB of transmitted data. If the | |
378 | * submission fails then it will schedule the output pipe to | |
379 | * be reset. | |
380 | * | |
381 | * Arguments: | |
382 | * hw device struct | |
383 | * tx_urb URB of data for transmission | |
384 | * memflags memory allocation flags | |
385 | * | |
386 | * Returns: | |
387 | * error code from submission | |
388 | * | |
389 | * Call context: | |
390 | * Any | |
391 | *---------------------------------------------------------------- | |
392 | */ | |
5a2214e2 | 393 | static int submit_tx_urb(struct hfa384x *hw, struct urb *tx_urb, gfp_t memflags) |
00b3ed16 GKH |
394 | { |
395 | struct net_device *netdev = hw->wlandev->netdev; | |
396 | int result; | |
397 | ||
00b3ed16 | 398 | result = -ENOLINK; |
21dc0f89 | 399 | if (netif_running(netdev)) { |
a3542e66 SSA |
400 | if (!hw->wlandev->hwremoved && |
401 | !test_bit(WORK_TX_HALT, &hw->usb_flags)) { | |
5850c251 | 402 | result = usb_submit_urb(tx_urb, memflags); |
00b3ed16 GKH |
403 | |
404 | /* Test whether we need to reset the TX pipe */ | |
405 | if (result == -EPIPE) { | |
263b8bb9 | 406 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
407 | "%s tx pipe stalled: requesting reset\n", |
408 | netdev->name); | |
00b3ed16 GKH |
409 | set_bit(WORK_TX_HALT, &hw->usb_flags); |
410 | schedule_work(&hw->usb_work); | |
411 | } else if (result == 0) { | |
412 | netif_stop_queue(netdev); | |
413 | } | |
414 | } | |
415 | } | |
416 | ||
00b3ed16 GKH |
417 | return result; |
418 | } | |
419 | ||
420 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
421 | * hfa394x_usb_defer |
422 | * | |
423 | * There are some things that the USB stack cannot do while | |
424 | * in interrupt context, so we arrange this function to run | |
425 | * in process context. | |
426 | * | |
427 | * Arguments: | |
428 | * hw device structure | |
429 | * | |
430 | * Returns: | |
431 | * nothing | |
432 | * | |
433 | * Call context: | |
434 | * process (by design) | |
435 | *---------------------------------------------------------------- | |
436 | */ | |
21dc0f89 | 437 | static void hfa384x_usb_defer(struct work_struct *data) |
00b3ed16 | 438 | { |
5a2214e2 | 439 | struct hfa384x *hw = container_of(data, struct hfa384x, usb_work); |
00b3ed16 GKH |
440 | struct net_device *netdev = hw->wlandev->netdev; |
441 | ||
00b3ed16 GKH |
442 | /* Don't bother trying to reset anything if the plug |
443 | * has been pulled ... | |
444 | */ | |
21dc0f89 | 445 | if (hw->wlandev->hwremoved) |
00b3ed16 | 446 | return; |
00b3ed16 GKH |
447 | |
448 | /* Reception has stopped: try to reset the input pipe */ | |
449 | if (test_bit(WORK_RX_HALT, &hw->usb_flags)) { | |
450 | int ret; | |
451 | ||
631c8dec | 452 | usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */ |
00b3ed16 GKH |
453 | |
454 | ret = usb_clear_halt(hw->usb, hw->endp_in); | |
455 | if (ret != 0) { | |
263b8bb9 | 456 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
457 | "Failed to clear rx pipe for %s: err=%d\n", |
458 | netdev->name, ret); | |
00b3ed16 | 459 | } else { |
263b8bb9 | 460 | netdev_info(hw->wlandev->netdev, "%s rx pipe reset complete.\n", |
3f2d6564 | 461 | netdev->name); |
00b3ed16 GKH |
462 | clear_bit(WORK_RX_HALT, &hw->usb_flags); |
463 | set_bit(WORK_RX_RESUME, &hw->usb_flags); | |
464 | } | |
465 | } | |
466 | ||
467 | /* Resume receiving data back from the device. */ | |
21dc0f89 | 468 | if (test_bit(WORK_RX_RESUME, &hw->usb_flags)) { |
00b3ed16 GKH |
469 | int ret; |
470 | ||
471 | ret = submit_rx_urb(hw, GFP_KERNEL); | |
472 | if (ret != 0) { | |
263b8bb9 | 473 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
474 | "Failed to resume %s rx pipe.\n", |
475 | netdev->name); | |
00b3ed16 GKH |
476 | } else { |
477 | clear_bit(WORK_RX_RESUME, &hw->usb_flags); | |
478 | } | |
479 | } | |
480 | ||
481 | /* Transmission has stopped: try to reset the output pipe */ | |
482 | if (test_bit(WORK_TX_HALT, &hw->usb_flags)) { | |
483 | int ret; | |
484 | ||
485 | usb_kill_urb(&hw->tx_urb); | |
486 | ret = usb_clear_halt(hw->usb, hw->endp_out); | |
487 | if (ret != 0) { | |
263b8bb9 | 488 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
489 | "Failed to clear tx pipe for %s: err=%d\n", |
490 | netdev->name, ret); | |
00b3ed16 | 491 | } else { |
263b8bb9 | 492 | netdev_info(hw->wlandev->netdev, "%s tx pipe reset complete.\n", |
3f2d6564 | 493 | netdev->name); |
00b3ed16 GKH |
494 | clear_bit(WORK_TX_HALT, &hw->usb_flags); |
495 | set_bit(WORK_TX_RESUME, &hw->usb_flags); | |
496 | ||
497 | /* Stopping the BULK-OUT pipe also blocked | |
498 | * us from sending any more CTLX URBs, so | |
499 | * we need to re-run our queue ... | |
500 | */ | |
501 | hfa384x_usbctlxq_run(hw); | |
502 | } | |
503 | } | |
504 | ||
505 | /* Resume transmitting. */ | |
21dc0f89 | 506 | if (test_and_clear_bit(WORK_TX_RESUME, &hw->usb_flags)) |
cbec30c4 | 507 | netif_wake_queue(hw->wlandev->netdev); |
00b3ed16 GKH |
508 | } |
509 | ||
00b3ed16 | 510 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
511 | * hfa384x_create |
512 | * | |
513 | * Sets up the struct hfa384x data structure for use. Note this | |
514 | * does _not_ initialize the actual hardware, just the data structures | |
515 | * we use to keep track of its state. | |
516 | * | |
517 | * Arguments: | |
518 | * hw device structure | |
519 | * irq device irq number | |
520 | * iobase i/o base address for register access | |
521 | * membase memory base address for register access | |
522 | * | |
523 | * Returns: | |
524 | * nothing | |
525 | * | |
526 | * Side effects: | |
527 | * | |
528 | * Call context: | |
529 | * process | |
530 | *---------------------------------------------------------------- | |
531 | */ | |
5a2214e2 | 532 | void hfa384x_create(struct hfa384x *hw, struct usb_device *usb) |
00b3ed16 | 533 | { |
a567d0d4 | 534 | memset(hw, 0, sizeof(*hw)); |
00b3ed16 GKH |
535 | hw->usb = usb; |
536 | ||
537 | /* set up the endpoints */ | |
538 | hw->endp_in = usb_rcvbulkpipe(usb, 1); | |
539 | hw->endp_out = usb_sndbulkpipe(usb, 2); | |
540 | ||
541 | /* Set up the waitq */ | |
542 | init_waitqueue_head(&hw->cmdq); | |
543 | ||
544 | /* Initialize the command queue */ | |
545 | spin_lock_init(&hw->ctlxq.lock); | |
546 | INIT_LIST_HEAD(&hw->ctlxq.pending); | |
547 | INIT_LIST_HEAD(&hw->ctlxq.active); | |
548 | INIT_LIST_HEAD(&hw->ctlxq.completing); | |
549 | INIT_LIST_HEAD(&hw->ctlxq.reapable); | |
550 | ||
551 | /* Initialize the authentication queue */ | |
552 | skb_queue_head_init(&hw->authq); | |
553 | ||
554 | tasklet_init(&hw->reaper_bh, | |
21dc0f89 | 555 | hfa384x_usbctlx_reaper_task, (unsigned long)hw); |
00b3ed16 | 556 | tasklet_init(&hw->completion_bh, |
21dc0f89 | 557 | hfa384x_usbctlx_completion_task, (unsigned long)hw); |
575a8a5c SP |
558 | INIT_WORK(&hw->link_bh, prism2sta_processing_defer); |
559 | INIT_WORK(&hw->usb_work, hfa384x_usb_defer); | |
00b3ed16 | 560 | |
2f83aeda | 561 | setup_timer(&hw->throttle, hfa384x_usb_throttlefn, (unsigned long)hw); |
00b3ed16 | 562 | |
2f83aeda AM |
563 | setup_timer(&hw->resptimer, hfa384x_usbctlx_resptimerfn, |
564 | (unsigned long)hw); | |
00b3ed16 | 565 | |
2f83aeda AM |
566 | setup_timer(&hw->reqtimer, hfa384x_usbctlx_reqtimerfn, |
567 | (unsigned long)hw); | |
00b3ed16 GKH |
568 | |
569 | usb_init_urb(&hw->rx_urb); | |
570 | usb_init_urb(&hw->tx_urb); | |
571 | usb_init_urb(&hw->ctlx_urb); | |
572 | ||
573 | hw->link_status = HFA384x_LINK_NOTCONNECTED; | |
574 | hw->state = HFA384x_STATE_INIT; | |
575 | ||
21dc0f89 | 576 | INIT_WORK(&hw->commsqual_bh, prism2sta_commsqual_defer); |
2f83aeda AM |
577 | setup_timer(&hw->commsqual_timer, prism2sta_commsqual_timer, |
578 | (unsigned long)hw); | |
00b3ed16 GKH |
579 | } |
580 | ||
00b3ed16 | 581 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
582 | * hfa384x_destroy |
583 | * | |
584 | * Partner to hfa384x_create(). This function cleans up the hw | |
585 | * structure so that it can be freed by the caller using a simple | |
586 | * kfree. Currently, this function is just a placeholder. If, at some | |
587 | * point in the future, an hw in the 'shutdown' state requires a 'deep' | |
588 | * kfree, this is where it should be done. Note that if this function | |
589 | * is called on a _running_ hw structure, the drvr_stop() function is | |
590 | * called. | |
591 | * | |
592 | * Arguments: | |
593 | * hw device structure | |
594 | * | |
595 | * Returns: | |
596 | * nothing, this function is not allowed to fail. | |
597 | * | |
598 | * Side effects: | |
599 | * | |
600 | * Call context: | |
601 | * process | |
602 | *---------------------------------------------------------------- | |
603 | */ | |
5a2214e2 | 604 | void hfa384x_destroy(struct hfa384x *hw) |
00b3ed16 GKH |
605 | { |
606 | struct sk_buff *skb; | |
607 | ||
21dc0f89 | 608 | if (hw->state == HFA384x_STATE_RUNNING) |
00b3ed16 | 609 | hfa384x_drvr_stop(hw); |
00b3ed16 GKH |
610 | hw->state = HFA384x_STATE_PREINIT; |
611 | ||
a6f9c48f IM |
612 | kfree(hw->scanresults); |
613 | hw->scanresults = NULL; | |
00b3ed16 GKH |
614 | |
615 | /* Now to clean out the auth queue */ | |
21dc0f89 MM |
616 | while ((skb = skb_dequeue(&hw->authq))) |
617 | dev_kfree_skb(skb); | |
00b3ed16 GKH |
618 | } |
619 | ||
a10d36b0 | 620 | static struct hfa384x_usbctlx *usbctlx_alloc(void) |
00b3ed16 | 621 | { |
a10d36b0 | 622 | struct hfa384x_usbctlx *ctlx; |
00b3ed16 | 623 | |
d0edf4bc NSN |
624 | ctlx = kzalloc(sizeof(*ctlx), |
625 | in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); | |
02e02048 | 626 | if (ctlx) |
00b3ed16 | 627 | init_completion(&ctlx->done); |
00b3ed16 GKH |
628 | |
629 | return ctlx; | |
630 | } | |
631 | ||
00b3ed16 | 632 | static int |
385a79df | 633 | usbctlx_get_status(const struct hfa384x_usb_statusresp *cmdresp, |
501f5f96 | 634 | struct hfa384x_cmdresult *result) |
00b3ed16 | 635 | { |
18c7f792 MM |
636 | result->status = le16_to_cpu(cmdresp->status); |
637 | result->resp0 = le16_to_cpu(cmdresp->resp0); | |
638 | result->resp1 = le16_to_cpu(cmdresp->resp1); | |
639 | result->resp2 = le16_to_cpu(cmdresp->resp2); | |
00b3ed16 | 640 | |
a2120136 | 641 | pr_debug("cmdresult:status=0x%04x resp0=0x%04x resp1=0x%04x resp2=0x%04x\n", |
75f49e07 | 642 | result->status, result->resp0, result->resp1, result->resp2); |
00b3ed16 | 643 | |
21dc0f89 | 644 | return result->status & HFA384x_STATUS_RESULT; |
00b3ed16 GKH |
645 | } |
646 | ||
647 | static void | |
a988c9f3 | 648 | usbctlx_get_rridresult(const struct hfa384x_usb_rridresp *rridresp, |
b3fd890e | 649 | struct hfa384x_rridresult *result) |
00b3ed16 | 650 | { |
18c7f792 | 651 | result->rid = le16_to_cpu(rridresp->rid); |
00b3ed16 | 652 | result->riddata = rridresp->data; |
18c7f792 | 653 | result->riddata_len = ((le16_to_cpu(rridresp->frmlen) - 1) * 2); |
00b3ed16 GKH |
654 | } |
655 | ||
00b3ed16 | 656 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
657 | * Completor object: |
658 | * This completor must be passed to hfa384x_usbctlx_complete_sync() | |
659 | * when processing a CTLX that returns a struct hfa384x_cmdresult structure. | |
660 | *---------------------------------------------------------------- | |
661 | */ | |
21dc0f89 | 662 | struct usbctlx_cmd_completor { |
631c8dec | 663 | struct usbctlx_completor head; |
00b3ed16 | 664 | |
385a79df | 665 | const struct hfa384x_usb_statusresp *cmdresp; |
501f5f96 | 666 | struct hfa384x_cmdresult *result; |
00b3ed16 | 667 | }; |
00b3ed16 | 668 | |
631c8dec | 669 | static inline int usbctlx_cmd_completor_fn(struct usbctlx_completor *head) |
00b3ed16 | 670 | { |
631c8dec EH |
671 | struct usbctlx_cmd_completor *complete; |
672 | ||
5d85fe34 | 673 | complete = (struct usbctlx_cmd_completor *)head; |
00b3ed16 GKH |
674 | return usbctlx_get_status(complete->cmdresp, complete->result); |
675 | } | |
676 | ||
5a919c78 SP |
677 | static inline struct usbctlx_completor * |
678 | init_cmd_completor(struct usbctlx_cmd_completor *completor, | |
d1866af1 SP |
679 | const struct hfa384x_usb_statusresp *cmdresp, |
680 | struct hfa384x_cmdresult *result) | |
00b3ed16 GKH |
681 | { |
682 | completor->head.complete = usbctlx_cmd_completor_fn; | |
683 | completor->cmdresp = cmdresp; | |
684 | completor->result = result; | |
3883cd56 | 685 | return &completor->head; |
00b3ed16 GKH |
686 | } |
687 | ||
688 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
689 | * Completor object: |
690 | * This completor must be passed to hfa384x_usbctlx_complete_sync() | |
691 | * when processing a CTLX that reads a RID. | |
692 | *---------------------------------------------------------------- | |
693 | */ | |
21dc0f89 | 694 | struct usbctlx_rrid_completor { |
631c8dec | 695 | struct usbctlx_completor head; |
00b3ed16 | 696 | |
a988c9f3 | 697 | const struct hfa384x_usb_rridresp *rridresp; |
21dc0f89 MM |
698 | void *riddata; |
699 | unsigned int riddatalen; | |
00b3ed16 | 700 | }; |
00b3ed16 | 701 | |
631c8dec | 702 | static int usbctlx_rrid_completor_fn(struct usbctlx_completor *head) |
00b3ed16 | 703 | { |
631c8dec | 704 | struct usbctlx_rrid_completor *complete; |
b3fd890e | 705 | struct hfa384x_rridresult rridresult; |
00b3ed16 | 706 | |
5d85fe34 | 707 | complete = (struct usbctlx_rrid_completor *)head; |
00b3ed16 GKH |
708 | usbctlx_get_rridresult(complete->rridresp, &rridresult); |
709 | ||
710 | /* Validate the length, note body len calculation in bytes */ | |
21dc0f89 | 711 | if (rridresult.riddata_len != complete->riddatalen) { |
baa8a6c0 SSA |
712 | pr_warn("RID len mismatch, rid=0x%04x hlen=%d fwlen=%d\n", |
713 | rridresult.rid, | |
714 | complete->riddatalen, rridresult.riddata_len); | |
00b3ed16 GKH |
715 | return -ENODATA; |
716 | } | |
717 | ||
21dc0f89 | 718 | memcpy(complete->riddata, rridresult.riddata, complete->riddatalen); |
00b3ed16 GKH |
719 | return 0; |
720 | } | |
721 | ||
5a919c78 SP |
722 | static inline struct usbctlx_completor * |
723 | init_rrid_completor(struct usbctlx_rrid_completor *completor, | |
d1866af1 SP |
724 | const struct hfa384x_usb_rridresp *rridresp, |
725 | void *riddata, | |
726 | unsigned int riddatalen) | |
00b3ed16 GKH |
727 | { |
728 | completor->head.complete = usbctlx_rrid_completor_fn; | |
729 | completor->rridresp = rridresp; | |
730 | completor->riddata = riddata; | |
731 | completor->riddatalen = riddatalen; | |
3883cd56 | 732 | return &completor->head; |
00b3ed16 GKH |
733 | } |
734 | ||
735 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
736 | * Completor object: |
737 | * Interprets the results of a synchronous RID-write | |
738 | *---------------------------------------------------------------- | |
739 | */ | |
00b3ed16 GKH |
740 | #define init_wrid_completor init_cmd_completor |
741 | ||
742 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
743 | * Completor object: |
744 | * Interprets the results of a synchronous memory-write | |
745 | *---------------------------------------------------------------- | |
746 | */ | |
00b3ed16 GKH |
747 | #define init_wmem_completor init_cmd_completor |
748 | ||
749 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
750 | * Completor object: |
751 | * Interprets the results of a synchronous memory-read | |
752 | *---------------------------------------------------------------- | |
753 | */ | |
21dc0f89 | 754 | struct usbctlx_rmem_completor { |
631c8dec | 755 | struct usbctlx_completor head; |
00b3ed16 | 756 | |
1ed54806 | 757 | const struct hfa384x_usb_rmemresp *rmemresp; |
21dc0f89 MM |
758 | void *data; |
759 | unsigned int len; | |
00b3ed16 | 760 | }; |
00b3ed16 | 761 | |
631c8dec | 762 | static int usbctlx_rmem_completor_fn(struct usbctlx_completor *head) |
00b3ed16 | 763 | { |
a03742ac SSA |
764 | struct usbctlx_rmem_completor *complete = |
765 | (struct usbctlx_rmem_completor *)head; | |
00b3ed16 | 766 | |
a7cf7bae | 767 | pr_debug("rmemresp:len=%d\n", complete->rmemresp->frmlen); |
00b3ed16 GKH |
768 | memcpy(complete->data, complete->rmemresp->data, complete->len); |
769 | return 0; | |
770 | } | |
771 | ||
5a919c78 SP |
772 | static inline struct usbctlx_completor * |
773 | init_rmem_completor(struct usbctlx_rmem_completor *completor, | |
d1866af1 SP |
774 | struct hfa384x_usb_rmemresp *rmemresp, |
775 | void *data, | |
776 | unsigned int len) | |
00b3ed16 GKH |
777 | { |
778 | completor->head.complete = usbctlx_rmem_completor_fn; | |
779 | completor->rmemresp = rmemresp; | |
780 | completor->data = data; | |
781 | completor->len = len; | |
3883cd56 | 782 | return &completor->head; |
00b3ed16 GKH |
783 | } |
784 | ||
785 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
786 | * hfa384x_cb_status |
787 | * | |
788 | * Ctlx_complete handler for async CMD type control exchanges. | |
789 | * mark the hw struct as such. | |
790 | * | |
791 | * Note: If the handling is changed here, it should probably be | |
792 | * changed in docmd as well. | |
793 | * | |
794 | * Arguments: | |
795 | * hw hw struct | |
796 | * ctlx completed CTLX | |
797 | * | |
798 | * Returns: | |
799 | * nothing | |
800 | * | |
801 | * Side effects: | |
802 | * | |
803 | * Call context: | |
804 | * interrupt | |
805 | *---------------------------------------------------------------- | |
806 | */ | |
5a919c78 SP |
807 | static void hfa384x_cb_status(struct hfa384x *hw, |
808 | const struct hfa384x_usbctlx *ctlx) | |
00b3ed16 | 809 | { |
02e02048 | 810 | if (ctlx->usercb) { |
501f5f96 | 811 | struct hfa384x_cmdresult cmdresult; |
00b3ed16 GKH |
812 | |
813 | if (ctlx->state != CTLX_COMPLETE) { | |
814 | memset(&cmdresult, 0, sizeof(cmdresult)); | |
21dc0f89 MM |
815 | cmdresult.status = |
816 | HFA384x_STATUS_RESULT_SET(HFA384x_CMD_ERR); | |
00b3ed16 GKH |
817 | } else { |
818 | usbctlx_get_status(&ctlx->inbuf.cmdresp, &cmdresult); | |
819 | } | |
820 | ||
821 | ctlx->usercb(hw, &cmdresult, ctlx->usercb_data); | |
822 | } | |
00b3ed16 GKH |
823 | } |
824 | ||
5a919c78 SP |
825 | static inline int hfa384x_docmd_wait(struct hfa384x *hw, |
826 | struct hfa384x_metacmd *cmd) | |
00b3ed16 GKH |
827 | { |
828 | return hfa384x_docmd(hw, DOWAIT, cmd, NULL, NULL, NULL); | |
829 | } | |
830 | ||
831 | static inline int | |
5a2214e2 | 832 | hfa384x_docmd_async(struct hfa384x *hw, |
e2f503c4 | 833 | struct hfa384x_metacmd *cmd, |
21dc0f89 | 834 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) |
00b3ed16 | 835 | { |
21dc0f89 | 836 | return hfa384x_docmd(hw, DOASYNC, cmd, cmdcb, usercb, usercb_data); |
00b3ed16 GKH |
837 | } |
838 | ||
839 | static inline int | |
5a2214e2 | 840 | hfa384x_dorrid_wait(struct hfa384x *hw, u16 rid, void *riddata, |
21dc0f89 | 841 | unsigned int riddatalen) |
00b3ed16 GKH |
842 | { |
843 | return hfa384x_dorrid(hw, DOWAIT, | |
21dc0f89 | 844 | rid, riddata, riddatalen, NULL, NULL, NULL); |
00b3ed16 GKH |
845 | } |
846 | ||
847 | static inline int | |
5a2214e2 | 848 | hfa384x_dorrid_async(struct hfa384x *hw, |
21dc0f89 MM |
849 | u16 rid, void *riddata, unsigned int riddatalen, |
850 | ctlx_cmdcb_t cmdcb, | |
851 | ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 GKH |
852 | { |
853 | return hfa384x_dorrid(hw, DOASYNC, | |
21dc0f89 MM |
854 | rid, riddata, riddatalen, |
855 | cmdcb, usercb, usercb_data); | |
00b3ed16 GKH |
856 | } |
857 | ||
858 | static inline int | |
5a2214e2 | 859 | hfa384x_dowrid_wait(struct hfa384x *hw, u16 rid, void *riddata, |
21dc0f89 | 860 | unsigned int riddatalen) |
00b3ed16 GKH |
861 | { |
862 | return hfa384x_dowrid(hw, DOWAIT, | |
21dc0f89 | 863 | rid, riddata, riddatalen, NULL, NULL, NULL); |
00b3ed16 GKH |
864 | } |
865 | ||
866 | static inline int | |
5a2214e2 | 867 | hfa384x_dowrid_async(struct hfa384x *hw, |
21dc0f89 MM |
868 | u16 rid, void *riddata, unsigned int riddatalen, |
869 | ctlx_cmdcb_t cmdcb, | |
870 | ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 GKH |
871 | { |
872 | return hfa384x_dowrid(hw, DOASYNC, | |
21dc0f89 MM |
873 | rid, riddata, riddatalen, |
874 | cmdcb, usercb, usercb_data); | |
00b3ed16 GKH |
875 | } |
876 | ||
877 | static inline int | |
5a2214e2 | 878 | hfa384x_dormem_wait(struct hfa384x *hw, |
21dc0f89 | 879 | u16 page, u16 offset, void *data, unsigned int len) |
00b3ed16 GKH |
880 | { |
881 | return hfa384x_dormem(hw, DOWAIT, | |
21dc0f89 | 882 | page, offset, data, len, NULL, NULL, NULL); |
00b3ed16 GKH |
883 | } |
884 | ||
885 | static inline int | |
5a2214e2 | 886 | hfa384x_dormem_async(struct hfa384x *hw, |
21dc0f89 MM |
887 | u16 page, u16 offset, void *data, unsigned int len, |
888 | ctlx_cmdcb_t cmdcb, | |
889 | ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 GKH |
890 | { |
891 | return hfa384x_dormem(hw, DOASYNC, | |
21dc0f89 MM |
892 | page, offset, data, len, |
893 | cmdcb, usercb, usercb_data); | |
00b3ed16 GKH |
894 | } |
895 | ||
896 | static inline int | |
5a2214e2 | 897 | hfa384x_dowmem_wait(struct hfa384x *hw, |
21dc0f89 | 898 | u16 page, u16 offset, void *data, unsigned int len) |
00b3ed16 GKH |
899 | { |
900 | return hfa384x_dowmem(hw, DOWAIT, | |
21dc0f89 | 901 | page, offset, data, len, NULL, NULL, NULL); |
00b3ed16 GKH |
902 | } |
903 | ||
904 | static inline int | |
5a2214e2 | 905 | hfa384x_dowmem_async(struct hfa384x *hw, |
21dc0f89 MM |
906 | u16 page, |
907 | u16 offset, | |
908 | void *data, | |
909 | unsigned int len, | |
910 | ctlx_cmdcb_t cmdcb, | |
911 | ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 GKH |
912 | { |
913 | return hfa384x_dowmem(hw, DOASYNC, | |
21dc0f89 MM |
914 | page, offset, data, len, |
915 | cmdcb, usercb, usercb_data); | |
00b3ed16 GKH |
916 | } |
917 | ||
918 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
919 | * hfa384x_cmd_initialize |
920 | * | |
921 | * Issues the initialize command and sets the hw->state based | |
922 | * on the result. | |
923 | * | |
924 | * Arguments: | |
925 | * hw device structure | |
926 | * | |
927 | * Returns: | |
928 | * 0 success | |
929 | * >0 f/w reported error - f/w status code | |
930 | * <0 driver reported error | |
931 | * | |
932 | * Side effects: | |
933 | * | |
934 | * Call context: | |
935 | * process | |
936 | *---------------------------------------------------------------- | |
937 | */ | |
5a2214e2 | 938 | int hfa384x_cmd_initialize(struct hfa384x *hw) |
00b3ed16 | 939 | { |
21dc0f89 MM |
940 | int result = 0; |
941 | int i; | |
e2f503c4 | 942 | struct hfa384x_metacmd cmd; |
00b3ed16 | 943 | |
00b3ed16 GKH |
944 | cmd.cmd = HFA384x_CMDCODE_INIT; |
945 | cmd.parm0 = 0; | |
946 | cmd.parm1 = 0; | |
947 | cmd.parm2 = 0; | |
948 | ||
949 | result = hfa384x_docmd_wait(hw, &cmd); | |
950 | ||
a2120136 | 951 | pr_debug("cmdresp.init: status=0x%04x, resp0=0x%04x, resp1=0x%04x, resp2=0x%04x\n", |
75f49e07 MT |
952 | cmd.result.status, |
953 | cmd.result.resp0, cmd.result.resp1, cmd.result.resp2); | |
21dc0f89 MM |
954 | if (result == 0) { |
955 | for (i = 0; i < HFA384x_NUMPORTS_MAX; i++) | |
00b3ed16 | 956 | hw->port_enabled[i] = 0; |
00b3ed16 GKH |
957 | } |
958 | ||
21dc0f89 | 959 | hw->link_status = HFA384x_LINK_NOTCONNECTED; |
00b3ed16 | 960 | |
00b3ed16 GKH |
961 | return result; |
962 | } | |
963 | ||
00b3ed16 | 964 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
965 | * hfa384x_cmd_disable |
966 | * | |
967 | * Issues the disable command to stop communications on one of | |
968 | * the MACs 'ports'. | |
969 | * | |
970 | * Arguments: | |
971 | * hw device structure | |
972 | * macport MAC port number (host order) | |
973 | * | |
974 | * Returns: | |
975 | * 0 success | |
976 | * >0 f/w reported failure - f/w status code | |
977 | * <0 driver reported error (timeout|bad arg) | |
978 | * | |
979 | * Side effects: | |
980 | * | |
981 | * Call context: | |
982 | * process | |
983 | *---------------------------------------------------------------- | |
984 | */ | |
5a2214e2 | 985 | int hfa384x_cmd_disable(struct hfa384x *hw, u16 macport) |
00b3ed16 | 986 | { |
e2f503c4 | 987 | struct hfa384x_metacmd cmd; |
00b3ed16 | 988 | |
00b3ed16 | 989 | cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_DISABLE) | |
21dc0f89 | 990 | HFA384x_CMD_MACPORT_SET(macport); |
00b3ed16 GKH |
991 | cmd.parm0 = 0; |
992 | cmd.parm1 = 0; | |
993 | cmd.parm2 = 0; | |
994 | ||
ca026a35 | 995 | return hfa384x_docmd_wait(hw, &cmd); |
00b3ed16 GKH |
996 | } |
997 | ||
00b3ed16 | 998 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
999 | * hfa384x_cmd_enable |
1000 | * | |
1001 | * Issues the enable command to enable communications on one of | |
1002 | * the MACs 'ports'. | |
1003 | * | |
1004 | * Arguments: | |
1005 | * hw device structure | |
1006 | * macport MAC port number | |
1007 | * | |
1008 | * Returns: | |
1009 | * 0 success | |
1010 | * >0 f/w reported failure - f/w status code | |
1011 | * <0 driver reported error (timeout|bad arg) | |
1012 | * | |
1013 | * Side effects: | |
1014 | * | |
1015 | * Call context: | |
1016 | * process | |
1017 | *---------------------------------------------------------------- | |
1018 | */ | |
5a2214e2 | 1019 | int hfa384x_cmd_enable(struct hfa384x *hw, u16 macport) |
00b3ed16 | 1020 | { |
e2f503c4 | 1021 | struct hfa384x_metacmd cmd; |
00b3ed16 | 1022 | |
00b3ed16 | 1023 | cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_ENABLE) | |
21dc0f89 | 1024 | HFA384x_CMD_MACPORT_SET(macport); |
00b3ed16 GKH |
1025 | cmd.parm0 = 0; |
1026 | cmd.parm1 = 0; | |
1027 | cmd.parm2 = 0; | |
1028 | ||
ca026a35 | 1029 | return hfa384x_docmd_wait(hw, &cmd); |
00b3ed16 GKH |
1030 | } |
1031 | ||
00b3ed16 | 1032 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1033 | * hfa384x_cmd_monitor |
1034 | * | |
1035 | * Enables the 'monitor mode' of the MAC. Here's the description of | |
1036 | * monitor mode that I've received thus far: | |
1037 | * | |
1038 | * "The "monitor mode" of operation is that the MAC passes all | |
1039 | * frames for which the PLCP checks are correct. All received | |
1040 | * MPDUs are passed to the host with MAC Port = 7, with a | |
1041 | * receive status of good, FCS error, or undecryptable. Passing | |
1042 | * certain MPDUs is a violation of the 802.11 standard, but useful | |
1043 | * for a debugging tool." Normal communication is not possible | |
1044 | * while monitor mode is enabled. | |
1045 | * | |
1046 | * Arguments: | |
1047 | * hw device structure | |
1048 | * enable a code (0x0b|0x0f) that enables/disables | |
1049 | * monitor mode. (host order) | |
1050 | * | |
1051 | * Returns: | |
1052 | * 0 success | |
1053 | * >0 f/w reported failure - f/w status code | |
1054 | * <0 driver reported error (timeout|bad arg) | |
1055 | * | |
1056 | * Side effects: | |
1057 | * | |
1058 | * Call context: | |
1059 | * process | |
1060 | *---------------------------------------------------------------- | |
1061 | */ | |
5a2214e2 | 1062 | int hfa384x_cmd_monitor(struct hfa384x *hw, u16 enable) |
00b3ed16 | 1063 | { |
e2f503c4 | 1064 | struct hfa384x_metacmd cmd; |
00b3ed16 | 1065 | |
00b3ed16 | 1066 | cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_MONITOR) | |
21dc0f89 | 1067 | HFA384x_CMD_AINFO_SET(enable); |
00b3ed16 GKH |
1068 | cmd.parm0 = 0; |
1069 | cmd.parm1 = 0; | |
1070 | cmd.parm2 = 0; | |
1071 | ||
ca026a35 | 1072 | return hfa384x_docmd_wait(hw, &cmd); |
00b3ed16 GKH |
1073 | } |
1074 | ||
00b3ed16 | 1075 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1076 | * hfa384x_cmd_download |
1077 | * | |
1078 | * Sets the controls for the MAC controller code/data download | |
1079 | * process. The arguments set the mode and address associated | |
1080 | * with a download. Note that the aux registers should be enabled | |
1081 | * prior to setting one of the download enable modes. | |
1082 | * | |
1083 | * Arguments: | |
1084 | * hw device structure | |
1085 | * mode 0 - Disable programming and begin code exec | |
1086 | * 1 - Enable volatile mem programming | |
1087 | * 2 - Enable non-volatile mem programming | |
1088 | * 3 - Program non-volatile section from NV download | |
1089 | * buffer. | |
1090 | * (host order) | |
1091 | * lowaddr | |
1092 | * highaddr For mode 1, sets the high & low order bits of | |
1093 | * the "destination address". This address will be | |
1094 | * the execution start address when download is | |
1095 | * subsequently disabled. | |
1096 | * For mode 2, sets the high & low order bits of | |
1097 | * the destination in NV ram. | |
1098 | * For modes 0 & 3, should be zero. (host order) | |
1099 | * NOTE: these are CMD format. | |
1100 | * codelen Length of the data to write in mode 2, | |
1101 | * zero otherwise. (host order) | |
1102 | * | |
1103 | * Returns: | |
1104 | * 0 success | |
1105 | * >0 f/w reported failure - f/w status code | |
1106 | * <0 driver reported error (timeout|bad arg) | |
1107 | * | |
1108 | * Side effects: | |
1109 | * | |
1110 | * Call context: | |
1111 | * process | |
1112 | *---------------------------------------------------------------- | |
1113 | */ | |
5a2214e2 | 1114 | int hfa384x_cmd_download(struct hfa384x *hw, u16 mode, u16 lowaddr, |
21dc0f89 | 1115 | u16 highaddr, u16 codelen) |
00b3ed16 | 1116 | { |
e2f503c4 | 1117 | struct hfa384x_metacmd cmd; |
00b3ed16 | 1118 | |
75f49e07 MT |
1119 | pr_debug("mode=%d, lowaddr=0x%04x, highaddr=0x%04x, codelen=%d\n", |
1120 | mode, lowaddr, highaddr, codelen); | |
00b3ed16 GKH |
1121 | |
1122 | cmd.cmd = (HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_DOWNLD) | | |
1123 | HFA384x_CMD_PROGMODE_SET(mode)); | |
1124 | ||
1125 | cmd.parm0 = lowaddr; | |
1126 | cmd.parm1 = highaddr; | |
1127 | cmd.parm2 = codelen; | |
1128 | ||
ca026a35 | 1129 | return hfa384x_docmd_wait(hw, &cmd); |
00b3ed16 GKH |
1130 | } |
1131 | ||
00b3ed16 | 1132 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1133 | * hfa384x_corereset |
1134 | * | |
1135 | * Perform a reset of the hfa38xx MAC core. We assume that the hw | |
1136 | * structure is in its "created" state. That is, it is initialized | |
1137 | * with proper values. Note that if a reset is done after the | |
1138 | * device has been active for awhile, the caller might have to clean | |
1139 | * up some leftover cruft in the hw structure. | |
1140 | * | |
1141 | * Arguments: | |
1142 | * hw device structure | |
1143 | * holdtime how long (in ms) to hold the reset | |
1144 | * settletime how long (in ms) to wait after releasing | |
1145 | * the reset | |
1146 | * | |
1147 | * Returns: | |
1148 | * nothing | |
1149 | * | |
1150 | * Side effects: | |
1151 | * | |
1152 | * Call context: | |
1153 | * process | |
1154 | *---------------------------------------------------------------- | |
1155 | */ | |
5a919c78 SP |
1156 | int hfa384x_corereset(struct hfa384x *hw, int holdtime, |
1157 | int settletime, int genesis) | |
00b3ed16 | 1158 | { |
df18b930 | 1159 | int result; |
00b3ed16 | 1160 | |
21dc0f89 MM |
1161 | result = usb_reset_device(hw->usb); |
1162 | if (result < 0) { | |
263b8bb9 | 1163 | netdev_err(hw->wlandev->netdev, "usb_reset_device() failed, result=%d.\n", |
3f2d6564 | 1164 | result); |
00b3ed16 GKH |
1165 | } |
1166 | ||
00b3ed16 GKH |
1167 | return result; |
1168 | } | |
1169 | ||
00b3ed16 | 1170 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1171 | * hfa384x_usbctlx_complete_sync |
1172 | * | |
1173 | * Waits for a synchronous CTLX object to complete, | |
1174 | * and then handles the response. | |
1175 | * | |
1176 | * Arguments: | |
1177 | * hw device structure | |
1178 | * ctlx CTLX ptr | |
1179 | * completor functor object to decide what to | |
1180 | * do with the CTLX's result. | |
1181 | * | |
1182 | * Returns: | |
1183 | * 0 Success | |
1184 | * -ERESTARTSYS Interrupted by a signal | |
1185 | * -EIO CTLX failed | |
1186 | * -ENODEV Adapter was unplugged | |
1187 | * ??? Result from completor | |
1188 | * | |
1189 | * Side effects: | |
1190 | * | |
1191 | * Call context: | |
1192 | * process | |
1193 | *---------------------------------------------------------------- | |
1194 | */ | |
5a2214e2 | 1195 | static int hfa384x_usbctlx_complete_sync(struct hfa384x *hw, |
a10d36b0 | 1196 | struct hfa384x_usbctlx *ctlx, |
631c8dec | 1197 | struct usbctlx_completor *completor) |
00b3ed16 GKH |
1198 | { |
1199 | unsigned long flags; | |
1200 | int result; | |
1201 | ||
00b3ed16 GKH |
1202 | result = wait_for_completion_interruptible(&ctlx->done); |
1203 | ||
1204 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
1205 | ||
1206 | /* | |
1207 | * We can only handle the CTLX if the USB disconnect | |
1208 | * function has not run yet ... | |
1209 | */ | |
21dc0f89 MM |
1210 | cleanup: |
1211 | if (hw->wlandev->hwremoved) { | |
00b3ed16 GKH |
1212 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
1213 | result = -ENODEV; | |
21dc0f89 | 1214 | } else if (result != 0) { |
00b3ed16 GKH |
1215 | int runqueue = 0; |
1216 | ||
1217 | /* | |
1218 | * We were probably interrupted, so delete | |
1219 | * this CTLX asynchronously, kill the timers | |
1220 | * and the URB, and then start the next | |
1221 | * pending CTLX. | |
1222 | * | |
1223 | * NOTE: We can only delete the timers and | |
1224 | * the URB if this CTLX is active. | |
1225 | */ | |
21dc0f89 | 1226 | if (ctlx == get_active_ctlx(hw)) { |
00b3ed16 GKH |
1227 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
1228 | ||
1229 | del_singleshot_timer_sync(&hw->reqtimer); | |
1230 | del_singleshot_timer_sync(&hw->resptimer); | |
1231 | hw->req_timer_done = 1; | |
1232 | hw->resp_timer_done = 1; | |
1233 | usb_kill_urb(&hw->ctlx_urb); | |
1234 | ||
1235 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
1236 | ||
1237 | runqueue = 1; | |
1238 | ||
1239 | /* | |
1240 | * This scenario is so unlikely that I'm | |
1241 | * happy with a grubby "goto" solution ... | |
1242 | */ | |
21dc0f89 | 1243 | if (hw->wlandev->hwremoved) |
00b3ed16 GKH |
1244 | goto cleanup; |
1245 | } | |
1246 | ||
1247 | /* | |
1248 | * The completion task will send this CTLX | |
1249 | * to the reaper the next time it runs. We | |
1250 | * are no longer in a hurry. | |
1251 | */ | |
1252 | ctlx->reapable = 1; | |
1253 | ctlx->state = CTLX_REQ_FAILED; | |
1254 | list_move_tail(&ctlx->list, &hw->ctlxq.completing); | |
1255 | ||
1256 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
1257 | ||
1258 | if (runqueue) | |
1259 | hfa384x_usbctlxq_run(hw); | |
1260 | } else { | |
1261 | if (ctlx->state == CTLX_COMPLETE) { | |
1262 | result = completor->complete(completor); | |
1263 | } else { | |
263b8bb9 | 1264 | netdev_warn(hw->wlandev->netdev, "CTLX[%d] error: state(%s)\n", |
3f2d6564 SSA |
1265 | le16_to_cpu(ctlx->outbuf.type), |
1266 | ctlxstr(ctlx->state)); | |
00b3ed16 GKH |
1267 | result = -EIO; |
1268 | } | |
1269 | ||
1270 | list_del(&ctlx->list); | |
1271 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
1272 | kfree(ctlx); | |
1273 | } | |
1274 | ||
00b3ed16 GKH |
1275 | return result; |
1276 | } | |
1277 | ||
1278 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
1279 | * hfa384x_docmd |
1280 | * | |
1281 | * Constructs a command CTLX and submits it. | |
1282 | * | |
1283 | * NOTE: Any changes to the 'post-submit' code in this function | |
1284 | * need to be carried over to hfa384x_cbcmd() since the handling | |
1285 | * is virtually identical. | |
1286 | * | |
1287 | * Arguments: | |
1288 | * hw device structure | |
1289 | * mode DOWAIT or DOASYNC | |
1290 | * cmd cmd structure. Includes all arguments and result | |
1291 | * data points. All in host order. in host order | |
1292 | * cmdcb command-specific callback | |
1293 | * usercb user callback for async calls, NULL for DOWAIT calls | |
1294 | * usercb_data user supplied data pointer for async calls, NULL | |
1295 | * for DOASYNC calls | |
1296 | * | |
1297 | * Returns: | |
1298 | * 0 success | |
1299 | * -EIO CTLX failure | |
1300 | * -ERESTARTSYS Awakened on signal | |
1301 | * >0 command indicated error, Status and Resp0-2 are | |
1302 | * in hw structure. | |
1303 | * | |
1304 | * Side effects: | |
1305 | * | |
1306 | * | |
1307 | * Call context: | |
1308 | * process | |
1309 | *---------------------------------------------------------------- | |
1310 | */ | |
00b3ed16 | 1311 | static int |
5a2214e2 | 1312 | hfa384x_docmd(struct hfa384x *hw, |
631c8dec | 1313 | enum cmd_mode mode, |
e2f503c4 | 1314 | struct hfa384x_metacmd *cmd, |
21dc0f89 | 1315 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) |
00b3ed16 | 1316 | { |
21dc0f89 | 1317 | int result; |
a10d36b0 | 1318 | struct hfa384x_usbctlx *ctlx; |
00b3ed16 | 1319 | |
00b3ed16 | 1320 | ctlx = usbctlx_alloc(); |
e2e77528 | 1321 | if (!ctlx) { |
00b3ed16 GKH |
1322 | result = -ENOMEM; |
1323 | goto done; | |
1324 | } | |
1325 | ||
1326 | /* Initialize the command */ | |
18c7f792 MM |
1327 | ctlx->outbuf.cmdreq.type = cpu_to_le16(HFA384x_USB_CMDREQ); |
1328 | ctlx->outbuf.cmdreq.cmd = cpu_to_le16(cmd->cmd); | |
1329 | ctlx->outbuf.cmdreq.parm0 = cpu_to_le16(cmd->parm0); | |
1330 | ctlx->outbuf.cmdreq.parm1 = cpu_to_le16(cmd->parm1); | |
1331 | ctlx->outbuf.cmdreq.parm2 = cpu_to_le16(cmd->parm2); | |
00b3ed16 GKH |
1332 | |
1333 | ctlx->outbufsize = sizeof(ctlx->outbuf.cmdreq); | |
1334 | ||
a2120136 | 1335 | pr_debug("cmdreq: cmd=0x%04x parm0=0x%04x parm1=0x%04x parm2=0x%04x\n", |
75f49e07 | 1336 | cmd->cmd, cmd->parm0, cmd->parm1, cmd->parm2); |
00b3ed16 GKH |
1337 | |
1338 | ctlx->reapable = mode; | |
1339 | ctlx->cmdcb = cmdcb; | |
1340 | ctlx->usercb = usercb; | |
1341 | ctlx->usercb_data = usercb_data; | |
1342 | ||
1343 | result = hfa384x_usbctlx_submit(hw, ctlx); | |
1344 | if (result != 0) { | |
1345 | kfree(ctlx); | |
1346 | } else if (mode == DOWAIT) { | |
631c8dec | 1347 | struct usbctlx_cmd_completor completor; |
00b3ed16 | 1348 | |
21dc0f89 MM |
1349 | result = |
1350 | hfa384x_usbctlx_complete_sync(hw, ctlx, | |
1351 | init_cmd_completor(&completor, | |
1352 | &ctlx-> | |
1353 | inbuf. | |
1354 | cmdresp, | |
1355 | &cmd-> | |
1356 | result)); | |
00b3ed16 GKH |
1357 | } |
1358 | ||
1359 | done: | |
00b3ed16 GKH |
1360 | return result; |
1361 | } | |
1362 | ||
00b3ed16 | 1363 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1364 | * hfa384x_dorrid |
1365 | * | |
1366 | * Constructs a read rid CTLX and issues it. | |
1367 | * | |
1368 | * NOTE: Any changes to the 'post-submit' code in this function | |
1369 | * need to be carried over to hfa384x_cbrrid() since the handling | |
1370 | * is virtually identical. | |
1371 | * | |
1372 | * Arguments: | |
1373 | * hw device structure | |
1374 | * mode DOWAIT or DOASYNC | |
1375 | * rid Read RID number (host order) | |
1376 | * riddata Caller supplied buffer that MAC formatted RID.data | |
1377 | * record will be written to for DOWAIT calls. Should | |
1378 | * be NULL for DOASYNC calls. | |
1379 | * riddatalen Buffer length for DOWAIT calls. Zero for DOASYNC calls. | |
1380 | * cmdcb command callback for async calls, NULL for DOWAIT calls | |
1381 | * usercb user callback for async calls, NULL for DOWAIT calls | |
1382 | * usercb_data user supplied data pointer for async calls, NULL | |
1383 | * for DOWAIT calls | |
1384 | * | |
1385 | * Returns: | |
1386 | * 0 success | |
1387 | * -EIO CTLX failure | |
1388 | * -ERESTARTSYS Awakened on signal | |
1389 | * -ENODATA riddatalen != macdatalen | |
1390 | * >0 command indicated error, Status and Resp0-2 are | |
1391 | * in hw structure. | |
1392 | * | |
1393 | * Side effects: | |
1394 | * | |
1395 | * Call context: | |
1396 | * interrupt (DOASYNC) | |
1397 | * process (DOWAIT or DOASYNC) | |
1398 | *---------------------------------------------------------------- | |
1399 | */ | |
00b3ed16 | 1400 | static int |
5a2214e2 | 1401 | hfa384x_dorrid(struct hfa384x *hw, |
631c8dec | 1402 | enum cmd_mode mode, |
21dc0f89 MM |
1403 | u16 rid, |
1404 | void *riddata, | |
1405 | unsigned int riddatalen, | |
1406 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 | 1407 | { |
21dc0f89 | 1408 | int result; |
a10d36b0 | 1409 | struct hfa384x_usbctlx *ctlx; |
00b3ed16 | 1410 | |
00b3ed16 | 1411 | ctlx = usbctlx_alloc(); |
e2e77528 | 1412 | if (!ctlx) { |
00b3ed16 GKH |
1413 | result = -ENOMEM; |
1414 | goto done; | |
1415 | } | |
1416 | ||
1417 | /* Initialize the command */ | |
18c7f792 | 1418 | ctlx->outbuf.rridreq.type = cpu_to_le16(HFA384x_USB_RRIDREQ); |
00b3ed16 | 1419 | ctlx->outbuf.rridreq.frmlen = |
18c7f792 MM |
1420 | cpu_to_le16(sizeof(ctlx->outbuf.rridreq.rid)); |
1421 | ctlx->outbuf.rridreq.rid = cpu_to_le16(rid); | |
00b3ed16 GKH |
1422 | |
1423 | ctlx->outbufsize = sizeof(ctlx->outbuf.rridreq); | |
1424 | ||
1425 | ctlx->reapable = mode; | |
1426 | ctlx->cmdcb = cmdcb; | |
1427 | ctlx->usercb = usercb; | |
1428 | ctlx->usercb_data = usercb_data; | |
1429 | ||
1430 | /* Submit the CTLX */ | |
1431 | result = hfa384x_usbctlx_submit(hw, ctlx); | |
1432 | if (result != 0) { | |
1433 | kfree(ctlx); | |
1434 | } else if (mode == DOWAIT) { | |
631c8dec | 1435 | struct usbctlx_rrid_completor completor; |
00b3ed16 | 1436 | |
21dc0f89 MM |
1437 | result = |
1438 | hfa384x_usbctlx_complete_sync(hw, ctlx, | |
1439 | init_rrid_completor | |
1440 | (&completor, | |
1441 | &ctlx->inbuf.rridresp, | |
1442 | riddata, riddatalen)); | |
00b3ed16 GKH |
1443 | } |
1444 | ||
1445 | done: | |
00b3ed16 GKH |
1446 | return result; |
1447 | } | |
1448 | ||
00b3ed16 | 1449 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1450 | * hfa384x_dowrid |
1451 | * | |
1452 | * Constructs a write rid CTLX and issues it. | |
1453 | * | |
1454 | * NOTE: Any changes to the 'post-submit' code in this function | |
1455 | * need to be carried over to hfa384x_cbwrid() since the handling | |
1456 | * is virtually identical. | |
1457 | * | |
1458 | * Arguments: | |
1459 | * hw device structure | |
1460 | * enum cmd_mode DOWAIT or DOASYNC | |
1461 | * rid RID code | |
1462 | * riddata Data portion of RID formatted for MAC | |
1463 | * riddatalen Length of the data portion in bytes | |
1464 | * cmdcb command callback for async calls, NULL for DOWAIT calls | |
1465 | * usercb user callback for async calls, NULL for DOWAIT calls | |
1466 | * usercb_data user supplied data pointer for async calls | |
1467 | * | |
1468 | * Returns: | |
1469 | * 0 success | |
1470 | * -ETIMEDOUT timed out waiting for register ready or | |
1471 | * command completion | |
1472 | * >0 command indicated error, Status and Resp0-2 are | |
1473 | * in hw structure. | |
1474 | * | |
1475 | * Side effects: | |
1476 | * | |
1477 | * Call context: | |
1478 | * interrupt (DOASYNC) | |
1479 | * process (DOWAIT or DOASYNC) | |
1480 | *---------------------------------------------------------------- | |
1481 | */ | |
00b3ed16 | 1482 | static int |
5a2214e2 | 1483 | hfa384x_dowrid(struct hfa384x *hw, |
631c8dec | 1484 | enum cmd_mode mode, |
21dc0f89 MM |
1485 | u16 rid, |
1486 | void *riddata, | |
1487 | unsigned int riddatalen, | |
1488 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 | 1489 | { |
21dc0f89 | 1490 | int result; |
a10d36b0 | 1491 | struct hfa384x_usbctlx *ctlx; |
00b3ed16 | 1492 | |
00b3ed16 | 1493 | ctlx = usbctlx_alloc(); |
e2e77528 | 1494 | if (!ctlx) { |
00b3ed16 GKH |
1495 | result = -ENOMEM; |
1496 | goto done; | |
1497 | } | |
1498 | ||
1499 | /* Initialize the command */ | |
18c7f792 MM |
1500 | ctlx->outbuf.wridreq.type = cpu_to_le16(HFA384x_USB_WRIDREQ); |
1501 | ctlx->outbuf.wridreq.frmlen = cpu_to_le16((sizeof | |
75f49e07 MT |
1502 | (ctlx->outbuf.wridreq.rid) + |
1503 | riddatalen + 1) / 2); | |
18c7f792 | 1504 | ctlx->outbuf.wridreq.rid = cpu_to_le16(rid); |
00b3ed16 GKH |
1505 | memcpy(ctlx->outbuf.wridreq.data, riddata, riddatalen); |
1506 | ||
1507 | ctlx->outbufsize = sizeof(ctlx->outbuf.wridreq.type) + | |
21dc0f89 MM |
1508 | sizeof(ctlx->outbuf.wridreq.frmlen) + |
1509 | sizeof(ctlx->outbuf.wridreq.rid) + riddatalen; | |
00b3ed16 GKH |
1510 | |
1511 | ctlx->reapable = mode; | |
1512 | ctlx->cmdcb = cmdcb; | |
1513 | ctlx->usercb = usercb; | |
1514 | ctlx->usercb_data = usercb_data; | |
1515 | ||
1516 | /* Submit the CTLX */ | |
1517 | result = hfa384x_usbctlx_submit(hw, ctlx); | |
1518 | if (result != 0) { | |
1519 | kfree(ctlx); | |
1520 | } else if (mode == DOWAIT) { | |
a03742ac | 1521 | struct usbctlx_cmd_completor completor; |
501f5f96 | 1522 | struct hfa384x_cmdresult wridresult; |
00b3ed16 | 1523 | |
21dc0f89 MM |
1524 | result = hfa384x_usbctlx_complete_sync(hw, |
1525 | ctlx, | |
1526 | init_wrid_completor | |
1527 | (&completor, | |
1528 | &ctlx->inbuf.wridresp, | |
1529 | &wridresult)); | |
00b3ed16 GKH |
1530 | } |
1531 | ||
1532 | done: | |
00b3ed16 GKH |
1533 | return result; |
1534 | } | |
1535 | ||
1536 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
1537 | * hfa384x_dormem |
1538 | * | |
1539 | * Constructs a readmem CTLX and issues it. | |
1540 | * | |
1541 | * NOTE: Any changes to the 'post-submit' code in this function | |
1542 | * need to be carried over to hfa384x_cbrmem() since the handling | |
1543 | * is virtually identical. | |
1544 | * | |
1545 | * Arguments: | |
1546 | * hw device structure | |
1547 | * mode DOWAIT or DOASYNC | |
1548 | * page MAC address space page (CMD format) | |
1549 | * offset MAC address space offset | |
1550 | * data Ptr to data buffer to receive read | |
1551 | * len Length of the data to read (max == 2048) | |
1552 | * cmdcb command callback for async calls, NULL for DOWAIT calls | |
1553 | * usercb user callback for async calls, NULL for DOWAIT calls | |
1554 | * usercb_data user supplied data pointer for async calls | |
1555 | * | |
1556 | * Returns: | |
1557 | * 0 success | |
1558 | * -ETIMEDOUT timed out waiting for register ready or | |
1559 | * command completion | |
1560 | * >0 command indicated error, Status and Resp0-2 are | |
1561 | * in hw structure. | |
1562 | * | |
1563 | * Side effects: | |
1564 | * | |
1565 | * Call context: | |
1566 | * interrupt (DOASYNC) | |
1567 | * process (DOWAIT or DOASYNC) | |
1568 | *---------------------------------------------------------------- | |
1569 | */ | |
00b3ed16 | 1570 | static int |
5a2214e2 | 1571 | hfa384x_dormem(struct hfa384x *hw, |
631c8dec | 1572 | enum cmd_mode mode, |
21dc0f89 MM |
1573 | u16 page, |
1574 | u16 offset, | |
1575 | void *data, | |
1576 | unsigned int len, | |
1577 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 | 1578 | { |
21dc0f89 | 1579 | int result; |
a10d36b0 | 1580 | struct hfa384x_usbctlx *ctlx; |
00b3ed16 | 1581 | |
00b3ed16 | 1582 | ctlx = usbctlx_alloc(); |
e2e77528 | 1583 | if (!ctlx) { |
00b3ed16 GKH |
1584 | result = -ENOMEM; |
1585 | goto done; | |
1586 | } | |
1587 | ||
1588 | /* Initialize the command */ | |
18c7f792 | 1589 | ctlx->outbuf.rmemreq.type = cpu_to_le16(HFA384x_USB_RMEMREQ); |
21dc0f89 | 1590 | ctlx->outbuf.rmemreq.frmlen = |
18c7f792 | 1591 | cpu_to_le16(sizeof(ctlx->outbuf.rmemreq.offset) + |
75f49e07 | 1592 | sizeof(ctlx->outbuf.rmemreq.page) + len); |
18c7f792 MM |
1593 | ctlx->outbuf.rmemreq.offset = cpu_to_le16(offset); |
1594 | ctlx->outbuf.rmemreq.page = cpu_to_le16(page); | |
00b3ed16 GKH |
1595 | |
1596 | ctlx->outbufsize = sizeof(ctlx->outbuf.rmemreq); | |
1597 | ||
75f49e07 MT |
1598 | pr_debug("type=0x%04x frmlen=%d offset=0x%04x page=0x%04x\n", |
1599 | ctlx->outbuf.rmemreq.type, | |
1600 | ctlx->outbuf.rmemreq.frmlen, | |
1601 | ctlx->outbuf.rmemreq.offset, ctlx->outbuf.rmemreq.page); | |
00b3ed16 | 1602 | |
75f49e07 | 1603 | pr_debug("pktsize=%zd\n", ROUNDUP64(sizeof(ctlx->outbuf.rmemreq))); |
00b3ed16 GKH |
1604 | |
1605 | ctlx->reapable = mode; | |
1606 | ctlx->cmdcb = cmdcb; | |
1607 | ctlx->usercb = usercb; | |
1608 | ctlx->usercb_data = usercb_data; | |
1609 | ||
1610 | result = hfa384x_usbctlx_submit(hw, ctlx); | |
1611 | if (result != 0) { | |
1612 | kfree(ctlx); | |
21dc0f89 | 1613 | } else if (mode == DOWAIT) { |
a03742ac | 1614 | struct usbctlx_rmem_completor completor; |
21dc0f89 MM |
1615 | |
1616 | result = | |
1617 | hfa384x_usbctlx_complete_sync(hw, ctlx, | |
1618 | init_rmem_completor | |
1619 | (&completor, | |
1620 | &ctlx->inbuf.rmemresp, data, | |
1621 | len)); | |
00b3ed16 GKH |
1622 | } |
1623 | ||
1624 | done: | |
00b3ed16 GKH |
1625 | return result; |
1626 | } | |
1627 | ||
00b3ed16 | 1628 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1629 | * hfa384x_dowmem |
1630 | * | |
1631 | * Constructs a writemem CTLX and issues it. | |
1632 | * | |
1633 | * NOTE: Any changes to the 'post-submit' code in this function | |
1634 | * need to be carried over to hfa384x_cbwmem() since the handling | |
1635 | * is virtually identical. | |
1636 | * | |
1637 | * Arguments: | |
1638 | * hw device structure | |
1639 | * mode DOWAIT or DOASYNC | |
1640 | * page MAC address space page (CMD format) | |
1641 | * offset MAC address space offset | |
1642 | * data Ptr to data buffer containing write data | |
1643 | * len Length of the data to read (max == 2048) | |
1644 | * cmdcb command callback for async calls, NULL for DOWAIT calls | |
1645 | * usercb user callback for async calls, NULL for DOWAIT calls | |
1646 | * usercb_data user supplied data pointer for async calls. | |
1647 | * | |
1648 | * Returns: | |
1649 | * 0 success | |
1650 | * -ETIMEDOUT timed out waiting for register ready or | |
1651 | * command completion | |
1652 | * >0 command indicated error, Status and Resp0-2 are | |
1653 | * in hw structure. | |
1654 | * | |
1655 | * Side effects: | |
1656 | * | |
1657 | * Call context: | |
1658 | * interrupt (DOWAIT) | |
1659 | * process (DOWAIT or DOASYNC) | |
1660 | *---------------------------------------------------------------- | |
1661 | */ | |
00b3ed16 | 1662 | static int |
5a2214e2 | 1663 | hfa384x_dowmem(struct hfa384x *hw, |
631c8dec | 1664 | enum cmd_mode mode, |
21dc0f89 MM |
1665 | u16 page, |
1666 | u16 offset, | |
1667 | void *data, | |
1668 | unsigned int len, | |
1669 | ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 | 1670 | { |
21dc0f89 | 1671 | int result; |
a10d36b0 | 1672 | struct hfa384x_usbctlx *ctlx; |
00b3ed16 | 1673 | |
75f49e07 | 1674 | pr_debug("page=0x%04x offset=0x%04x len=%d\n", page, offset, len); |
00b3ed16 GKH |
1675 | |
1676 | ctlx = usbctlx_alloc(); | |
e2e77528 | 1677 | if (!ctlx) { |
00b3ed16 GKH |
1678 | result = -ENOMEM; |
1679 | goto done; | |
1680 | } | |
1681 | ||
1682 | /* Initialize the command */ | |
18c7f792 | 1683 | ctlx->outbuf.wmemreq.type = cpu_to_le16(HFA384x_USB_WMEMREQ); |
21dc0f89 | 1684 | ctlx->outbuf.wmemreq.frmlen = |
18c7f792 | 1685 | cpu_to_le16(sizeof(ctlx->outbuf.wmemreq.offset) + |
75f49e07 | 1686 | sizeof(ctlx->outbuf.wmemreq.page) + len); |
18c7f792 MM |
1687 | ctlx->outbuf.wmemreq.offset = cpu_to_le16(offset); |
1688 | ctlx->outbuf.wmemreq.page = cpu_to_le16(page); | |
00b3ed16 GKH |
1689 | memcpy(ctlx->outbuf.wmemreq.data, data, len); |
1690 | ||
1691 | ctlx->outbufsize = sizeof(ctlx->outbuf.wmemreq.type) + | |
21dc0f89 MM |
1692 | sizeof(ctlx->outbuf.wmemreq.frmlen) + |
1693 | sizeof(ctlx->outbuf.wmemreq.offset) + | |
1694 | sizeof(ctlx->outbuf.wmemreq.page) + len; | |
00b3ed16 GKH |
1695 | |
1696 | ctlx->reapable = mode; | |
1697 | ctlx->cmdcb = cmdcb; | |
1698 | ctlx->usercb = usercb; | |
1699 | ctlx->usercb_data = usercb_data; | |
1700 | ||
1701 | result = hfa384x_usbctlx_submit(hw, ctlx); | |
1702 | if (result != 0) { | |
1703 | kfree(ctlx); | |
21dc0f89 | 1704 | } else if (mode == DOWAIT) { |
a03742ac | 1705 | struct usbctlx_cmd_completor completor; |
501f5f96 | 1706 | struct hfa384x_cmdresult wmemresult; |
21dc0f89 MM |
1707 | |
1708 | result = hfa384x_usbctlx_complete_sync(hw, | |
1709 | ctlx, | |
1710 | init_wmem_completor | |
1711 | (&completor, | |
1712 | &ctlx->inbuf.wmemresp, | |
1713 | &wmemresult)); | |
00b3ed16 GKH |
1714 | } |
1715 | ||
1716 | done: | |
00b3ed16 GKH |
1717 | return result; |
1718 | } | |
1719 | ||
00b3ed16 | 1720 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1721 | * hfa384x_drvr_disable |
1722 | * | |
1723 | * Issues the disable command to stop communications on one of | |
1724 | * the MACs 'ports'. Only macport 0 is valid for stations. | |
1725 | * APs may also disable macports 1-6. Only ports that have been | |
1726 | * previously enabled may be disabled. | |
1727 | * | |
1728 | * Arguments: | |
1729 | * hw device structure | |
1730 | * macport MAC port number (host order) | |
1731 | * | |
1732 | * Returns: | |
1733 | * 0 success | |
1734 | * >0 f/w reported failure - f/w status code | |
1735 | * <0 driver reported error (timeout|bad arg) | |
1736 | * | |
1737 | * Side effects: | |
1738 | * | |
1739 | * Call context: | |
1740 | * process | |
1741 | *---------------------------------------------------------------- | |
1742 | */ | |
5a2214e2 | 1743 | int hfa384x_drvr_disable(struct hfa384x *hw, u16 macport) |
00b3ed16 | 1744 | { |
21dc0f89 | 1745 | int result = 0; |
00b3ed16 | 1746 | |
00b3ed16 GKH |
1747 | if ((!hw->isap && macport != 0) || |
1748 | (hw->isap && !(macport <= HFA384x_PORTID_MAX)) || | |
21dc0f89 | 1749 | !(hw->port_enabled[macport])) { |
00b3ed16 GKH |
1750 | result = -EINVAL; |
1751 | } else { | |
1752 | result = hfa384x_cmd_disable(hw, macport); | |
21dc0f89 | 1753 | if (result == 0) |
00b3ed16 | 1754 | hw->port_enabled[macport] = 0; |
00b3ed16 | 1755 | } |
00b3ed16 GKH |
1756 | return result; |
1757 | } | |
1758 | ||
00b3ed16 | 1759 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1760 | * hfa384x_drvr_enable |
1761 | * | |
1762 | * Issues the enable command to enable communications on one of | |
1763 | * the MACs 'ports'. Only macport 0 is valid for stations. | |
1764 | * APs may also enable macports 1-6. Only ports that are currently | |
1765 | * disabled may be enabled. | |
1766 | * | |
1767 | * Arguments: | |
1768 | * hw device structure | |
1769 | * macport MAC port number | |
1770 | * | |
1771 | * Returns: | |
1772 | * 0 success | |
1773 | * >0 f/w reported failure - f/w status code | |
1774 | * <0 driver reported error (timeout|bad arg) | |
1775 | * | |
1776 | * Side effects: | |
1777 | * | |
1778 | * Call context: | |
1779 | * process | |
1780 | *---------------------------------------------------------------- | |
1781 | */ | |
5a2214e2 | 1782 | int hfa384x_drvr_enable(struct hfa384x *hw, u16 macport) |
00b3ed16 | 1783 | { |
21dc0f89 | 1784 | int result = 0; |
00b3ed16 | 1785 | |
00b3ed16 GKH |
1786 | if ((!hw->isap && macport != 0) || |
1787 | (hw->isap && !(macport <= HFA384x_PORTID_MAX)) || | |
21dc0f89 | 1788 | (hw->port_enabled[macport])) { |
00b3ed16 GKH |
1789 | result = -EINVAL; |
1790 | } else { | |
1791 | result = hfa384x_cmd_enable(hw, macport); | |
21dc0f89 | 1792 | if (result == 0) |
00b3ed16 | 1793 | hw->port_enabled[macport] = 1; |
00b3ed16 | 1794 | } |
00b3ed16 GKH |
1795 | return result; |
1796 | } | |
1797 | ||
00b3ed16 | 1798 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1799 | * hfa384x_drvr_flashdl_enable |
1800 | * | |
1801 | * Begins the flash download state. Checks to see that we're not | |
1802 | * already in a download state and that a port isn't enabled. | |
1803 | * Sets the download state and retrieves the flash download | |
1804 | * buffer location, buffer size, and timeout length. | |
1805 | * | |
1806 | * Arguments: | |
1807 | * hw device structure | |
1808 | * | |
1809 | * Returns: | |
1810 | * 0 success | |
1811 | * >0 f/w reported error - f/w status code | |
1812 | * <0 driver reported error | |
1813 | * | |
1814 | * Side effects: | |
1815 | * | |
1816 | * Call context: | |
1817 | * process | |
1818 | *---------------------------------------------------------------- | |
1819 | */ | |
5a2214e2 | 1820 | int hfa384x_drvr_flashdl_enable(struct hfa384x *hw) |
00b3ed16 | 1821 | { |
21dc0f89 MM |
1822 | int result = 0; |
1823 | int i; | |
00b3ed16 | 1824 | |
00b3ed16 | 1825 | /* Check that a port isn't active */ |
21dc0f89 MM |
1826 | for (i = 0; i < HFA384x_PORTID_MAX; i++) { |
1827 | if (hw->port_enabled[i]) { | |
a7cf7bae | 1828 | pr_debug("called when port enabled.\n"); |
00b3ed16 GKH |
1829 | return -EINVAL; |
1830 | } | |
1831 | } | |
1832 | ||
1833 | /* Check that we're not already in a download state */ | |
21dc0f89 | 1834 | if (hw->dlstate != HFA384x_DLSTATE_DISABLED) |
00b3ed16 | 1835 | return -EINVAL; |
00b3ed16 GKH |
1836 | |
1837 | /* Retrieve the buffer loc&size and timeout */ | |
46800b22 | 1838 | result = hfa384x_drvr_getconfig(hw, HFA384x_RID_DOWNLOADBUFFER, |
3883cd56 | 1839 | &hw->bufinfo, sizeof(hw->bufinfo)); |
3f4b4e77 | 1840 | if (result) |
00b3ed16 | 1841 | return result; |
3f4b4e77 | 1842 | |
18c7f792 MM |
1843 | hw->bufinfo.page = le16_to_cpu(hw->bufinfo.page); |
1844 | hw->bufinfo.offset = le16_to_cpu(hw->bufinfo.offset); | |
1845 | hw->bufinfo.len = le16_to_cpu(hw->bufinfo.len); | |
46800b22 | 1846 | result = hfa384x_drvr_getconfig16(hw, HFA384x_RID_MAXLOADTIME, |
3883cd56 | 1847 | &hw->dltimeout); |
3f4b4e77 | 1848 | if (result) |
00b3ed16 | 1849 | return result; |
3f4b4e77 | 1850 | |
18c7f792 | 1851 | hw->dltimeout = le16_to_cpu(hw->dltimeout); |
00b3ed16 | 1852 | |
a7cf7bae | 1853 | pr_debug("flashdl_enable\n"); |
00b3ed16 GKH |
1854 | |
1855 | hw->dlstate = HFA384x_DLSTATE_FLASHENABLED; | |
8a251b55 | 1856 | |
00b3ed16 GKH |
1857 | return result; |
1858 | } | |
1859 | ||
00b3ed16 | 1860 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1861 | * hfa384x_drvr_flashdl_disable |
1862 | * | |
1863 | * Ends the flash download state. Note that this will cause the MAC | |
1864 | * firmware to restart. | |
1865 | * | |
1866 | * Arguments: | |
1867 | * hw device structure | |
1868 | * | |
1869 | * Returns: | |
1870 | * 0 success | |
1871 | * >0 f/w reported error - f/w status code | |
1872 | * <0 driver reported error | |
1873 | * | |
1874 | * Side effects: | |
1875 | * | |
1876 | * Call context: | |
1877 | * process | |
1878 | *---------------------------------------------------------------- | |
1879 | */ | |
5a2214e2 | 1880 | int hfa384x_drvr_flashdl_disable(struct hfa384x *hw) |
00b3ed16 | 1881 | { |
00b3ed16 | 1882 | /* Check that we're already in the download state */ |
21dc0f89 | 1883 | if (hw->dlstate != HFA384x_DLSTATE_FLASHENABLED) |
00b3ed16 | 1884 | return -EINVAL; |
00b3ed16 | 1885 | |
a7cf7bae | 1886 | pr_debug("flashdl_enable\n"); |
00b3ed16 GKH |
1887 | |
1888 | /* There isn't much we can do at this point, so I don't */ | |
1889 | /* bother w/ the return value */ | |
21dc0f89 | 1890 | hfa384x_cmd_download(hw, HFA384x_PROGMODE_DISABLE, 0, 0, 0); |
00b3ed16 GKH |
1891 | hw->dlstate = HFA384x_DLSTATE_DISABLED; |
1892 | ||
00b3ed16 GKH |
1893 | return 0; |
1894 | } | |
1895 | ||
00b3ed16 | 1896 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
1897 | * hfa384x_drvr_flashdl_write |
1898 | * | |
1899 | * Performs a FLASH download of a chunk of data. First checks to see | |
1900 | * that we're in the FLASH download state, then sets the download | |
1901 | * mode, uses the aux functions to 1) copy the data to the flash | |
1902 | * buffer, 2) sets the download 'write flash' mode, 3) readback and | |
1903 | * compare. Lather rinse, repeat as many times an necessary to get | |
1904 | * all the given data into flash. | |
1905 | * When all data has been written using this function (possibly | |
1906 | * repeatedly), call drvr_flashdl_disable() to end the download state | |
1907 | * and restart the MAC. | |
1908 | * | |
1909 | * Arguments: | |
1910 | * hw device structure | |
1911 | * daddr Card address to write to. (host order) | |
1912 | * buf Ptr to data to write. | |
1913 | * len Length of data (host order). | |
1914 | * | |
1915 | * Returns: | |
1916 | * 0 success | |
1917 | * >0 f/w reported error - f/w status code | |
1918 | * <0 driver reported error | |
1919 | * | |
1920 | * Side effects: | |
1921 | * | |
1922 | * Call context: | |
1923 | * process | |
1924 | *---------------------------------------------------------------- | |
1925 | */ | |
5a919c78 SP |
1926 | int hfa384x_drvr_flashdl_write(struct hfa384x *hw, u32 daddr, |
1927 | void *buf, u32 len) | |
00b3ed16 | 1928 | { |
21dc0f89 MM |
1929 | int result = 0; |
1930 | u32 dlbufaddr; | |
1931 | int nburns; | |
1932 | u32 burnlen; | |
1933 | u32 burndaddr; | |
1934 | u16 burnlo; | |
1935 | u16 burnhi; | |
1936 | int nwrites; | |
1937 | u8 *writebuf; | |
1938 | u16 writepage; | |
1939 | u16 writeoffset; | |
1940 | u32 writelen; | |
1941 | int i; | |
1942 | int j; | |
00b3ed16 | 1943 | |
a7cf7bae | 1944 | pr_debug("daddr=0x%08x len=%d\n", daddr, len); |
00b3ed16 GKH |
1945 | |
1946 | /* Check that we're in the flash download state */ | |
21dc0f89 | 1947 | if (hw->dlstate != HFA384x_DLSTATE_FLASHENABLED) |
00b3ed16 | 1948 | return -EINVAL; |
00b3ed16 | 1949 | |
a2120136 SSA |
1950 | netdev_info(hw->wlandev->netdev, |
1951 | "Download %d bytes to flash @0x%06x\n", len, daddr); | |
00b3ed16 GKH |
1952 | |
1953 | /* Convert to flat address for arithmetic */ | |
1954 | /* NOTE: dlbuffer RID stores the address in AUX format */ | |
21dc0f89 MM |
1955 | dlbufaddr = |
1956 | HFA384x_ADDR_AUX_MKFLAT(hw->bufinfo.page, hw->bufinfo.offset); | |
75f49e07 MT |
1957 | pr_debug("dlbuf.page=0x%04x dlbuf.offset=0x%04x dlbufaddr=0x%08x\n", |
1958 | hw->bufinfo.page, hw->bufinfo.offset, dlbufaddr); | |
00b3ed16 GKH |
1959 | /* Calculations to determine how many fills of the dlbuffer to do |
1960 | * and how many USB wmemreq's to do for each fill. At this point | |
1961 | * in time, the dlbuffer size and the wmemreq size are the same. | |
1962 | * Therefore, nwrites should always be 1. The extra complexity | |
1963 | * here is a hedge against future changes. | |
1964 | */ | |
1965 | ||
1966 | /* Figure out how many times to do the flash programming */ | |
1967 | nburns = len / hw->bufinfo.len; | |
1968 | nburns += (len % hw->bufinfo.len) ? 1 : 0; | |
1969 | ||
1970 | /* For each flash program cycle, how many USB wmemreq's are needed? */ | |
1971 | nwrites = hw->bufinfo.len / HFA384x_USB_RWMEM_MAXLEN; | |
1972 | nwrites += (hw->bufinfo.len % HFA384x_USB_RWMEM_MAXLEN) ? 1 : 0; | |
1973 | ||
1974 | /* For each burn */ | |
21dc0f89 | 1975 | for (i = 0; i < nburns; i++) { |
00b3ed16 GKH |
1976 | /* Get the dest address and len */ |
1977 | burnlen = (len - (hw->bufinfo.len * i)) > hw->bufinfo.len ? | |
21dc0f89 | 1978 | hw->bufinfo.len : (len - (hw->bufinfo.len * i)); |
00b3ed16 GKH |
1979 | burndaddr = daddr + (hw->bufinfo.len * i); |
1980 | burnlo = HFA384x_ADDR_CMD_MKOFF(burndaddr); | |
1981 | burnhi = HFA384x_ADDR_CMD_MKPAGE(burndaddr); | |
1982 | ||
263b8bb9 | 1983 | netdev_info(hw->wlandev->netdev, "Writing %d bytes to flash @0x%06x\n", |
3f2d6564 | 1984 | burnlen, burndaddr); |
00b3ed16 GKH |
1985 | |
1986 | /* Set the download mode */ | |
1987 | result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_NV, | |
21dc0f89 MM |
1988 | burnlo, burnhi, burnlen); |
1989 | if (result) { | |
a2120136 SSA |
1990 | netdev_err(hw->wlandev->netdev, |
1991 | "download(NV,lo=%x,hi=%x,len=%x) cmd failed, result=%d. Aborting d/l\n", | |
1992 | burnlo, burnhi, burnlen, result); | |
00b3ed16 GKH |
1993 | goto exit_proc; |
1994 | } | |
1995 | ||
1996 | /* copy the data to the flash download buffer */ | |
21dc0f89 | 1997 | for (j = 0; j < nwrites; j++) { |
00b3ed16 | 1998 | writebuf = buf + |
21dc0f89 MM |
1999 | (i * hw->bufinfo.len) + |
2000 | (j * HFA384x_USB_RWMEM_MAXLEN); | |
2001 | ||
2002 | writepage = HFA384x_ADDR_CMD_MKPAGE(dlbufaddr + | |
631c8dec EH |
2003 | (j * HFA384x_USB_RWMEM_MAXLEN)); |
2004 | writeoffset = HFA384x_ADDR_CMD_MKOFF(dlbufaddr + | |
2005 | (j * HFA384x_USB_RWMEM_MAXLEN)); | |
21dc0f89 MM |
2006 | |
2007 | writelen = burnlen - (j * HFA384x_USB_RWMEM_MAXLEN); | |
2008 | writelen = writelen > HFA384x_USB_RWMEM_MAXLEN ? | |
2009 | HFA384x_USB_RWMEM_MAXLEN : writelen; | |
2010 | ||
2011 | result = hfa384x_dowmem_wait(hw, | |
2012 | writepage, | |
2013 | writeoffset, | |
2014 | writebuf, writelen); | |
00b3ed16 GKH |
2015 | } |
2016 | ||
2017 | /* set the download 'write flash' mode */ | |
2018 | result = hfa384x_cmd_download(hw, | |
21dc0f89 MM |
2019 | HFA384x_PROGMODE_NVWRITE, |
2020 | 0, 0, 0); | |
2021 | if (result) { | |
263b8bb9 | 2022 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
2023 | "download(NVWRITE,lo=%x,hi=%x,len=%x) cmd failed, result=%d. Aborting d/l\n", |
2024 | burnlo, burnhi, burnlen, result); | |
00b3ed16 GKH |
2025 | goto exit_proc; |
2026 | } | |
2027 | ||
2028 | /* TODO: We really should do a readback and compare. */ | |
2029 | } | |
2030 | ||
2031 | exit_proc: | |
2032 | ||
2033 | /* Leave the firmware in the 'post-prog' mode. flashdl_disable will */ | |
2034 | /* actually disable programming mode. Remember, that will cause the */ | |
2035 | /* the firmware to effectively reset itself. */ | |
2036 | ||
00b3ed16 GKH |
2037 | return result; |
2038 | } | |
2039 | ||
00b3ed16 | 2040 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2041 | * hfa384x_drvr_getconfig |
2042 | * | |
2043 | * Performs the sequence necessary to read a config/info item. | |
2044 | * | |
2045 | * Arguments: | |
2046 | * hw device structure | |
2047 | * rid config/info record id (host order) | |
2048 | * buf host side record buffer. Upon return it will | |
2049 | * contain the body portion of the record (minus the | |
2050 | * RID and len). | |
2051 | * len buffer length (in bytes, should match record length) | |
2052 | * | |
2053 | * Returns: | |
2054 | * 0 success | |
2055 | * >0 f/w reported error - f/w status code | |
2056 | * <0 driver reported error | |
2057 | * -ENODATA length mismatch between argument and retrieved | |
2058 | * record. | |
2059 | * | |
2060 | * Side effects: | |
2061 | * | |
2062 | * Call context: | |
2063 | * process | |
2064 | *---------------------------------------------------------------- | |
2065 | */ | |
5a2214e2 | 2066 | int hfa384x_drvr_getconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len) |
00b3ed16 | 2067 | { |
102db1fc | 2068 | return hfa384x_dorrid_wait(hw, rid, buf, len); |
00b3ed16 GKH |
2069 | } |
2070 | ||
00b3ed16 GKH |
2071 | /*---------------------------------------------------------------- |
2072 | * hfa384x_drvr_setconfig_async | |
2073 | * | |
2074 | * Performs the sequence necessary to write a config/info item. | |
2075 | * | |
2076 | * Arguments: | |
2077 | * hw device structure | |
2078 | * rid config/info record id (in host order) | |
2079 | * buf host side record buffer | |
2080 | * len buffer length (in bytes) | |
2081 | * usercb completion callback | |
2082 | * usercb_data completion callback argument | |
2083 | * | |
2084 | * Returns: | |
2085 | * 0 success | |
2086 | * >0 f/w reported error - f/w status code | |
2087 | * <0 driver reported error | |
2088 | * | |
2089 | * Side effects: | |
2090 | * | |
2091 | * Call context: | |
2092 | * process | |
d3fcb8a2 SP |
2093 | *---------------------------------------------------------------- |
2094 | */ | |
00b3ed16 | 2095 | int |
5a2214e2 | 2096 | hfa384x_drvr_setconfig_async(struct hfa384x *hw, |
21dc0f89 MM |
2097 | u16 rid, |
2098 | void *buf, | |
2099 | u16 len, ctlx_usercb_t usercb, void *usercb_data) | |
00b3ed16 GKH |
2100 | { |
2101 | return hfa384x_dowrid_async(hw, rid, buf, len, | |
2102 | hfa384x_cb_status, usercb, usercb_data); | |
2103 | } | |
2104 | ||
00b3ed16 | 2105 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2106 | * hfa384x_drvr_ramdl_disable |
2107 | * | |
2108 | * Ends the ram download state. | |
2109 | * | |
2110 | * Arguments: | |
2111 | * hw device structure | |
2112 | * | |
2113 | * Returns: | |
2114 | * 0 success | |
2115 | * >0 f/w reported error - f/w status code | |
2116 | * <0 driver reported error | |
2117 | * | |
2118 | * Side effects: | |
2119 | * | |
2120 | * Call context: | |
2121 | * process | |
2122 | *---------------------------------------------------------------- | |
2123 | */ | |
5a2214e2 | 2124 | int hfa384x_drvr_ramdl_disable(struct hfa384x *hw) |
00b3ed16 | 2125 | { |
00b3ed16 | 2126 | /* Check that we're already in the download state */ |
21dc0f89 | 2127 | if (hw->dlstate != HFA384x_DLSTATE_RAMENABLED) |
00b3ed16 | 2128 | return -EINVAL; |
00b3ed16 | 2129 | |
a7cf7bae | 2130 | pr_debug("ramdl_disable()\n"); |
00b3ed16 GKH |
2131 | |
2132 | /* There isn't much we can do at this point, so I don't */ | |
2133 | /* bother w/ the return value */ | |
21dc0f89 | 2134 | hfa384x_cmd_download(hw, HFA384x_PROGMODE_DISABLE, 0, 0, 0); |
00b3ed16 GKH |
2135 | hw->dlstate = HFA384x_DLSTATE_DISABLED; |
2136 | ||
00b3ed16 GKH |
2137 | return 0; |
2138 | } | |
2139 | ||
00b3ed16 | 2140 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2141 | * hfa384x_drvr_ramdl_enable |
2142 | * | |
2143 | * Begins the ram download state. Checks to see that we're not | |
2144 | * already in a download state and that a port isn't enabled. | |
2145 | * Sets the download state and calls cmd_download with the | |
2146 | * ENABLE_VOLATILE subcommand and the exeaddr argument. | |
2147 | * | |
2148 | * Arguments: | |
2149 | * hw device structure | |
2150 | * exeaddr the card execution address that will be | |
2151 | * jumped to when ramdl_disable() is called | |
2152 | * (host order). | |
2153 | * | |
2154 | * Returns: | |
2155 | * 0 success | |
2156 | * >0 f/w reported error - f/w status code | |
2157 | * <0 driver reported error | |
2158 | * | |
2159 | * Side effects: | |
2160 | * | |
2161 | * Call context: | |
2162 | * process | |
2163 | *---------------------------------------------------------------- | |
2164 | */ | |
5a2214e2 | 2165 | int hfa384x_drvr_ramdl_enable(struct hfa384x *hw, u32 exeaddr) |
00b3ed16 | 2166 | { |
21dc0f89 MM |
2167 | int result = 0; |
2168 | u16 lowaddr; | |
2169 | u16 hiaddr; | |
2170 | int i; | |
8a251b55 | 2171 | |
00b3ed16 | 2172 | /* Check that a port isn't active */ |
21dc0f89 MM |
2173 | for (i = 0; i < HFA384x_PORTID_MAX; i++) { |
2174 | if (hw->port_enabled[i]) { | |
263b8bb9 | 2175 | netdev_err(hw->wlandev->netdev, |
3f2d6564 | 2176 | "Can't download with a macport enabled.\n"); |
00b3ed16 GKH |
2177 | return -EINVAL; |
2178 | } | |
2179 | } | |
2180 | ||
2181 | /* Check that we're not already in a download state */ | |
21dc0f89 | 2182 | if (hw->dlstate != HFA384x_DLSTATE_DISABLED) { |
5a919c78 SP |
2183 | netdev_err(hw->wlandev->netdev, |
2184 | "Download state not disabled.\n"); | |
00b3ed16 GKH |
2185 | return -EINVAL; |
2186 | } | |
2187 | ||
a7cf7bae | 2188 | pr_debug("ramdl_enable, exeaddr=0x%08x\n", exeaddr); |
00b3ed16 GKH |
2189 | |
2190 | /* Call the download(1,addr) function */ | |
2191 | lowaddr = HFA384x_ADDR_CMD_MKOFF(exeaddr); | |
21dc0f89 | 2192 | hiaddr = HFA384x_ADDR_CMD_MKPAGE(exeaddr); |
00b3ed16 GKH |
2193 | |
2194 | result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_RAM, | |
21dc0f89 | 2195 | lowaddr, hiaddr, 0); |
00b3ed16 | 2196 | |
21dc0f89 | 2197 | if (result == 0) { |
00b3ed16 GKH |
2198 | /* Set the download state */ |
2199 | hw->dlstate = HFA384x_DLSTATE_RAMENABLED; | |
2200 | } else { | |
75f49e07 MT |
2201 | pr_debug("cmd_download(0x%04x, 0x%04x) failed, result=%d.\n", |
2202 | lowaddr, hiaddr, result); | |
00b3ed16 GKH |
2203 | } |
2204 | ||
00b3ed16 GKH |
2205 | return result; |
2206 | } | |
2207 | ||
00b3ed16 | 2208 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2209 | * hfa384x_drvr_ramdl_write |
2210 | * | |
2211 | * Performs a RAM download of a chunk of data. First checks to see | |
2212 | * that we're in the RAM download state, then uses the [read|write]mem USB | |
2213 | * commands to 1) copy the data, 2) readback and compare. The download | |
2214 | * state is unaffected. When all data has been written using | |
2215 | * this function, call drvr_ramdl_disable() to end the download state | |
2216 | * and restart the MAC. | |
2217 | * | |
2218 | * Arguments: | |
2219 | * hw device structure | |
2220 | * daddr Card address to write to. (host order) | |
2221 | * buf Ptr to data to write. | |
2222 | * len Length of data (host order). | |
2223 | * | |
2224 | * Returns: | |
2225 | * 0 success | |
2226 | * >0 f/w reported error - f/w status code | |
2227 | * <0 driver reported error | |
2228 | * | |
2229 | * Side effects: | |
2230 | * | |
2231 | * Call context: | |
2232 | * process | |
2233 | *---------------------------------------------------------------- | |
2234 | */ | |
5a2214e2 | 2235 | int hfa384x_drvr_ramdl_write(struct hfa384x *hw, u32 daddr, void *buf, u32 len) |
00b3ed16 | 2236 | { |
21dc0f89 MM |
2237 | int result = 0; |
2238 | int nwrites; | |
2239 | u8 *data = buf; | |
2240 | int i; | |
2241 | u32 curraddr; | |
2242 | u16 currpage; | |
2243 | u16 curroffset; | |
2244 | u16 currlen; | |
8a251b55 | 2245 | |
00b3ed16 | 2246 | /* Check that we're in the ram download state */ |
21dc0f89 | 2247 | if (hw->dlstate != HFA384x_DLSTATE_RAMENABLED) |
00b3ed16 | 2248 | return -EINVAL; |
00b3ed16 | 2249 | |
a2120136 SSA |
2250 | netdev_info(hw->wlandev->netdev, "Writing %d bytes to ram @0x%06x\n", |
2251 | len, daddr); | |
00b3ed16 GKH |
2252 | |
2253 | /* How many dowmem calls? */ | |
2254 | nwrites = len / HFA384x_USB_RWMEM_MAXLEN; | |
2255 | nwrites += len % HFA384x_USB_RWMEM_MAXLEN ? 1 : 0; | |
2256 | ||
2257 | /* Do blocking wmem's */ | |
21dc0f89 | 2258 | for (i = 0; i < nwrites; i++) { |
00b3ed16 GKH |
2259 | /* make address args */ |
2260 | curraddr = daddr + (i * HFA384x_USB_RWMEM_MAXLEN); | |
2261 | currpage = HFA384x_ADDR_CMD_MKPAGE(curraddr); | |
2262 | curroffset = HFA384x_ADDR_CMD_MKOFF(curraddr); | |
2263 | currlen = len - (i * HFA384x_USB_RWMEM_MAXLEN); | |
21dc0f89 | 2264 | if (currlen > HFA384x_USB_RWMEM_MAXLEN) |
00b3ed16 | 2265 | currlen = HFA384x_USB_RWMEM_MAXLEN; |
00b3ed16 | 2266 | |
21dc0f89 MM |
2267 | /* Do blocking ctlx */ |
2268 | result = hfa384x_dowmem_wait(hw, | |
2269 | currpage, | |
2270 | curroffset, | |
2271 | data + | |
2272 | (i * HFA384x_USB_RWMEM_MAXLEN), | |
2273 | currlen); | |
00b3ed16 | 2274 | |
21dc0f89 MM |
2275 | if (result) |
2276 | break; | |
00b3ed16 GKH |
2277 | |
2278 | /* TODO: We really should have a readback. */ | |
2279 | } | |
2280 | ||
00b3ed16 GKH |
2281 | return result; |
2282 | } | |
2283 | ||
00b3ed16 | 2284 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2285 | * hfa384x_drvr_readpda |
2286 | * | |
2287 | * Performs the sequence to read the PDA space. Note there is no | |
2288 | * drvr_writepda() function. Writing a PDA is | |
2289 | * generally implemented by a calling component via calls to | |
2290 | * cmd_download and writing to the flash download buffer via the | |
2291 | * aux regs. | |
2292 | * | |
2293 | * Arguments: | |
2294 | * hw device structure | |
2295 | * buf buffer to store PDA in | |
2296 | * len buffer length | |
2297 | * | |
2298 | * Returns: | |
2299 | * 0 success | |
2300 | * >0 f/w reported error - f/w status code | |
2301 | * <0 driver reported error | |
2302 | * -ETIMEDOUT timeout waiting for the cmd regs to become | |
2303 | * available, or waiting for the control reg | |
2304 | * to indicate the Aux port is enabled. | |
2305 | * -ENODATA the buffer does NOT contain a valid PDA. | |
2306 | * Either the card PDA is bad, or the auxdata | |
2307 | * reads are giving us garbage. | |
2308 | * | |
2309 | * | |
2310 | * Side effects: | |
2311 | * | |
2312 | * Call context: | |
2313 | * process or non-card interrupt. | |
2314 | *---------------------------------------------------------------- | |
2315 | */ | |
5a2214e2 | 2316 | int hfa384x_drvr_readpda(struct hfa384x *hw, void *buf, unsigned int len) |
00b3ed16 | 2317 | { |
21dc0f89 | 2318 | int result = 0; |
a18ffdf4 | 2319 | __le16 *pda = buf; |
21dc0f89 MM |
2320 | int pdaok = 0; |
2321 | int morepdrs = 1; | |
2322 | int currpdr = 0; /* word offset of the current pdr */ | |
2323 | size_t i; | |
2324 | u16 pdrlen; /* pdr length in bytes, host order */ | |
2325 | u16 pdrcode; /* pdr code, host order */ | |
2326 | u16 currpage; | |
2327 | u16 curroffset; | |
00b3ed16 | 2328 | struct pdaloc { |
21dc0f89 MM |
2329 | u32 cardaddr; |
2330 | u16 auxctl; | |
2331 | } pdaloc[] = { | |
2332 | { | |
2333 | HFA3842_PDA_BASE, 0}, { | |
2334 | HFA3841_PDA_BASE, 0}, { | |
2335 | HFA3841_PDA_BOGUS_BASE, 0} | |
00b3ed16 GKH |
2336 | }; |
2337 | ||
00b3ed16 | 2338 | /* Read the pda from each known address. */ |
21dc0f89 | 2339 | for (i = 0; i < ARRAY_SIZE(pdaloc); i++) { |
00b3ed16 GKH |
2340 | /* Make address */ |
2341 | currpage = HFA384x_ADDR_CMD_MKPAGE(pdaloc[i].cardaddr); | |
2342 | curroffset = HFA384x_ADDR_CMD_MKOFF(pdaloc[i].cardaddr); | |
2343 | ||
631c8dec EH |
2344 | /* units of bytes */ |
2345 | result = hfa384x_dormem_wait(hw, currpage, curroffset, buf, | |
d1866af1 | 2346 | len); |
00b3ed16 GKH |
2347 | |
2348 | if (result) { | |
263b8bb9 | 2349 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
2350 | "Read from index %zd failed, continuing\n", |
2351 | i); | |
00b3ed16 GKH |
2352 | continue; |
2353 | } | |
2354 | ||
2355 | /* Test for garbage */ | |
2356 | pdaok = 1; /* initially assume good */ | |
2357 | morepdrs = 1; | |
21dc0f89 | 2358 | while (pdaok && morepdrs) { |
18c7f792 MM |
2359 | pdrlen = le16_to_cpu(pda[currpdr]) * 2; |
2360 | pdrcode = le16_to_cpu(pda[currpdr + 1]); | |
00b3ed16 | 2361 | /* Test the record length */ |
21dc0f89 | 2362 | if (pdrlen > HFA384x_PDR_LEN_MAX || pdrlen == 0) { |
a2120136 SSA |
2363 | netdev_err(hw->wlandev->netdev, |
2364 | "pdrlen invalid=%d\n", pdrlen); | |
00b3ed16 GKH |
2365 | pdaok = 0; |
2366 | break; | |
2367 | } | |
2368 | /* Test the code */ | |
21dc0f89 | 2369 | if (!hfa384x_isgood_pdrcode(pdrcode)) { |
263b8bb9 | 2370 | netdev_err(hw->wlandev->netdev, "pdrcode invalid=%d\n", |
3f2d6564 | 2371 | pdrcode); |
00b3ed16 GKH |
2372 | pdaok = 0; |
2373 | break; | |
2374 | } | |
2375 | /* Test for completion */ | |
21dc0f89 | 2376 | if (pdrcode == HFA384x_PDR_END_OF_PDA) |
00b3ed16 | 2377 | morepdrs = 0; |
00b3ed16 GKH |
2378 | |
2379 | /* Move to the next pdr (if necessary) */ | |
21dc0f89 | 2380 | if (morepdrs) { |
00b3ed16 | 2381 | /* note the access to pda[], need words here */ |
18c7f792 | 2382 | currpdr += le16_to_cpu(pda[currpdr]) + 1; |
00b3ed16 GKH |
2383 | } |
2384 | } | |
21dc0f89 | 2385 | if (pdaok) { |
263b8bb9 | 2386 | netdev_info(hw->wlandev->netdev, |
3f2d6564 SSA |
2387 | "PDA Read from 0x%08x in %s space.\n", |
2388 | pdaloc[i].cardaddr, | |
2389 | pdaloc[i].auxctl == 0 ? "EXTDS" : | |
2390 | pdaloc[i].auxctl == 1 ? "NV" : | |
2391 | pdaloc[i].auxctl == 2 ? "PHY" : | |
2392 | pdaloc[i].auxctl == 3 ? "ICSRAM" : | |
2393 | "<bogus auxctl>"); | |
00b3ed16 GKH |
2394 | break; |
2395 | } | |
2396 | } | |
2397 | result = pdaok ? 0 : -ENODATA; | |
2398 | ||
21dc0f89 | 2399 | if (result) |
a7cf7bae | 2400 | pr_debug("Failure: pda is not okay\n"); |
00b3ed16 | 2401 | |
00b3ed16 GKH |
2402 | return result; |
2403 | } | |
2404 | ||
00b3ed16 | 2405 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2406 | * hfa384x_drvr_setconfig |
2407 | * | |
2408 | * Performs the sequence necessary to write a config/info item. | |
2409 | * | |
2410 | * Arguments: | |
2411 | * hw device structure | |
2412 | * rid config/info record id (in host order) | |
2413 | * buf host side record buffer | |
2414 | * len buffer length (in bytes) | |
2415 | * | |
2416 | * Returns: | |
2417 | * 0 success | |
2418 | * >0 f/w reported error - f/w status code | |
2419 | * <0 driver reported error | |
2420 | * | |
2421 | * Side effects: | |
2422 | * | |
2423 | * Call context: | |
2424 | * process | |
2425 | *---------------------------------------------------------------- | |
2426 | */ | |
5a2214e2 | 2427 | int hfa384x_drvr_setconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len) |
00b3ed16 GKH |
2428 | { |
2429 | return hfa384x_dowrid_wait(hw, rid, buf, len); | |
2430 | } | |
2431 | ||
2432 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2433 | * hfa384x_drvr_start |
2434 | * | |
2435 | * Issues the MAC initialize command, sets up some data structures, | |
2436 | * and enables the interrupts. After this function completes, the | |
2437 | * low-level stuff should be ready for any/all commands. | |
2438 | * | |
2439 | * Arguments: | |
2440 | * hw device structure | |
2441 | * Returns: | |
2442 | * 0 success | |
2443 | * >0 f/w reported error - f/w status code | |
2444 | * <0 driver reported error | |
2445 | * | |
2446 | * Side effects: | |
2447 | * | |
2448 | * Call context: | |
2449 | * process | |
2450 | *---------------------------------------------------------------- | |
2451 | */ | |
5a2214e2 | 2452 | int hfa384x_drvr_start(struct hfa384x *hw) |
00b3ed16 | 2453 | { |
21dc0f89 MM |
2454 | int result, result1, result2; |
2455 | u16 status; | |
00b3ed16 GKH |
2456 | |
2457 | might_sleep(); | |
2458 | ||
7b7e7e84 RK |
2459 | /* Clear endpoint stalls - but only do this if the endpoint |
2460 | * is showing a stall status. Some prism2 cards seem to behave | |
2461 | * badly if a clear_halt is called when the endpoint is already | |
2462 | * ok | |
2463 | */ | |
21dc0f89 MM |
2464 | result = |
2465 | usb_get_status(hw->usb, USB_RECIP_ENDPOINT, hw->endp_in, &status); | |
7b7e7e84 | 2466 | if (result < 0) { |
263b8bb9 | 2467 | netdev_err(hw->wlandev->netdev, "Cannot get bulk in endpoint status.\n"); |
7b7e7e84 RK |
2468 | goto done; |
2469 | } | |
21dc0f89 | 2470 | if ((status == 1) && usb_clear_halt(hw->usb, hw->endp_in)) |
263b8bb9 | 2471 | netdev_err(hw->wlandev->netdev, "Failed to reset bulk in endpoint.\n"); |
00b3ed16 | 2472 | |
21dc0f89 MM |
2473 | result = |
2474 | usb_get_status(hw->usb, USB_RECIP_ENDPOINT, hw->endp_out, &status); | |
7b7e7e84 | 2475 | if (result < 0) { |
263b8bb9 | 2476 | netdev_err(hw->wlandev->netdev, "Cannot get bulk out endpoint status.\n"); |
7b7e7e84 RK |
2477 | goto done; |
2478 | } | |
21dc0f89 | 2479 | if ((status == 1) && usb_clear_halt(hw->usb, hw->endp_out)) |
263b8bb9 | 2480 | netdev_err(hw->wlandev->netdev, "Failed to reset bulk out endpoint.\n"); |
00b3ed16 GKH |
2481 | |
2482 | /* Synchronous unlink, in case we're trying to restart the driver */ | |
2483 | usb_kill_urb(&hw->rx_urb); | |
2484 | ||
2485 | /* Post the IN urb */ | |
2486 | result = submit_rx_urb(hw, GFP_KERNEL); | |
2487 | if (result != 0) { | |
263b8bb9 | 2488 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
2489 | "Fatal, failed to submit RX URB, result=%d\n", |
2490 | result); | |
00b3ed16 GKH |
2491 | goto done; |
2492 | } | |
2493 | ||
7b7e7e84 RK |
2494 | /* Call initialize twice, with a 1 second sleep in between. |
2495 | * This is a nasty work-around since many prism2 cards seem to | |
2496 | * need time to settle after an init from cold. The second | |
2497 | * call to initialize in theory is not necessary - but we call | |
2498 | * it anyway as a double insurance policy: | |
2499 | * 1) If the first init should fail, the second may well succeed | |
2500 | * and the card can still be used | |
2501 | * 2) It helps ensures all is well with the card after the first | |
2502 | * init and settle time. | |
2503 | */ | |
2504 | result1 = hfa384x_cmd_initialize(hw); | |
2505 | msleep(1000); | |
96b1971a SSA |
2506 | result = hfa384x_cmd_initialize(hw); |
2507 | result2 = result; | |
7b7e7e84 RK |
2508 | if (result1 != 0) { |
2509 | if (result2 != 0) { | |
263b8bb9 | 2510 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
2511 | "cmd_initialize() failed on two attempts, results %d and %d\n", |
2512 | result1, result2); | |
7b7e7e84 RK |
2513 | usb_kill_urb(&hw->rx_urb); |
2514 | goto done; | |
2515 | } else { | |
75f49e07 MT |
2516 | pr_debug("First cmd_initialize() failed (result %d),\n", |
2517 | result1); | |
4ffab688 | 2518 | pr_debug("but second attempt succeeded. All should be ok\n"); |
7b7e7e84 RK |
2519 | } |
2520 | } else if (result2 != 0) { | |
263b8bb9 | 2521 | netdev_warn(hw->wlandev->netdev, "First cmd_initialize() succeeded, but second attempt failed (result=%d)\n", |
3f2d6564 | 2522 | result2); |
263b8bb9 | 2523 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 | 2524 | "Most likely the card will be functional\n"); |
21dc0f89 | 2525 | goto done; |
00b3ed16 GKH |
2526 | } |
2527 | ||
2528 | hw->state = HFA384x_STATE_RUNNING; | |
2529 | ||
2530 | done: | |
00b3ed16 GKH |
2531 | return result; |
2532 | } | |
2533 | ||
00b3ed16 | 2534 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
2535 | * hfa384x_drvr_stop |
2536 | * | |
2537 | * Shuts down the MAC to the point where it is safe to unload the | |
2538 | * driver. Any subsystem that may be holding a data or function | |
2539 | * ptr into the driver must be cleared/deinitialized. | |
2540 | * | |
2541 | * Arguments: | |
2542 | * hw device structure | |
2543 | * Returns: | |
2544 | * 0 success | |
2545 | * >0 f/w reported error - f/w status code | |
2546 | * <0 driver reported error | |
2547 | * | |
2548 | * Side effects: | |
2549 | * | |
2550 | * Call context: | |
2551 | * process | |
2552 | *---------------------------------------------------------------- | |
2553 | */ | |
5a2214e2 | 2554 | int hfa384x_drvr_stop(struct hfa384x *hw) |
00b3ed16 | 2555 | { |
21dc0f89 | 2556 | int i; |
00b3ed16 GKH |
2557 | |
2558 | might_sleep(); | |
2559 | ||
2560 | /* There's no need for spinlocks here. The USB "disconnect" | |
2561 | * function sets this "removed" flag and then calls us. | |
2562 | */ | |
21dc0f89 | 2563 | if (!hw->wlandev->hwremoved) { |
00b3ed16 GKH |
2564 | /* Call initialize to leave the MAC in its 'reset' state */ |
2565 | hfa384x_cmd_initialize(hw); | |
2566 | ||
2567 | /* Cancel the rxurb */ | |
2568 | usb_kill_urb(&hw->rx_urb); | |
2569 | } | |
2570 | ||
2571 | hw->link_status = HFA384x_LINK_NOTCONNECTED; | |
2572 | hw->state = HFA384x_STATE_INIT; | |
2573 | ||
2574 | del_timer_sync(&hw->commsqual_timer); | |
2575 | ||
2576 | /* Clear all the port status */ | |
21dc0f89 | 2577 | for (i = 0; i < HFA384x_NUMPORTS_MAX; i++) |
00b3ed16 | 2578 | hw->port_enabled[i] = 0; |
00b3ed16 | 2579 | |
4764ca98 | 2580 | return 0; |
00b3ed16 GKH |
2581 | } |
2582 | ||
2583 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2584 | * hfa384x_drvr_txframe |
2585 | * | |
2586 | * Takes a frame from prism2sta and queues it for transmission. | |
2587 | * | |
2588 | * Arguments: | |
2589 | * hw device structure | |
2590 | * skb packet buffer struct. Contains an 802.11 | |
2591 | * data frame. | |
2592 | * p80211_hdr points to the 802.11 header for the packet. | |
2593 | * Returns: | |
2594 | * 0 Success and more buffs available | |
2595 | * 1 Success but no more buffs | |
2596 | * 2 Allocation failure | |
2597 | * 4 Buffer full or queue busy | |
2598 | * | |
2599 | * Side effects: | |
2600 | * | |
2601 | * Call context: | |
2602 | * interrupt | |
2603 | *---------------------------------------------------------------- | |
2604 | */ | |
5a2214e2 | 2605 | int hfa384x_drvr_txframe(struct hfa384x *hw, struct sk_buff *skb, |
93df38e5 | 2606 | union p80211_hdr *p80211_hdr, |
51e4896a | 2607 | struct p80211_metawep *p80211_wep) |
00b3ed16 | 2608 | { |
eb76afc9 | 2609 | int usbpktlen = sizeof(struct hfa384x_tx_frame); |
21dc0f89 MM |
2610 | int result; |
2611 | int ret; | |
2612 | char *ptr; | |
00b3ed16 | 2613 | |
00b3ed16 | 2614 | if (hw->tx_urb.status == -EINPROGRESS) { |
263b8bb9 | 2615 | netdev_warn(hw->wlandev->netdev, "TX URB already in use\n"); |
00b3ed16 GKH |
2616 | result = 3; |
2617 | goto exit; | |
2618 | } | |
2619 | ||
2620 | /* Build Tx frame structure */ | |
2621 | /* Set up the control field */ | |
2622 | memset(&hw->txbuff.txfrm.desc, 0, sizeof(hw->txbuff.txfrm.desc)); | |
2623 | ||
2624 | /* Setup the usb type field */ | |
18c7f792 | 2625 | hw->txbuff.type = cpu_to_le16(HFA384x_USB_TXFRM); |
00b3ed16 GKH |
2626 | |
2627 | /* Set up the sw_support field to identify this frame */ | |
2628 | hw->txbuff.txfrm.desc.sw_support = 0x0123; | |
2629 | ||
2630 | /* Tx complete and Tx exception disable per dleach. Might be causing | |
2631 | * buf depletion | |
2632 | */ | |
21dc0f89 | 2633 | /* #define DOEXC SLP -- doboth breaks horribly under load, doexc less so. */ |
00b3ed16 GKH |
2634 | #if defined(DOBOTH) |
2635 | hw->txbuff.txfrm.desc.tx_control = | |
21dc0f89 MM |
2636 | HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) | |
2637 | HFA384x_TX_TXEX_SET(1) | HFA384x_TX_TXOK_SET(1); | |
00b3ed16 GKH |
2638 | #elif defined(DOEXC) |
2639 | hw->txbuff.txfrm.desc.tx_control = | |
21dc0f89 MM |
2640 | HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) | |
2641 | HFA384x_TX_TXEX_SET(1) | HFA384x_TX_TXOK_SET(0); | |
00b3ed16 GKH |
2642 | #else |
2643 | hw->txbuff.txfrm.desc.tx_control = | |
21dc0f89 MM |
2644 | HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) | |
2645 | HFA384x_TX_TXEX_SET(0) | HFA384x_TX_TXOK_SET(0); | |
00b3ed16 GKH |
2646 | #endif |
2647 | hw->txbuff.txfrm.desc.tx_control = | |
18c7f792 | 2648 | cpu_to_le16(hw->txbuff.txfrm.desc.tx_control); |
00b3ed16 GKH |
2649 | |
2650 | /* copy the header over to the txdesc */ | |
3883cd56 | 2651 | memcpy(&hw->txbuff.txfrm.desc.frame_control, p80211_hdr, |
93df38e5 | 2652 | sizeof(union p80211_hdr)); |
00b3ed16 GKH |
2653 | |
2654 | /* if we're using host WEP, increase size by IV+ICV */ | |
2655 | if (p80211_wep->data) { | |
18c7f792 | 2656 | hw->txbuff.txfrm.desc.data_len = cpu_to_le16(skb->len + 8); |
21dc0f89 | 2657 | usbpktlen += 8; |
00b3ed16 | 2658 | } else { |
18c7f792 | 2659 | hw->txbuff.txfrm.desc.data_len = cpu_to_le16(skb->len); |
00b3ed16 GKH |
2660 | } |
2661 | ||
2662 | usbpktlen += skb->len; | |
2663 | ||
2664 | /* copy over the WEP IV if we are using host WEP */ | |
2665 | ptr = hw->txbuff.txfrm.data; | |
2666 | if (p80211_wep->data) { | |
2667 | memcpy(ptr, p80211_wep->iv, sizeof(p80211_wep->iv)); | |
21dc0f89 | 2668 | ptr += sizeof(p80211_wep->iv); |
00b3ed16 GKH |
2669 | memcpy(ptr, p80211_wep->data, skb->len); |
2670 | } else { | |
2671 | memcpy(ptr, skb->data, skb->len); | |
2672 | } | |
2673 | /* copy over the packet data */ | |
21dc0f89 | 2674 | ptr += skb->len; |
00b3ed16 GKH |
2675 | |
2676 | /* copy over the WEP ICV if we are using host WEP */ | |
21dc0f89 | 2677 | if (p80211_wep->data) |
00b3ed16 | 2678 | memcpy(ptr, p80211_wep->icv, sizeof(p80211_wep->icv)); |
00b3ed16 GKH |
2679 | |
2680 | /* Send the USB packet */ | |
3883cd56 | 2681 | usb_fill_bulk_urb(&hw->tx_urb, hw->usb, |
21dc0f89 | 2682 | hw->endp_out, |
3883cd56 | 2683 | &hw->txbuff, ROUNDUP64(usbpktlen), |
21dc0f89 | 2684 | hfa384x_usbout_callback, hw->wlandev); |
00b3ed16 GKH |
2685 | hw->tx_urb.transfer_flags |= USB_QUEUE_BULK; |
2686 | ||
2687 | result = 1; | |
2688 | ret = submit_tx_urb(hw, &hw->tx_urb, GFP_ATOMIC); | |
21dc0f89 | 2689 | if (ret != 0) { |
a2120136 SSA |
2690 | netdev_err(hw->wlandev->netdev, |
2691 | "submit_tx_urb() failed, error=%d\n", ret); | |
00b3ed16 GKH |
2692 | result = 3; |
2693 | } | |
2694 | ||
21dc0f89 | 2695 | exit: |
00b3ed16 GKH |
2696 | return result; |
2697 | } | |
2698 | ||
c9573a8d | 2699 | void hfa384x_tx_timeout(struct wlandevice *wlandev) |
00b3ed16 | 2700 | { |
5a2214e2 | 2701 | struct hfa384x *hw = wlandev->priv; |
00b3ed16 GKH |
2702 | unsigned long flags; |
2703 | ||
00b3ed16 GKH |
2704 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
2705 | ||
59457897 DC |
2706 | if (!hw->wlandev->hwremoved) { |
2707 | int sched; | |
2708 | ||
2709 | sched = !test_and_set_bit(WORK_TX_HALT, &hw->usb_flags); | |
2710 | sched |= !test_and_set_bit(WORK_RX_HALT, &hw->usb_flags); | |
2711 | if (sched) | |
2712 | schedule_work(&hw->usb_work); | |
00b3ed16 GKH |
2713 | } |
2714 | ||
2715 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
00b3ed16 GKH |
2716 | } |
2717 | ||
2718 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2719 | * hfa384x_usbctlx_reaper_task |
2720 | * | |
2721 | * Tasklet to delete dead CTLX objects | |
2722 | * | |
2723 | * Arguments: | |
2724 | * data ptr to a struct hfa384x | |
2725 | * | |
2726 | * Returns: | |
2727 | * | |
2728 | * Call context: | |
2729 | * Interrupt | |
2730 | *---------------------------------------------------------------- | |
2731 | */ | |
00b3ed16 GKH |
2732 | static void hfa384x_usbctlx_reaper_task(unsigned long data) |
2733 | { | |
5a2214e2 | 2734 | struct hfa384x *hw = (struct hfa384x *)data; |
a10d36b0 | 2735 | struct hfa384x_usbctlx *ctlx, *temp; |
21dc0f89 | 2736 | unsigned long flags; |
00b3ed16 | 2737 | |
00b3ed16 GKH |
2738 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
2739 | ||
2740 | /* This list is guaranteed to be empty if someone | |
2741 | * has unplugged the adapter. | |
2742 | */ | |
57477bf0 | 2743 | list_for_each_entry_safe(ctlx, temp, &hw->ctlxq.reapable, list) { |
00b3ed16 GKH |
2744 | list_del(&ctlx->list); |
2745 | kfree(ctlx); | |
2746 | } | |
2747 | ||
2748 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
00b3ed16 GKH |
2749 | } |
2750 | ||
2751 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2752 | * hfa384x_usbctlx_completion_task |
2753 | * | |
2754 | * Tasklet to call completion handlers for returned CTLXs | |
2755 | * | |
2756 | * Arguments: | |
2757 | * data ptr to struct hfa384x | |
2758 | * | |
2759 | * Returns: | |
2760 | * Nothing | |
2761 | * | |
2762 | * Call context: | |
2763 | * Interrupt | |
2764 | *---------------------------------------------------------------- | |
2765 | */ | |
00b3ed16 GKH |
2766 | static void hfa384x_usbctlx_completion_task(unsigned long data) |
2767 | { | |
5a2214e2 | 2768 | struct hfa384x *hw = (struct hfa384x *)data; |
a10d36b0 | 2769 | struct hfa384x_usbctlx *ctlx, *temp; |
00b3ed16 GKH |
2770 | unsigned long flags; |
2771 | ||
2772 | int reap = 0; | |
2773 | ||
00b3ed16 GKH |
2774 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
2775 | ||
2776 | /* This list is guaranteed to be empty if someone | |
2777 | * has unplugged the adapter ... | |
2778 | */ | |
57477bf0 | 2779 | list_for_each_entry_safe(ctlx, temp, &hw->ctlxq.completing, list) { |
00b3ed16 GKH |
2780 | /* Call the completion function that this |
2781 | * command was assigned, assuming it has one. | |
2782 | */ | |
02e02048 | 2783 | if (ctlx->cmdcb) { |
00b3ed16 GKH |
2784 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
2785 | ctlx->cmdcb(hw, ctlx); | |
2786 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
2787 | ||
2788 | /* Make sure we don't try and complete | |
2789 | * this CTLX more than once! | |
2790 | */ | |
2791 | ctlx->cmdcb = NULL; | |
2792 | ||
2793 | /* Did someone yank the adapter out | |
2794 | * while our list was (briefly) unlocked? | |
2795 | */ | |
21dc0f89 | 2796 | if (hw->wlandev->hwremoved) { |
00b3ed16 GKH |
2797 | reap = 0; |
2798 | break; | |
2799 | } | |
2800 | } | |
2801 | ||
2802 | /* | |
2803 | * "Reapable" CTLXs are ones which don't have any | |
2804 | * threads waiting for them to die. Hence they must | |
2805 | * be delivered to The Reaper! | |
2806 | */ | |
21dc0f89 | 2807 | if (ctlx->reapable) { |
00b3ed16 GKH |
2808 | /* Move the CTLX off the "completing" list (hopefully) |
2809 | * on to the "reapable" list where the reaper task | |
2810 | * can find it. And "reapable" means that this CTLX | |
2811 | * isn't sitting on a wait-queue somewhere. | |
2812 | */ | |
2813 | list_move_tail(&ctlx->list, &hw->ctlxq.reapable); | |
2814 | reap = 1; | |
2815 | } | |
2816 | ||
2817 | complete(&ctlx->done); | |
2818 | } | |
2819 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
2820 | ||
2821 | if (reap) | |
2822 | tasklet_schedule(&hw->reaper_bh); | |
00b3ed16 GKH |
2823 | } |
2824 | ||
2825 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2826 | * unlocked_usbctlx_cancel_async |
2827 | * | |
2828 | * Mark the CTLX dead asynchronously, and ensure that the | |
2829 | * next command on the queue is run afterwards. | |
2830 | * | |
2831 | * Arguments: | |
2832 | * hw ptr to the struct hfa384x structure | |
2833 | * ctlx ptr to a CTLX structure | |
2834 | * | |
2835 | * Returns: | |
2836 | * 0 the CTLX's URB is inactive | |
2837 | * -EINPROGRESS the URB is currently being unlinked | |
2838 | * | |
2839 | * Call context: | |
2840 | * Either process or interrupt, but presumably interrupt | |
2841 | *---------------------------------------------------------------- | |
2842 | */ | |
5a2214e2 | 2843 | static int unlocked_usbctlx_cancel_async(struct hfa384x *hw, |
a10d36b0 | 2844 | struct hfa384x_usbctlx *ctlx) |
00b3ed16 GKH |
2845 | { |
2846 | int ret; | |
2847 | ||
00b3ed16 GKH |
2848 | /* |
2849 | * Try to delete the URB containing our request packet. | |
2850 | * If we succeed, then its completion handler will be | |
2851 | * called with a status of -ECONNRESET. | |
2852 | */ | |
2853 | hw->ctlx_urb.transfer_flags |= URB_ASYNC_UNLINK; | |
2854 | ret = usb_unlink_urb(&hw->ctlx_urb); | |
2855 | ||
2856 | if (ret != -EINPROGRESS) { | |
2857 | /* | |
2858 | * The OUT URB had either already completed | |
2859 | * or was still in the pending queue, so the | |
2860 | * URB's completion function will not be called. | |
2861 | * We will have to complete the CTLX ourselves. | |
2862 | */ | |
2863 | ctlx->state = CTLX_REQ_FAILED; | |
2864 | unlocked_usbctlx_complete(hw, ctlx); | |
2865 | ret = 0; | |
2866 | } | |
2867 | ||
00b3ed16 GKH |
2868 | return ret; |
2869 | } | |
2870 | ||
2871 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2872 | * unlocked_usbctlx_complete |
2873 | * | |
2874 | * A CTLX has completed. It may have been successful, it may not | |
2875 | * have been. At this point, the CTLX should be quiescent. The URBs | |
2876 | * aren't active and the timers should have been stopped. | |
2877 | * | |
2878 | * The CTLX is migrated to the "completing" queue, and the completing | |
2879 | * tasklet is scheduled. | |
2880 | * | |
2881 | * Arguments: | |
2882 | * hw ptr to a struct hfa384x structure | |
2883 | * ctlx ptr to a ctlx structure | |
2884 | * | |
2885 | * Returns: | |
2886 | * nothing | |
2887 | * | |
2888 | * Side effects: | |
2889 | * | |
2890 | * Call context: | |
2891 | * Either, assume interrupt | |
2892 | *---------------------------------------------------------------- | |
2893 | */ | |
5a919c78 SP |
2894 | static void unlocked_usbctlx_complete(struct hfa384x *hw, |
2895 | struct hfa384x_usbctlx *ctlx) | |
00b3ed16 | 2896 | { |
00b3ed16 GKH |
2897 | /* Timers have been stopped, and ctlx should be in |
2898 | * a terminal state. Retire it from the "active" | |
2899 | * queue. | |
2900 | */ | |
2901 | list_move_tail(&ctlx->list, &hw->ctlxq.completing); | |
2902 | tasklet_schedule(&hw->completion_bh); | |
2903 | ||
2904 | switch (ctlx->state) { | |
2905 | case CTLX_COMPLETE: | |
2906 | case CTLX_REQ_FAILED: | |
2907 | /* This are the correct terminating states. */ | |
2908 | break; | |
2909 | ||
2910 | default: | |
263b8bb9 | 2911 | netdev_err(hw->wlandev->netdev, "CTLX[%d] not in a terminating state(%s)\n", |
3f2d6564 SSA |
2912 | le16_to_cpu(ctlx->outbuf.type), |
2913 | ctlxstr(ctlx->state)); | |
00b3ed16 | 2914 | break; |
21dc0f89 | 2915 | } /* switch */ |
00b3ed16 GKH |
2916 | } |
2917 | ||
2918 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
2919 | * hfa384x_usbctlxq_run |
2920 | * | |
2921 | * Checks to see if the head item is running. If not, starts it. | |
2922 | * | |
2923 | * Arguments: | |
2924 | * hw ptr to struct hfa384x | |
2925 | * | |
2926 | * Returns: | |
2927 | * nothing | |
2928 | * | |
2929 | * Side effects: | |
2930 | * | |
2931 | * Call context: | |
2932 | * any | |
2933 | *---------------------------------------------------------------- | |
2934 | */ | |
5a2214e2 | 2935 | static void hfa384x_usbctlxq_run(struct hfa384x *hw) |
00b3ed16 | 2936 | { |
21dc0f89 | 2937 | unsigned long flags; |
00b3ed16 GKH |
2938 | |
2939 | /* acquire lock */ | |
2940 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
2941 | ||
2942 | /* Only one active CTLX at any one time, because there's no | |
2943 | * other (reliable) way to match the response URB to the | |
2944 | * correct CTLX. | |
2945 | * | |
2946 | * Don't touch any of these CTLXs if the hardware | |
2947 | * has been removed or the USB subsystem is stalled. | |
2948 | */ | |
21dc0f89 MM |
2949 | if (!list_empty(&hw->ctlxq.active) || |
2950 | test_bit(WORK_TX_HALT, &hw->usb_flags) || hw->wlandev->hwremoved) | |
00b3ed16 GKH |
2951 | goto unlock; |
2952 | ||
21dc0f89 | 2953 | while (!list_empty(&hw->ctlxq.pending)) { |
a10d36b0 | 2954 | struct hfa384x_usbctlx *head; |
21dc0f89 | 2955 | int result; |
00b3ed16 GKH |
2956 | |
2957 | /* This is the first pending command */ | |
2958 | head = list_entry(hw->ctlxq.pending.next, | |
a10d36b0 | 2959 | struct hfa384x_usbctlx, list); |
00b3ed16 GKH |
2960 | |
2961 | /* We need to split this off to avoid a race condition */ | |
2962 | list_move_tail(&head->list, &hw->ctlxq.active); | |
2963 | ||
2964 | /* Fill the out packet */ | |
3883cd56 | 2965 | usb_fill_bulk_urb(&hw->ctlx_urb, hw->usb, |
21dc0f89 | 2966 | hw->endp_out, |
3883cd56 | 2967 | &head->outbuf, ROUNDUP64(head->outbufsize), |
21dc0f89 | 2968 | hfa384x_ctlxout_callback, hw); |
00b3ed16 GKH |
2969 | hw->ctlx_urb.transfer_flags |= USB_QUEUE_BULK; |
2970 | ||
3f4b4e77 | 2971 | /* Now submit the URB and update the CTLX's state */ |
5850c251 | 2972 | result = usb_submit_urb(&hw->ctlx_urb, GFP_ATOMIC); |
46800b22 | 2973 | if (result == 0) { |
00b3ed16 GKH |
2974 | /* This CTLX is now running on the active queue */ |
2975 | head->state = CTLX_REQ_SUBMITTED; | |
2976 | ||
2977 | /* Start the OUT wait timer */ | |
2978 | hw->req_timer_done = 0; | |
2979 | hw->reqtimer.expires = jiffies + HZ; | |
2980 | add_timer(&hw->reqtimer); | |
2981 | ||
2982 | /* Start the IN wait timer */ | |
2983 | hw->resp_timer_done = 0; | |
21dc0f89 | 2984 | hw->resptimer.expires = jiffies + 2 * HZ; |
00b3ed16 GKH |
2985 | add_timer(&hw->resptimer); |
2986 | ||
2987 | break; | |
2988 | } | |
2989 | ||
2990 | if (result == -EPIPE) { | |
2991 | /* The OUT pipe needs resetting, so put | |
2992 | * this CTLX back in the "pending" queue | |
2993 | * and schedule a reset ... | |
2994 | */ | |
263b8bb9 | 2995 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
2996 | "%s tx pipe stalled: requesting reset\n", |
2997 | hw->wlandev->netdev->name); | |
00b3ed16 GKH |
2998 | list_move(&head->list, &hw->ctlxq.pending); |
2999 | set_bit(WORK_TX_HALT, &hw->usb_flags); | |
3000 | schedule_work(&hw->usb_work); | |
3001 | break; | |
3002 | } | |
3003 | ||
3004 | if (result == -ESHUTDOWN) { | |
263b8bb9 | 3005 | netdev_warn(hw->wlandev->netdev, "%s urb shutdown!\n", |
3f2d6564 | 3006 | hw->wlandev->netdev->name); |
00b3ed16 GKH |
3007 | break; |
3008 | } | |
3009 | ||
263b8bb9 | 3010 | netdev_err(hw->wlandev->netdev, "Failed to submit CTLX[%d]: error=%d\n", |
3f2d6564 | 3011 | le16_to_cpu(head->outbuf.type), result); |
00b3ed16 | 3012 | unlocked_usbctlx_complete(hw, head); |
21dc0f89 | 3013 | } /* while */ |
00b3ed16 | 3014 | |
21dc0f89 | 3015 | unlock: |
00b3ed16 | 3016 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
00b3ed16 GKH |
3017 | } |
3018 | ||
00b3ed16 | 3019 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3020 | * hfa384x_usbin_callback |
3021 | * | |
3022 | * Callback for URBs on the BULKIN endpoint. | |
3023 | * | |
3024 | * Arguments: | |
3025 | * urb ptr to the completed urb | |
3026 | * | |
3027 | * Returns: | |
3028 | * nothing | |
3029 | * | |
3030 | * Side effects: | |
3031 | * | |
3032 | * Call context: | |
3033 | * interrupt | |
3034 | *---------------------------------------------------------------- | |
3035 | */ | |
00b3ed16 | 3036 | static void hfa384x_usbin_callback(struct urb *urb) |
00b3ed16 | 3037 | { |
c9573a8d | 3038 | struct wlandevice *wlandev = urb->context; |
5a2214e2 | 3039 | struct hfa384x *hw; |
e895f00a | 3040 | union hfa384x_usbin *usbin; |
21dc0f89 MM |
3041 | struct sk_buff *skb = NULL; |
3042 | int result; | |
3043 | int urb_status; | |
3044 | u16 type; | |
00b3ed16 GKH |
3045 | |
3046 | enum USBIN_ACTION { | |
3047 | HANDLE, | |
3048 | RESUBMIT, | |
3049 | ABORT | |
3050 | } action; | |
3051 | ||
21dc0f89 | 3052 | if (!wlandev || !wlandev->netdev || wlandev->hwremoved) |
00b3ed16 GKH |
3053 | goto exit; |
3054 | ||
3055 | hw = wlandev->priv; | |
3056 | if (!hw) | |
3057 | goto exit; | |
3058 | ||
3059 | skb = hw->rx_urb_skb; | |
1bca0df4 SP |
3060 | if (!skb || (skb->data != urb->transfer_buffer)) { |
3061 | WARN_ON(1); | |
3062 | return; | |
3063 | } | |
21dc0f89 | 3064 | |
00b3ed16 GKH |
3065 | hw->rx_urb_skb = NULL; |
3066 | ||
3067 | /* Check for error conditions within the URB */ | |
3068 | switch (urb->status) { | |
3069 | case 0: | |
3070 | action = HANDLE; | |
3071 | ||
3072 | /* Check for short packet */ | |
21dc0f89 | 3073 | if (urb->actual_length == 0) { |
9630f6b9 TK |
3074 | wlandev->netdev->stats.rx_errors++; |
3075 | wlandev->netdev->stats.rx_length_errors++; | |
00b3ed16 GKH |
3076 | action = RESUBMIT; |
3077 | } | |
3078 | break; | |
3079 | ||
3080 | case -EPIPE: | |
263b8bb9 | 3081 | netdev_warn(hw->wlandev->netdev, "%s rx pipe stalled: requesting reset\n", |
3f2d6564 | 3082 | wlandev->netdev->name); |
21dc0f89 | 3083 | if (!test_and_set_bit(WORK_RX_HALT, &hw->usb_flags)) |
00b3ed16 | 3084 | schedule_work(&hw->usb_work); |
9630f6b9 | 3085 | wlandev->netdev->stats.rx_errors++; |
00b3ed16 GKH |
3086 | action = ABORT; |
3087 | break; | |
3088 | ||
3089 | case -EILSEQ: | |
3090 | case -ETIMEDOUT: | |
3091 | case -EPROTO: | |
21dc0f89 MM |
3092 | if (!test_and_set_bit(THROTTLE_RX, &hw->usb_flags) && |
3093 | !timer_pending(&hw->throttle)) { | |
00b3ed16 GKH |
3094 | mod_timer(&hw->throttle, jiffies + THROTTLE_JIFFIES); |
3095 | } | |
9630f6b9 | 3096 | wlandev->netdev->stats.rx_errors++; |
00b3ed16 GKH |
3097 | action = ABORT; |
3098 | break; | |
3099 | ||
3100 | case -EOVERFLOW: | |
9630f6b9 | 3101 | wlandev->netdev->stats.rx_over_errors++; |
00b3ed16 GKH |
3102 | action = RESUBMIT; |
3103 | break; | |
3104 | ||
3105 | case -ENODEV: | |
3106 | case -ESHUTDOWN: | |
a7cf7bae | 3107 | pr_debug("status=%d, device removed.\n", urb->status); |
00b3ed16 GKH |
3108 | action = ABORT; |
3109 | break; | |
3110 | ||
3111 | case -ENOENT: | |
3112 | case -ECONNRESET: | |
75f49e07 | 3113 | pr_debug("status=%d, urb explicitly unlinked.\n", urb->status); |
00b3ed16 GKH |
3114 | action = ABORT; |
3115 | break; | |
3116 | ||
3117 | default: | |
a7cf7bae | 3118 | pr_debug("urb status=%d, transfer flags=0x%x\n", |
75f49e07 | 3119 | urb->status, urb->transfer_flags); |
9630f6b9 | 3120 | wlandev->netdev->stats.rx_errors++; |
00b3ed16 GKH |
3121 | action = RESUBMIT; |
3122 | break; | |
3123 | } | |
3124 | ||
3125 | urb_status = urb->status; | |
3126 | ||
3127 | if (action != ABORT) { | |
3128 | /* Repost the RX URB */ | |
3129 | result = submit_rx_urb(hw, GFP_ATOMIC); | |
3130 | ||
3131 | if (result != 0) { | |
263b8bb9 | 3132 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
3133 | "Fatal, failed to resubmit rx_urb. error=%d\n", |
3134 | result); | |
00b3ed16 GKH |
3135 | } |
3136 | } | |
3137 | ||
3138 | /* Handle any USB-IN packet */ | |
3139 | /* Note: the check of the sw_support field, the type field doesn't | |
3140 | * have bit 12 set like the docs suggest. | |
3141 | */ | |
e895f00a | 3142 | usbin = (union hfa384x_usbin *)urb->transfer_buffer; |
18c7f792 | 3143 | type = le16_to_cpu(usbin->type); |
00b3ed16 GKH |
3144 | if (HFA384x_USB_ISRXFRM(type)) { |
3145 | if (action == HANDLE) { | |
3146 | if (usbin->txfrm.desc.sw_support == 0x0123) { | |
3147 | hfa384x_usbin_txcompl(wlandev, usbin); | |
3148 | } else { | |
3149 | skb_put(skb, sizeof(*usbin)); | |
3150 | hfa384x_usbin_rx(wlandev, skb); | |
3151 | skb = NULL; | |
3152 | } | |
3153 | } | |
3154 | goto exit; | |
3155 | } | |
3156 | if (HFA384x_USB_ISTXFRM(type)) { | |
3157 | if (action == HANDLE) | |
3158 | hfa384x_usbin_txcompl(wlandev, usbin); | |
3159 | goto exit; | |
3160 | } | |
3161 | switch (type) { | |
3162 | case HFA384x_USB_INFOFRM: | |
3163 | if (action == ABORT) | |
3164 | goto exit; | |
3165 | if (action == HANDLE) | |
3166 | hfa384x_usbin_info(wlandev, usbin); | |
3167 | break; | |
3168 | ||
3169 | case HFA384x_USB_CMDRESP: | |
3170 | case HFA384x_USB_WRIDRESP: | |
3171 | case HFA384x_USB_RRIDRESP: | |
3172 | case HFA384x_USB_WMEMRESP: | |
3173 | case HFA384x_USB_RMEMRESP: | |
3174 | /* ALWAYS, ALWAYS, ALWAYS handle this CTLX!!!! */ | |
3175 | hfa384x_usbin_ctlx(hw, usbin, urb_status); | |
3176 | break; | |
3177 | ||
3178 | case HFA384x_USB_BUFAVAIL: | |
a7cf7bae | 3179 | pr_debug("Received BUFAVAIL packet, frmlen=%d\n", |
75f49e07 | 3180 | usbin->bufavail.frmlen); |
00b3ed16 GKH |
3181 | break; |
3182 | ||
3183 | case HFA384x_USB_ERROR: | |
a7cf7bae | 3184 | pr_debug("Received USB_ERROR packet, errortype=%d\n", |
75f49e07 | 3185 | usbin->usberror.errortype); |
00b3ed16 GKH |
3186 | break; |
3187 | ||
3188 | default: | |
75f49e07 MT |
3189 | pr_debug("Unrecognized USBIN packet, type=%x, status=%d\n", |
3190 | usbin->type, urb_status); | |
00b3ed16 | 3191 | break; |
21dc0f89 | 3192 | } /* switch */ |
00b3ed16 GKH |
3193 | |
3194 | exit: | |
3195 | ||
3196 | if (skb) | |
3197 | dev_kfree_skb(skb); | |
00b3ed16 GKH |
3198 | } |
3199 | ||
00b3ed16 | 3200 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3201 | * hfa384x_usbin_ctlx |
3202 | * | |
3203 | * We've received a URB containing a Prism2 "response" message. | |
3204 | * This message needs to be matched up with a CTLX on the active | |
3205 | * queue and our state updated accordingly. | |
3206 | * | |
3207 | * Arguments: | |
3208 | * hw ptr to struct hfa384x | |
3209 | * usbin ptr to USB IN packet | |
3210 | * urb_status status of this Bulk-In URB | |
3211 | * | |
3212 | * Returns: | |
3213 | * nothing | |
3214 | * | |
3215 | * Side effects: | |
3216 | * | |
3217 | * Call context: | |
3218 | * interrupt | |
3219 | *---------------------------------------------------------------- | |
3220 | */ | |
5a2214e2 | 3221 | static void hfa384x_usbin_ctlx(struct hfa384x *hw, union hfa384x_usbin *usbin, |
00b3ed16 GKH |
3222 | int urb_status) |
3223 | { | |
a10d36b0 | 3224 | struct hfa384x_usbctlx *ctlx; |
21dc0f89 MM |
3225 | int run_queue = 0; |
3226 | unsigned long flags; | |
00b3ed16 | 3227 | |
00b3ed16 GKH |
3228 | retry: |
3229 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
3230 | ||
3231 | /* There can be only one CTLX on the active queue | |
3232 | * at any one time, and this is the CTLX that the | |
3233 | * timers are waiting for. | |
3234 | */ | |
21dc0f89 | 3235 | if (list_empty(&hw->ctlxq.active)) |
00b3ed16 | 3236 | goto unlock; |
00b3ed16 GKH |
3237 | |
3238 | /* Remove the "response timeout". It's possible that | |
3239 | * we are already too late, and that the timeout is | |
3240 | * already running. And that's just too bad for us, | |
3241 | * because we could lose our CTLX from the active | |
3242 | * queue here ... | |
3243 | */ | |
3244 | if (del_timer(&hw->resptimer) == 0) { | |
3245 | if (hw->resp_timer_done == 0) { | |
3246 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
3247 | goto retry; | |
3248 | } | |
21dc0f89 | 3249 | } else { |
00b3ed16 GKH |
3250 | hw->resp_timer_done = 1; |
3251 | } | |
3252 | ||
3253 | ctlx = get_active_ctlx(hw); | |
3254 | ||
3255 | if (urb_status != 0) { | |
3256 | /* | |
3257 | * Bad CTLX, so get rid of it. But we only | |
3258 | * remove it from the active queue if we're no | |
3259 | * longer expecting the OUT URB to complete. | |
3260 | */ | |
3261 | if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0) | |
3262 | run_queue = 1; | |
3263 | } else { | |
a78d1312 | 3264 | const __le16 intype = (usbin->type & ~cpu_to_le16(0x8000)); |
00b3ed16 GKH |
3265 | |
3266 | /* | |
3267 | * Check that our message is what we're expecting ... | |
3268 | */ | |
3269 | if (ctlx->outbuf.type != intype) { | |
263b8bb9 | 3270 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
3271 | "Expected IN[%d], received IN[%d] - ignored.\n", |
3272 | le16_to_cpu(ctlx->outbuf.type), | |
3273 | le16_to_cpu(intype)); | |
00b3ed16 GKH |
3274 | goto unlock; |
3275 | } | |
3276 | ||
3277 | /* This URB has succeeded, so grab the data ... */ | |
3278 | memcpy(&ctlx->inbuf, usbin, sizeof(ctlx->inbuf)); | |
3279 | ||
3280 | switch (ctlx->state) { | |
3281 | case CTLX_REQ_SUBMITTED: | |
3282 | /* | |
3283 | * We have received our response URB before | |
3284 | * our request has been acknowledged. Odd, | |
3285 | * but our OUT URB is still alive... | |
3286 | */ | |
4ffab688 | 3287 | pr_debug("Causality violation: please reboot Universe\n"); |
00b3ed16 GKH |
3288 | ctlx->state = CTLX_RESP_COMPLETE; |
3289 | break; | |
3290 | ||
3291 | case CTLX_REQ_COMPLETE: | |
3292 | /* | |
3293 | * This is the usual path: our request | |
3294 | * has already been acknowledged, and | |
3295 | * now we have received the reply too. | |
3296 | */ | |
3297 | ctlx->state = CTLX_COMPLETE; | |
3298 | unlocked_usbctlx_complete(hw, ctlx); | |
3299 | run_queue = 1; | |
3300 | break; | |
3301 | ||
3302 | default: | |
3303 | /* | |
3304 | * Throw this CTLX away ... | |
3305 | */ | |
263b8bb9 | 3306 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
3307 | "Matched IN URB, CTLX[%d] in invalid state(%s). Discarded.\n", |
3308 | le16_to_cpu(ctlx->outbuf.type), | |
3309 | ctlxstr(ctlx->state)); | |
00b3ed16 GKH |
3310 | if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0) |
3311 | run_queue = 1; | |
3312 | break; | |
21dc0f89 | 3313 | } /* switch */ |
00b3ed16 GKH |
3314 | } |
3315 | ||
3316 | unlock: | |
3317 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
3318 | ||
3319 | if (run_queue) | |
3320 | hfa384x_usbctlxq_run(hw); | |
00b3ed16 GKH |
3321 | } |
3322 | ||
00b3ed16 | 3323 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3324 | * hfa384x_usbin_txcompl |
3325 | * | |
3326 | * At this point we have the results of a previous transmit. | |
3327 | * | |
3328 | * Arguments: | |
3329 | * wlandev wlan device | |
3330 | * usbin ptr to the usb transfer buffer | |
3331 | * | |
3332 | * Returns: | |
3333 | * nothing | |
3334 | * | |
3335 | * Side effects: | |
3336 | * | |
3337 | * Call context: | |
3338 | * interrupt | |
3339 | *---------------------------------------------------------------- | |
3340 | */ | |
c9573a8d | 3341 | static void hfa384x_usbin_txcompl(struct wlandevice *wlandev, |
3e4180c3 | 3342 | union hfa384x_usbin *usbin) |
00b3ed16 | 3343 | { |
21dc0f89 | 3344 | u16 status; |
00b3ed16 | 3345 | |
631c8dec | 3346 | status = le16_to_cpu(usbin->type); /* yeah I know it says type... */ |
00b3ed16 GKH |
3347 | |
3348 | /* Was there an error? */ | |
21dc0f89 | 3349 | if (HFA384x_TXSTATUS_ISERROR(status)) |
00b3ed16 | 3350 | prism2sta_ev_txexc(wlandev, status); |
21dc0f89 | 3351 | else |
00b3ed16 | 3352 | prism2sta_ev_tx(wlandev, status); |
00b3ed16 GKH |
3353 | } |
3354 | ||
00b3ed16 | 3355 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3356 | * hfa384x_usbin_rx |
3357 | * | |
3358 | * At this point we have a successful received a rx frame packet. | |
3359 | * | |
3360 | * Arguments: | |
3361 | * wlandev wlan device | |
3362 | * usbin ptr to the usb transfer buffer | |
3363 | * | |
3364 | * Returns: | |
3365 | * nothing | |
3366 | * | |
3367 | * Side effects: | |
3368 | * | |
3369 | * Call context: | |
3370 | * interrupt | |
3371 | *---------------------------------------------------------------- | |
3372 | */ | |
c9573a8d | 3373 | static void hfa384x_usbin_rx(struct wlandevice *wlandev, struct sk_buff *skb) |
00b3ed16 | 3374 | { |
3e4180c3 | 3375 | union hfa384x_usbin *usbin = (union hfa384x_usbin *)skb->data; |
5a2214e2 | 3376 | struct hfa384x *hw = wlandev->priv; |
21dc0f89 | 3377 | int hdrlen; |
51e4896a | 3378 | struct p80211_rxmeta *rxmeta; |
21dc0f89 MM |
3379 | u16 data_len; |
3380 | u16 fc; | |
00b3ed16 | 3381 | |
00b3ed16 | 3382 | /* Byte order convert once up front. */ |
18c7f792 MM |
3383 | usbin->rxfrm.desc.status = le16_to_cpu(usbin->rxfrm.desc.status); |
3384 | usbin->rxfrm.desc.time = le32_to_cpu(usbin->rxfrm.desc.time); | |
00b3ed16 GKH |
3385 | |
3386 | /* Now handle frame based on port# */ | |
21dc0f89 | 3387 | switch (HFA384x_RXSTATUS_MACPORT_GET(usbin->rxfrm.desc.status)) { |
00b3ed16 | 3388 | case 0: |
ae26230b | 3389 | fc = le16_to_cpu(usbin->rxfrm.desc.frame_control); |
00b3ed16 GKH |
3390 | |
3391 | /* If exclude and we receive an unencrypted, drop it */ | |
21dc0f89 MM |
3392 | if ((wlandev->hostwep & HOSTWEP_EXCLUDEUNENCRYPTED) && |
3393 | !WLAN_GET_FC_ISWEP(fc)) { | |
cc5bcbbd | 3394 | break; |
00b3ed16 GKH |
3395 | } |
3396 | ||
18c7f792 | 3397 | data_len = le16_to_cpu(usbin->rxfrm.desc.data_len); |
00b3ed16 GKH |
3398 | |
3399 | /* How much header data do we have? */ | |
3400 | hdrlen = p80211_headerlen(fc); | |
3401 | ||
3402 | /* Pull off the descriptor */ | |
70adf509 | 3403 | skb_pull(skb, sizeof(struct hfa384x_rx_frame)); |
00b3ed16 GKH |
3404 | |
3405 | /* Now shunt the header block up against the data block | |
3406 | * with an "overlapping" copy | |
3407 | */ | |
3408 | memmove(skb_push(skb, hdrlen), | |
21dc0f89 | 3409 | &usbin->rxfrm.desc.frame_control, hdrlen); |
00b3ed16 GKH |
3410 | |
3411 | skb->dev = wlandev->netdev; | |
00b3ed16 GKH |
3412 | |
3413 | /* And set the frame length properly */ | |
3414 | skb_trim(skb, data_len + hdrlen); | |
3415 | ||
3416 | /* The prism2 series does not return the CRC */ | |
3417 | memset(skb_put(skb, WLAN_CRC_LEN), 0xff, WLAN_CRC_LEN); | |
3418 | ||
3419 | skb_reset_mac_header(skb); | |
3420 | ||
3421 | /* Attach the rxmeta, set some stuff */ | |
3422 | p80211skb_rxmeta_attach(wlandev, skb); | |
3423 | rxmeta = P80211SKB_RXMETA(skb); | |
3424 | rxmeta->mactime = usbin->rxfrm.desc.time; | |
3425 | rxmeta->rxrate = usbin->rxfrm.desc.rate; | |
3426 | rxmeta->signal = usbin->rxfrm.desc.signal - hw->dbmadjust; | |
3427 | rxmeta->noise = usbin->rxfrm.desc.silence - hw->dbmadjust; | |
3428 | ||
4e2cdf93 | 3429 | p80211netdev_rx(wlandev, skb); |
00b3ed16 GKH |
3430 | |
3431 | break; | |
3432 | ||
3433 | case 7: | |
21dc0f89 | 3434 | if (!HFA384x_RXSTATUS_ISFCSERR(usbin->rxfrm.desc.status)) { |
00b3ed16 | 3435 | /* Copy to wlansnif skb */ |
21dc0f89 | 3436 | hfa384x_int_rxmonitor(wlandev, &usbin->rxfrm); |
00b3ed16 GKH |
3437 | dev_kfree_skb(skb); |
3438 | } else { | |
75f49e07 | 3439 | pr_debug("Received monitor frame: FCSerr set\n"); |
00b3ed16 GKH |
3440 | } |
3441 | break; | |
3442 | ||
3443 | default: | |
263b8bb9 | 3444 | netdev_warn(hw->wlandev->netdev, "Received frame on unsupported port=%d\n", |
3f2d6564 SSA |
3445 | HFA384x_RXSTATUS_MACPORT_GET( |
3446 | usbin->rxfrm.desc.status)); | |
00b3ed16 GKH |
3447 | break; |
3448 | } | |
00b3ed16 GKH |
3449 | } |
3450 | ||
3451 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
3452 | * hfa384x_int_rxmonitor |
3453 | * | |
3454 | * Helper function for int_rx. Handles monitor frames. | |
3455 | * Note that this function allocates space for the FCS and sets it | |
3456 | * to 0xffffffff. The hfa384x doesn't give us the FCS value but the | |
3457 | * higher layers expect it. 0xffffffff is used as a flag to indicate | |
3458 | * the FCS is bogus. | |
3459 | * | |
3460 | * Arguments: | |
3461 | * wlandev wlan device structure | |
3462 | * rxfrm rx descriptor read from card in int_rx | |
3463 | * | |
3464 | * Returns: | |
3465 | * nothing | |
3466 | * | |
3467 | * Side effects: | |
3468 | * Allocates an skb and passes it up via the PF_PACKET interface. | |
3469 | * Call context: | |
3470 | * interrupt | |
3471 | *---------------------------------------------------------------- | |
3472 | */ | |
c9573a8d | 3473 | static void hfa384x_int_rxmonitor(struct wlandevice *wlandev, |
684b2e08 | 3474 | struct hfa384x_usb_rxfrm *rxfrm) |
00b3ed16 | 3475 | { |
3883cd56 | 3476 | struct hfa384x_rx_frame *rxdesc = &rxfrm->desc; |
21dc0f89 MM |
3477 | unsigned int hdrlen = 0; |
3478 | unsigned int datalen = 0; | |
3479 | unsigned int skblen = 0; | |
3480 | u8 *datap; | |
3481 | u16 fc; | |
3482 | struct sk_buff *skb; | |
5a2214e2 | 3483 | struct hfa384x *hw = wlandev->priv; |
00b3ed16 | 3484 | |
631c8dec | 3485 | /* Remember the status, time, and data_len fields are in host order */ |
00b3ed16 | 3486 | /* Figure out how big the frame is */ |
ae26230b | 3487 | fc = le16_to_cpu(rxdesc->frame_control); |
00b3ed16 | 3488 | hdrlen = p80211_headerlen(fc); |
18c7f792 | 3489 | datalen = le16_to_cpu(rxdesc->data_len); |
00b3ed16 GKH |
3490 | |
3491 | /* Allocate an ind message+framesize skb */ | |
51e4896a | 3492 | skblen = sizeof(struct p80211_caphdr) + hdrlen + datalen + WLAN_CRC_LEN; |
00b3ed16 GKH |
3493 | |
3494 | /* sanity check the length */ | |
21dc0f89 | 3495 | if (skblen > |
51e4896a | 3496 | (sizeof(struct p80211_caphdr) + |
21dc0f89 | 3497 | WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)) { |
a7cf7bae | 3498 | pr_debug("overlen frm: len=%zd\n", |
51e4896a | 3499 | skblen - sizeof(struct p80211_caphdr)); |
00b3ed16 GKH |
3500 | } |
3501 | ||
46800b22 | 3502 | skb = dev_alloc_skb(skblen); |
e2e77528 | 3503 | if (!skb) |
00b3ed16 | 3504 | return; |
00b3ed16 GKH |
3505 | |
3506 | /* only prepend the prism header if in the right mode */ | |
3507 | if ((wlandev->netdev->type == ARPHRD_IEEE80211_PRISM) && | |
cbec30c4 | 3508 | (hw->sniffhdr != 0)) { |
51e4896a | 3509 | struct p80211_caphdr *caphdr; |
00b3ed16 | 3510 | /* The NEW header format! */ |
51e4896a | 3511 | datap = skb_put(skb, sizeof(struct p80211_caphdr)); |
5d85fe34 | 3512 | caphdr = (struct p80211_caphdr *)datap; |
21dc0f89 MM |
3513 | |
3514 | caphdr->version = htonl(P80211CAPTURE_VERSION); | |
51e4896a | 3515 | caphdr->length = htonl(sizeof(struct p80211_caphdr)); |
68e009ed | 3516 | caphdr->mactime = __cpu_to_be64(rxdesc->time * 1000); |
21dc0f89 MM |
3517 | caphdr->hosttime = __cpu_to_be64(jiffies); |
3518 | caphdr->phytype = htonl(4); /* dss_dot11_b */ | |
3519 | caphdr->channel = htonl(hw->sniff_channel); | |
3520 | caphdr->datarate = htonl(rxdesc->rate); | |
3521 | caphdr->antenna = htonl(0); /* unknown */ | |
3522 | caphdr->priority = htonl(0); /* unknown */ | |
3523 | caphdr->ssi_type = htonl(3); /* rssi_raw */ | |
3524 | caphdr->ssi_signal = htonl(rxdesc->signal); | |
3525 | caphdr->ssi_noise = htonl(rxdesc->silence); | |
3526 | caphdr->preamble = htonl(0); /* unknown */ | |
3527 | caphdr->encoding = htonl(1); /* cck */ | |
00b3ed16 GKH |
3528 | } |
3529 | ||
631c8dec | 3530 | /* Copy the 802.11 header to the skb |
d3fcb8a2 SP |
3531 | * (ctl frames may be less than a full header) |
3532 | */ | |
59ae1d12 | 3533 | datap = skb_put_data(skb, &rxdesc->frame_control, hdrlen); |
00b3ed16 GKH |
3534 | |
3535 | /* If any, copy the data from the card to the skb */ | |
21dc0f89 | 3536 | if (datalen > 0) { |
59ae1d12 | 3537 | datap = skb_put_data(skb, rxfrm->data, datalen); |
00b3ed16 GKH |
3538 | |
3539 | /* check for unencrypted stuff if WEP bit set. */ | |
21dc0f89 MM |
3540 | if (*(datap - hdrlen + 1) & 0x40) /* wep set */ |
3541 | if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa)) | |
631c8dec EH |
3542 | /* clear wep; it's the 802.2 header! */ |
3543 | *(datap - hdrlen + 1) &= 0xbf; | |
00b3ed16 GKH |
3544 | } |
3545 | ||
3546 | if (hw->sniff_fcs) { | |
3547 | /* Set the FCS */ | |
3548 | datap = skb_put(skb, WLAN_CRC_LEN); | |
21dc0f89 | 3549 | memset(datap, 0xff, WLAN_CRC_LEN); |
00b3ed16 GKH |
3550 | } |
3551 | ||
3552 | /* pass it back up */ | |
4e2cdf93 | 3553 | p80211netdev_rx(wlandev, skb); |
00b3ed16 GKH |
3554 | } |
3555 | ||
00b3ed16 | 3556 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3557 | * hfa384x_usbin_info |
3558 | * | |
3559 | * At this point we have a successful received a Prism2 info frame. | |
3560 | * | |
3561 | * Arguments: | |
3562 | * wlandev wlan device | |
3563 | * usbin ptr to the usb transfer buffer | |
3564 | * | |
3565 | * Returns: | |
3566 | * nothing | |
3567 | * | |
3568 | * Side effects: | |
3569 | * | |
3570 | * Call context: | |
3571 | * interrupt | |
3572 | *---------------------------------------------------------------- | |
3573 | */ | |
3e4180c3 SP |
3574 | static void hfa384x_usbin_info(struct wlandevice *wlandev, |
3575 | union hfa384x_usbin *usbin) | |
00b3ed16 | 3576 | { |
21dc0f89 | 3577 | usbin->infofrm.info.framelen = |
18c7f792 | 3578 | le16_to_cpu(usbin->infofrm.info.framelen); |
00b3ed16 | 3579 | prism2sta_ev_info(wlandev, &usbin->infofrm.info); |
00b3ed16 GKH |
3580 | } |
3581 | ||
00b3ed16 | 3582 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3583 | * hfa384x_usbout_callback |
3584 | * | |
3585 | * Callback for URBs on the BULKOUT endpoint. | |
3586 | * | |
3587 | * Arguments: | |
3588 | * urb ptr to the completed urb | |
3589 | * | |
3590 | * Returns: | |
3591 | * nothing | |
3592 | * | |
3593 | * Side effects: | |
3594 | * | |
3595 | * Call context: | |
3596 | * interrupt | |
3597 | *---------------------------------------------------------------- | |
3598 | */ | |
00b3ed16 | 3599 | static void hfa384x_usbout_callback(struct urb *urb) |
00b3ed16 | 3600 | { |
c9573a8d | 3601 | struct wlandevice *wlandev = urb->context; |
00b3ed16 GKH |
3602 | |
3603 | #ifdef DEBUG_USB | |
3604 | dbprint_urb(urb); | |
3605 | #endif | |
3606 | ||
21dc0f89 | 3607 | if (wlandev && wlandev->netdev) { |
21dc0f89 | 3608 | switch (urb->status) { |
00b3ed16 | 3609 | case 0: |
6ba714bb | 3610 | prism2sta_ev_alloc(wlandev); |
00b3ed16 GKH |
3611 | break; |
3612 | ||
3613 | case -EPIPE: | |
21dc0f89 | 3614 | { |
5a2214e2 | 3615 | struct hfa384x *hw = wlandev->priv; |
4d525ef6 | 3616 | |
263b8bb9 | 3617 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
3618 | "%s tx pipe stalled: requesting reset\n", |
3619 | wlandev->netdev->name); | |
21dc0f89 MM |
3620 | if (!test_and_set_bit |
3621 | (WORK_TX_HALT, &hw->usb_flags)) | |
3622 | schedule_work(&hw->usb_work); | |
9630f6b9 | 3623 | wlandev->netdev->stats.tx_errors++; |
21dc0f89 MM |
3624 | break; |
3625 | } | |
00b3ed16 GKH |
3626 | |
3627 | case -EPROTO: | |
3628 | case -ETIMEDOUT: | |
3629 | case -EILSEQ: | |
21dc0f89 | 3630 | { |
5a2214e2 | 3631 | struct hfa384x *hw = wlandev->priv; |
21dc0f89 MM |
3632 | |
3633 | if (!test_and_set_bit | |
a3542e66 SSA |
3634 | (THROTTLE_TX, &hw->usb_flags) && |
3635 | !timer_pending(&hw->throttle)) { | |
21dc0f89 MM |
3636 | mod_timer(&hw->throttle, |
3637 | jiffies + THROTTLE_JIFFIES); | |
3638 | } | |
9630f6b9 | 3639 | wlandev->netdev->stats.tx_errors++; |
21dc0f89 MM |
3640 | netif_stop_queue(wlandev->netdev); |
3641 | break; | |
00b3ed16 | 3642 | } |
00b3ed16 GKH |
3643 | |
3644 | case -ENOENT: | |
3645 | case -ESHUTDOWN: | |
3646 | /* Ignorable errors */ | |
3647 | break; | |
3648 | ||
3649 | default: | |
263b8bb9 | 3650 | netdev_info(wlandev->netdev, "unknown urb->status=%d\n", |
3f2d6564 | 3651 | urb->status); |
9630f6b9 | 3652 | wlandev->netdev->stats.tx_errors++; |
00b3ed16 | 3653 | break; |
21dc0f89 | 3654 | } /* switch */ |
00b3ed16 | 3655 | } |
00b3ed16 GKH |
3656 | } |
3657 | ||
00b3ed16 | 3658 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3659 | * hfa384x_ctlxout_callback |
3660 | * | |
3661 | * Callback for control data on the BULKOUT endpoint. | |
3662 | * | |
3663 | * Arguments: | |
3664 | * urb ptr to the completed urb | |
3665 | * | |
3666 | * Returns: | |
3667 | * nothing | |
3668 | * | |
3669 | * Side effects: | |
3670 | * | |
3671 | * Call context: | |
3672 | * interrupt | |
3673 | *---------------------------------------------------------------- | |
3674 | */ | |
00b3ed16 | 3675 | static void hfa384x_ctlxout_callback(struct urb *urb) |
00b3ed16 | 3676 | { |
5a2214e2 | 3677 | struct hfa384x *hw = urb->context; |
21dc0f89 MM |
3678 | int delete_resptimer = 0; |
3679 | int timer_ok = 1; | |
3680 | int run_queue = 0; | |
a10d36b0 | 3681 | struct hfa384x_usbctlx *ctlx; |
21dc0f89 | 3682 | unsigned long flags; |
00b3ed16 | 3683 | |
a7cf7bae | 3684 | pr_debug("urb->status=%d\n", urb->status); |
00b3ed16 GKH |
3685 | #ifdef DEBUG_USB |
3686 | dbprint_urb(urb); | |
3687 | #endif | |
21dc0f89 | 3688 | if ((urb->status == -ESHUTDOWN) || |
02e02048 | 3689 | (urb->status == -ENODEV) || !hw) |
89e6302c | 3690 | return; |
00b3ed16 GKH |
3691 | |
3692 | retry: | |
3693 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
3694 | ||
3695 | /* | |
3696 | * Only one CTLX at a time on the "active" list, and | |
3697 | * none at all if we are unplugged. However, we can | |
3698 | * rely on the disconnect function to clean everything | |
3699 | * up if someone unplugged the adapter. | |
3700 | */ | |
21dc0f89 | 3701 | if (list_empty(&hw->ctlxq.active)) { |
00b3ed16 | 3702 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
89e6302c | 3703 | return; |
00b3ed16 GKH |
3704 | } |
3705 | ||
3706 | /* | |
3707 | * Having something on the "active" queue means | |
3708 | * that we have timers to worry about ... | |
3709 | */ | |
3710 | if (del_timer(&hw->reqtimer) == 0) { | |
3711 | if (hw->req_timer_done == 0) { | |
3712 | /* | |
3713 | * This timer was actually running while we | |
3714 | * were trying to delete it. Let it terminate | |
3715 | * gracefully instead. | |
3716 | */ | |
3717 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
3718 | goto retry; | |
3719 | } | |
21dc0f89 | 3720 | } else { |
00b3ed16 GKH |
3721 | hw->req_timer_done = 1; |
3722 | } | |
3723 | ||
3724 | ctlx = get_active_ctlx(hw); | |
3725 | ||
21dc0f89 | 3726 | if (urb->status == 0) { |
00b3ed16 | 3727 | /* Request portion of a CTLX is successful */ |
21dc0f89 | 3728 | switch (ctlx->state) { |
00b3ed16 GKH |
3729 | case CTLX_REQ_SUBMITTED: |
3730 | /* This OUT-ACK received before IN */ | |
3731 | ctlx->state = CTLX_REQ_COMPLETE; | |
3732 | break; | |
3733 | ||
3734 | case CTLX_RESP_COMPLETE: | |
3735 | /* IN already received before this OUT-ACK, | |
3736 | * so this command must now be complete. | |
3737 | */ | |
3738 | ctlx->state = CTLX_COMPLETE; | |
3739 | unlocked_usbctlx_complete(hw, ctlx); | |
3740 | run_queue = 1; | |
3741 | break; | |
3742 | ||
3743 | default: | |
3744 | /* This is NOT a valid CTLX "success" state! */ | |
263b8bb9 | 3745 | netdev_err(hw->wlandev->netdev, |
3f2d6564 SSA |
3746 | "Illegal CTLX[%d] success state(%s, %d) in OUT URB\n", |
3747 | le16_to_cpu(ctlx->outbuf.type), | |
3748 | ctlxstr(ctlx->state), urb->status); | |
00b3ed16 | 3749 | break; |
21dc0f89 | 3750 | } /* switch */ |
00b3ed16 GKH |
3751 | } else { |
3752 | /* If the pipe has stalled then we need to reset it */ | |
21dc0f89 MM |
3753 | if ((urb->status == -EPIPE) && |
3754 | !test_and_set_bit(WORK_TX_HALT, &hw->usb_flags)) { | |
263b8bb9 | 3755 | netdev_warn(hw->wlandev->netdev, |
3f2d6564 SSA |
3756 | "%s tx pipe stalled: requesting reset\n", |
3757 | hw->wlandev->netdev->name); | |
00b3ed16 GKH |
3758 | schedule_work(&hw->usb_work); |
3759 | } | |
3760 | ||
3761 | /* If someone cancels the OUT URB then its status | |
3762 | * should be either -ECONNRESET or -ENOENT. | |
3763 | */ | |
3764 | ctlx->state = CTLX_REQ_FAILED; | |
3765 | unlocked_usbctlx_complete(hw, ctlx); | |
3766 | delete_resptimer = 1; | |
3767 | run_queue = 1; | |
3768 | } | |
3769 | ||
21dc0f89 | 3770 | delresp: |
00b3ed16 | 3771 | if (delete_resptimer) { |
46800b22 | 3772 | timer_ok = del_timer(&hw->resptimer); |
3f4b4e77 | 3773 | if (timer_ok != 0) |
00b3ed16 | 3774 | hw->resp_timer_done = 1; |
00b3ed16 GKH |
3775 | } |
3776 | ||
3777 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
3778 | ||
21dc0f89 | 3779 | if (!timer_ok && (hw->resp_timer_done == 0)) { |
00b3ed16 GKH |
3780 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
3781 | goto delresp; | |
3782 | } | |
3783 | ||
3784 | if (run_queue) | |
3785 | hfa384x_usbctlxq_run(hw); | |
00b3ed16 GKH |
3786 | } |
3787 | ||
00b3ed16 | 3788 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3789 | * hfa384x_usbctlx_reqtimerfn |
3790 | * | |
3791 | * Timer response function for CTLX request timeouts. If this | |
3792 | * function is called, it means that the callback for the OUT | |
3793 | * URB containing a Prism2.x XXX_Request was never called. | |
3794 | * | |
3795 | * Arguments: | |
3796 | * data a ptr to the struct hfa384x | |
3797 | * | |
3798 | * Returns: | |
3799 | * nothing | |
3800 | * | |
3801 | * Side effects: | |
3802 | * | |
3803 | * Call context: | |
3804 | * interrupt | |
3805 | *---------------------------------------------------------------- | |
3806 | */ | |
21dc0f89 | 3807 | static void hfa384x_usbctlx_reqtimerfn(unsigned long data) |
00b3ed16 | 3808 | { |
5a2214e2 | 3809 | struct hfa384x *hw = (struct hfa384x *)data; |
21dc0f89 | 3810 | unsigned long flags; |
00b3ed16 GKH |
3811 | |
3812 | spin_lock_irqsave(&hw->ctlxq.lock, flags); | |
3813 | ||
3814 | hw->req_timer_done = 1; | |
3815 | ||
3816 | /* Removing the hardware automatically empties | |
3817 | * the active list ... | |
3818 | */ | |
21dc0f89 | 3819 | if (!list_empty(&hw->ctlxq.active)) { |
00b3ed16 GKH |
3820 | /* |
3821 | * We must ensure that our URB is removed from | |
3822 | * the system, if it hasn't already expired. | |
3823 | */ | |
3824 | hw->ctlx_urb.transfer_flags |= URB_ASYNC_UNLINK; | |
21dc0f89 | 3825 | if (usb_unlink_urb(&hw->ctlx_urb) == -EINPROGRESS) { |
a10d36b0 | 3826 | struct hfa384x_usbctlx *ctlx = get_active_ctlx(hw); |
00b3ed16 GKH |
3827 | |
3828 | ctlx->state = CTLX_REQ_FAILED; | |
3829 | ||
3830 | /* This URB was active, but has now been | |
3831 | * cancelled. It will now have a status of | |
3832 | * -ECONNRESET in the callback function. | |
3833 | * | |
3834 | * We are cancelling this CTLX, so we're | |
3835 | * not going to need to wait for a response. | |
3836 | * The URB's callback function will check | |
3837 | * that this timer is truly dead. | |
3838 | */ | |
3839 | if (del_timer(&hw->resptimer) != 0) | |
3840 | hw->resp_timer_done = 1; | |
3841 | } | |
3842 | } | |
3843 | ||
3844 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
00b3ed16 GKH |
3845 | } |
3846 | ||
00b3ed16 | 3847 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3848 | * hfa384x_usbctlx_resptimerfn |
3849 | * | |
3850 | * Timer response function for CTLX response timeouts. If this | |
3851 | * function is called, it means that the callback for the IN | |
3852 | * URB containing a Prism2.x XXX_Response was never called. | |
3853 | * | |
3854 | * Arguments: | |
3855 | * data a ptr to the struct hfa384x | |
3856 | * | |
3857 | * Returns: | |
3858 | * nothing | |
3859 | * | |
3860 | * Side effects: | |
3861 | * | |
3862 | * Call context: | |
3863 | * interrupt | |
3864 | *---------------------------------------------------------------- | |
3865 | */ | |
21dc0f89 | 3866 | static void hfa384x_usbctlx_resptimerfn(unsigned long data) |
00b3ed16 | 3867 | { |
5a2214e2 | 3868 | struct hfa384x *hw = (struct hfa384x *)data; |
21dc0f89 | 3869 | unsigned long flags; |
00b3ed16 | 3870 | |
00b3ed16 GKH |
3871 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
3872 | ||
3873 | hw->resp_timer_done = 1; | |
3874 | ||
3875 | /* The active list will be empty if the | |
3876 | * adapter has been unplugged ... | |
3877 | */ | |
21dc0f89 | 3878 | if (!list_empty(&hw->ctlxq.active)) { |
a10d36b0 | 3879 | struct hfa384x_usbctlx *ctlx = get_active_ctlx(hw); |
00b3ed16 | 3880 | |
21dc0f89 | 3881 | if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0) { |
00b3ed16 GKH |
3882 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
3883 | hfa384x_usbctlxq_run(hw); | |
3f514258 | 3884 | return; |
00b3ed16 GKH |
3885 | } |
3886 | } | |
00b3ed16 | 3887 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); |
00b3ed16 GKH |
3888 | } |
3889 | ||
3890 | /*---------------------------------------------------------------- | |
d3fcb8a2 SP |
3891 | * hfa384x_usb_throttlefn |
3892 | * | |
3893 | * | |
3894 | * Arguments: | |
3895 | * data ptr to hw | |
3896 | * | |
3897 | * Returns: | |
3898 | * Nothing | |
3899 | * | |
3900 | * Side effects: | |
3901 | * | |
3902 | * Call context: | |
3903 | * Interrupt | |
3904 | *---------------------------------------------------------------- | |
3905 | */ | |
21dc0f89 | 3906 | static void hfa384x_usb_throttlefn(unsigned long data) |
00b3ed16 | 3907 | { |
5a2214e2 | 3908 | struct hfa384x *hw = (struct hfa384x *)data; |
21dc0f89 | 3909 | unsigned long flags; |
00b3ed16 | 3910 | |
00b3ed16 GKH |
3911 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
3912 | ||
3913 | /* | |
3914 | * We need to check BOTH the RX and the TX throttle controls, | |
3915 | * so we use the bitwise OR instead of the logical OR. | |
3916 | */ | |
a7cf7bae | 3917 | pr_debug("flags=0x%lx\n", hw->usb_flags); |
21dc0f89 MM |
3918 | if (!hw->wlandev->hwremoved && |
3919 | ((test_and_clear_bit(THROTTLE_RX, &hw->usb_flags) && | |
6c37e1f9 | 3920 | !test_and_set_bit(WORK_RX_RESUME, &hw->usb_flags)) | |
21dc0f89 MM |
3921 | (test_and_clear_bit(THROTTLE_TX, &hw->usb_flags) && |
3922 | !test_and_set_bit(WORK_TX_RESUME, &hw->usb_flags)) | |
3923 | )) { | |
00b3ed16 GKH |
3924 | schedule_work(&hw->usb_work); |
3925 | } | |
3926 | ||
3927 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
00b3ed16 GKH |
3928 | } |
3929 | ||
00b3ed16 | 3930 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3931 | * hfa384x_usbctlx_submit |
3932 | * | |
3933 | * Called from the doxxx functions to submit a CTLX to the queue | |
3934 | * | |
3935 | * Arguments: | |
3936 | * hw ptr to the hw struct | |
3937 | * ctlx ctlx structure to enqueue | |
3938 | * | |
3939 | * Returns: | |
3940 | * -ENODEV if the adapter is unplugged | |
3941 | * 0 | |
3942 | * | |
3943 | * Side effects: | |
3944 | * | |
3945 | * Call context: | |
3946 | * process or interrupt | |
3947 | *---------------------------------------------------------------- | |
3948 | */ | |
5a919c78 SP |
3949 | static int hfa384x_usbctlx_submit(struct hfa384x *hw, |
3950 | struct hfa384x_usbctlx *ctlx) | |
00b3ed16 GKH |
3951 | { |
3952 | unsigned long flags; | |
00b3ed16 | 3953 | |
00b3ed16 GKH |
3954 | spin_lock_irqsave(&hw->ctlxq.lock, flags); |
3955 | ||
3956 | if (hw->wlandev->hwremoved) { | |
3957 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
675be12f | 3958 | return -ENODEV; |
00b3ed16 GKH |
3959 | } |
3960 | ||
675be12f DN |
3961 | ctlx->state = CTLX_PENDING; |
3962 | list_add_tail(&ctlx->list, &hw->ctlxq.pending); | |
3963 | spin_unlock_irqrestore(&hw->ctlxq.lock, flags); | |
3964 | hfa384x_usbctlxq_run(hw); | |
3965 | ||
3966 | return 0; | |
00b3ed16 GKH |
3967 | } |
3968 | ||
00b3ed16 | 3969 | /*---------------------------------------------------------------- |
d3fcb8a2 SP |
3970 | * hfa384x_isgood_pdrcore |
3971 | * | |
3972 | * Quick check of PDR codes. | |
3973 | * | |
3974 | * Arguments: | |
3975 | * pdrcode PDR code number (host order) | |
3976 | * | |
3977 | * Returns: | |
3978 | * zero not good. | |
3979 | * one is good. | |
3980 | * | |
3981 | * Side effects: | |
3982 | * | |
3983 | * Call context: | |
3984 | *---------------------------------------------------------------- | |
3985 | */ | |
21dc0f89 | 3986 | static int hfa384x_isgood_pdrcode(u16 pdrcode) |
00b3ed16 | 3987 | { |
21dc0f89 | 3988 | switch (pdrcode) { |
00b3ed16 GKH |
3989 | case HFA384x_PDR_END_OF_PDA: |
3990 | case HFA384x_PDR_PCB_PARTNUM: | |
3991 | case HFA384x_PDR_PDAVER: | |
3992 | case HFA384x_PDR_NIC_SERIAL: | |
3993 | case HFA384x_PDR_MKK_MEASUREMENTS: | |
3994 | case HFA384x_PDR_NIC_RAMSIZE: | |
3995 | case HFA384x_PDR_MFISUPRANGE: | |
3996 | case HFA384x_PDR_CFISUPRANGE: | |
3997 | case HFA384x_PDR_NICID: | |
3998 | case HFA384x_PDR_MAC_ADDRESS: | |
3999 | case HFA384x_PDR_REGDOMAIN: | |
4000 | case HFA384x_PDR_ALLOWED_CHANNEL: | |
4001 | case HFA384x_PDR_DEFAULT_CHANNEL: | |
4002 | case HFA384x_PDR_TEMPTYPE: | |
4003 | case HFA384x_PDR_IFR_SETTING: | |
4004 | case HFA384x_PDR_RFR_SETTING: | |
4005 | case HFA384x_PDR_HFA3861_BASELINE: | |
4006 | case HFA384x_PDR_HFA3861_SHADOW: | |
4007 | case HFA384x_PDR_HFA3861_IFRF: | |
4008 | case HFA384x_PDR_HFA3861_CHCALSP: | |
4009 | case HFA384x_PDR_HFA3861_CHCALI: | |
4010 | case HFA384x_PDR_3842_NIC_CONFIG: | |
4011 | case HFA384x_PDR_USB_ID: | |
4012 | case HFA384x_PDR_PCI_ID: | |
4013 | case HFA384x_PDR_PCI_IFCONF: | |
4014 | case HFA384x_PDR_PCI_PMCONF: | |
4015 | case HFA384x_PDR_RFENRGY: | |
4016 | case HFA384x_PDR_HFA3861_MANF_TESTSP: | |
4017 | case HFA384x_PDR_HFA3861_MANF_TESTI: | |
4018 | /* code is OK */ | |
4019 | return 1; | |
00b3ed16 | 4020 | default: |
21dc0f89 | 4021 | if (pdrcode < 0x1000) { |
00b3ed16 | 4022 | /* code is OK, but we don't know exactly what it is */ |
a2120136 SSA |
4023 | pr_debug("Encountered unknown PDR#=0x%04x, assuming it's ok.\n", |
4024 | pdrcode); | |
00b3ed16 | 4025 | return 1; |
00b3ed16 | 4026 | } |
81980c16 | 4027 | break; |
00b3ed16 | 4028 | } |
81980c16 EB |
4029 | /* bad code */ |
4030 | pr_debug("Encountered unknown PDR#=0x%04x, (>=0x1000), assuming it's bad.\n", | |
4031 | pdrcode); | |
4032 | return 0; | |
00b3ed16 | 4033 | } |