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c66ac9db NB |
1 | #ifndef TARGET_CORE_UA_H |
2 | ||
3 | /* | |
4 | * From spc4r17, Table D.1: ASC and ASCQ Assignement | |
5 | */ | |
6 | #define ASCQ_29H_POWER_ON_RESET_OR_BUS_DEVICE_RESET_OCCURED 0x00 | |
7 | #define ASCQ_29H_POWER_ON_OCCURRED 0x01 | |
8 | #define ASCQ_29H_SCSI_BUS_RESET_OCCURED 0x02 | |
9 | #define ASCQ_29H_BUS_DEVICE_RESET_FUNCTION_OCCURRED 0x03 | |
10 | #define ASCQ_29H_DEVICE_INTERNAL_RESET 0x04 | |
11 | #define ASCQ_29H_TRANSCEIVER_MODE_CHANGED_TO_SINGLE_ENDED 0x05 | |
12 | #define ASCQ_29H_TRANSCEIVER_MODE_CHANGED_TO_LVD 0x06 | |
13 | #define ASCQ_29H_NEXUS_LOSS_OCCURRED 0x07 | |
14 | ||
15 | #define ASCQ_2AH_PARAMETERS_CHANGED 0x00 | |
16 | #define ASCQ_2AH_MODE_PARAMETERS_CHANGED 0x01 | |
17 | #define ASCQ_2AH_LOG_PARAMETERS_CHANGED 0x02 | |
18 | #define ASCQ_2AH_RESERVATIONS_PREEMPTED 0x03 | |
19 | #define ASCQ_2AH_RESERVATIONS_RELEASED 0x04 | |
20 | #define ASCQ_2AH_REGISTRATIONS_PREEMPTED 0x05 | |
21 | #define ASCQ_2AH_ASYMMETRIC_ACCESS_STATE_CHANGED 0x06 | |
22 | #define ASCQ_2AH_IMPLICT_ASYMMETRIC_ACCESS_STATE_TRANSITION_FAILED 0x07 | |
23 | #define ASCQ_2AH_PRIORITY_CHANGED 0x08 | |
24 | ||
25 | #define ASCQ_2CH_PREVIOUS_RESERVATION_CONFLICT_STATUS 0x09 | |
26 | ||
27 | extern struct kmem_cache *se_ua_cache; | |
28 | ||
29 | extern int core_scsi3_ua_check(struct se_cmd *, unsigned char *); | |
30 | extern int core_scsi3_ua_allocate(struct se_node_acl *, u32, u8, u8); | |
31 | extern void core_scsi3_ua_release_all(struct se_dev_entry *); | |
32 | extern void core_scsi3_ua_for_check_condition(struct se_cmd *, u8 *, u8 *); | |
33 | extern int core_scsi3_ua_clear_for_request_sense(struct se_cmd *, | |
34 | u8 *, u8 *); | |
35 | ||
36 | #endif /* TARGET_CORE_UA_H */ |