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45f8b0dd FE |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // | |
3 | // Copyright 2013 Freescale Semiconductor, Inc. | |
ca3de46b | 4 | |
329fe7b1 | 5 | #include <linux/clk.h> |
4d753aa7 | 6 | #include <linux/cpufreq.h> |
ca3de46b | 7 | #include <linux/cpu_cooling.h> |
ca3de46b SG |
8 | #include <linux/delay.h> |
9 | #include <linux/device.h> | |
10 | #include <linux/init.h> | |
37713a1e | 11 | #include <linux/interrupt.h> |
ca3de46b SG |
12 | #include <linux/io.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/mfd/syscon.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/of.h> | |
3c94f17e | 17 | #include <linux/of_device.h> |
ca3de46b SG |
18 | #include <linux/platform_device.h> |
19 | #include <linux/regmap.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/thermal.h> | |
22 | #include <linux/types.h> | |
ae621557 | 23 | #include <linux/nvmem-consumer.h> |
ca3de46b SG |
24 | |
25 | #define REG_SET 0x4 | |
26 | #define REG_CLR 0x8 | |
27 | #define REG_TOG 0xc | |
28 | ||
f085f672 AH |
29 | /* i.MX6 specific */ |
30 | #define IMX6_MISC0 0x0150 | |
31 | #define IMX6_MISC0_REFTOP_SELBIASOFF (1 << 3) | |
32 | #define IMX6_MISC1 0x0160 | |
33 | #define IMX6_MISC1_IRQ_TEMPHIGH (1 << 29) | |
3c94f17e | 34 | /* Below LOW and PANIC bits are only for TEMPMON_IMX6SX */ |
f085f672 AH |
35 | #define IMX6_MISC1_IRQ_TEMPLOW (1 << 28) |
36 | #define IMX6_MISC1_IRQ_TEMPPANIC (1 << 27) | |
37 | ||
38 | #define IMX6_TEMPSENSE0 0x0180 | |
39 | #define IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT 20 | |
40 | #define IMX6_TEMPSENSE0_ALARM_VALUE_MASK (0xfff << 20) | |
41 | #define IMX6_TEMPSENSE0_TEMP_CNT_SHIFT 8 | |
42 | #define IMX6_TEMPSENSE0_TEMP_CNT_MASK (0xfff << 8) | |
43 | #define IMX6_TEMPSENSE0_FINISHED (1 << 2) | |
44 | #define IMX6_TEMPSENSE0_MEASURE_TEMP (1 << 1) | |
45 | #define IMX6_TEMPSENSE0_POWER_DOWN (1 << 0) | |
46 | ||
47 | #define IMX6_TEMPSENSE1 0x0190 | |
48 | #define IMX6_TEMPSENSE1_MEASURE_FREQ 0xffff | |
49 | #define IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT 0 | |
ca3de46b | 50 | |
a2291bad | 51 | #define OCOTP_MEM0 0x0480 |
ca3de46b SG |
52 | #define OCOTP_ANA1 0x04e0 |
53 | ||
f085f672 AH |
54 | /* Below TEMPSENSE2 is only for TEMPMON_IMX6SX */ |
55 | #define IMX6_TEMPSENSE2 0x0290 | |
56 | #define IMX6_TEMPSENSE2_LOW_VALUE_SHIFT 0 | |
57 | #define IMX6_TEMPSENSE2_LOW_VALUE_MASK 0xfff | |
58 | #define IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT 16 | |
59 | #define IMX6_TEMPSENSE2_PANIC_VALUE_MASK 0xfff0000 | |
60 | ||
61 | /* i.MX7 specific */ | |
62 | #define IMX7_ANADIG_DIGPROG 0x800 | |
63 | #define IMX7_TEMPSENSE0 0x300 | |
64 | #define IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT 18 | |
65 | #define IMX7_TEMPSENSE0_PANIC_ALARM_MASK (0x1ff << 18) | |
66 | #define IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT 9 | |
67 | #define IMX7_TEMPSENSE0_HIGH_ALARM_MASK (0x1ff << 9) | |
68 | #define IMX7_TEMPSENSE0_LOW_ALARM_SHIFT 0 | |
69 | #define IMX7_TEMPSENSE0_LOW_ALARM_MASK 0x1ff | |
70 | ||
71 | #define IMX7_TEMPSENSE1 0x310 | |
72 | #define IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT 16 | |
73 | #define IMX7_TEMPSENSE1_MEASURE_FREQ_MASK (0xffff << 16) | |
74 | #define IMX7_TEMPSENSE1_FINISHED (1 << 11) | |
75 | #define IMX7_TEMPSENSE1_MEASURE_TEMP (1 << 10) | |
76 | #define IMX7_TEMPSENSE1_POWER_DOWN (1 << 9) | |
77 | #define IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT 0 | |
78 | #define IMX7_TEMPSENSE1_TEMP_VALUE_MASK 0x1ff | |
79 | ||
ca3de46b SG |
80 | /* The driver supports 1 passive trip point and 1 critical trip point */ |
81 | enum imx_thermal_trip { | |
82 | IMX_TRIP_PASSIVE, | |
83 | IMX_TRIP_CRITICAL, | |
84 | IMX_TRIP_NUM, | |
85 | }; | |
86 | ||
ca3de46b SG |
87 | #define IMX_POLLING_DELAY 2000 /* millisecond */ |
88 | #define IMX_PASSIVE_DELAY 1000 | |
89 | ||
3c94f17e AH |
90 | #define TEMPMON_IMX6Q 1 |
91 | #define TEMPMON_IMX6SX 2 | |
f085f672 | 92 | #define TEMPMON_IMX7D 3 |
3c94f17e AH |
93 | |
94 | struct thermal_soc_data { | |
95 | u32 version; | |
f085f672 AH |
96 | |
97 | u32 sensor_ctrl; | |
98 | u32 power_down_mask; | |
99 | u32 measure_temp_mask; | |
100 | ||
101 | u32 measure_freq_ctrl; | |
102 | u32 measure_freq_mask; | |
103 | u32 measure_freq_shift; | |
104 | ||
105 | u32 temp_data; | |
106 | u32 temp_value_mask; | |
107 | u32 temp_value_shift; | |
108 | u32 temp_valid_mask; | |
109 | ||
110 | u32 panic_alarm_ctrl; | |
111 | u32 panic_alarm_mask; | |
112 | u32 panic_alarm_shift; | |
113 | ||
114 | u32 high_alarm_ctrl; | |
115 | u32 high_alarm_mask; | |
116 | u32 high_alarm_shift; | |
117 | ||
118 | u32 low_alarm_ctrl; | |
119 | u32 low_alarm_mask; | |
120 | u32 low_alarm_shift; | |
3c94f17e AH |
121 | }; |
122 | ||
123 | static struct thermal_soc_data thermal_imx6q_data = { | |
124 | .version = TEMPMON_IMX6Q, | |
f085f672 AH |
125 | |
126 | .sensor_ctrl = IMX6_TEMPSENSE0, | |
127 | .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, | |
128 | .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, | |
129 | ||
130 | .measure_freq_ctrl = IMX6_TEMPSENSE1, | |
131 | .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
132 | .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, | |
133 | ||
134 | .temp_data = IMX6_TEMPSENSE0, | |
135 | .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, | |
136 | .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, | |
137 | .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, | |
138 | ||
139 | .high_alarm_ctrl = IMX6_TEMPSENSE0, | |
140 | .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, | |
141 | .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, | |
3c94f17e AH |
142 | }; |
143 | ||
144 | static struct thermal_soc_data thermal_imx6sx_data = { | |
145 | .version = TEMPMON_IMX6SX, | |
f085f672 AH |
146 | |
147 | .sensor_ctrl = IMX6_TEMPSENSE0, | |
148 | .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, | |
149 | .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, | |
150 | ||
151 | .measure_freq_ctrl = IMX6_TEMPSENSE1, | |
152 | .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
153 | .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, | |
154 | ||
155 | .temp_data = IMX6_TEMPSENSE0, | |
156 | .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, | |
157 | .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, | |
158 | .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, | |
159 | ||
160 | .high_alarm_ctrl = IMX6_TEMPSENSE0, | |
161 | .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, | |
162 | .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, | |
163 | ||
164 | .panic_alarm_ctrl = IMX6_TEMPSENSE2, | |
165 | .panic_alarm_mask = IMX6_TEMPSENSE2_PANIC_VALUE_MASK, | |
166 | .panic_alarm_shift = IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT, | |
167 | ||
168 | .low_alarm_ctrl = IMX6_TEMPSENSE2, | |
169 | .low_alarm_mask = IMX6_TEMPSENSE2_LOW_VALUE_MASK, | |
170 | .low_alarm_shift = IMX6_TEMPSENSE2_LOW_VALUE_SHIFT, | |
171 | }; | |
172 | ||
173 | static struct thermal_soc_data thermal_imx7d_data = { | |
174 | .version = TEMPMON_IMX7D, | |
175 | ||
176 | .sensor_ctrl = IMX7_TEMPSENSE1, | |
177 | .power_down_mask = IMX7_TEMPSENSE1_POWER_DOWN, | |
178 | .measure_temp_mask = IMX7_TEMPSENSE1_MEASURE_TEMP, | |
179 | ||
180 | .measure_freq_ctrl = IMX7_TEMPSENSE1, | |
181 | .measure_freq_shift = IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
182 | .measure_freq_mask = IMX7_TEMPSENSE1_MEASURE_FREQ_MASK, | |
183 | ||
184 | .temp_data = IMX7_TEMPSENSE1, | |
185 | .temp_value_mask = IMX7_TEMPSENSE1_TEMP_VALUE_MASK, | |
186 | .temp_value_shift = IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT, | |
187 | .temp_valid_mask = IMX7_TEMPSENSE1_FINISHED, | |
188 | ||
189 | .panic_alarm_ctrl = IMX7_TEMPSENSE1, | |
190 | .panic_alarm_mask = IMX7_TEMPSENSE0_PANIC_ALARM_MASK, | |
191 | .panic_alarm_shift = IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT, | |
192 | ||
193 | .high_alarm_ctrl = IMX7_TEMPSENSE0, | |
194 | .high_alarm_mask = IMX7_TEMPSENSE0_HIGH_ALARM_MASK, | |
195 | .high_alarm_shift = IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT, | |
196 | ||
197 | .low_alarm_ctrl = IMX7_TEMPSENSE0, | |
198 | .low_alarm_mask = IMX7_TEMPSENSE0_LOW_ALARM_MASK, | |
199 | .low_alarm_shift = IMX7_TEMPSENSE0_LOW_ALARM_SHIFT, | |
3c94f17e AH |
200 | }; |
201 | ||
ca3de46b | 202 | struct imx_thermal_data { |
4d753aa7 | 203 | struct cpufreq_policy *policy; |
ca3de46b SG |
204 | struct thermal_zone_device *tz; |
205 | struct thermal_cooling_device *cdev; | |
206 | enum thermal_device_mode mode; | |
207 | struct regmap *tempmon; | |
ae621557 | 208 | u32 c1, c2; /* See formula in imx_init_calib() */ |
17e8351a SH |
209 | int temp_passive; |
210 | int temp_critical; | |
a2291bad | 211 | int temp_max; |
17e8351a SH |
212 | int alarm_temp; |
213 | int last_temp; | |
37713a1e PZ |
214 | bool irq_enabled; |
215 | int irq; | |
329fe7b1 | 216 | struct clk *thermal_clk; |
3c94f17e | 217 | const struct thermal_soc_data *socdata; |
a2291bad | 218 | const char *temp_grade; |
ca3de46b SG |
219 | }; |
220 | ||
3c94f17e | 221 | static void imx_set_panic_temp(struct imx_thermal_data *data, |
17e8351a | 222 | int panic_temp) |
3c94f17e | 223 | { |
f085f672 | 224 | const struct thermal_soc_data *soc_data = data->socdata; |
3c94f17e AH |
225 | struct regmap *map = data->tempmon; |
226 | int critical_value; | |
227 | ||
228 | critical_value = (data->c2 - panic_temp) / data->c1; | |
f085f672 AH |
229 | |
230 | regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, | |
231 | soc_data->panic_alarm_mask); | |
232 | regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, | |
233 | critical_value << soc_data->panic_alarm_shift); | |
3c94f17e AH |
234 | } |
235 | ||
37713a1e | 236 | static void imx_set_alarm_temp(struct imx_thermal_data *data, |
17e8351a | 237 | int alarm_temp) |
37713a1e PZ |
238 | { |
239 | struct regmap *map = data->tempmon; | |
f085f672 | 240 | const struct thermal_soc_data *soc_data = data->socdata; |
37713a1e PZ |
241 | int alarm_value; |
242 | ||
243 | data->alarm_temp = alarm_temp; | |
f085f672 AH |
244 | |
245 | if (data->socdata->version == TEMPMON_IMX7D) | |
246 | alarm_value = alarm_temp / 1000 + data->c1 - 25; | |
247 | else | |
248 | alarm_value = (data->c2 - alarm_temp) / data->c1; | |
249 | ||
250 | regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, | |
251 | soc_data->high_alarm_mask); | |
252 | regmap_write(map, soc_data->high_alarm_ctrl + REG_SET, | |
253 | alarm_value << soc_data->high_alarm_shift); | |
37713a1e PZ |
254 | } |
255 | ||
17e8351a | 256 | static int imx_get_temp(struct thermal_zone_device *tz, int *temp) |
ca3de46b SG |
257 | { |
258 | struct imx_thermal_data *data = tz->devdata; | |
f085f672 | 259 | const struct thermal_soc_data *soc_data = data->socdata; |
ca3de46b | 260 | struct regmap *map = data->tempmon; |
ca3de46b | 261 | unsigned int n_meas; |
37713a1e | 262 | bool wait; |
ca3de46b SG |
263 | u32 val; |
264 | ||
37713a1e PZ |
265 | if (data->mode == THERMAL_DEVICE_ENABLED) { |
266 | /* Check if a measurement is currently in progress */ | |
f085f672 AH |
267 | regmap_read(map, soc_data->temp_data, &val); |
268 | wait = !(val & soc_data->temp_valid_mask); | |
37713a1e PZ |
269 | } else { |
270 | /* | |
271 | * Every time we measure the temperature, we will power on the | |
272 | * temperature sensor, enable measurements, take a reading, | |
273 | * disable measurements, power off the temperature sensor. | |
274 | */ | |
f085f672 AH |
275 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
276 | soc_data->power_down_mask); | |
277 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
278 | soc_data->measure_temp_mask); | |
37713a1e PZ |
279 | |
280 | wait = true; | |
281 | } | |
ca3de46b SG |
282 | |
283 | /* | |
284 | * According to the temp sensor designers, it may require up to ~17us | |
285 | * to complete a measurement. | |
286 | */ | |
37713a1e PZ |
287 | if (wait) |
288 | usleep_range(20, 50); | |
ca3de46b | 289 | |
f085f672 | 290 | regmap_read(map, soc_data->temp_data, &val); |
37713a1e PZ |
291 | |
292 | if (data->mode != THERMAL_DEVICE_ENABLED) { | |
f085f672 AH |
293 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
294 | soc_data->measure_temp_mask); | |
295 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
296 | soc_data->power_down_mask); | |
37713a1e | 297 | } |
ca3de46b | 298 | |
f085f672 | 299 | if ((val & soc_data->temp_valid_mask) == 0) { |
ca3de46b SG |
300 | dev_dbg(&tz->device, "temp measurement never finished\n"); |
301 | return -EAGAIN; | |
302 | } | |
303 | ||
f085f672 AH |
304 | n_meas = (val & soc_data->temp_value_mask) |
305 | >> soc_data->temp_value_shift; | |
ca3de46b | 306 | |
ae621557 | 307 | /* See imx_init_calib() for formula derivation */ |
f085f672 AH |
308 | if (data->socdata->version == TEMPMON_IMX7D) |
309 | *temp = (n_meas - data->c1 + 25) * 1000; | |
310 | else | |
311 | *temp = data->c2 - n_meas * data->c1; | |
ca3de46b | 312 | |
3c94f17e AH |
313 | /* Update alarm value to next higher trip point for TEMPMON_IMX6Q */ |
314 | if (data->socdata->version == TEMPMON_IMX6Q) { | |
315 | if (data->alarm_temp == data->temp_passive && | |
316 | *temp >= data->temp_passive) | |
317 | imx_set_alarm_temp(data, data->temp_critical); | |
318 | if (data->alarm_temp == data->temp_critical && | |
319 | *temp < data->temp_passive) { | |
320 | imx_set_alarm_temp(data, data->temp_passive); | |
17e8351a | 321 | dev_dbg(&tz->device, "thermal alarm off: T < %d\n", |
3c94f17e AH |
322 | data->alarm_temp / 1000); |
323 | } | |
37713a1e PZ |
324 | } |
325 | ||
326 | if (*temp != data->last_temp) { | |
17e8351a | 327 | dev_dbg(&tz->device, "millicelsius: %d\n", *temp); |
37713a1e PZ |
328 | data->last_temp = *temp; |
329 | } | |
330 | ||
331 | /* Reenable alarm IRQ if temperature below alarm temperature */ | |
332 | if (!data->irq_enabled && *temp < data->alarm_temp) { | |
333 | data->irq_enabled = true; | |
334 | enable_irq(data->irq); | |
ca3de46b SG |
335 | } |
336 | ||
337 | return 0; | |
338 | } | |
339 | ||
340 | static int imx_get_mode(struct thermal_zone_device *tz, | |
341 | enum thermal_device_mode *mode) | |
342 | { | |
343 | struct imx_thermal_data *data = tz->devdata; | |
344 | ||
345 | *mode = data->mode; | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static int imx_set_mode(struct thermal_zone_device *tz, | |
351 | enum thermal_device_mode mode) | |
352 | { | |
353 | struct imx_thermal_data *data = tz->devdata; | |
37713a1e | 354 | struct regmap *map = data->tempmon; |
f085f672 | 355 | const struct thermal_soc_data *soc_data = data->socdata; |
ca3de46b SG |
356 | |
357 | if (mode == THERMAL_DEVICE_ENABLED) { | |
358 | tz->polling_delay = IMX_POLLING_DELAY; | |
359 | tz->passive_delay = IMX_PASSIVE_DELAY; | |
37713a1e | 360 | |
f085f672 AH |
361 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
362 | soc_data->power_down_mask); | |
363 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
364 | soc_data->measure_temp_mask); | |
37713a1e PZ |
365 | |
366 | if (!data->irq_enabled) { | |
367 | data->irq_enabled = true; | |
368 | enable_irq(data->irq); | |
369 | } | |
ca3de46b | 370 | } else { |
f085f672 AH |
371 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
372 | soc_data->measure_temp_mask); | |
373 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
374 | soc_data->power_down_mask); | |
37713a1e | 375 | |
ca3de46b SG |
376 | tz->polling_delay = 0; |
377 | tz->passive_delay = 0; | |
37713a1e PZ |
378 | |
379 | if (data->irq_enabled) { | |
380 | disable_irq(data->irq); | |
381 | data->irq_enabled = false; | |
382 | } | |
ca3de46b SG |
383 | } |
384 | ||
385 | data->mode = mode; | |
0e70f466 | 386 | thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED); |
ca3de46b SG |
387 | |
388 | return 0; | |
389 | } | |
390 | ||
391 | static int imx_get_trip_type(struct thermal_zone_device *tz, int trip, | |
392 | enum thermal_trip_type *type) | |
393 | { | |
394 | *type = (trip == IMX_TRIP_PASSIVE) ? THERMAL_TRIP_PASSIVE : | |
395 | THERMAL_TRIP_CRITICAL; | |
396 | return 0; | |
397 | } | |
398 | ||
17e8351a | 399 | static int imx_get_crit_temp(struct thermal_zone_device *tz, int *temp) |
ca3de46b | 400 | { |
017e5142 PZ |
401 | struct imx_thermal_data *data = tz->devdata; |
402 | ||
403 | *temp = data->temp_critical; | |
ca3de46b SG |
404 | return 0; |
405 | } | |
406 | ||
407 | static int imx_get_trip_temp(struct thermal_zone_device *tz, int trip, | |
17e8351a | 408 | int *temp) |
ca3de46b | 409 | { |
017e5142 PZ |
410 | struct imx_thermal_data *data = tz->devdata; |
411 | ||
412 | *temp = (trip == IMX_TRIP_PASSIVE) ? data->temp_passive : | |
413 | data->temp_critical; | |
414 | return 0; | |
415 | } | |
416 | ||
417 | static int imx_set_trip_temp(struct thermal_zone_device *tz, int trip, | |
17e8351a | 418 | int temp) |
017e5142 PZ |
419 | { |
420 | struct imx_thermal_data *data = tz->devdata; | |
421 | ||
a2291bad | 422 | /* do not allow changing critical threshold */ |
017e5142 PZ |
423 | if (trip == IMX_TRIP_CRITICAL) |
424 | return -EPERM; | |
425 | ||
a2291bad TH |
426 | /* do not allow passive to be set higher than critical */ |
427 | if (temp < 0 || temp > data->temp_critical) | |
017e5142 PZ |
428 | return -EINVAL; |
429 | ||
430 | data->temp_passive = temp; | |
431 | ||
37713a1e PZ |
432 | imx_set_alarm_temp(data, temp); |
433 | ||
ca3de46b SG |
434 | return 0; |
435 | } | |
436 | ||
437 | static int imx_bind(struct thermal_zone_device *tz, | |
438 | struct thermal_cooling_device *cdev) | |
439 | { | |
440 | int ret; | |
441 | ||
442 | ret = thermal_zone_bind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev, | |
443 | THERMAL_NO_LIMIT, | |
6cd9e9f6 KS |
444 | THERMAL_NO_LIMIT, |
445 | THERMAL_WEIGHT_DEFAULT); | |
ca3de46b SG |
446 | if (ret) { |
447 | dev_err(&tz->device, | |
448 | "binding zone %s with cdev %s failed:%d\n", | |
449 | tz->type, cdev->type, ret); | |
450 | return ret; | |
451 | } | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
456 | static int imx_unbind(struct thermal_zone_device *tz, | |
457 | struct thermal_cooling_device *cdev) | |
458 | { | |
459 | int ret; | |
460 | ||
461 | ret = thermal_zone_unbind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev); | |
462 | if (ret) { | |
463 | dev_err(&tz->device, | |
464 | "unbinding zone %s with cdev %s failed:%d\n", | |
465 | tz->type, cdev->type, ret); | |
466 | return ret; | |
467 | } | |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
cbb07bb3 | 472 | static struct thermal_zone_device_ops imx_tz_ops = { |
ca3de46b SG |
473 | .bind = imx_bind, |
474 | .unbind = imx_unbind, | |
475 | .get_temp = imx_get_temp, | |
476 | .get_mode = imx_get_mode, | |
477 | .set_mode = imx_set_mode, | |
478 | .get_trip_type = imx_get_trip_type, | |
479 | .get_trip_temp = imx_get_trip_temp, | |
480 | .get_crit_temp = imx_get_crit_temp, | |
017e5142 | 481 | .set_trip_temp = imx_set_trip_temp, |
ca3de46b SG |
482 | }; |
483 | ||
e4bb2240 | 484 | static int imx_init_calib(struct platform_device *pdev, u32 ocotp_ana1) |
ca3de46b SG |
485 | { |
486 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
4e5f61ca | 487 | int n1; |
749e8be7 | 488 | u64 temp64; |
ca3de46b | 489 | |
e4bb2240 | 490 | if (ocotp_ana1 == 0 || ocotp_ana1 == ~0) { |
ca3de46b SG |
491 | dev_err(&pdev->dev, "invalid sensor calibration data\n"); |
492 | return -EINVAL; | |
493 | } | |
494 | ||
f085f672 AH |
495 | /* |
496 | * On i.MX7D, we only use the calibration data at 25C to get the temp, | |
497 | * Tmeas = ( Nmeas - n1) + 25; n1 is the fuse value for 25C. | |
498 | */ | |
499 | if (data->socdata->version == TEMPMON_IMX7D) { | |
500 | data->c1 = (ocotp_ana1 >> 9) & 0x1ff; | |
501 | return 0; | |
502 | } | |
503 | ||
ca3de46b | 504 | /* |
c5bbdb4b UKK |
505 | * The sensor is calibrated at 25 °C (aka T1) and the value measured |
506 | * (aka N1) at this temperature is provided in bits [31:20] in the | |
507 | * i.MX's OCOTP value ANA1. | |
508 | * To find the actual temperature T, the following formula has to be used | |
509 | * when reading value n from the sensor: | |
510 | * | |
4e5f61ca UKK |
511 | * T = T1 + (N - N1) / (0.4148468 - 0.0015423 * N1) °C + 3.580661 °C |
512 | * = [T1' - N1 / (0.4148468 - 0.0015423 * N1) °C] + N / (0.4148468 - 0.0015423 * N1) °C | |
513 | * = [T1' + N1 / (0.0015423 * N1 - 0.4148468) °C] - N / (0.0015423 * N1 - 0.4148468) °C | |
c5bbdb4b UKK |
514 | * = c2 - c1 * N |
515 | * | |
516 | * with | |
517 | * | |
4e5f61ca UKK |
518 | * T1' = 28.580661 °C |
519 | * c1 = 1 / (0.0015423 * N1 - 0.4297157) °C | |
520 | * c2 = T1' + N1 / (0.0015423 * N1 - 0.4148468) °C | |
521 | * = T1' + N1 * c1 | |
ca3de46b | 522 | */ |
e4bb2240 | 523 | n1 = ocotp_ana1 >> 20; |
ca3de46b | 524 | |
4e5f61ca | 525 | temp64 = 10000000; /* use 10^7 as fixed point constant for values in formula */ |
c5bbdb4b | 526 | temp64 *= 1000; /* to get result in °mC */ |
4e5f61ca | 527 | do_div(temp64, 15423 * n1 - 4148468); |
749e8be7 | 528 | data->c1 = temp64; |
4e5f61ca | 529 | data->c2 = n1 * data->c1 + 28581; |
ca3de46b | 530 | |
ae621557 LC |
531 | return 0; |
532 | } | |
533 | ||
e4bb2240 | 534 | static void imx_init_temp_grade(struct platform_device *pdev, u32 ocotp_mem0) |
ae621557 LC |
535 | { |
536 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
a2291bad TH |
537 | |
538 | /* The maximum die temp is specified by the Temperature Grade */ | |
e4bb2240 | 539 | switch ((ocotp_mem0 >> 6) & 0x3) { |
339d7492 | 540 | case 0: /* Commercial (0 to 95 °C) */ |
a2291bad TH |
541 | data->temp_grade = "Commercial"; |
542 | data->temp_max = 95000; | |
543 | break; | |
339d7492 | 544 | case 1: /* Extended Commercial (-20 °C to 105 °C) */ |
a2291bad TH |
545 | data->temp_grade = "Extended Commercial"; |
546 | data->temp_max = 105000; | |
547 | break; | |
339d7492 | 548 | case 2: /* Industrial (-40 °C to 105 °C) */ |
a2291bad TH |
549 | data->temp_grade = "Industrial"; |
550 | data->temp_max = 105000; | |
551 | break; | |
339d7492 | 552 | case 3: /* Automotive (-40 °C to 125 °C) */ |
a2291bad TH |
553 | data->temp_grade = "Automotive"; |
554 | data->temp_max = 125000; | |
555 | break; | |
556 | } | |
017e5142 PZ |
557 | |
558 | /* | |
339d7492 UKK |
559 | * Set the critical trip point at 5 °C under max |
560 | * Set the passive trip point at 10 °C under max (changeable via sysfs) | |
017e5142 | 561 | */ |
a2291bad TH |
562 | data->temp_critical = data->temp_max - (1000 * 5); |
563 | data->temp_passive = data->temp_max - (1000 * 10); | |
ae621557 LC |
564 | } |
565 | ||
566 | static int imx_init_from_tempmon_data(struct platform_device *pdev) | |
567 | { | |
568 | struct regmap *map; | |
569 | int ret; | |
570 | u32 val; | |
571 | ||
572 | map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, | |
573 | "fsl,tempmon-data"); | |
574 | if (IS_ERR(map)) { | |
575 | ret = PTR_ERR(map); | |
576 | dev_err(&pdev->dev, "failed to get sensor regmap: %d\n", ret); | |
577 | return ret; | |
578 | } | |
579 | ||
580 | ret = regmap_read(map, OCOTP_ANA1, &val); | |
581 | if (ret) { | |
582 | dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); | |
583 | return ret; | |
584 | } | |
585 | ret = imx_init_calib(pdev, val); | |
586 | if (ret) | |
587 | return ret; | |
588 | ||
589 | ret = regmap_read(map, OCOTP_MEM0, &val); | |
590 | if (ret) { | |
591 | dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); | |
592 | return ret; | |
593 | } | |
594 | imx_init_temp_grade(pdev, val); | |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
599 | static int imx_init_from_nvmem_cells(struct platform_device *pdev) | |
600 | { | |
601 | int ret; | |
602 | u32 val; | |
603 | ||
604 | ret = nvmem_cell_read_u32(&pdev->dev, "calib", &val); | |
605 | if (ret) | |
606 | return ret; | |
607 | imx_init_calib(pdev, val); | |
608 | ||
609 | ret = nvmem_cell_read_u32(&pdev->dev, "temp_grade", &val); | |
610 | if (ret) | |
611 | return ret; | |
612 | imx_init_temp_grade(pdev, val); | |
017e5142 | 613 | |
ca3de46b SG |
614 | return 0; |
615 | } | |
616 | ||
37713a1e PZ |
617 | static irqreturn_t imx_thermal_alarm_irq(int irq, void *dev) |
618 | { | |
619 | struct imx_thermal_data *data = dev; | |
620 | ||
621 | disable_irq_nosync(irq); | |
622 | data->irq_enabled = false; | |
623 | ||
624 | return IRQ_WAKE_THREAD; | |
625 | } | |
626 | ||
627 | static irqreturn_t imx_thermal_alarm_irq_thread(int irq, void *dev) | |
628 | { | |
629 | struct imx_thermal_data *data = dev; | |
630 | ||
17e8351a | 631 | dev_dbg(&data->tz->device, "THERMAL ALARM: T > %d\n", |
37713a1e PZ |
632 | data->alarm_temp / 1000); |
633 | ||
0e70f466 | 634 | thermal_zone_device_update(data->tz, THERMAL_EVENT_UNSPECIFIED); |
37713a1e PZ |
635 | |
636 | return IRQ_HANDLED; | |
637 | } | |
638 | ||
3c94f17e AH |
639 | static const struct of_device_id of_imx_thermal_match[] = { |
640 | { .compatible = "fsl,imx6q-tempmon", .data = &thermal_imx6q_data, }, | |
641 | { .compatible = "fsl,imx6sx-tempmon", .data = &thermal_imx6sx_data, }, | |
f085f672 | 642 | { .compatible = "fsl,imx7d-tempmon", .data = &thermal_imx7d_data, }, |
3c94f17e AH |
643 | { /* end */ } |
644 | }; | |
645 | MODULE_DEVICE_TABLE(of, of_imx_thermal_match); | |
646 | ||
ca3de46b SG |
647 | static int imx_thermal_probe(struct platform_device *pdev) |
648 | { | |
649 | struct imx_thermal_data *data; | |
ca3de46b | 650 | struct regmap *map; |
37713a1e | 651 | int measure_freq; |
ca3de46b SG |
652 | int ret; |
653 | ||
654 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | |
655 | if (!data) | |
656 | return -ENOMEM; | |
657 | ||
658 | map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "fsl,tempmon"); | |
659 | if (IS_ERR(map)) { | |
660 | ret = PTR_ERR(map); | |
661 | dev_err(&pdev->dev, "failed to get tempmon regmap: %d\n", ret); | |
662 | return ret; | |
663 | } | |
664 | data->tempmon = map; | |
665 | ||
829bc78a | 666 | data->socdata = of_device_get_match_data(&pdev->dev); |
8b051ec3 SV |
667 | if (!data->socdata) { |
668 | dev_err(&pdev->dev, "no device match found\n"); | |
669 | return -ENODEV; | |
670 | } | |
3c94f17e AH |
671 | |
672 | /* make sure the IRQ flag is clear before enabling irq on i.MX6SX */ | |
673 | if (data->socdata->version == TEMPMON_IMX6SX) { | |
f085f672 AH |
674 | regmap_write(map, IMX6_MISC1 + REG_CLR, |
675 | IMX6_MISC1_IRQ_TEMPHIGH | IMX6_MISC1_IRQ_TEMPLOW | |
676 | | IMX6_MISC1_IRQ_TEMPPANIC); | |
3c94f17e AH |
677 | /* |
678 | * reset value of LOW ALARM is incorrect, set it to lowest | |
679 | * value to avoid false trigger of low alarm. | |
680 | */ | |
f085f672 AH |
681 | regmap_write(map, data->socdata->low_alarm_ctrl + REG_SET, |
682 | data->socdata->low_alarm_mask); | |
3c94f17e AH |
683 | } |
684 | ||
37713a1e PZ |
685 | data->irq = platform_get_irq(pdev, 0); |
686 | if (data->irq < 0) | |
687 | return data->irq; | |
688 | ||
ca3de46b SG |
689 | platform_set_drvdata(pdev, data); |
690 | ||
ae621557 LC |
691 | if (of_find_property(pdev->dev.of_node, "nvmem-cells", NULL)) { |
692 | ret = imx_init_from_nvmem_cells(pdev); | |
693 | if (ret == -EPROBE_DEFER) | |
694 | return ret; | |
695 | if (ret) { | |
696 | dev_err(&pdev->dev, "failed to init from nvmem: %d\n", | |
697 | ret); | |
698 | return ret; | |
699 | } | |
700 | } else { | |
701 | ret = imx_init_from_tempmon_data(pdev); | |
702 | if (ret) { | |
703 | dev_err(&pdev->dev, "failed to init from from fsl,tempmon-data\n"); | |
704 | return ret; | |
705 | } | |
ca3de46b SG |
706 | } |
707 | ||
708 | /* Make sure sensor is in known good state for measurements */ | |
f085f672 AH |
709 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
710 | data->socdata->power_down_mask); | |
711 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, | |
712 | data->socdata->measure_temp_mask); | |
713 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, | |
714 | data->socdata->measure_freq_mask); | |
715 | if (data->socdata->version != TEMPMON_IMX7D) | |
716 | regmap_write(map, IMX6_MISC0 + REG_SET, | |
717 | IMX6_MISC0_REFTOP_SELBIASOFF); | |
718 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
719 | data->socdata->power_down_mask); | |
ca3de46b | 720 | |
4d753aa7 VK |
721 | data->policy = cpufreq_cpu_get(0); |
722 | if (!data->policy) { | |
723 | pr_debug("%s: CPUFreq policy not found\n", __func__); | |
724 | return -EPROBE_DEFER; | |
725 | } | |
726 | ||
727 | data->cdev = cpufreq_cooling_register(data->policy); | |
ca3de46b SG |
728 | if (IS_ERR(data->cdev)) { |
729 | ret = PTR_ERR(data->cdev); | |
4d753aa7 VK |
730 | dev_err(&pdev->dev, |
731 | "failed to register cpufreq cooling device: %d\n", ret); | |
732 | cpufreq_cpu_put(data->policy); | |
ca3de46b SG |
733 | return ret; |
734 | } | |
735 | ||
90a21ff5 HK |
736 | data->thermal_clk = devm_clk_get(&pdev->dev, NULL); |
737 | if (IS_ERR(data->thermal_clk)) { | |
738 | ret = PTR_ERR(data->thermal_clk); | |
739 | if (ret != -EPROBE_DEFER) | |
740 | dev_err(&pdev->dev, | |
741 | "failed to get thermal clk: %d\n", ret); | |
742 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 743 | cpufreq_cpu_put(data->policy); |
90a21ff5 HK |
744 | return ret; |
745 | } | |
746 | ||
747 | /* | |
748 | * Thermal sensor needs clk on to get correct value, normally | |
749 | * we should enable its clk before taking measurement and disable | |
750 | * clk after measurement is done, but if alarm function is enabled, | |
751 | * hardware will auto measure the temperature periodically, so we | |
752 | * need to keep the clk always on for alarm function. | |
753 | */ | |
754 | ret = clk_prepare_enable(data->thermal_clk); | |
755 | if (ret) { | |
756 | dev_err(&pdev->dev, "failed to enable thermal clk: %d\n", ret); | |
757 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 758 | cpufreq_cpu_put(data->policy); |
90a21ff5 HK |
759 | return ret; |
760 | } | |
761 | ||
ca3de46b | 762 | data->tz = thermal_zone_device_register("imx_thermal_zone", |
017e5142 PZ |
763 | IMX_TRIP_NUM, |
764 | BIT(IMX_TRIP_PASSIVE), data, | |
ca3de46b SG |
765 | &imx_tz_ops, NULL, |
766 | IMX_PASSIVE_DELAY, | |
767 | IMX_POLLING_DELAY); | |
768 | if (IS_ERR(data->tz)) { | |
769 | ret = PTR_ERR(data->tz); | |
770 | dev_err(&pdev->dev, | |
771 | "failed to register thermal zone device %d\n", ret); | |
90a21ff5 | 772 | clk_disable_unprepare(data->thermal_clk); |
ca3de46b | 773 | cpufreq_cooling_unregister(data->cdev); |
4d753aa7 | 774 | cpufreq_cpu_put(data->policy); |
ca3de46b SG |
775 | return ret; |
776 | } | |
777 | ||
a2291bad TH |
778 | dev_info(&pdev->dev, "%s CPU temperature grade - max:%dC" |
779 | " critical:%dC passive:%dC\n", data->temp_grade, | |
780 | data->temp_max / 1000, data->temp_critical / 1000, | |
781 | data->temp_passive / 1000); | |
782 | ||
37713a1e | 783 | /* Enable measurements at ~ 10 Hz */ |
f085f672 AH |
784 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, |
785 | data->socdata->measure_freq_mask); | |
37713a1e | 786 | measure_freq = DIV_ROUND_UP(32768, 10); /* 10 Hz */ |
f085f672 AH |
787 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_SET, |
788 | measure_freq << data->socdata->measure_freq_shift); | |
37713a1e | 789 | imx_set_alarm_temp(data, data->temp_passive); |
3c94f17e AH |
790 | |
791 | if (data->socdata->version == TEMPMON_IMX6SX) | |
792 | imx_set_panic_temp(data, data->temp_critical); | |
793 | ||
f085f672 AH |
794 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
795 | data->socdata->power_down_mask); | |
796 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
797 | data->socdata->measure_temp_mask); | |
37713a1e | 798 | |
cf1ba1d7 ML |
799 | data->irq_enabled = true; |
800 | data->mode = THERMAL_DEVICE_ENABLED; | |
801 | ||
84866ee5 BP |
802 | ret = devm_request_threaded_irq(&pdev->dev, data->irq, |
803 | imx_thermal_alarm_irq, imx_thermal_alarm_irq_thread, | |
804 | 0, "imx_thermal", data); | |
805 | if (ret < 0) { | |
806 | dev_err(&pdev->dev, "failed to request alarm irq: %d\n", ret); | |
807 | clk_disable_unprepare(data->thermal_clk); | |
808 | thermal_zone_device_unregister(data->tz); | |
809 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 810 | cpufreq_cpu_put(data->policy); |
84866ee5 BP |
811 | return ret; |
812 | } | |
813 | ||
ca3de46b SG |
814 | return 0; |
815 | } | |
816 | ||
817 | static int imx_thermal_remove(struct platform_device *pdev) | |
818 | { | |
819 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
37713a1e PZ |
820 | struct regmap *map = data->tempmon; |
821 | ||
822 | /* Disable measurements */ | |
f085f672 AH |
823 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, |
824 | data->socdata->power_down_mask); | |
329fe7b1 AH |
825 | if (!IS_ERR(data->thermal_clk)) |
826 | clk_disable_unprepare(data->thermal_clk); | |
ca3de46b SG |
827 | |
828 | thermal_zone_device_unregister(data->tz); | |
829 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 830 | cpufreq_cpu_put(data->policy); |
ca3de46b SG |
831 | |
832 | return 0; | |
833 | } | |
834 | ||
835 | #ifdef CONFIG_PM_SLEEP | |
836 | static int imx_thermal_suspend(struct device *dev) | |
837 | { | |
838 | struct imx_thermal_data *data = dev_get_drvdata(dev); | |
839 | struct regmap *map = data->tempmon; | |
ca3de46b | 840 | |
b46cce59 AH |
841 | /* |
842 | * Need to disable thermal sensor, otherwise, when thermal core | |
843 | * try to get temperature before thermal sensor resume, a wrong | |
844 | * temperature will be read as the thermal sensor is powered | |
845 | * down. | |
846 | */ | |
f085f672 AH |
847 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
848 | data->socdata->measure_temp_mask); | |
849 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
850 | data->socdata->power_down_mask); | |
b46cce59 | 851 | data->mode = THERMAL_DEVICE_DISABLED; |
d26eef8b | 852 | clk_disable_unprepare(data->thermal_clk); |
ca3de46b SG |
853 | |
854 | return 0; | |
855 | } | |
856 | ||
857 | static int imx_thermal_resume(struct device *dev) | |
858 | { | |
b46cce59 AH |
859 | struct imx_thermal_data *data = dev_get_drvdata(dev); |
860 | struct regmap *map = data->tempmon; | |
e3bdc8d7 | 861 | int ret; |
b46cce59 | 862 | |
e3bdc8d7 AY |
863 | ret = clk_prepare_enable(data->thermal_clk); |
864 | if (ret) | |
865 | return ret; | |
b46cce59 | 866 | /* Enabled thermal sensor after resume */ |
f085f672 AH |
867 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
868 | data->socdata->power_down_mask); | |
869 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
870 | data->socdata->measure_temp_mask); | |
b46cce59 AH |
871 | data->mode = THERMAL_DEVICE_ENABLED; |
872 | ||
ca3de46b SG |
873 | return 0; |
874 | } | |
875 | #endif | |
876 | ||
877 | static SIMPLE_DEV_PM_OPS(imx_thermal_pm_ops, | |
878 | imx_thermal_suspend, imx_thermal_resume); | |
879 | ||
ca3de46b SG |
880 | static struct platform_driver imx_thermal = { |
881 | .driver = { | |
882 | .name = "imx_thermal", | |
ca3de46b SG |
883 | .pm = &imx_thermal_pm_ops, |
884 | .of_match_table = of_imx_thermal_match, | |
885 | }, | |
886 | .probe = imx_thermal_probe, | |
887 | .remove = imx_thermal_remove, | |
888 | }; | |
889 | module_platform_driver(imx_thermal); | |
890 | ||
891 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
892 | MODULE_DESCRIPTION("Thermal driver for Freescale i.MX SoCs"); | |
893 | MODULE_LICENSE("GPL v2"); | |
894 | MODULE_ALIAS("platform:imx-thermal"); |