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45f8b0dd FE |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // | |
3 | // Copyright 2013 Freescale Semiconductor, Inc. | |
ca3de46b | 4 | |
329fe7b1 | 5 | #include <linux/clk.h> |
a1d00154 | 6 | #include <linux/cpu.h> |
4d753aa7 | 7 | #include <linux/cpufreq.h> |
ca3de46b | 8 | #include <linux/cpu_cooling.h> |
ca3de46b SG |
9 | #include <linux/delay.h> |
10 | #include <linux/device.h> | |
11 | #include <linux/init.h> | |
37713a1e | 12 | #include <linux/interrupt.h> |
ca3de46b SG |
13 | #include <linux/io.h> |
14 | #include <linux/kernel.h> | |
15 | #include <linux/mfd/syscon.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/of.h> | |
3c94f17e | 18 | #include <linux/of_device.h> |
ca3de46b SG |
19 | #include <linux/platform_device.h> |
20 | #include <linux/regmap.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/thermal.h> | |
23 | #include <linux/types.h> | |
ae621557 | 24 | #include <linux/nvmem-consumer.h> |
ca3de46b SG |
25 | |
26 | #define REG_SET 0x4 | |
27 | #define REG_CLR 0x8 | |
28 | #define REG_TOG 0xc | |
29 | ||
f085f672 AH |
30 | /* i.MX6 specific */ |
31 | #define IMX6_MISC0 0x0150 | |
32 | #define IMX6_MISC0_REFTOP_SELBIASOFF (1 << 3) | |
33 | #define IMX6_MISC1 0x0160 | |
34 | #define IMX6_MISC1_IRQ_TEMPHIGH (1 << 29) | |
3c94f17e | 35 | /* Below LOW and PANIC bits are only for TEMPMON_IMX6SX */ |
f085f672 AH |
36 | #define IMX6_MISC1_IRQ_TEMPLOW (1 << 28) |
37 | #define IMX6_MISC1_IRQ_TEMPPANIC (1 << 27) | |
38 | ||
39 | #define IMX6_TEMPSENSE0 0x0180 | |
40 | #define IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT 20 | |
41 | #define IMX6_TEMPSENSE0_ALARM_VALUE_MASK (0xfff << 20) | |
42 | #define IMX6_TEMPSENSE0_TEMP_CNT_SHIFT 8 | |
43 | #define IMX6_TEMPSENSE0_TEMP_CNT_MASK (0xfff << 8) | |
44 | #define IMX6_TEMPSENSE0_FINISHED (1 << 2) | |
45 | #define IMX6_TEMPSENSE0_MEASURE_TEMP (1 << 1) | |
46 | #define IMX6_TEMPSENSE0_POWER_DOWN (1 << 0) | |
47 | ||
48 | #define IMX6_TEMPSENSE1 0x0190 | |
49 | #define IMX6_TEMPSENSE1_MEASURE_FREQ 0xffff | |
50 | #define IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT 0 | |
ca3de46b | 51 | |
a2291bad | 52 | #define OCOTP_MEM0 0x0480 |
ca3de46b SG |
53 | #define OCOTP_ANA1 0x04e0 |
54 | ||
f085f672 AH |
55 | /* Below TEMPSENSE2 is only for TEMPMON_IMX6SX */ |
56 | #define IMX6_TEMPSENSE2 0x0290 | |
57 | #define IMX6_TEMPSENSE2_LOW_VALUE_SHIFT 0 | |
58 | #define IMX6_TEMPSENSE2_LOW_VALUE_MASK 0xfff | |
59 | #define IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT 16 | |
60 | #define IMX6_TEMPSENSE2_PANIC_VALUE_MASK 0xfff0000 | |
61 | ||
62 | /* i.MX7 specific */ | |
63 | #define IMX7_ANADIG_DIGPROG 0x800 | |
64 | #define IMX7_TEMPSENSE0 0x300 | |
65 | #define IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT 18 | |
66 | #define IMX7_TEMPSENSE0_PANIC_ALARM_MASK (0x1ff << 18) | |
67 | #define IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT 9 | |
68 | #define IMX7_TEMPSENSE0_HIGH_ALARM_MASK (0x1ff << 9) | |
69 | #define IMX7_TEMPSENSE0_LOW_ALARM_SHIFT 0 | |
70 | #define IMX7_TEMPSENSE0_LOW_ALARM_MASK 0x1ff | |
71 | ||
72 | #define IMX7_TEMPSENSE1 0x310 | |
73 | #define IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT 16 | |
74 | #define IMX7_TEMPSENSE1_MEASURE_FREQ_MASK (0xffff << 16) | |
75 | #define IMX7_TEMPSENSE1_FINISHED (1 << 11) | |
76 | #define IMX7_TEMPSENSE1_MEASURE_TEMP (1 << 10) | |
77 | #define IMX7_TEMPSENSE1_POWER_DOWN (1 << 9) | |
78 | #define IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT 0 | |
79 | #define IMX7_TEMPSENSE1_TEMP_VALUE_MASK 0x1ff | |
80 | ||
ca3de46b SG |
81 | /* The driver supports 1 passive trip point and 1 critical trip point */ |
82 | enum imx_thermal_trip { | |
83 | IMX_TRIP_PASSIVE, | |
84 | IMX_TRIP_CRITICAL, | |
85 | IMX_TRIP_NUM, | |
86 | }; | |
87 | ||
ca3de46b SG |
88 | #define IMX_POLLING_DELAY 2000 /* millisecond */ |
89 | #define IMX_PASSIVE_DELAY 1000 | |
90 | ||
3c94f17e AH |
91 | #define TEMPMON_IMX6Q 1 |
92 | #define TEMPMON_IMX6SX 2 | |
f085f672 | 93 | #define TEMPMON_IMX7D 3 |
3c94f17e AH |
94 | |
95 | struct thermal_soc_data { | |
96 | u32 version; | |
f085f672 AH |
97 | |
98 | u32 sensor_ctrl; | |
99 | u32 power_down_mask; | |
100 | u32 measure_temp_mask; | |
101 | ||
102 | u32 measure_freq_ctrl; | |
103 | u32 measure_freq_mask; | |
104 | u32 measure_freq_shift; | |
105 | ||
106 | u32 temp_data; | |
107 | u32 temp_value_mask; | |
108 | u32 temp_value_shift; | |
109 | u32 temp_valid_mask; | |
110 | ||
111 | u32 panic_alarm_ctrl; | |
112 | u32 panic_alarm_mask; | |
113 | u32 panic_alarm_shift; | |
114 | ||
115 | u32 high_alarm_ctrl; | |
116 | u32 high_alarm_mask; | |
117 | u32 high_alarm_shift; | |
118 | ||
119 | u32 low_alarm_ctrl; | |
120 | u32 low_alarm_mask; | |
121 | u32 low_alarm_shift; | |
3c94f17e AH |
122 | }; |
123 | ||
124 | static struct thermal_soc_data thermal_imx6q_data = { | |
125 | .version = TEMPMON_IMX6Q, | |
f085f672 AH |
126 | |
127 | .sensor_ctrl = IMX6_TEMPSENSE0, | |
128 | .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, | |
129 | .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, | |
130 | ||
131 | .measure_freq_ctrl = IMX6_TEMPSENSE1, | |
132 | .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
133 | .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, | |
134 | ||
135 | .temp_data = IMX6_TEMPSENSE0, | |
136 | .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, | |
137 | .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, | |
138 | .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, | |
139 | ||
140 | .high_alarm_ctrl = IMX6_TEMPSENSE0, | |
141 | .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, | |
142 | .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, | |
3c94f17e AH |
143 | }; |
144 | ||
145 | static struct thermal_soc_data thermal_imx6sx_data = { | |
146 | .version = TEMPMON_IMX6SX, | |
f085f672 AH |
147 | |
148 | .sensor_ctrl = IMX6_TEMPSENSE0, | |
149 | .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, | |
150 | .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, | |
151 | ||
152 | .measure_freq_ctrl = IMX6_TEMPSENSE1, | |
153 | .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
154 | .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, | |
155 | ||
156 | .temp_data = IMX6_TEMPSENSE0, | |
157 | .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, | |
158 | .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, | |
159 | .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, | |
160 | ||
161 | .high_alarm_ctrl = IMX6_TEMPSENSE0, | |
162 | .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, | |
163 | .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, | |
164 | ||
165 | .panic_alarm_ctrl = IMX6_TEMPSENSE2, | |
166 | .panic_alarm_mask = IMX6_TEMPSENSE2_PANIC_VALUE_MASK, | |
167 | .panic_alarm_shift = IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT, | |
168 | ||
169 | .low_alarm_ctrl = IMX6_TEMPSENSE2, | |
170 | .low_alarm_mask = IMX6_TEMPSENSE2_LOW_VALUE_MASK, | |
171 | .low_alarm_shift = IMX6_TEMPSENSE2_LOW_VALUE_SHIFT, | |
172 | }; | |
173 | ||
174 | static struct thermal_soc_data thermal_imx7d_data = { | |
175 | .version = TEMPMON_IMX7D, | |
176 | ||
177 | .sensor_ctrl = IMX7_TEMPSENSE1, | |
178 | .power_down_mask = IMX7_TEMPSENSE1_POWER_DOWN, | |
179 | .measure_temp_mask = IMX7_TEMPSENSE1_MEASURE_TEMP, | |
180 | ||
181 | .measure_freq_ctrl = IMX7_TEMPSENSE1, | |
182 | .measure_freq_shift = IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
183 | .measure_freq_mask = IMX7_TEMPSENSE1_MEASURE_FREQ_MASK, | |
184 | ||
185 | .temp_data = IMX7_TEMPSENSE1, | |
186 | .temp_value_mask = IMX7_TEMPSENSE1_TEMP_VALUE_MASK, | |
187 | .temp_value_shift = IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT, | |
188 | .temp_valid_mask = IMX7_TEMPSENSE1_FINISHED, | |
189 | ||
190 | .panic_alarm_ctrl = IMX7_TEMPSENSE1, | |
191 | .panic_alarm_mask = IMX7_TEMPSENSE0_PANIC_ALARM_MASK, | |
192 | .panic_alarm_shift = IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT, | |
193 | ||
194 | .high_alarm_ctrl = IMX7_TEMPSENSE0, | |
195 | .high_alarm_mask = IMX7_TEMPSENSE0_HIGH_ALARM_MASK, | |
196 | .high_alarm_shift = IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT, | |
197 | ||
198 | .low_alarm_ctrl = IMX7_TEMPSENSE0, | |
199 | .low_alarm_mask = IMX7_TEMPSENSE0_LOW_ALARM_MASK, | |
200 | .low_alarm_shift = IMX7_TEMPSENSE0_LOW_ALARM_SHIFT, | |
3c94f17e AH |
201 | }; |
202 | ||
ca3de46b | 203 | struct imx_thermal_data { |
4d753aa7 | 204 | struct cpufreq_policy *policy; |
ca3de46b SG |
205 | struct thermal_zone_device *tz; |
206 | struct thermal_cooling_device *cdev; | |
207 | enum thermal_device_mode mode; | |
208 | struct regmap *tempmon; | |
ae621557 | 209 | u32 c1, c2; /* See formula in imx_init_calib() */ |
17e8351a SH |
210 | int temp_passive; |
211 | int temp_critical; | |
a2291bad | 212 | int temp_max; |
17e8351a SH |
213 | int alarm_temp; |
214 | int last_temp; | |
37713a1e PZ |
215 | bool irq_enabled; |
216 | int irq; | |
329fe7b1 | 217 | struct clk *thermal_clk; |
3c94f17e | 218 | const struct thermal_soc_data *socdata; |
a2291bad | 219 | const char *temp_grade; |
ca3de46b SG |
220 | }; |
221 | ||
3c94f17e | 222 | static void imx_set_panic_temp(struct imx_thermal_data *data, |
17e8351a | 223 | int panic_temp) |
3c94f17e | 224 | { |
f085f672 | 225 | const struct thermal_soc_data *soc_data = data->socdata; |
3c94f17e AH |
226 | struct regmap *map = data->tempmon; |
227 | int critical_value; | |
228 | ||
229 | critical_value = (data->c2 - panic_temp) / data->c1; | |
f085f672 AH |
230 | |
231 | regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, | |
232 | soc_data->panic_alarm_mask); | |
233 | regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, | |
234 | critical_value << soc_data->panic_alarm_shift); | |
3c94f17e AH |
235 | } |
236 | ||
37713a1e | 237 | static void imx_set_alarm_temp(struct imx_thermal_data *data, |
17e8351a | 238 | int alarm_temp) |
37713a1e PZ |
239 | { |
240 | struct regmap *map = data->tempmon; | |
f085f672 | 241 | const struct thermal_soc_data *soc_data = data->socdata; |
37713a1e PZ |
242 | int alarm_value; |
243 | ||
244 | data->alarm_temp = alarm_temp; | |
f085f672 AH |
245 | |
246 | if (data->socdata->version == TEMPMON_IMX7D) | |
247 | alarm_value = alarm_temp / 1000 + data->c1 - 25; | |
248 | else | |
249 | alarm_value = (data->c2 - alarm_temp) / data->c1; | |
250 | ||
251 | regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, | |
252 | soc_data->high_alarm_mask); | |
253 | regmap_write(map, soc_data->high_alarm_ctrl + REG_SET, | |
254 | alarm_value << soc_data->high_alarm_shift); | |
37713a1e PZ |
255 | } |
256 | ||
17e8351a | 257 | static int imx_get_temp(struct thermal_zone_device *tz, int *temp) |
ca3de46b SG |
258 | { |
259 | struct imx_thermal_data *data = tz->devdata; | |
f085f672 | 260 | const struct thermal_soc_data *soc_data = data->socdata; |
ca3de46b | 261 | struct regmap *map = data->tempmon; |
ca3de46b | 262 | unsigned int n_meas; |
37713a1e | 263 | bool wait; |
ca3de46b SG |
264 | u32 val; |
265 | ||
37713a1e PZ |
266 | if (data->mode == THERMAL_DEVICE_ENABLED) { |
267 | /* Check if a measurement is currently in progress */ | |
f085f672 AH |
268 | regmap_read(map, soc_data->temp_data, &val); |
269 | wait = !(val & soc_data->temp_valid_mask); | |
37713a1e PZ |
270 | } else { |
271 | /* | |
272 | * Every time we measure the temperature, we will power on the | |
273 | * temperature sensor, enable measurements, take a reading, | |
274 | * disable measurements, power off the temperature sensor. | |
275 | */ | |
f085f672 AH |
276 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
277 | soc_data->power_down_mask); | |
278 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
279 | soc_data->measure_temp_mask); | |
37713a1e PZ |
280 | |
281 | wait = true; | |
282 | } | |
ca3de46b SG |
283 | |
284 | /* | |
285 | * According to the temp sensor designers, it may require up to ~17us | |
286 | * to complete a measurement. | |
287 | */ | |
37713a1e PZ |
288 | if (wait) |
289 | usleep_range(20, 50); | |
ca3de46b | 290 | |
f085f672 | 291 | regmap_read(map, soc_data->temp_data, &val); |
37713a1e PZ |
292 | |
293 | if (data->mode != THERMAL_DEVICE_ENABLED) { | |
f085f672 AH |
294 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
295 | soc_data->measure_temp_mask); | |
296 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
297 | soc_data->power_down_mask); | |
37713a1e | 298 | } |
ca3de46b | 299 | |
f085f672 | 300 | if ((val & soc_data->temp_valid_mask) == 0) { |
ca3de46b SG |
301 | dev_dbg(&tz->device, "temp measurement never finished\n"); |
302 | return -EAGAIN; | |
303 | } | |
304 | ||
f085f672 AH |
305 | n_meas = (val & soc_data->temp_value_mask) |
306 | >> soc_data->temp_value_shift; | |
ca3de46b | 307 | |
ae621557 | 308 | /* See imx_init_calib() for formula derivation */ |
f085f672 AH |
309 | if (data->socdata->version == TEMPMON_IMX7D) |
310 | *temp = (n_meas - data->c1 + 25) * 1000; | |
311 | else | |
312 | *temp = data->c2 - n_meas * data->c1; | |
ca3de46b | 313 | |
3c94f17e AH |
314 | /* Update alarm value to next higher trip point for TEMPMON_IMX6Q */ |
315 | if (data->socdata->version == TEMPMON_IMX6Q) { | |
316 | if (data->alarm_temp == data->temp_passive && | |
317 | *temp >= data->temp_passive) | |
318 | imx_set_alarm_temp(data, data->temp_critical); | |
319 | if (data->alarm_temp == data->temp_critical && | |
320 | *temp < data->temp_passive) { | |
321 | imx_set_alarm_temp(data, data->temp_passive); | |
17e8351a | 322 | dev_dbg(&tz->device, "thermal alarm off: T < %d\n", |
3c94f17e AH |
323 | data->alarm_temp / 1000); |
324 | } | |
37713a1e PZ |
325 | } |
326 | ||
327 | if (*temp != data->last_temp) { | |
17e8351a | 328 | dev_dbg(&tz->device, "millicelsius: %d\n", *temp); |
37713a1e PZ |
329 | data->last_temp = *temp; |
330 | } | |
331 | ||
332 | /* Reenable alarm IRQ if temperature below alarm temperature */ | |
333 | if (!data->irq_enabled && *temp < data->alarm_temp) { | |
334 | data->irq_enabled = true; | |
335 | enable_irq(data->irq); | |
ca3de46b SG |
336 | } |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
341 | static int imx_get_mode(struct thermal_zone_device *tz, | |
342 | enum thermal_device_mode *mode) | |
343 | { | |
344 | struct imx_thermal_data *data = tz->devdata; | |
345 | ||
346 | *mode = data->mode; | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
351 | static int imx_set_mode(struct thermal_zone_device *tz, | |
352 | enum thermal_device_mode mode) | |
353 | { | |
354 | struct imx_thermal_data *data = tz->devdata; | |
37713a1e | 355 | struct regmap *map = data->tempmon; |
f085f672 | 356 | const struct thermal_soc_data *soc_data = data->socdata; |
ca3de46b SG |
357 | |
358 | if (mode == THERMAL_DEVICE_ENABLED) { | |
359 | tz->polling_delay = IMX_POLLING_DELAY; | |
360 | tz->passive_delay = IMX_PASSIVE_DELAY; | |
37713a1e | 361 | |
f085f672 AH |
362 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
363 | soc_data->power_down_mask); | |
364 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
365 | soc_data->measure_temp_mask); | |
37713a1e PZ |
366 | |
367 | if (!data->irq_enabled) { | |
368 | data->irq_enabled = true; | |
369 | enable_irq(data->irq); | |
370 | } | |
ca3de46b | 371 | } else { |
f085f672 AH |
372 | regmap_write(map, soc_data->sensor_ctrl + REG_CLR, |
373 | soc_data->measure_temp_mask); | |
374 | regmap_write(map, soc_data->sensor_ctrl + REG_SET, | |
375 | soc_data->power_down_mask); | |
37713a1e | 376 | |
ca3de46b SG |
377 | tz->polling_delay = 0; |
378 | tz->passive_delay = 0; | |
37713a1e PZ |
379 | |
380 | if (data->irq_enabled) { | |
381 | disable_irq(data->irq); | |
382 | data->irq_enabled = false; | |
383 | } | |
ca3de46b SG |
384 | } |
385 | ||
386 | data->mode = mode; | |
0e70f466 | 387 | thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED); |
ca3de46b SG |
388 | |
389 | return 0; | |
390 | } | |
391 | ||
392 | static int imx_get_trip_type(struct thermal_zone_device *tz, int trip, | |
393 | enum thermal_trip_type *type) | |
394 | { | |
395 | *type = (trip == IMX_TRIP_PASSIVE) ? THERMAL_TRIP_PASSIVE : | |
396 | THERMAL_TRIP_CRITICAL; | |
397 | return 0; | |
398 | } | |
399 | ||
17e8351a | 400 | static int imx_get_crit_temp(struct thermal_zone_device *tz, int *temp) |
ca3de46b | 401 | { |
017e5142 PZ |
402 | struct imx_thermal_data *data = tz->devdata; |
403 | ||
404 | *temp = data->temp_critical; | |
ca3de46b SG |
405 | return 0; |
406 | } | |
407 | ||
408 | static int imx_get_trip_temp(struct thermal_zone_device *tz, int trip, | |
17e8351a | 409 | int *temp) |
ca3de46b | 410 | { |
017e5142 PZ |
411 | struct imx_thermal_data *data = tz->devdata; |
412 | ||
413 | *temp = (trip == IMX_TRIP_PASSIVE) ? data->temp_passive : | |
414 | data->temp_critical; | |
415 | return 0; | |
416 | } | |
417 | ||
418 | static int imx_set_trip_temp(struct thermal_zone_device *tz, int trip, | |
17e8351a | 419 | int temp) |
017e5142 PZ |
420 | { |
421 | struct imx_thermal_data *data = tz->devdata; | |
422 | ||
a2291bad | 423 | /* do not allow changing critical threshold */ |
017e5142 PZ |
424 | if (trip == IMX_TRIP_CRITICAL) |
425 | return -EPERM; | |
426 | ||
a2291bad TH |
427 | /* do not allow passive to be set higher than critical */ |
428 | if (temp < 0 || temp > data->temp_critical) | |
017e5142 PZ |
429 | return -EINVAL; |
430 | ||
431 | data->temp_passive = temp; | |
432 | ||
37713a1e PZ |
433 | imx_set_alarm_temp(data, temp); |
434 | ||
ca3de46b SG |
435 | return 0; |
436 | } | |
437 | ||
438 | static int imx_bind(struct thermal_zone_device *tz, | |
439 | struct thermal_cooling_device *cdev) | |
440 | { | |
441 | int ret; | |
442 | ||
443 | ret = thermal_zone_bind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev, | |
444 | THERMAL_NO_LIMIT, | |
6cd9e9f6 KS |
445 | THERMAL_NO_LIMIT, |
446 | THERMAL_WEIGHT_DEFAULT); | |
ca3de46b SG |
447 | if (ret) { |
448 | dev_err(&tz->device, | |
449 | "binding zone %s with cdev %s failed:%d\n", | |
450 | tz->type, cdev->type, ret); | |
451 | return ret; | |
452 | } | |
453 | ||
454 | return 0; | |
455 | } | |
456 | ||
457 | static int imx_unbind(struct thermal_zone_device *tz, | |
458 | struct thermal_cooling_device *cdev) | |
459 | { | |
460 | int ret; | |
461 | ||
462 | ret = thermal_zone_unbind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev); | |
463 | if (ret) { | |
464 | dev_err(&tz->device, | |
465 | "unbinding zone %s with cdev %s failed:%d\n", | |
466 | tz->type, cdev->type, ret); | |
467 | return ret; | |
468 | } | |
469 | ||
470 | return 0; | |
471 | } | |
472 | ||
cbb07bb3 | 473 | static struct thermal_zone_device_ops imx_tz_ops = { |
ca3de46b SG |
474 | .bind = imx_bind, |
475 | .unbind = imx_unbind, | |
476 | .get_temp = imx_get_temp, | |
477 | .get_mode = imx_get_mode, | |
478 | .set_mode = imx_set_mode, | |
479 | .get_trip_type = imx_get_trip_type, | |
480 | .get_trip_temp = imx_get_trip_temp, | |
481 | .get_crit_temp = imx_get_crit_temp, | |
017e5142 | 482 | .set_trip_temp = imx_set_trip_temp, |
ca3de46b SG |
483 | }; |
484 | ||
e4bb2240 | 485 | static int imx_init_calib(struct platform_device *pdev, u32 ocotp_ana1) |
ca3de46b SG |
486 | { |
487 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
4e5f61ca | 488 | int n1; |
749e8be7 | 489 | u64 temp64; |
ca3de46b | 490 | |
e4bb2240 | 491 | if (ocotp_ana1 == 0 || ocotp_ana1 == ~0) { |
ca3de46b SG |
492 | dev_err(&pdev->dev, "invalid sensor calibration data\n"); |
493 | return -EINVAL; | |
494 | } | |
495 | ||
f085f672 AH |
496 | /* |
497 | * On i.MX7D, we only use the calibration data at 25C to get the temp, | |
498 | * Tmeas = ( Nmeas - n1) + 25; n1 is the fuse value for 25C. | |
499 | */ | |
500 | if (data->socdata->version == TEMPMON_IMX7D) { | |
501 | data->c1 = (ocotp_ana1 >> 9) & 0x1ff; | |
502 | return 0; | |
503 | } | |
504 | ||
ca3de46b | 505 | /* |
c5bbdb4b UKK |
506 | * The sensor is calibrated at 25 °C (aka T1) and the value measured |
507 | * (aka N1) at this temperature is provided in bits [31:20] in the | |
508 | * i.MX's OCOTP value ANA1. | |
509 | * To find the actual temperature T, the following formula has to be used | |
510 | * when reading value n from the sensor: | |
511 | * | |
4e5f61ca UKK |
512 | * T = T1 + (N - N1) / (0.4148468 - 0.0015423 * N1) °C + 3.580661 °C |
513 | * = [T1' - N1 / (0.4148468 - 0.0015423 * N1) °C] + N / (0.4148468 - 0.0015423 * N1) °C | |
514 | * = [T1' + N1 / (0.0015423 * N1 - 0.4148468) °C] - N / (0.0015423 * N1 - 0.4148468) °C | |
c5bbdb4b UKK |
515 | * = c2 - c1 * N |
516 | * | |
517 | * with | |
518 | * | |
4e5f61ca UKK |
519 | * T1' = 28.580661 °C |
520 | * c1 = 1 / (0.0015423 * N1 - 0.4297157) °C | |
521 | * c2 = T1' + N1 / (0.0015423 * N1 - 0.4148468) °C | |
522 | * = T1' + N1 * c1 | |
ca3de46b | 523 | */ |
e4bb2240 | 524 | n1 = ocotp_ana1 >> 20; |
ca3de46b | 525 | |
4e5f61ca | 526 | temp64 = 10000000; /* use 10^7 as fixed point constant for values in formula */ |
c5bbdb4b | 527 | temp64 *= 1000; /* to get result in °mC */ |
4e5f61ca | 528 | do_div(temp64, 15423 * n1 - 4148468); |
749e8be7 | 529 | data->c1 = temp64; |
4e5f61ca | 530 | data->c2 = n1 * data->c1 + 28581; |
ca3de46b | 531 | |
ae621557 LC |
532 | return 0; |
533 | } | |
534 | ||
e4bb2240 | 535 | static void imx_init_temp_grade(struct platform_device *pdev, u32 ocotp_mem0) |
ae621557 LC |
536 | { |
537 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
a2291bad TH |
538 | |
539 | /* The maximum die temp is specified by the Temperature Grade */ | |
e4bb2240 | 540 | switch ((ocotp_mem0 >> 6) & 0x3) { |
339d7492 | 541 | case 0: /* Commercial (0 to 95 °C) */ |
a2291bad TH |
542 | data->temp_grade = "Commercial"; |
543 | data->temp_max = 95000; | |
544 | break; | |
339d7492 | 545 | case 1: /* Extended Commercial (-20 °C to 105 °C) */ |
a2291bad TH |
546 | data->temp_grade = "Extended Commercial"; |
547 | data->temp_max = 105000; | |
548 | break; | |
339d7492 | 549 | case 2: /* Industrial (-40 °C to 105 °C) */ |
a2291bad TH |
550 | data->temp_grade = "Industrial"; |
551 | data->temp_max = 105000; | |
552 | break; | |
339d7492 | 553 | case 3: /* Automotive (-40 °C to 125 °C) */ |
a2291bad TH |
554 | data->temp_grade = "Automotive"; |
555 | data->temp_max = 125000; | |
556 | break; | |
557 | } | |
017e5142 PZ |
558 | |
559 | /* | |
339d7492 UKK |
560 | * Set the critical trip point at 5 °C under max |
561 | * Set the passive trip point at 10 °C under max (changeable via sysfs) | |
017e5142 | 562 | */ |
a2291bad TH |
563 | data->temp_critical = data->temp_max - (1000 * 5); |
564 | data->temp_passive = data->temp_max - (1000 * 10); | |
ae621557 LC |
565 | } |
566 | ||
567 | static int imx_init_from_tempmon_data(struct platform_device *pdev) | |
568 | { | |
569 | struct regmap *map; | |
570 | int ret; | |
571 | u32 val; | |
572 | ||
573 | map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, | |
574 | "fsl,tempmon-data"); | |
575 | if (IS_ERR(map)) { | |
576 | ret = PTR_ERR(map); | |
577 | dev_err(&pdev->dev, "failed to get sensor regmap: %d\n", ret); | |
578 | return ret; | |
579 | } | |
580 | ||
581 | ret = regmap_read(map, OCOTP_ANA1, &val); | |
582 | if (ret) { | |
583 | dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); | |
584 | return ret; | |
585 | } | |
586 | ret = imx_init_calib(pdev, val); | |
587 | if (ret) | |
588 | return ret; | |
589 | ||
590 | ret = regmap_read(map, OCOTP_MEM0, &val); | |
591 | if (ret) { | |
592 | dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); | |
593 | return ret; | |
594 | } | |
595 | imx_init_temp_grade(pdev, val); | |
596 | ||
597 | return 0; | |
598 | } | |
599 | ||
600 | static int imx_init_from_nvmem_cells(struct platform_device *pdev) | |
601 | { | |
602 | int ret; | |
603 | u32 val; | |
604 | ||
605 | ret = nvmem_cell_read_u32(&pdev->dev, "calib", &val); | |
606 | if (ret) | |
607 | return ret; | |
be926cee JCD |
608 | |
609 | ret = imx_init_calib(pdev, val); | |
610 | if (ret) | |
611 | return ret; | |
ae621557 LC |
612 | |
613 | ret = nvmem_cell_read_u32(&pdev->dev, "temp_grade", &val); | |
614 | if (ret) | |
615 | return ret; | |
616 | imx_init_temp_grade(pdev, val); | |
017e5142 | 617 | |
ca3de46b SG |
618 | return 0; |
619 | } | |
620 | ||
37713a1e PZ |
621 | static irqreturn_t imx_thermal_alarm_irq(int irq, void *dev) |
622 | { | |
623 | struct imx_thermal_data *data = dev; | |
624 | ||
625 | disable_irq_nosync(irq); | |
626 | data->irq_enabled = false; | |
627 | ||
628 | return IRQ_WAKE_THREAD; | |
629 | } | |
630 | ||
631 | static irqreturn_t imx_thermal_alarm_irq_thread(int irq, void *dev) | |
632 | { | |
633 | struct imx_thermal_data *data = dev; | |
634 | ||
17e8351a | 635 | dev_dbg(&data->tz->device, "THERMAL ALARM: T > %d\n", |
37713a1e PZ |
636 | data->alarm_temp / 1000); |
637 | ||
0e70f466 | 638 | thermal_zone_device_update(data->tz, THERMAL_EVENT_UNSPECIFIED); |
37713a1e PZ |
639 | |
640 | return IRQ_HANDLED; | |
641 | } | |
642 | ||
3c94f17e AH |
643 | static const struct of_device_id of_imx_thermal_match[] = { |
644 | { .compatible = "fsl,imx6q-tempmon", .data = &thermal_imx6q_data, }, | |
645 | { .compatible = "fsl,imx6sx-tempmon", .data = &thermal_imx6sx_data, }, | |
f085f672 | 646 | { .compatible = "fsl,imx7d-tempmon", .data = &thermal_imx7d_data, }, |
3c94f17e AH |
647 | { /* end */ } |
648 | }; | |
649 | MODULE_DEVICE_TABLE(of, of_imx_thermal_match); | |
650 | ||
a1d00154 BS |
651 | /* |
652 | * Create cooling device in case no #cooling-cells property is available in | |
653 | * CPU node | |
654 | */ | |
655 | static int imx_thermal_register_legacy_cooling(struct imx_thermal_data *data) | |
656 | { | |
657 | struct device_node *np = of_get_cpu_node(data->policy->cpu, NULL); | |
658 | int ret; | |
659 | ||
660 | if (!np || !of_find_property(np, "#cooling-cells", NULL)) { | |
661 | data->cdev = cpufreq_cooling_register(data->policy); | |
662 | if (IS_ERR(data->cdev)) { | |
663 | ret = PTR_ERR(data->cdev); | |
664 | cpufreq_cpu_put(data->policy); | |
665 | return ret; | |
666 | } | |
667 | } | |
668 | ||
669 | return 0; | |
670 | } | |
671 | ||
ca3de46b SG |
672 | static int imx_thermal_probe(struct platform_device *pdev) |
673 | { | |
674 | struct imx_thermal_data *data; | |
ca3de46b | 675 | struct regmap *map; |
37713a1e | 676 | int measure_freq; |
ca3de46b SG |
677 | int ret; |
678 | ||
679 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | |
680 | if (!data) | |
681 | return -ENOMEM; | |
682 | ||
683 | map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "fsl,tempmon"); | |
684 | if (IS_ERR(map)) { | |
685 | ret = PTR_ERR(map); | |
686 | dev_err(&pdev->dev, "failed to get tempmon regmap: %d\n", ret); | |
687 | return ret; | |
688 | } | |
689 | data->tempmon = map; | |
690 | ||
829bc78a | 691 | data->socdata = of_device_get_match_data(&pdev->dev); |
8b051ec3 SV |
692 | if (!data->socdata) { |
693 | dev_err(&pdev->dev, "no device match found\n"); | |
694 | return -ENODEV; | |
695 | } | |
3c94f17e AH |
696 | |
697 | /* make sure the IRQ flag is clear before enabling irq on i.MX6SX */ | |
698 | if (data->socdata->version == TEMPMON_IMX6SX) { | |
f085f672 AH |
699 | regmap_write(map, IMX6_MISC1 + REG_CLR, |
700 | IMX6_MISC1_IRQ_TEMPHIGH | IMX6_MISC1_IRQ_TEMPLOW | |
701 | | IMX6_MISC1_IRQ_TEMPPANIC); | |
3c94f17e AH |
702 | /* |
703 | * reset value of LOW ALARM is incorrect, set it to lowest | |
704 | * value to avoid false trigger of low alarm. | |
705 | */ | |
f085f672 AH |
706 | regmap_write(map, data->socdata->low_alarm_ctrl + REG_SET, |
707 | data->socdata->low_alarm_mask); | |
3c94f17e AH |
708 | } |
709 | ||
37713a1e PZ |
710 | data->irq = platform_get_irq(pdev, 0); |
711 | if (data->irq < 0) | |
712 | return data->irq; | |
713 | ||
ca3de46b SG |
714 | platform_set_drvdata(pdev, data); |
715 | ||
ae621557 LC |
716 | if (of_find_property(pdev->dev.of_node, "nvmem-cells", NULL)) { |
717 | ret = imx_init_from_nvmem_cells(pdev); | |
718 | if (ret == -EPROBE_DEFER) | |
719 | return ret; | |
720 | if (ret) { | |
721 | dev_err(&pdev->dev, "failed to init from nvmem: %d\n", | |
722 | ret); | |
723 | return ret; | |
724 | } | |
725 | } else { | |
726 | ret = imx_init_from_tempmon_data(pdev); | |
727 | if (ret) { | |
728 | dev_err(&pdev->dev, "failed to init from from fsl,tempmon-data\n"); | |
729 | return ret; | |
730 | } | |
ca3de46b SG |
731 | } |
732 | ||
733 | /* Make sure sensor is in known good state for measurements */ | |
f085f672 AH |
734 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
735 | data->socdata->power_down_mask); | |
736 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, | |
737 | data->socdata->measure_temp_mask); | |
738 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, | |
739 | data->socdata->measure_freq_mask); | |
740 | if (data->socdata->version != TEMPMON_IMX7D) | |
741 | regmap_write(map, IMX6_MISC0 + REG_SET, | |
742 | IMX6_MISC0_REFTOP_SELBIASOFF); | |
743 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
744 | data->socdata->power_down_mask); | |
ca3de46b | 745 | |
4d753aa7 VK |
746 | data->policy = cpufreq_cpu_get(0); |
747 | if (!data->policy) { | |
748 | pr_debug("%s: CPUFreq policy not found\n", __func__); | |
749 | return -EPROBE_DEFER; | |
750 | } | |
751 | ||
a1d00154 BS |
752 | ret = imx_thermal_register_legacy_cooling(data); |
753 | if (ret) { | |
4d753aa7 VK |
754 | dev_err(&pdev->dev, |
755 | "failed to register cpufreq cooling device: %d\n", ret); | |
ca3de46b SG |
756 | return ret; |
757 | } | |
758 | ||
90a21ff5 HK |
759 | data->thermal_clk = devm_clk_get(&pdev->dev, NULL); |
760 | if (IS_ERR(data->thermal_clk)) { | |
761 | ret = PTR_ERR(data->thermal_clk); | |
762 | if (ret != -EPROBE_DEFER) | |
763 | dev_err(&pdev->dev, | |
764 | "failed to get thermal clk: %d\n", ret); | |
765 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 766 | cpufreq_cpu_put(data->policy); |
90a21ff5 HK |
767 | return ret; |
768 | } | |
769 | ||
770 | /* | |
771 | * Thermal sensor needs clk on to get correct value, normally | |
772 | * we should enable its clk before taking measurement and disable | |
773 | * clk after measurement is done, but if alarm function is enabled, | |
774 | * hardware will auto measure the temperature periodically, so we | |
775 | * need to keep the clk always on for alarm function. | |
776 | */ | |
777 | ret = clk_prepare_enable(data->thermal_clk); | |
778 | if (ret) { | |
779 | dev_err(&pdev->dev, "failed to enable thermal clk: %d\n", ret); | |
780 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 781 | cpufreq_cpu_put(data->policy); |
90a21ff5 HK |
782 | return ret; |
783 | } | |
784 | ||
ca3de46b | 785 | data->tz = thermal_zone_device_register("imx_thermal_zone", |
017e5142 PZ |
786 | IMX_TRIP_NUM, |
787 | BIT(IMX_TRIP_PASSIVE), data, | |
ca3de46b SG |
788 | &imx_tz_ops, NULL, |
789 | IMX_PASSIVE_DELAY, | |
790 | IMX_POLLING_DELAY); | |
791 | if (IS_ERR(data->tz)) { | |
792 | ret = PTR_ERR(data->tz); | |
793 | dev_err(&pdev->dev, | |
794 | "failed to register thermal zone device %d\n", ret); | |
90a21ff5 | 795 | clk_disable_unprepare(data->thermal_clk); |
ca3de46b | 796 | cpufreq_cooling_unregister(data->cdev); |
4d753aa7 | 797 | cpufreq_cpu_put(data->policy); |
ca3de46b SG |
798 | return ret; |
799 | } | |
800 | ||
a2291bad TH |
801 | dev_info(&pdev->dev, "%s CPU temperature grade - max:%dC" |
802 | " critical:%dC passive:%dC\n", data->temp_grade, | |
803 | data->temp_max / 1000, data->temp_critical / 1000, | |
804 | data->temp_passive / 1000); | |
805 | ||
37713a1e | 806 | /* Enable measurements at ~ 10 Hz */ |
f085f672 AH |
807 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, |
808 | data->socdata->measure_freq_mask); | |
37713a1e | 809 | measure_freq = DIV_ROUND_UP(32768, 10); /* 10 Hz */ |
f085f672 AH |
810 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_SET, |
811 | measure_freq << data->socdata->measure_freq_shift); | |
37713a1e | 812 | imx_set_alarm_temp(data, data->temp_passive); |
3c94f17e AH |
813 | |
814 | if (data->socdata->version == TEMPMON_IMX6SX) | |
815 | imx_set_panic_temp(data, data->temp_critical); | |
816 | ||
f085f672 AH |
817 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
818 | data->socdata->power_down_mask); | |
819 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
820 | data->socdata->measure_temp_mask); | |
37713a1e | 821 | |
cf1ba1d7 ML |
822 | data->irq_enabled = true; |
823 | data->mode = THERMAL_DEVICE_ENABLED; | |
824 | ||
84866ee5 BP |
825 | ret = devm_request_threaded_irq(&pdev->dev, data->irq, |
826 | imx_thermal_alarm_irq, imx_thermal_alarm_irq_thread, | |
827 | 0, "imx_thermal", data); | |
828 | if (ret < 0) { | |
829 | dev_err(&pdev->dev, "failed to request alarm irq: %d\n", ret); | |
830 | clk_disable_unprepare(data->thermal_clk); | |
831 | thermal_zone_device_unregister(data->tz); | |
832 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 833 | cpufreq_cpu_put(data->policy); |
84866ee5 BP |
834 | return ret; |
835 | } | |
836 | ||
ca3de46b SG |
837 | return 0; |
838 | } | |
839 | ||
840 | static int imx_thermal_remove(struct platform_device *pdev) | |
841 | { | |
842 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
37713a1e PZ |
843 | struct regmap *map = data->tempmon; |
844 | ||
845 | /* Disable measurements */ | |
f085f672 AH |
846 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, |
847 | data->socdata->power_down_mask); | |
329fe7b1 AH |
848 | if (!IS_ERR(data->thermal_clk)) |
849 | clk_disable_unprepare(data->thermal_clk); | |
ca3de46b SG |
850 | |
851 | thermal_zone_device_unregister(data->tz); | |
852 | cpufreq_cooling_unregister(data->cdev); | |
4d753aa7 | 853 | cpufreq_cpu_put(data->policy); |
ca3de46b SG |
854 | |
855 | return 0; | |
856 | } | |
857 | ||
858 | #ifdef CONFIG_PM_SLEEP | |
859 | static int imx_thermal_suspend(struct device *dev) | |
860 | { | |
861 | struct imx_thermal_data *data = dev_get_drvdata(dev); | |
862 | struct regmap *map = data->tempmon; | |
ca3de46b | 863 | |
b46cce59 AH |
864 | /* |
865 | * Need to disable thermal sensor, otherwise, when thermal core | |
866 | * try to get temperature before thermal sensor resume, a wrong | |
867 | * temperature will be read as the thermal sensor is powered | |
868 | * down. | |
869 | */ | |
f085f672 AH |
870 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
871 | data->socdata->measure_temp_mask); | |
872 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
873 | data->socdata->power_down_mask); | |
b46cce59 | 874 | data->mode = THERMAL_DEVICE_DISABLED; |
d26eef8b | 875 | clk_disable_unprepare(data->thermal_clk); |
ca3de46b SG |
876 | |
877 | return 0; | |
878 | } | |
879 | ||
880 | static int imx_thermal_resume(struct device *dev) | |
881 | { | |
b46cce59 AH |
882 | struct imx_thermal_data *data = dev_get_drvdata(dev); |
883 | struct regmap *map = data->tempmon; | |
e3bdc8d7 | 884 | int ret; |
b46cce59 | 885 | |
e3bdc8d7 AY |
886 | ret = clk_prepare_enable(data->thermal_clk); |
887 | if (ret) | |
888 | return ret; | |
b46cce59 | 889 | /* Enabled thermal sensor after resume */ |
f085f672 AH |
890 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
891 | data->socdata->power_down_mask); | |
892 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
893 | data->socdata->measure_temp_mask); | |
b46cce59 AH |
894 | data->mode = THERMAL_DEVICE_ENABLED; |
895 | ||
ca3de46b SG |
896 | return 0; |
897 | } | |
898 | #endif | |
899 | ||
900 | static SIMPLE_DEV_PM_OPS(imx_thermal_pm_ops, | |
901 | imx_thermal_suspend, imx_thermal_resume); | |
902 | ||
ca3de46b SG |
903 | static struct platform_driver imx_thermal = { |
904 | .driver = { | |
905 | .name = "imx_thermal", | |
ca3de46b SG |
906 | .pm = &imx_thermal_pm_ops, |
907 | .of_match_table = of_imx_thermal_match, | |
908 | }, | |
909 | .probe = imx_thermal_probe, | |
910 | .remove = imx_thermal_remove, | |
911 | }; | |
912 | module_platform_driver(imx_thermal); | |
913 | ||
914 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
915 | MODULE_DESCRIPTION("Thermal driver for Freescale i.MX SoCs"); | |
916 | MODULE_LICENSE("GPL v2"); | |
917 | MODULE_ALIAS("platform:imx-thermal"); |