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2025cf9e | 1 | // SPDX-License-Identifier: GPL-2.0-only |
d0a12625 TD |
2 | /* intel_pch_thermal.c - Intel PCH Thermal driver |
3 | * | |
4 | * Copyright (c) 2015, Intel Corporation. | |
5 | * | |
6 | * Authors: | |
7 | * Tushar Dave <tushar.n.dave@intel.com> | |
d0a12625 TD |
8 | */ |
9 | ||
10 | #include <linux/module.h> | |
11 | #include <linux/types.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/pci.h> | |
aed3f249 | 14 | #include <linux/acpi.h> |
d0a12625 | 15 | #include <linux/thermal.h> |
176b1ec2 | 16 | #include <linux/pm.h> |
d0a12625 TD |
17 | |
18 | /* Intel PCH thermal Device IDs */ | |
33086a9a SP |
19 | #define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */ |
20 | #define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */ | |
d0a12625 | 21 | #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ |
4cba7d23 | 22 | #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ |
c6068a6e | 23 | #define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */ |
6ed5ed14 SP |
24 | #define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */ |
25 | #define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */ | |
97a41c96 | 26 | #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */ |
d0a12625 TD |
27 | |
28 | /* Wildcat Point-LP PCH Thermal registers */ | |
29 | #define WPT_TEMP 0x0000 /* Temperature */ | |
30 | #define WPT_TSC 0x04 /* Thermal Sensor Control */ | |
31 | #define WPT_TSS 0x06 /* Thermal Sensor Status */ | |
32 | #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ | |
33 | #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ | |
34 | #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ | |
35 | #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ | |
36 | #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ | |
37 | #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ | |
38 | #define WPT_TL 0x00000040 /* Throttle Value */ | |
39 | #define WPT_PHL 0x0060 /* PCH Hot Level */ | |
40 | #define WPT_PHLC 0x62 /* PHL Control */ | |
41 | #define WPT_TAS 0x80 /* Thermal Alert Status */ | |
42 | #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ | |
43 | #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ | |
44 | ||
45 | /* Wildcat Point-LP PCH Thermal Register bit definitions */ | |
23c973f5 | 46 | #define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */ |
d0a12625 TD |
47 | #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ |
48 | #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ | |
49 | #define WPT_TSS_GPES 0x08 /* GPE status */ | |
50 | #define WPT_TSEL_ETS 0x01 /* Enable TS */ | |
51 | #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ | |
52 | #define WPT_TL_TOL 0x000001FF /* T0 Level */ | |
53 | #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ | |
54 | #define WPT_TL_TTEN 0x20000000 /* TT Enable */ | |
55 | ||
56 | static char driver_name[] = "Intel PCH thermal driver"; | |
57 | ||
58 | struct pch_thermal_device { | |
59 | void __iomem *hw_base; | |
60 | const struct pch_dev_ops *ops; | |
61 | struct pci_dev *pdev; | |
62 | struct thermal_zone_device *tzd; | |
63 | int crt_trip_id; | |
64 | unsigned long crt_temp; | |
65 | int hot_trip_id; | |
66 | unsigned long hot_temp; | |
aed3f249 SP |
67 | int psv_trip_id; |
68 | unsigned long psv_temp; | |
176b1ec2 | 69 | bool bios_enabled; |
d0a12625 TD |
70 | }; |
71 | ||
aed3f249 SP |
72 | #ifdef CONFIG_ACPI |
73 | ||
74 | /* | |
75 | * On some platforms, there is a companion ACPI device, which adds | |
76 | * passive trip temperature using _PSV method. There is no specific | |
77 | * passive temperature setting in MMIO interface of this PCI device. | |
78 | */ | |
79 | static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, | |
80 | int *nr_trips) | |
81 | { | |
82 | struct acpi_device *adev; | |
83 | ||
84 | ptd->psv_trip_id = -1; | |
85 | ||
86 | adev = ACPI_COMPANION(&ptd->pdev->dev); | |
87 | if (adev) { | |
88 | unsigned long long r; | |
89 | acpi_status status; | |
90 | ||
91 | status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, | |
92 | &r); | |
93 | if (ACPI_SUCCESS(status)) { | |
94 | unsigned long trip_temp; | |
95 | ||
96 | trip_temp = DECI_KELVIN_TO_MILLICELSIUS(r); | |
97 | if (trip_temp) { | |
98 | ptd->psv_temp = trip_temp; | |
99 | ptd->psv_trip_id = *nr_trips; | |
100 | ++(*nr_trips); | |
101 | } | |
102 | } | |
103 | } | |
104 | } | |
105 | #else | |
106 | static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, | |
107 | int *nr_trips) | |
108 | { | |
109 | ptd->psv_trip_id = -1; | |
110 | ||
111 | } | |
112 | #endif | |
113 | ||
d0a12625 TD |
114 | static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) |
115 | { | |
116 | u8 tsel; | |
117 | u16 trip_temp; | |
118 | ||
119 | *nr_trips = 0; | |
120 | ||
121 | /* Check if BIOS has already enabled thermal sensor */ | |
595536e0 | 122 | if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) { |
176b1ec2 | 123 | ptd->bios_enabled = true; |
d0a12625 | 124 | goto read_trips; |
176b1ec2 | 125 | } |
d0a12625 TD |
126 | |
127 | tsel = readb(ptd->hw_base + WPT_TSEL); | |
128 | /* | |
129 | * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. | |
130 | * If so, thermal sensor cannot enable. Bail out. | |
131 | */ | |
132 | if (tsel & WPT_TSEL_PLDB) { | |
133 | dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); | |
134 | return -ENODEV; | |
135 | } | |
136 | ||
137 | writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); | |
595536e0 | 138 | if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) { |
d0a12625 TD |
139 | dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); |
140 | return -ENODEV; | |
141 | } | |
142 | ||
143 | read_trips: | |
144 | ptd->crt_trip_id = -1; | |
145 | trip_temp = readw(ptd->hw_base + WPT_CTT); | |
146 | trip_temp &= 0x1FF; | |
147 | if (trip_temp) { | |
148 | /* Resolution of 1/2 degree C and an offset of -50C */ | |
149 | ptd->crt_temp = trip_temp * 1000 / 2 - 50000; | |
150 | ptd->crt_trip_id = 0; | |
151 | ++(*nr_trips); | |
152 | } | |
153 | ||
154 | ptd->hot_trip_id = -1; | |
155 | trip_temp = readw(ptd->hw_base + WPT_PHL); | |
156 | trip_temp &= 0x1FF; | |
157 | if (trip_temp) { | |
158 | /* Resolution of 1/2 degree C and an offset of -50C */ | |
159 | ptd->hot_temp = trip_temp * 1000 / 2 - 50000; | |
160 | ptd->hot_trip_id = *nr_trips; | |
161 | ++(*nr_trips); | |
162 | } | |
163 | ||
aed3f249 SP |
164 | pch_wpt_add_acpi_psv_trip(ptd, nr_trips); |
165 | ||
d0a12625 TD |
166 | return 0; |
167 | } | |
168 | ||
dfb22fc5 | 169 | static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) |
d0a12625 | 170 | { |
23c973f5 | 171 | u16 wpt_temp; |
d0a12625 | 172 | |
23c973f5 | 173 | wpt_temp = WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP); |
d0a12625 TD |
174 | |
175 | /* Resolution of 1/2 degree C and an offset of -50C */ | |
176 | *temp = (wpt_temp * 1000 / 2 - 50000); | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
176b1ec2 SP |
181 | static int pch_wpt_suspend(struct pch_thermal_device *ptd) |
182 | { | |
183 | u8 tsel; | |
184 | ||
185 | if (ptd->bios_enabled) | |
186 | return 0; | |
187 | ||
188 | tsel = readb(ptd->hw_base + WPT_TSEL); | |
189 | ||
190 | writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); | |
191 | ||
192 | return 0; | |
193 | } | |
194 | ||
195 | static int pch_wpt_resume(struct pch_thermal_device *ptd) | |
196 | { | |
197 | u8 tsel; | |
198 | ||
199 | if (ptd->bios_enabled) | |
200 | return 0; | |
201 | ||
202 | tsel = readb(ptd->hw_base + WPT_TSEL); | |
203 | ||
204 | writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
d0a12625 TD |
209 | struct pch_dev_ops { |
210 | int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); | |
dfb22fc5 | 211 | int (*get_temp)(struct pch_thermal_device *ptd, int *temp); |
176b1ec2 SP |
212 | int (*suspend)(struct pch_thermal_device *ptd); |
213 | int (*resume)(struct pch_thermal_device *ptd); | |
d0a12625 TD |
214 | }; |
215 | ||
216 | ||
217 | /* dev ops for Wildcat Point */ | |
a96bedf1 | 218 | static const struct pch_dev_ops pch_dev_ops_wpt = { |
d0a12625 TD |
219 | .hw_init = pch_wpt_init, |
220 | .get_temp = pch_wpt_get_temp, | |
176b1ec2 SP |
221 | .suspend = pch_wpt_suspend, |
222 | .resume = pch_wpt_resume, | |
d0a12625 TD |
223 | }; |
224 | ||
dfb22fc5 | 225 | static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) |
d0a12625 TD |
226 | { |
227 | struct pch_thermal_device *ptd = tzd->devdata; | |
228 | ||
229 | return ptd->ops->get_temp(ptd, temp); | |
230 | } | |
231 | ||
232 | static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip, | |
233 | enum thermal_trip_type *type) | |
234 | { | |
235 | struct pch_thermal_device *ptd = tzd->devdata; | |
236 | ||
237 | if (ptd->crt_trip_id == trip) | |
238 | *type = THERMAL_TRIP_CRITICAL; | |
239 | else if (ptd->hot_trip_id == trip) | |
240 | *type = THERMAL_TRIP_HOT; | |
aed3f249 SP |
241 | else if (ptd->psv_trip_id == trip) |
242 | *type = THERMAL_TRIP_PASSIVE; | |
d0a12625 TD |
243 | else |
244 | return -EINVAL; | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
dfb22fc5 | 249 | static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp) |
d0a12625 TD |
250 | { |
251 | struct pch_thermal_device *ptd = tzd->devdata; | |
252 | ||
253 | if (ptd->crt_trip_id == trip) | |
254 | *temp = ptd->crt_temp; | |
255 | else if (ptd->hot_trip_id == trip) | |
256 | *temp = ptd->hot_temp; | |
aed3f249 SP |
257 | else if (ptd->psv_trip_id == trip) |
258 | *temp = ptd->psv_temp; | |
d0a12625 TD |
259 | else |
260 | return -EINVAL; | |
261 | ||
262 | return 0; | |
263 | } | |
264 | ||
265 | static struct thermal_zone_device_ops tzd_ops = { | |
266 | .get_temp = pch_thermal_get_temp, | |
267 | .get_trip_type = pch_get_trip_type, | |
268 | .get_trip_temp = pch_get_trip_temp, | |
269 | }; | |
270 | ||
c6068a6e OH |
271 | enum board_ids { |
272 | board_hsw, | |
273 | board_wpt, | |
274 | board_skl, | |
6ed5ed14 | 275 | board_cnl, |
97a41c96 | 276 | board_cml, |
c6068a6e OH |
277 | }; |
278 | ||
279 | static const struct board_info { | |
280 | const char *name; | |
281 | const struct pch_dev_ops *ops; | |
282 | } board_info[] = { | |
283 | [board_hsw] = { | |
284 | .name = "pch_haswell", | |
285 | .ops = &pch_dev_ops_wpt, | |
286 | }, | |
287 | [board_wpt] = { | |
288 | .name = "pch_wildcat_point", | |
289 | .ops = &pch_dev_ops_wpt, | |
290 | }, | |
291 | [board_skl] = { | |
292 | .name = "pch_skylake", | |
293 | .ops = &pch_dev_ops_wpt, | |
294 | }, | |
6ed5ed14 SP |
295 | [board_cnl] = { |
296 | .name = "pch_cannonlake", | |
297 | .ops = &pch_dev_ops_wpt, | |
298 | }, | |
97a41c96 GK |
299 | [board_cml] = { |
300 | .name = "pch_cometlake", | |
301 | .ops = &pch_dev_ops_wpt, | |
302 | } | |
c6068a6e | 303 | }; |
d0a12625 TD |
304 | |
305 | static int intel_pch_thermal_probe(struct pci_dev *pdev, | |
306 | const struct pci_device_id *id) | |
307 | { | |
c6068a6e OH |
308 | enum board_ids board_id = id->driver_data; |
309 | const struct board_info *bi = &board_info[board_id]; | |
d0a12625 TD |
310 | struct pch_thermal_device *ptd; |
311 | int err; | |
312 | int nr_trips; | |
d0a12625 TD |
313 | |
314 | ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); | |
315 | if (!ptd) | |
316 | return -ENOMEM; | |
317 | ||
c6068a6e | 318 | ptd->ops = bi->ops; |
d0a12625 TD |
319 | |
320 | pci_set_drvdata(pdev, ptd); | |
321 | ptd->pdev = pdev; | |
322 | ||
323 | err = pci_enable_device(pdev); | |
324 | if (err) { | |
325 | dev_err(&pdev->dev, "failed to enable pci device\n"); | |
326 | return err; | |
327 | } | |
328 | ||
329 | err = pci_request_regions(pdev, driver_name); | |
330 | if (err) { | |
331 | dev_err(&pdev->dev, "failed to request pci region\n"); | |
332 | goto error_disable; | |
333 | } | |
334 | ||
335 | ptd->hw_base = pci_ioremap_bar(pdev, 0); | |
336 | if (!ptd->hw_base) { | |
337 | err = -ENOMEM; | |
338 | dev_err(&pdev->dev, "failed to map mem base\n"); | |
339 | goto error_release; | |
340 | } | |
341 | ||
342 | err = ptd->ops->hw_init(ptd, &nr_trips); | |
343 | if (err) | |
344 | goto error_cleanup; | |
345 | ||
c6068a6e | 346 | ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd, |
d0a12625 TD |
347 | &tzd_ops, NULL, 0, 0); |
348 | if (IS_ERR(ptd->tzd)) { | |
349 | dev_err(&pdev->dev, "Failed to register thermal zone %s\n", | |
c6068a6e | 350 | bi->name); |
d0a12625 TD |
351 | err = PTR_ERR(ptd->tzd); |
352 | goto error_cleanup; | |
353 | } | |
354 | ||
355 | return 0; | |
356 | ||
357 | error_cleanup: | |
358 | iounmap(ptd->hw_base); | |
359 | error_release: | |
360 | pci_release_regions(pdev); | |
361 | error_disable: | |
362 | pci_disable_device(pdev); | |
363 | dev_err(&pdev->dev, "pci device failed to probe\n"); | |
364 | return err; | |
365 | } | |
366 | ||
367 | static void intel_pch_thermal_remove(struct pci_dev *pdev) | |
368 | { | |
369 | struct pch_thermal_device *ptd = pci_get_drvdata(pdev); | |
370 | ||
371 | thermal_zone_device_unregister(ptd->tzd); | |
372 | iounmap(ptd->hw_base); | |
373 | pci_set_drvdata(pdev, NULL); | |
374 | pci_release_region(pdev, 0); | |
375 | pci_disable_device(pdev); | |
376 | } | |
377 | ||
176b1ec2 SP |
378 | static int intel_pch_thermal_suspend(struct device *device) |
379 | { | |
97e9cafe | 380 | struct pch_thermal_device *ptd = dev_get_drvdata(device); |
176b1ec2 SP |
381 | |
382 | return ptd->ops->suspend(ptd); | |
383 | } | |
384 | ||
385 | static int intel_pch_thermal_resume(struct device *device) | |
386 | { | |
97e9cafe | 387 | struct pch_thermal_device *ptd = dev_get_drvdata(device); |
176b1ec2 SP |
388 | |
389 | return ptd->ops->resume(ptd); | |
390 | } | |
391 | ||
9b877de3 | 392 | static const struct pci_device_id intel_pch_thermal_id[] = { |
c6068a6e OH |
393 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1), |
394 | .driver_data = board_hsw, }, | |
395 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2), | |
396 | .driver_data = board_hsw, }, | |
397 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT), | |
398 | .driver_data = board_wpt, }, | |
399 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL), | |
400 | .driver_data = board_skl, }, | |
401 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H), | |
402 | .driver_data = board_skl, }, | |
6ed5ed14 SP |
403 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL), |
404 | .driver_data = board_cnl, }, | |
405 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H), | |
406 | .driver_data = board_cnl, }, | |
97a41c96 GK |
407 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H), |
408 | .driver_data = board_cml, }, | |
d0a12625 TD |
409 | { 0, }, |
410 | }; | |
411 | MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); | |
412 | ||
176b1ec2 SP |
413 | static const struct dev_pm_ops intel_pch_pm_ops = { |
414 | .suspend = intel_pch_thermal_suspend, | |
415 | .resume = intel_pch_thermal_resume, | |
416 | }; | |
417 | ||
d0a12625 TD |
418 | static struct pci_driver intel_pch_thermal_driver = { |
419 | .name = "intel_pch_thermal", | |
420 | .id_table = intel_pch_thermal_id, | |
421 | .probe = intel_pch_thermal_probe, | |
422 | .remove = intel_pch_thermal_remove, | |
176b1ec2 | 423 | .driver.pm = &intel_pch_pm_ops, |
d0a12625 TD |
424 | }; |
425 | ||
426 | module_pci_driver(intel_pch_thermal_driver); | |
427 | ||
428 | MODULE_LICENSE("GPL v2"); | |
429 | MODULE_DESCRIPTION("Intel PCH Thermal driver"); |