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d0a12625 TD |
1 | /* intel_pch_thermal.c - Intel PCH Thermal driver |
2 | * | |
3 | * Copyright (c) 2015, Intel Corporation. | |
4 | * | |
5 | * Authors: | |
6 | * Tushar Dave <tushar.n.dave@intel.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms and conditions of the GNU General Public License, | |
10 | * version 2, as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/pci.h> | |
aed3f249 | 23 | #include <linux/acpi.h> |
d0a12625 | 24 | #include <linux/thermal.h> |
176b1ec2 | 25 | #include <linux/pm.h> |
d0a12625 TD |
26 | |
27 | /* Intel PCH thermal Device IDs */ | |
28 | #define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */ | |
4cba7d23 | 29 | #define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */ |
d0a12625 TD |
30 | |
31 | /* Wildcat Point-LP PCH Thermal registers */ | |
32 | #define WPT_TEMP 0x0000 /* Temperature */ | |
33 | #define WPT_TSC 0x04 /* Thermal Sensor Control */ | |
34 | #define WPT_TSS 0x06 /* Thermal Sensor Status */ | |
35 | #define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */ | |
36 | #define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */ | |
37 | #define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */ | |
38 | #define WPT_CTT 0x0010 /* Catastrophic Trip Point */ | |
39 | #define WPT_TAHV 0x0014 /* Thermal Alert High Value */ | |
40 | #define WPT_TALV 0x0018 /* Thermal Alert Low Value */ | |
41 | #define WPT_TL 0x00000040 /* Throttle Value */ | |
42 | #define WPT_PHL 0x0060 /* PCH Hot Level */ | |
43 | #define WPT_PHLC 0x62 /* PHL Control */ | |
44 | #define WPT_TAS 0x80 /* Thermal Alert Status */ | |
45 | #define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */ | |
46 | #define WPT_TSGPEN 0x84 /* General Purpose Event Enables */ | |
47 | ||
48 | /* Wildcat Point-LP PCH Thermal Register bit definitions */ | |
49 | #define WPT_TEMP_TSR 0x00ff /* Temp TS Reading */ | |
50 | #define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */ | |
51 | #define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */ | |
52 | #define WPT_TSS_GPES 0x08 /* GPE status */ | |
53 | #define WPT_TSEL_ETS 0x01 /* Enable TS */ | |
54 | #define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */ | |
55 | #define WPT_TL_TOL 0x000001FF /* T0 Level */ | |
56 | #define WPT_TL_T1L 0x1ff00000 /* T1 Level */ | |
57 | #define WPT_TL_TTEN 0x20000000 /* TT Enable */ | |
58 | ||
59 | static char driver_name[] = "Intel PCH thermal driver"; | |
60 | ||
61 | struct pch_thermal_device { | |
62 | void __iomem *hw_base; | |
63 | const struct pch_dev_ops *ops; | |
64 | struct pci_dev *pdev; | |
65 | struct thermal_zone_device *tzd; | |
66 | int crt_trip_id; | |
67 | unsigned long crt_temp; | |
68 | int hot_trip_id; | |
69 | unsigned long hot_temp; | |
aed3f249 SP |
70 | int psv_trip_id; |
71 | unsigned long psv_temp; | |
176b1ec2 | 72 | bool bios_enabled; |
d0a12625 TD |
73 | }; |
74 | ||
aed3f249 SP |
75 | #ifdef CONFIG_ACPI |
76 | ||
77 | /* | |
78 | * On some platforms, there is a companion ACPI device, which adds | |
79 | * passive trip temperature using _PSV method. There is no specific | |
80 | * passive temperature setting in MMIO interface of this PCI device. | |
81 | */ | |
82 | static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, | |
83 | int *nr_trips) | |
84 | { | |
85 | struct acpi_device *adev; | |
86 | ||
87 | ptd->psv_trip_id = -1; | |
88 | ||
89 | adev = ACPI_COMPANION(&ptd->pdev->dev); | |
90 | if (adev) { | |
91 | unsigned long long r; | |
92 | acpi_status status; | |
93 | ||
94 | status = acpi_evaluate_integer(adev->handle, "_PSV", NULL, | |
95 | &r); | |
96 | if (ACPI_SUCCESS(status)) { | |
97 | unsigned long trip_temp; | |
98 | ||
99 | trip_temp = DECI_KELVIN_TO_MILLICELSIUS(r); | |
100 | if (trip_temp) { | |
101 | ptd->psv_temp = trip_temp; | |
102 | ptd->psv_trip_id = *nr_trips; | |
103 | ++(*nr_trips); | |
104 | } | |
105 | } | |
106 | } | |
107 | } | |
108 | #else | |
109 | static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, | |
110 | int *nr_trips) | |
111 | { | |
112 | ptd->psv_trip_id = -1; | |
113 | ||
114 | } | |
115 | #endif | |
116 | ||
d0a12625 TD |
117 | static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips) |
118 | { | |
119 | u8 tsel; | |
120 | u16 trip_temp; | |
121 | ||
122 | *nr_trips = 0; | |
123 | ||
124 | /* Check if BIOS has already enabled thermal sensor */ | |
176b1ec2 SP |
125 | if (WPT_TSS_TSDSS & readb(ptd->hw_base + WPT_TSS)) { |
126 | ptd->bios_enabled = true; | |
d0a12625 | 127 | goto read_trips; |
176b1ec2 | 128 | } |
d0a12625 TD |
129 | |
130 | tsel = readb(ptd->hw_base + WPT_TSEL); | |
131 | /* | |
132 | * When TSEL's Policy Lock-Down bit is 1, TSEL become RO. | |
133 | * If so, thermal sensor cannot enable. Bail out. | |
134 | */ | |
135 | if (tsel & WPT_TSEL_PLDB) { | |
136 | dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); | |
137 | return -ENODEV; | |
138 | } | |
139 | ||
140 | writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); | |
141 | if (!(WPT_TSS_TSDSS & readb(ptd->hw_base + WPT_TSS))) { | |
142 | dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n"); | |
143 | return -ENODEV; | |
144 | } | |
145 | ||
146 | read_trips: | |
147 | ptd->crt_trip_id = -1; | |
148 | trip_temp = readw(ptd->hw_base + WPT_CTT); | |
149 | trip_temp &= 0x1FF; | |
150 | if (trip_temp) { | |
151 | /* Resolution of 1/2 degree C and an offset of -50C */ | |
152 | ptd->crt_temp = trip_temp * 1000 / 2 - 50000; | |
153 | ptd->crt_trip_id = 0; | |
154 | ++(*nr_trips); | |
155 | } | |
156 | ||
157 | ptd->hot_trip_id = -1; | |
158 | trip_temp = readw(ptd->hw_base + WPT_PHL); | |
159 | trip_temp &= 0x1FF; | |
160 | if (trip_temp) { | |
161 | /* Resolution of 1/2 degree C and an offset of -50C */ | |
162 | ptd->hot_temp = trip_temp * 1000 / 2 - 50000; | |
163 | ptd->hot_trip_id = *nr_trips; | |
164 | ++(*nr_trips); | |
165 | } | |
166 | ||
aed3f249 SP |
167 | pch_wpt_add_acpi_psv_trip(ptd, nr_trips); |
168 | ||
d0a12625 TD |
169 | return 0; |
170 | } | |
171 | ||
dfb22fc5 | 172 | static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp) |
d0a12625 TD |
173 | { |
174 | u8 wpt_temp; | |
175 | ||
176 | wpt_temp = WPT_TEMP_TSR & readl(ptd->hw_base + WPT_TEMP); | |
177 | ||
178 | /* Resolution of 1/2 degree C and an offset of -50C */ | |
179 | *temp = (wpt_temp * 1000 / 2 - 50000); | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
176b1ec2 SP |
184 | static int pch_wpt_suspend(struct pch_thermal_device *ptd) |
185 | { | |
186 | u8 tsel; | |
187 | ||
188 | if (ptd->bios_enabled) | |
189 | return 0; | |
190 | ||
191 | tsel = readb(ptd->hw_base + WPT_TSEL); | |
192 | ||
193 | writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL); | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
198 | static int pch_wpt_resume(struct pch_thermal_device *ptd) | |
199 | { | |
200 | u8 tsel; | |
201 | ||
202 | if (ptd->bios_enabled) | |
203 | return 0; | |
204 | ||
205 | tsel = readb(ptd->hw_base + WPT_TSEL); | |
206 | ||
207 | writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL); | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
d0a12625 TD |
212 | struct pch_dev_ops { |
213 | int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips); | |
dfb22fc5 | 214 | int (*get_temp)(struct pch_thermal_device *ptd, int *temp); |
176b1ec2 SP |
215 | int (*suspend)(struct pch_thermal_device *ptd); |
216 | int (*resume)(struct pch_thermal_device *ptd); | |
d0a12625 TD |
217 | }; |
218 | ||
219 | ||
220 | /* dev ops for Wildcat Point */ | |
a96bedf1 | 221 | static const struct pch_dev_ops pch_dev_ops_wpt = { |
d0a12625 TD |
222 | .hw_init = pch_wpt_init, |
223 | .get_temp = pch_wpt_get_temp, | |
176b1ec2 SP |
224 | .suspend = pch_wpt_suspend, |
225 | .resume = pch_wpt_resume, | |
d0a12625 TD |
226 | }; |
227 | ||
dfb22fc5 | 228 | static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp) |
d0a12625 TD |
229 | { |
230 | struct pch_thermal_device *ptd = tzd->devdata; | |
231 | ||
232 | return ptd->ops->get_temp(ptd, temp); | |
233 | } | |
234 | ||
235 | static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip, | |
236 | enum thermal_trip_type *type) | |
237 | { | |
238 | struct pch_thermal_device *ptd = tzd->devdata; | |
239 | ||
240 | if (ptd->crt_trip_id == trip) | |
241 | *type = THERMAL_TRIP_CRITICAL; | |
242 | else if (ptd->hot_trip_id == trip) | |
243 | *type = THERMAL_TRIP_HOT; | |
aed3f249 SP |
244 | else if (ptd->psv_trip_id == trip) |
245 | *type = THERMAL_TRIP_PASSIVE; | |
d0a12625 TD |
246 | else |
247 | return -EINVAL; | |
248 | ||
249 | return 0; | |
250 | } | |
251 | ||
dfb22fc5 | 252 | static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp) |
d0a12625 TD |
253 | { |
254 | struct pch_thermal_device *ptd = tzd->devdata; | |
255 | ||
256 | if (ptd->crt_trip_id == trip) | |
257 | *temp = ptd->crt_temp; | |
258 | else if (ptd->hot_trip_id == trip) | |
259 | *temp = ptd->hot_temp; | |
aed3f249 SP |
260 | else if (ptd->psv_trip_id == trip) |
261 | *temp = ptd->psv_temp; | |
d0a12625 TD |
262 | else |
263 | return -EINVAL; | |
264 | ||
265 | return 0; | |
266 | } | |
267 | ||
268 | static struct thermal_zone_device_ops tzd_ops = { | |
269 | .get_temp = pch_thermal_get_temp, | |
270 | .get_trip_type = pch_get_trip_type, | |
271 | .get_trip_temp = pch_get_trip_temp, | |
272 | }; | |
273 | ||
274 | ||
275 | static int intel_pch_thermal_probe(struct pci_dev *pdev, | |
276 | const struct pci_device_id *id) | |
277 | { | |
278 | struct pch_thermal_device *ptd; | |
279 | int err; | |
280 | int nr_trips; | |
281 | char *dev_name; | |
282 | ||
283 | ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL); | |
284 | if (!ptd) | |
285 | return -ENOMEM; | |
286 | ||
287 | switch (pdev->device) { | |
288 | case PCH_THERMAL_DID_WPT: | |
289 | ptd->ops = &pch_dev_ops_wpt; | |
290 | dev_name = "pch_wildcat_point"; | |
291 | break; | |
4cba7d23 SP |
292 | case PCH_THERMAL_DID_SKL: |
293 | ptd->ops = &pch_dev_ops_wpt; | |
294 | dev_name = "pch_skylake"; | |
295 | break; | |
d0a12625 TD |
296 | default: |
297 | dev_err(&pdev->dev, "unknown pch thermal device\n"); | |
298 | return -ENODEV; | |
299 | } | |
300 | ||
301 | pci_set_drvdata(pdev, ptd); | |
302 | ptd->pdev = pdev; | |
303 | ||
304 | err = pci_enable_device(pdev); | |
305 | if (err) { | |
306 | dev_err(&pdev->dev, "failed to enable pci device\n"); | |
307 | return err; | |
308 | } | |
309 | ||
310 | err = pci_request_regions(pdev, driver_name); | |
311 | if (err) { | |
312 | dev_err(&pdev->dev, "failed to request pci region\n"); | |
313 | goto error_disable; | |
314 | } | |
315 | ||
316 | ptd->hw_base = pci_ioremap_bar(pdev, 0); | |
317 | if (!ptd->hw_base) { | |
318 | err = -ENOMEM; | |
319 | dev_err(&pdev->dev, "failed to map mem base\n"); | |
320 | goto error_release; | |
321 | } | |
322 | ||
323 | err = ptd->ops->hw_init(ptd, &nr_trips); | |
324 | if (err) | |
325 | goto error_cleanup; | |
326 | ||
327 | ptd->tzd = thermal_zone_device_register(dev_name, nr_trips, 0, ptd, | |
328 | &tzd_ops, NULL, 0, 0); | |
329 | if (IS_ERR(ptd->tzd)) { | |
330 | dev_err(&pdev->dev, "Failed to register thermal zone %s\n", | |
331 | dev_name); | |
332 | err = PTR_ERR(ptd->tzd); | |
333 | goto error_cleanup; | |
334 | } | |
335 | ||
336 | return 0; | |
337 | ||
338 | error_cleanup: | |
339 | iounmap(ptd->hw_base); | |
340 | error_release: | |
341 | pci_release_regions(pdev); | |
342 | error_disable: | |
343 | pci_disable_device(pdev); | |
344 | dev_err(&pdev->dev, "pci device failed to probe\n"); | |
345 | return err; | |
346 | } | |
347 | ||
348 | static void intel_pch_thermal_remove(struct pci_dev *pdev) | |
349 | { | |
350 | struct pch_thermal_device *ptd = pci_get_drvdata(pdev); | |
351 | ||
352 | thermal_zone_device_unregister(ptd->tzd); | |
353 | iounmap(ptd->hw_base); | |
354 | pci_set_drvdata(pdev, NULL); | |
355 | pci_release_region(pdev, 0); | |
356 | pci_disable_device(pdev); | |
357 | } | |
358 | ||
176b1ec2 SP |
359 | static int intel_pch_thermal_suspend(struct device *device) |
360 | { | |
361 | struct pci_dev *pdev = to_pci_dev(device); | |
362 | struct pch_thermal_device *ptd = pci_get_drvdata(pdev); | |
363 | ||
364 | return ptd->ops->suspend(ptd); | |
365 | } | |
366 | ||
367 | static int intel_pch_thermal_resume(struct device *device) | |
368 | { | |
369 | struct pci_dev *pdev = to_pci_dev(device); | |
370 | struct pch_thermal_device *ptd = pci_get_drvdata(pdev); | |
371 | ||
372 | return ptd->ops->resume(ptd); | |
373 | } | |
374 | ||
d0a12625 TD |
375 | static struct pci_device_id intel_pch_thermal_id[] = { |
376 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT) }, | |
4cba7d23 | 377 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL) }, |
d0a12625 TD |
378 | { 0, }, |
379 | }; | |
380 | MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id); | |
381 | ||
176b1ec2 SP |
382 | static const struct dev_pm_ops intel_pch_pm_ops = { |
383 | .suspend = intel_pch_thermal_suspend, | |
384 | .resume = intel_pch_thermal_resume, | |
385 | }; | |
386 | ||
d0a12625 TD |
387 | static struct pci_driver intel_pch_thermal_driver = { |
388 | .name = "intel_pch_thermal", | |
389 | .id_table = intel_pch_thermal_id, | |
390 | .probe = intel_pch_thermal_probe, | |
391 | .remove = intel_pch_thermal_remove, | |
176b1ec2 | 392 | .driver.pm = &intel_pch_pm_ops, |
d0a12625 TD |
393 | }; |
394 | ||
395 | module_pci_driver(intel_pch_thermal_driver); | |
396 | ||
397 | MODULE_LICENSE("GPL v2"); | |
398 | MODULE_DESCRIPTION("Intel PCH Thermal driver"); |