[mirror_ubuntu-bionic-kernel.git] / drivers / thermal / rcar_gen3_thermal.c

/*
 *  R-Car Gen3 THS thermal sensor driver
 *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
 *
 * Copyright (C) 2016 Renesas Electronics Corporation.
 * Copyright (C) 2016 Sang Engineering
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; version 2 of the License.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  General Public License for more details.
 *
 */
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/sys_soc.h>
#include <linux/thermal.h>

#include "thermal_core.h"

/* Register offsets */
#define REG_GEN3_IRQSTR		0x04
#define REG_GEN3_IRQMSK		0x08
#define REG_GEN3_IRQCTL		0x0C
#define REG_GEN3_IRQEN		0x10
#define REG_GEN3_IRQTEMP1	0x14
#define REG_GEN3_IRQTEMP2	0x18
#define REG_GEN3_IRQTEMP3	0x1C
#define REG_GEN3_CTSR		0x20
#define REG_GEN3_THCTR		0x20
#define REG_GEN3_TEMP		0x28
#define REG_GEN3_THCODE1	0x50
#define REG_GEN3_THCODE2	0x54
#define REG_GEN3_THCODE3	0x58

/* IRQ{STR,MSK,EN} bits */
#define IRQ_TEMP1		BIT(0)
#define IRQ_TEMP2		BIT(1)
#define IRQ_TEMP3		BIT(2)
#define IRQ_TEMPD1		BIT(3)
#define IRQ_TEMPD2		BIT(4)
#define IRQ_TEMPD3		BIT(5)

/* CTSR bits */
#define CTSR_PONM	BIT(8)
#define CTSR_AOUT	BIT(7)
#define CTSR_THBGR	BIT(5)
#define CTSR_VMEN	BIT(4)
#define CTSR_VMST	BIT(1)
#define CTSR_THSST	BIT(0)

/* THCTR bits */
#define THCTR_PONM	BIT(6)
#define THCTR_THSST	BIT(0)

#define CTEMP_MASK	0xFFF

#define MCELSIUS(temp)	((temp) * 1000)
#define GEN3_FUSE_MASK	0xFFF

#define TSC_MAX_NUM	3

/* Structure for thermal temperature calculation */
struct equation_coefs {
	int a1;
	int b1;
	int a2;
	int b2;
};

struct rcar_gen3_thermal_tsc {
	void __iomem *base;
	struct thermal_zone_device *zone;
	struct equation_coefs coef;
	int low;
	int high;
};

struct rcar_gen3_thermal_priv {
	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
	unsigned int num_tscs;
	void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
};

static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
					 u32 reg)
{
	return ioread32(tsc->base + reg);
}

static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
					   u32 reg, u32 data)
{
	iowrite32(data, tsc->base + reg);
}

/*
 * Linear approximation for temperature
 *
 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 *
 * The constants a and b are calculated using two triplets of int values PTAT
 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 * coded values from driver. The formula to calculate a and b are taken from
 * BSP and sparsely documented and understood.
 *
 * Examining the linear formula and the formula used to calculate constants a
 * and b while knowing that the span for PTAT and THCODE values are between
 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 * Integer also needs to be signed so that leaves 7 bits for binary
 * fixed point scaling.
 */

#define FIXPT_SHIFT 7
#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)

#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */

/* no idea where these constants come from */
#define TJ_1 96
#define TJ_3 -41

static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
					 int *ptat, int *thcode)
{
	int tj_2;

	/* TODO: Find documentation and document constant calculation formula */

	/*
	 * Division is not scaled in BSP and if scaled it might overflow
	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	 */
	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 137)
		/ (ptat[0] - ptat[2])) - FIXPT_INT(41);

	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
			     tj_2 - FIXPT_INT(TJ_3));
	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;

	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
			     tj_2 - FIXPT_INT(TJ_1));
	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
}

static int rcar_gen3_thermal_round(int temp)
{
	int result, round_offs;

	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
		-RCAR3_THERMAL_GRAN / 2;
	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	return result * RCAR3_THERMAL_GRAN;
}

static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
{
	struct rcar_gen3_thermal_tsc *tsc = devdata;
	int mcelsius, val1, val2;
	u32 reg;

	/* Read register and convert to mili Celsius */
	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;

	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);

	/* Make sure we are inside specifications */
	if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
		return -EIO;

	/* Round value to device granularity setting */
	*temp = rcar_gen3_thermal_round(mcelsius);

	return 0;
}

static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
					      int mcelsius)
{
	int celsius, val1, val2;

	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;

	return INT_FIXPT((val1 + val2) / 2);
}

static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
{
	struct rcar_gen3_thermal_tsc *tsc = devdata;

	low = clamp_val(low, -40000, 125000);
	high = clamp_val(high, -40000, 125000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
				rcar_gen3_thermal_mcelsius_to_temp(tsc, low));

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
				rcar_gen3_thermal_mcelsius_to_temp(tsc, high));

	tsc->low = low;
	tsc->high = high;

	return 0;
}

static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
	.get_temp	= rcar_gen3_thermal_get_temp,
	.set_trips	= rcar_gen3_thermal_set_trips,
};

static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
{
	unsigned int i;
	u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;

	for (i = 0; i < priv->num_tscs; i++)
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
}

static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	u32 status;
	int i;

	for (i = 0; i < priv->num_tscs; i++) {
		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
		if (status)
			thermal_zone_device_update(priv->tscs[i]->zone,
						   THERMAL_EVENT_UNSPECIFIED);
	}

	return IRQ_HANDLED;
}

static const struct soc_device_attribute r8a7795es1[] = {
	{ .soc_id = "r8a7795", .revision = "ES1.*" },
	{ /* sentinel */ }
};

static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
{
	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);

	usleep_range(100, 200);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
				CTSR_VMST | CTSR_THSST);

	usleep_range(1000, 2000);
}

static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
{
	u32 reg_val;

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val &= ~THCTR_PONM;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val |= THCTR_THSST;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);
}

static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
	{ .compatible = "renesas,r8a7795-thermal", },
	{ .compatible = "renesas,r8a7796-thermal", },
	{},
};
MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);

static int rcar_gen3_thermal_remove(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);

	rcar_thermal_irq_set(priv, false);

	pm_runtime_put(dev);
	pm_runtime_disable(dev);

	return 0;
}

static int rcar_gen3_thermal_probe(struct platform_device *pdev)
{
	struct rcar_gen3_thermal_priv *priv;
	struct device *dev = &pdev->dev;
	struct resource *res;
	struct thermal_zone_device *zone;
	int ret, irq, i;
	char *irqname;

	/* default values if FUSEs are missing */
	/* TODO: Read values from hardware on supported platforms */
	int ptat[3] = { 2351, 1509, 435 };
	int thcode[TSC_MAX_NUM][3] = {
		{ 3248, 2800, 2221 },
		{ 3245, 2795, 2216 },
		{ 3250, 2805, 2237 },
	};

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->thermal_init = rcar_gen3_thermal_init;
	if (soc_device_match(r8a7795es1))
		priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;

	platform_set_drvdata(pdev, priv);

	/*
	 * Request 2 (of the 3 possible) IRQs, the driver only needs to
	 * to trigger on the low and high trip points of the current
	 * temp window at this point.
	 */
	for (i = 0; i < 2; i++) {
		irq = platform_get_irq(pdev, i);
		if (irq < 0)
			return irq;

		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
					 dev_name(dev), i);
		if (!irqname)
			return -ENOMEM;

		ret = devm_request_threaded_irq(dev, irq, NULL,
						rcar_gen3_thermal_irq,
						IRQF_ONESHOT, irqname, priv);
		if (ret)
			return ret;
	}

	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	for (i = 0; i < TSC_MAX_NUM; i++) {
		struct rcar_gen3_thermal_tsc *tsc;

		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!res)
			break;

		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
		if (!tsc) {
			ret = -ENOMEM;
			goto error_unregister;
		}

		tsc->base = devm_ioremap_resource(dev, res);
		if (IS_ERR(tsc->base)) {
			ret = PTR_ERR(tsc->base);
			goto error_unregister;
		}

		priv->tscs[i] = tsc;

		priv->thermal_init(tsc);
		rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);

		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
							    &rcar_gen3_tz_of_ops);
		if (IS_ERR(zone)) {
			dev_err(dev, "Can't register thermal zone\n");
			ret = PTR_ERR(zone);
			goto error_unregister;
		}
		tsc->zone = zone;

		ret = of_thermal_get_ntrips(tsc->zone);
		if (ret < 0)
			goto error_unregister;

		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
	}

	priv->num_tscs = i;

	if (!priv->num_tscs) {
		ret = -ENODEV;
		goto error_unregister;
	}

	rcar_thermal_irq_set(priv, true);

	return 0;

error_unregister:
	rcar_gen3_thermal_remove(pdev);

	return ret;
}

static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);

	rcar_thermal_irq_set(priv, false);

	return 0;
}

static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	unsigned int i;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		priv->thermal_init(tsc);
		rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
	}

	rcar_thermal_irq_set(priv, true);

	return 0;
}

static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
			 rcar_gen3_thermal_resume);

static struct platform_driver rcar_gen3_thermal_driver = {
	.driver	= {
		.name	= "rcar_gen3_thermal",
		.pm = &rcar_gen3_thermal_pm_ops,
		.of_match_table = rcar_gen3_thermal_dt_ids,
	},
	.probe		= rcar_gen3_thermal_probe,
	.remove		= rcar_gen3_thermal_remove,
};
module_platform_driver(rcar_gen3_thermal_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
Commit	Line	Data
564e73d2 WS	1	/*
	2	* R-Car Gen3 THS thermal sensor driver
	3	* Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
	4	*
	5	* Copyright (C) 2016 Renesas Electronics Corporation.
	6	* Copyright (C) 2016 Sang Engineering
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; version 2 of the License.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	*/
	18	#include <linux/delay.h>
	19	#include <linux/err.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/io.h>
	22	#include <linux/module.h>
564e73d2 WS	23	#include <linux/of_device.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/pm_runtime.h>
d668c807	26	#include <linux/sys_soc.h>
564e73d2 WS	27	#include <linux/thermal.h>
564e73d2 WS	28
7d4b2697 NS	29	#include "thermal_core.h"
7d4b2697 NS	30
564e73d2 WS	31	/* Register offsets */
	32	#define REG_GEN3_IRQSTR 0x04
	33	#define REG_GEN3_IRQMSK 0x08
	34	#define REG_GEN3_IRQCTL 0x0C
	35	#define REG_GEN3_IRQEN 0x10
	36	#define REG_GEN3_IRQTEMP1 0x14
	37	#define REG_GEN3_IRQTEMP2 0x18
	38	#define REG_GEN3_IRQTEMP3 0x1C
	39	#define REG_GEN3_CTSR 0x20
	40	#define REG_GEN3_THCTR 0x20
	41	#define REG_GEN3_TEMP 0x28
	42	#define REG_GEN3_THCODE1 0x50
	43	#define REG_GEN3_THCODE2 0x54
	44	#define REG_GEN3_THCODE3 0x58
	45
7d4b2697 NS	46	/* IRQ{STR,MSK,EN} bits */
	47	#define IRQ_TEMP1 BIT(0)
	48	#define IRQ_TEMP2 BIT(1)
	49	#define IRQ_TEMP3 BIT(2)
	50	#define IRQ_TEMPD1 BIT(3)
	51	#define IRQ_TEMPD2 BIT(4)
	52	#define IRQ_TEMPD3 BIT(5)
	53
564e73d2 WS	54	/* CTSR bits */
	55	#define CTSR_PONM BIT(8)
	56	#define CTSR_AOUT BIT(7)
	57	#define CTSR_THBGR BIT(5)
	58	#define CTSR_VMEN BIT(4)
	59	#define CTSR_VMST BIT(1)
	60	#define CTSR_THSST BIT(0)
	61
	62	/* THCTR bits */
	63	#define THCTR_PONM BIT(6)
	64	#define THCTR_THSST BIT(0)
	65
	66	#define CTEMP_MASK 0xFFF
	67
	68	#define MCELSIUS(temp) ((temp) * 1000)
	69	#define GEN3_FUSE_MASK 0xFFF
	70
	71	#define TSC_MAX_NUM 3
	72
	73	/* Structure for thermal temperature calculation */
	74	struct equation_coefs {
	75	int a1;
	76	int b1;
	77	int a2;
	78	int b2;
	79	};
	80
	81	struct rcar_gen3_thermal_tsc {
	82	void __iomem *base;
	83	struct thermal_zone_device *zone;
	84	struct equation_coefs coef;
75f78d6d NS	85	int low;
75f78d6d NS	86	int high;
564e73d2 WS	87	};
	88
	89	struct rcar_gen3_thermal_priv {
	90	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
97dad1f1	91	unsigned int num_tscs;
564e73d2 WS	92	void (thermal_init)(struct rcar_gen3_thermal_tsc tsc);
	93	};
	94
	95	static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
	96	u32 reg)
	97	{
	98	return ioread32(tsc->base + reg);
	99	}
	100
	101	static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
	102	u32 reg, u32 data)
	103	{
	104	iowrite32(data, tsc->base + reg);
	105	}
	106
	107	/*
	108	* Linear approximation for temperature
	109	*
	110	* [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
	111	*
	112	* The constants a and b are calculated using two triplets of int values PTAT
	113	* and THCODE. PTAT and THCODE can either be read from hardware or use hard
	114	* coded values from driver. The formula to calculate a and b are taken from
	115	* BSP and sparsely documented and understood.
	116	*
	117	* Examining the linear formula and the formula used to calculate constants a
	118	* and b while knowing that the span for PTAT and THCODE values are between
	119	* 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
	120	* Integer also needs to be signed so that leaves 7 bits for binary
	121	* fixed point scaling.
	122	*/
	123
	124	#define FIXPT_SHIFT 7
	125	#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
7d4b2697	126	#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
564e73d2 WS	127	#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
	128	#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
	129
	130	#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
	131
	132	/* no idea where these constants come from */
	133	#define TJ_1 96
	134	#define TJ_3 -41
	135
	136	static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
	137	int ptat, int thcode)
	138	{
	139	int tj_2;
	140
	141	/* TODO: Find documentation and document constant calculation formula */
	142
	143	/*
	144	* Division is not scaled in BSP and if scaled it might overflow
	145	* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	146	*/
	147	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 137)
	148	/ (ptat[0] - ptat[2])) - FIXPT_INT(41);
	149
	150	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
	151	tj_2 - FIXPT_INT(TJ_3));
	152	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
	153
	154	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
	155	tj_2 - FIXPT_INT(TJ_1));
	156	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
	157	}
	158
	159	static int rcar_gen3_thermal_round(int temp)
	160	{
	161	int result, round_offs;
	162
	163	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
	164	-RCAR3_THERMAL_GRAN / 2;
	165	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	166	return result * RCAR3_THERMAL_GRAN;
	167	}
	168
	169	static int rcar_gen3_thermal_get_temp(void devdata, int temp)
	170	{
	171	struct rcar_gen3_thermal_tsc *tsc = devdata;
	172	int mcelsius, val1, val2;
	173	u32 reg;
	174
	175	/* Read register and convert to mili Celsius */
564e73d2 WS	176	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
	177
	178	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
	179	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
	180	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
	181
564e73d2 WS	182	/* Make sure we are inside specifications */
	183	if ((mcelsius < MCELSIUS(-40)) \|\| (mcelsius > MCELSIUS(125)))
	184	return -EIO;
	185
	186	/* Round value to device granularity setting */
	187	*temp = rcar_gen3_thermal_round(mcelsius);
	188
	189	return 0;
	190	}
	191
7d4b2697 NS	192	static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
	193	int mcelsius)
	194	{
	195	int celsius, val1, val2;
	196
	197	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	198	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
	199	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
	200
	201	return INT_FIXPT((val1 + val2) / 2);
	202	}
	203
	204	static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
	205	{
	206	struct rcar_gen3_thermal_tsc *tsc = devdata;
	207
	208	low = clamp_val(low, -40000, 125000);
	209	high = clamp_val(high, -40000, 125000);
	210
	211	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
	212	rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	213
	214	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
	215	rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	216
75f78d6d NS	217	tsc->low = low;
	218	tsc->high = high;
	219
7d4b2697 NS	220	return 0;
	221	}
	222
a0def10b	223	static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
564e73d2	224	.get_temp = rcar_gen3_thermal_get_temp,
7d4b2697	225	.set_trips = rcar_gen3_thermal_set_trips,
564e73d2 WS	226	};
564e73d2 WS	227
7d4b2697 NS	228	static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
	229	{
	230	unsigned int i;
	231	u32 val = on ? IRQ_TEMPD1 \| IRQ_TEMP2 : 0;
	232
	233	for (i = 0; i < priv->num_tscs; i++)
	234	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
	235	}
	236
	237	static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
	238	{
	239	struct rcar_gen3_thermal_priv *priv = data;
	240	u32 status;
3cf7d92e	241	int i;
7d4b2697	242
7d4b2697 NS	243	for (i = 0; i < priv->num_tscs; i++) {
	244	status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
	245	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
	246	if (status)
3cf7d92e JW	247	thermal_zone_device_update(priv->tscs[i]->zone,
3cf7d92e JW	248	THERMAL_EVENT_UNSPECIFIED);
7d4b2697 NS	249	}
7d4b2697 NS	250
7d4b2697 NS	251	return IRQ_HANDLED;
	252	}
	253
d668c807 NS	254	static const struct soc_device_attribute r8a7795es1[] = {
	255	{ .soc_id = "r8a7795", .revision = "ES1.*" },
	256	{ /* sentinel */ }
	257	};
	258
	259	static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	260	{
	261	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
	262	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
	263
	264	usleep_range(1000, 2000);
	265
	266	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
7d4b2697	267
564e73d2	268	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
7d4b2697 NS	269	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	270	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 \| IRQ_TEMP2);
	271
564e73d2 WS	272	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
	273	CTSR_PONM \| CTSR_AOUT \| CTSR_THBGR \| CTSR_VMEN);
	274
	275	usleep_range(100, 200);
	276
	277	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
	278	CTSR_PONM \| CTSR_AOUT \| CTSR_THBGR \| CTSR_VMEN \|
	279	CTSR_VMST \| CTSR_THSST);
	280
	281	usleep_range(1000, 2000);
	282	}
	283
d668c807	284	static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	285	{
	286	u32 reg_val;
	287
	288	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	289	reg_val &= ~THCTR_PONM;
	290	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
	291
	292	usleep_range(1000, 2000);
	293
	294	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
7d4b2697 NS	295	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	296	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 \| IRQ_TEMP2);
	297
564e73d2 WS	298	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	299	reg_val \|= THCTR_THSST;
	300	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
78aefd2d NS	301
78aefd2d NS	302	usleep_range(1000, 2000);
564e73d2 WS	303	}
564e73d2 WS	304
564e73d2	305	static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
d668c807 NS	306	{ .compatible = "renesas,r8a7795-thermal", },
d668c807 NS	307	{ .compatible = "renesas,r8a7796-thermal", },
564e73d2 WS	308	{},
	309	};
	310	MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
	311
	312	static int rcar_gen3_thermal_remove(struct platform_device *pdev)
	313	{
	314	struct device *dev = &pdev->dev;
96e4a377 JW	315	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	316
	317	rcar_thermal_irq_set(priv, false);
564e73d2 WS	318
	319	pm_runtime_put(dev);
	320	pm_runtime_disable(dev);
	321
	322	return 0;
	323	}
	324
	325	static int rcar_gen3_thermal_probe(struct platform_device *pdev)
	326	{
	327	struct rcar_gen3_thermal_priv *priv;
	328	struct device *dev = &pdev->dev;
	329	struct resource *res;
	330	struct thermal_zone_device *zone;
7d4b2697 NS	331	int ret, irq, i;
7d4b2697 NS	332	char *irqname;
564e73d2 WS	333
	334	/* default values if FUSEs are missing */
	335	/* TODO: Read values from hardware on supported platforms */
	336	int ptat[3] = { 2351, 1509, 435 };
	337	int thcode[TSC_MAX_NUM][3] = {
	338	{ 3248, 2800, 2221 },
	339	{ 3245, 2795, 2216 },
	340	{ 3250, 2805, 2237 },
	341	};
	342
	343	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	344	if (!priv)
	345	return -ENOMEM;
	346
d668c807 NS	347	priv->thermal_init = rcar_gen3_thermal_init;
	348	if (soc_device_match(r8a7795es1))
	349	priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
cc4d072b	350
564e73d2 WS	351	platform_set_drvdata(pdev, priv);
564e73d2 WS	352
7d4b2697 NS	353	/*
	354	* Request 2 (of the 3 possible) IRQs, the driver only needs to
	355	* to trigger on the low and high trip points of the current
	356	* temp window at this point.
	357	*/
	358	for (i = 0; i < 2; i++) {
	359	irq = platform_get_irq(pdev, i);
	360	if (irq < 0)
	361	return irq;
	362
	363	irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
	364	dev_name(dev), i);
	365	if (!irqname)
	366	return -ENOMEM;
	367
3cf7d92e JW	368	ret = devm_request_threaded_irq(dev, irq, NULL,
	369	rcar_gen3_thermal_irq,
	370	IRQF_ONESHOT, irqname, priv);
7d4b2697 NS	371	if (ret)
	372	return ret;
	373	}
	374
564e73d2 WS	375	pm_runtime_enable(dev);
	376	pm_runtime_get_sync(dev);
	377
	378	for (i = 0; i < TSC_MAX_NUM; i++) {
	379	struct rcar_gen3_thermal_tsc *tsc;
	380
d51546c0 NS	381	res = platform_get_resource(pdev, IORESOURCE_MEM, i);
	382	if (!res)
	383	break;
	384
564e73d2 WS	385	tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
	386	if (!tsc) {
	387	ret = -ENOMEM;
	388	goto error_unregister;
	389	}
	390
564e73d2 WS	391	tsc->base = devm_ioremap_resource(dev, res);
	392	if (IS_ERR(tsc->base)) {
	393	ret = PTR_ERR(tsc->base);
	394	goto error_unregister;
	395	}
	396
	397	priv->tscs[i] = tsc;
564e73d2	398
d668c807	399	priv->thermal_init(tsc);
564e73d2 WS	400	rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
	401
	402	zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
	403	&rcar_gen3_tz_of_ops);
	404	if (IS_ERR(zone)) {
	405	dev_err(dev, "Can't register thermal zone\n");
	406	ret = PTR_ERR(zone);
	407	goto error_unregister;
	408	}
	409	tsc->zone = zone;
7d4b2697 NS	410
	411	ret = of_thermal_get_ntrips(tsc->zone);
	412	if (ret < 0)
	413	goto error_unregister;
	414
	415	dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
564e73d2 WS	416	}
564e73d2 WS	417
97dad1f1 NS	418	priv->num_tscs = i;
	419
	420	if (!priv->num_tscs) {
	421	ret = -ENODEV;
	422	goto error_unregister;
	423	}
	424
7d4b2697 NS	425	rcar_thermal_irq_set(priv, true);
7d4b2697 NS	426
564e73d2 WS	427	return 0;
	428
	429	error_unregister:
	430	rcar_gen3_thermal_remove(pdev);
	431
	432	return ret;
	433	}
	434
75f78d6d NS	435	static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
	436	{
	437	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	438
	439	rcar_thermal_irq_set(priv, false);
	440
	441	return 0;
	442	}
	443
	444	static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
	445	{
	446	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	447	unsigned int i;
	448
	449	for (i = 0; i < priv->num_tscs; i++) {
	450	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	451
d668c807	452	priv->thermal_init(tsc);
75f78d6d NS	453	rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
	454	}
	455
	456	rcar_thermal_irq_set(priv, true);
	457
	458	return 0;
	459	}
	460
	461	static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
	462	rcar_gen3_thermal_resume);
	463
564e73d2 WS	464	static struct platform_driver rcar_gen3_thermal_driver = {
	465	.driver = {
	466	.name = "rcar_gen3_thermal",
75f78d6d	467	.pm = &rcar_gen3_thermal_pm_ops,
564e73d2 WS	468	.of_match_table = rcar_gen3_thermal_dt_ids,
	469	},
	470	.probe = rcar_gen3_thermal_probe,
	471	.remove = rcar_gen3_thermal_remove,
	472	};
	473	module_platform_driver(rcar_gen3_thermal_driver);
	474
	475	MODULE_LICENSE("GPL v2");
	476	MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
	477	MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");