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1 | /* |
2 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/of.h> | |
20 | #include <linux/of_address.h> | |
21 | #include <linux/of_irq.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/reset.h> | |
24 | #include <linux/thermal.h> | |
25 | ||
26 | /** | |
27 | * If the temperature over a period of time High, | |
28 | * the resulting TSHUT gave CRU module,let it reset the entire chip, | |
29 | * or via GPIO give PMIC. | |
30 | */ | |
31 | enum tshut_mode { | |
32 | TSHUT_MODE_CRU = 0, | |
33 | TSHUT_MODE_GPIO, | |
34 | }; | |
35 | ||
36 | /** | |
37 | * the system Temperature Sensors tshut(tshut) polarity | |
38 | * the bit 8 is tshut polarity. | |
39 | * 0: low active, 1: high active | |
40 | */ | |
41 | enum tshut_polarity { | |
42 | TSHUT_LOW_ACTIVE = 0, | |
43 | TSHUT_HIGH_ACTIVE, | |
44 | }; | |
45 | ||
46 | /** | |
47 | * The system has three Temperature Sensors. channel 0 is reserved, | |
48 | * channel 1 is for CPU, and channel 2 is for GPU. | |
49 | */ | |
50 | enum sensor_id { | |
51 | SENSOR_CPU = 1, | |
52 | SENSOR_GPU, | |
53 | }; | |
54 | ||
55 | struct rockchip_tsadc_chip { | |
56 | /* The hardware-controlled tshut property */ | |
57 | long tshut_temp; | |
58 | enum tshut_mode tshut_mode; | |
59 | enum tshut_polarity tshut_polarity; | |
60 | ||
61 | /* Chip-wide methods */ | |
62 | void (*initialize)(void __iomem *reg, enum tshut_polarity p); | |
63 | void (*irq_ack)(void __iomem *reg); | |
64 | void (*control)(void __iomem *reg, bool on); | |
65 | ||
66 | /* Per-sensor methods */ | |
67 | int (*get_temp)(int chn, void __iomem *reg, long *temp); | |
68 | void (*set_tshut_temp)(int chn, void __iomem *reg, long temp); | |
69 | void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m); | |
70 | }; | |
71 | ||
72 | struct rockchip_thermal_sensor { | |
73 | struct rockchip_thermal_data *thermal; | |
74 | struct thermal_zone_device *tzd; | |
75 | enum sensor_id id; | |
76 | }; | |
77 | ||
78 | #define NUM_SENSORS 2 /* Ignore unused sensor 0 */ | |
79 | ||
80 | struct rockchip_thermal_data { | |
81 | const struct rockchip_tsadc_chip *chip; | |
82 | struct platform_device *pdev; | |
83 | struct reset_control *reset; | |
84 | ||
85 | struct rockchip_thermal_sensor sensors[NUM_SENSORS]; | |
86 | ||
87 | struct clk *clk; | |
88 | struct clk *pclk; | |
89 | ||
90 | void __iomem *regs; | |
91 | ||
92 | long tshut_temp; | |
93 | enum tshut_mode tshut_mode; | |
94 | enum tshut_polarity tshut_polarity; | |
95 | }; | |
96 | ||
97 | /* TSADC V2 Sensor info define: */ | |
98 | #define TSADCV2_AUTO_CON 0x04 | |
99 | #define TSADCV2_INT_EN 0x08 | |
100 | #define TSADCV2_INT_PD 0x0c | |
101 | #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04) | |
102 | #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04) | |
103 | #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60 | |
104 | #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64 | |
105 | #define TSADCV2_AUTO_PERIOD 0x68 | |
106 | #define TSADCV2_AUTO_PERIOD_HT 0x6c | |
107 | ||
108 | #define TSADCV2_AUTO_EN BIT(0) | |
109 | #define TSADCV2_AUTO_DISABLE ~BIT(0) | |
110 | #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) | |
111 | #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8) | |
112 | #define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8) | |
113 | ||
114 | #define TSADCV2_INT_SRC_EN(chn) BIT(chn) | |
115 | #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) | |
116 | #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) | |
117 | ||
118 | #define TSADCV2_INT_PD_CLEAR ~BIT(8) | |
119 | ||
120 | #define TSADCV2_DATA_MASK 0xfff | |
121 | #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 | |
122 | #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 | |
123 | #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */ | |
124 | #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */ | |
125 | ||
126 | struct tsadc_table { | |
127 | unsigned long code; | |
128 | long temp; | |
129 | }; | |
130 | ||
131 | static const struct tsadc_table v2_code_table[] = { | |
132 | {TSADCV2_DATA_MASK, -40000}, | |
133 | {3800, -40000}, | |
134 | {3792, -35000}, | |
135 | {3783, -30000}, | |
136 | {3774, -25000}, | |
137 | {3765, -20000}, | |
138 | {3756, -15000}, | |
139 | {3747, -10000}, | |
140 | {3737, -5000}, | |
141 | {3728, 0}, | |
142 | {3718, 5000}, | |
143 | {3708, 10000}, | |
144 | {3698, 15000}, | |
145 | {3688, 20000}, | |
146 | {3678, 25000}, | |
147 | {3667, 30000}, | |
148 | {3656, 35000}, | |
149 | {3645, 40000}, | |
150 | {3634, 45000}, | |
151 | {3623, 50000}, | |
152 | {3611, 55000}, | |
153 | {3600, 60000}, | |
154 | {3588, 65000}, | |
155 | {3575, 70000}, | |
156 | {3563, 75000}, | |
157 | {3550, 80000}, | |
158 | {3537, 85000}, | |
159 | {3524, 90000}, | |
160 | {3510, 95000}, | |
161 | {3496, 100000}, | |
162 | {3482, 105000}, | |
163 | {3467, 110000}, | |
164 | {3452, 115000}, | |
165 | {3437, 120000}, | |
166 | {3421, 125000}, | |
167 | {0, 125000}, | |
168 | }; | |
169 | ||
170 | static u32 rk_tsadcv2_temp_to_code(long temp) | |
171 | { | |
172 | int high, low, mid; | |
173 | ||
174 | low = 0; | |
175 | high = ARRAY_SIZE(v2_code_table) - 1; | |
176 | mid = (high + low) / 2; | |
177 | ||
178 | if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp) | |
179 | return 0; | |
180 | ||
181 | while (low <= high) { | |
182 | if (temp == v2_code_table[mid].temp) | |
183 | return v2_code_table[mid].code; | |
184 | else if (temp < v2_code_table[mid].temp) | |
185 | high = mid - 1; | |
186 | else | |
187 | low = mid + 1; | |
188 | mid = (low + high) / 2; | |
189 | } | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | static long rk_tsadcv2_code_to_temp(u32 code) | |
195 | { | |
1e9a1aea CW |
196 | unsigned int low = 0; |
197 | unsigned int high = ARRAY_SIZE(v2_code_table) - 1; | |
198 | unsigned int mid = (low + high) / 2; | |
199 | unsigned int num; | |
200 | unsigned long denom; | |
201 | ||
202 | /* Invalid code, return -EAGAIN */ | |
203 | if (code > TSADCV2_DATA_MASK) | |
204 | return -EAGAIN; | |
205 | ||
206 | while (low <= high && mid) { | |
207 | if (code >= v2_code_table[mid].code && | |
208 | code < v2_code_table[mid - 1].code) | |
209 | break; | |
cbac8f63 CW |
210 | else if (code < v2_code_table[mid].code) |
211 | low = mid + 1; | |
212 | else | |
213 | high = mid - 1; | |
214 | mid = (low + high) / 2; | |
215 | } | |
216 | ||
1e9a1aea CW |
217 | /* |
218 | * The 5C granularity provided by the table is too much. Let's | |
219 | * assume that the relationship between sensor readings and | |
220 | * temperature between 2 table entries is linear and interpolate | |
221 | * to produce less granular result. | |
222 | */ | |
223 | num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp; | |
224 | num *= v2_code_table[mid - 1].code - code; | |
225 | denom = v2_code_table[mid - 1].code - v2_code_table[mid].code; | |
226 | return v2_code_table[mid - 1].temp + (num / denom); | |
cbac8f63 CW |
227 | } |
228 | ||
229 | /** | |
230 | * rk_tsadcv2_initialize - initialize TASDC Controller | |
231 | * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between | |
232 | * every two accessing of TSADC in normal operation. | |
233 | * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between | |
234 | * every two accessing of TSADC after the temperature is higher | |
235 | * than COM_SHUT or COM_INT. | |
236 | * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE, | |
237 | * if the temperature is higher than COMP_INT or COMP_SHUT for | |
238 | * "debounce" times, TSADC controller will generate interrupt or TSHUT. | |
239 | */ | |
240 | static void rk_tsadcv2_initialize(void __iomem *regs, | |
241 | enum tshut_polarity tshut_polarity) | |
242 | { | |
243 | if (tshut_polarity == TSHUT_HIGH_ACTIVE) | |
244 | writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH), | |
245 | regs + TSADCV2_AUTO_CON); | |
246 | else | |
247 | writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW), | |
248 | regs + TSADCV2_AUTO_CON); | |
249 | ||
250 | writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); | |
251 | writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, | |
252 | regs + TSADCV2_HIGHT_INT_DEBOUNCE); | |
253 | writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, | |
254 | regs + TSADCV2_AUTO_PERIOD_HT); | |
255 | writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, | |
256 | regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); | |
257 | } | |
258 | ||
259 | static void rk_tsadcv2_irq_ack(void __iomem *regs) | |
260 | { | |
261 | u32 val; | |
262 | ||
263 | val = readl_relaxed(regs + TSADCV2_INT_PD); | |
264 | writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD); | |
265 | } | |
266 | ||
267 | static void rk_tsadcv2_control(void __iomem *regs, bool enable) | |
268 | { | |
269 | u32 val; | |
270 | ||
271 | val = readl_relaxed(regs + TSADCV2_AUTO_CON); | |
272 | if (enable) | |
273 | val |= TSADCV2_AUTO_EN; | |
274 | else | |
275 | val &= ~TSADCV2_AUTO_EN; | |
276 | ||
277 | writel_relaxed(val, regs + TSADCV2_AUTO_CON); | |
278 | } | |
279 | ||
280 | static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp) | |
281 | { | |
282 | u32 val; | |
283 | ||
284 | /* the A/D value of the channel last conversion need some time */ | |
285 | val = readl_relaxed(regs + TSADCV2_DATA(chn)); | |
286 | if (val == 0) | |
287 | return -EAGAIN; | |
288 | ||
289 | *temp = rk_tsadcv2_code_to_temp(val); | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp) | |
295 | { | |
296 | u32 tshut_value, val; | |
297 | ||
298 | tshut_value = rk_tsadcv2_temp_to_code(temp); | |
299 | writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn)); | |
300 | ||
301 | /* TSHUT will be valid */ | |
302 | val = readl_relaxed(regs + TSADCV2_AUTO_CON); | |
303 | writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON); | |
304 | } | |
305 | ||
306 | static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs, | |
307 | enum tshut_mode mode) | |
308 | { | |
309 | u32 val; | |
310 | ||
311 | val = readl_relaxed(regs + TSADCV2_INT_EN); | |
312 | if (mode == TSHUT_MODE_GPIO) { | |
313 | val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn); | |
314 | val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn); | |
315 | } else { | |
316 | val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn); | |
317 | val |= TSADCV2_SHUT_2CRU_SRC_EN(chn); | |
318 | } | |
319 | ||
320 | writel_relaxed(val, regs + TSADCV2_INT_EN); | |
321 | } | |
322 | ||
323 | static const struct rockchip_tsadc_chip rk3288_tsadc_data = { | |
324 | .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ | |
325 | .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ | |
326 | .tshut_temp = 95000, | |
327 | ||
328 | .initialize = rk_tsadcv2_initialize, | |
329 | .irq_ack = rk_tsadcv2_irq_ack, | |
330 | .control = rk_tsadcv2_control, | |
331 | .get_temp = rk_tsadcv2_get_temp, | |
332 | .set_tshut_temp = rk_tsadcv2_tshut_temp, | |
333 | .set_tshut_mode = rk_tsadcv2_tshut_mode, | |
334 | }; | |
335 | ||
336 | static const struct of_device_id of_rockchip_thermal_match[] = { | |
337 | { | |
338 | .compatible = "rockchip,rk3288-tsadc", | |
339 | .data = (void *)&rk3288_tsadc_data, | |
340 | }, | |
341 | { /* end */ }, | |
342 | }; | |
343 | MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); | |
344 | ||
345 | static void | |
346 | rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on) | |
347 | { | |
348 | struct thermal_zone_device *tzd = sensor->tzd; | |
349 | ||
350 | tzd->ops->set_mode(tzd, | |
351 | on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED); | |
352 | } | |
353 | ||
354 | static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev) | |
355 | { | |
356 | struct rockchip_thermal_data *thermal = dev; | |
357 | int i; | |
358 | ||
359 | dev_dbg(&thermal->pdev->dev, "thermal alarm\n"); | |
360 | ||
361 | thermal->chip->irq_ack(thermal->regs); | |
362 | ||
363 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) | |
364 | thermal_zone_device_update(thermal->sensors[i].tzd); | |
365 | ||
366 | return IRQ_HANDLED; | |
367 | } | |
368 | ||
369 | static int rockchip_thermal_get_temp(void *_sensor, long *out_temp) | |
370 | { | |
371 | struct rockchip_thermal_sensor *sensor = _sensor; | |
372 | struct rockchip_thermal_data *thermal = sensor->thermal; | |
373 | const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip; | |
374 | int retval; | |
375 | ||
376 | retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp); | |
377 | dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n", | |
378 | sensor->id, *out_temp, retval); | |
379 | ||
380 | return retval; | |
381 | } | |
382 | ||
383 | static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = { | |
384 | .get_temp = rockchip_thermal_get_temp, | |
385 | }; | |
386 | ||
387 | static int rockchip_configure_from_dt(struct device *dev, | |
388 | struct device_node *np, | |
389 | struct rockchip_thermal_data *thermal) | |
390 | { | |
391 | u32 shut_temp, tshut_mode, tshut_polarity; | |
392 | ||
393 | if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) { | |
394 | dev_warn(dev, | |
395 | "Missing tshut temp property, using default %ld\n", | |
396 | thermal->chip->tshut_temp); | |
397 | thermal->tshut_temp = thermal->chip->tshut_temp; | |
398 | } else { | |
399 | thermal->tshut_temp = shut_temp; | |
400 | } | |
401 | ||
402 | if (thermal->tshut_temp > INT_MAX) { | |
403 | dev_err(dev, "Invalid tshut temperature specified: %ld\n", | |
404 | thermal->tshut_temp); | |
405 | return -ERANGE; | |
406 | } | |
407 | ||
408 | if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) { | |
409 | dev_warn(dev, | |
410 | "Missing tshut mode property, using default (%s)\n", | |
411 | thermal->chip->tshut_mode == TSHUT_MODE_GPIO ? | |
412 | "gpio" : "cru"); | |
413 | thermal->tshut_mode = thermal->chip->tshut_mode; | |
414 | } else { | |
415 | thermal->tshut_mode = tshut_mode; | |
416 | } | |
417 | ||
418 | if (thermal->tshut_mode > 1) { | |
419 | dev_err(dev, "Invalid tshut mode specified: %d\n", | |
420 | thermal->tshut_mode); | |
421 | return -EINVAL; | |
422 | } | |
423 | ||
424 | if (of_property_read_u32(np, "rockchip,hw-tshut-polarity", | |
425 | &tshut_polarity)) { | |
426 | dev_warn(dev, | |
427 | "Missing tshut-polarity property, using default (%s)\n", | |
428 | thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ? | |
429 | "low" : "high"); | |
430 | thermal->tshut_polarity = thermal->chip->tshut_polarity; | |
431 | } else { | |
432 | thermal->tshut_polarity = tshut_polarity; | |
433 | } | |
434 | ||
435 | if (thermal->tshut_polarity > 1) { | |
436 | dev_err(dev, "Invalid tshut-polarity specified: %d\n", | |
437 | thermal->tshut_polarity); | |
438 | return -EINVAL; | |
439 | } | |
440 | ||
441 | return 0; | |
442 | } | |
443 | ||
444 | static int | |
445 | rockchip_thermal_register_sensor(struct platform_device *pdev, | |
446 | struct rockchip_thermal_data *thermal, | |
447 | struct rockchip_thermal_sensor *sensor, | |
448 | enum sensor_id id) | |
449 | { | |
450 | const struct rockchip_tsadc_chip *tsadc = thermal->chip; | |
451 | int error; | |
452 | ||
453 | tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode); | |
454 | tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp); | |
455 | ||
456 | sensor->thermal = thermal; | |
457 | sensor->id = id; | |
458 | sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor, | |
459 | &rockchip_of_thermal_ops); | |
460 | if (IS_ERR(sensor->tzd)) { | |
461 | error = PTR_ERR(sensor->tzd); | |
462 | dev_err(&pdev->dev, "failed to register sensor %d: %d\n", | |
463 | id, error); | |
464 | return error; | |
465 | } | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | /* | |
471 | * Reset TSADC Controller, reset all tsadc registers. | |
472 | */ | |
473 | static void rockchip_thermal_reset_controller(struct reset_control *reset) | |
474 | { | |
475 | reset_control_assert(reset); | |
476 | usleep_range(10, 20); | |
477 | reset_control_deassert(reset); | |
478 | } | |
479 | ||
480 | static int rockchip_thermal_probe(struct platform_device *pdev) | |
481 | { | |
482 | struct device_node *np = pdev->dev.of_node; | |
483 | struct rockchip_thermal_data *thermal; | |
484 | const struct of_device_id *match; | |
485 | struct resource *res; | |
486 | int irq; | |
487 | int i; | |
488 | int error; | |
489 | ||
490 | match = of_match_node(of_rockchip_thermal_match, np); | |
491 | if (!match) | |
492 | return -ENXIO; | |
493 | ||
494 | irq = platform_get_irq(pdev, 0); | |
495 | if (irq < 0) { | |
496 | dev_err(&pdev->dev, "no irq resource?\n"); | |
497 | return -EINVAL; | |
498 | } | |
499 | ||
500 | thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data), | |
501 | GFP_KERNEL); | |
502 | if (!thermal) | |
503 | return -ENOMEM; | |
504 | ||
505 | thermal->pdev = pdev; | |
506 | ||
507 | thermal->chip = (const struct rockchip_tsadc_chip *)match->data; | |
508 | if (!thermal->chip) | |
509 | return -EINVAL; | |
510 | ||
511 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
512 | thermal->regs = devm_ioremap_resource(&pdev->dev, res); | |
513 | if (IS_ERR(thermal->regs)) | |
514 | return PTR_ERR(thermal->regs); | |
515 | ||
516 | thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb"); | |
517 | if (IS_ERR(thermal->reset)) { | |
518 | error = PTR_ERR(thermal->reset); | |
519 | dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error); | |
520 | return error; | |
521 | } | |
522 | ||
523 | thermal->clk = devm_clk_get(&pdev->dev, "tsadc"); | |
524 | if (IS_ERR(thermal->clk)) { | |
525 | error = PTR_ERR(thermal->clk); | |
526 | dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error); | |
527 | return error; | |
528 | } | |
529 | ||
530 | thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); | |
531 | if (IS_ERR(thermal->pclk)) { | |
532 | error = PTR_ERR(thermal->clk); | |
533 | dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n", | |
534 | error); | |
535 | return error; | |
536 | } | |
537 | ||
538 | error = clk_prepare_enable(thermal->clk); | |
539 | if (error) { | |
540 | dev_err(&pdev->dev, "failed to enable converter clock: %d\n", | |
541 | error); | |
542 | return error; | |
543 | } | |
544 | ||
545 | error = clk_prepare_enable(thermal->pclk); | |
546 | if (error) { | |
547 | dev_err(&pdev->dev, "failed to enable pclk: %d\n", error); | |
548 | goto err_disable_clk; | |
549 | } | |
550 | ||
551 | rockchip_thermal_reset_controller(thermal->reset); | |
552 | ||
553 | error = rockchip_configure_from_dt(&pdev->dev, np, thermal); | |
554 | if (error) { | |
555 | dev_err(&pdev->dev, "failed to parse device tree data: %d\n", | |
556 | error); | |
557 | goto err_disable_pclk; | |
558 | } | |
559 | ||
560 | thermal->chip->initialize(thermal->regs, thermal->tshut_polarity); | |
561 | ||
562 | error = rockchip_thermal_register_sensor(pdev, thermal, | |
563 | &thermal->sensors[0], | |
564 | SENSOR_CPU); | |
565 | if (error) { | |
566 | dev_err(&pdev->dev, | |
567 | "failed to register CPU thermal sensor: %d\n", error); | |
568 | goto err_disable_pclk; | |
569 | } | |
570 | ||
571 | error = rockchip_thermal_register_sensor(pdev, thermal, | |
572 | &thermal->sensors[1], | |
573 | SENSOR_GPU); | |
574 | if (error) { | |
575 | dev_err(&pdev->dev, | |
576 | "failed to register GPU thermal sensor: %d\n", error); | |
577 | goto err_unregister_cpu_sensor; | |
578 | } | |
579 | ||
580 | error = devm_request_threaded_irq(&pdev->dev, irq, NULL, | |
581 | &rockchip_thermal_alarm_irq_thread, | |
582 | IRQF_ONESHOT, | |
583 | "rockchip_thermal", thermal); | |
584 | if (error) { | |
585 | dev_err(&pdev->dev, | |
586 | "failed to request tsadc irq: %d\n", error); | |
587 | goto err_unregister_gpu_sensor; | |
588 | } | |
589 | ||
590 | thermal->chip->control(thermal->regs, true); | |
591 | ||
592 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) | |
593 | rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); | |
594 | ||
595 | platform_set_drvdata(pdev, thermal); | |
596 | ||
597 | return 0; | |
598 | ||
599 | err_unregister_gpu_sensor: | |
600 | thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd); | |
601 | err_unregister_cpu_sensor: | |
602 | thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd); | |
603 | err_disable_pclk: | |
604 | clk_disable_unprepare(thermal->pclk); | |
605 | err_disable_clk: | |
606 | clk_disable_unprepare(thermal->clk); | |
607 | ||
608 | return error; | |
609 | } | |
610 | ||
611 | static int rockchip_thermal_remove(struct platform_device *pdev) | |
612 | { | |
613 | struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); | |
614 | int i; | |
615 | ||
616 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) { | |
617 | struct rockchip_thermal_sensor *sensor = &thermal->sensors[i]; | |
618 | ||
619 | rockchip_thermal_toggle_sensor(sensor, false); | |
620 | thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd); | |
621 | } | |
622 | ||
623 | thermal->chip->control(thermal->regs, false); | |
624 | ||
625 | clk_disable_unprepare(thermal->pclk); | |
626 | clk_disable_unprepare(thermal->clk); | |
627 | ||
628 | return 0; | |
629 | } | |
630 | ||
631 | static int __maybe_unused rockchip_thermal_suspend(struct device *dev) | |
632 | { | |
633 | struct platform_device *pdev = to_platform_device(dev); | |
634 | struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); | |
635 | int i; | |
636 | ||
637 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) | |
638 | rockchip_thermal_toggle_sensor(&thermal->sensors[i], false); | |
639 | ||
640 | thermal->chip->control(thermal->regs, false); | |
641 | ||
642 | clk_disable(thermal->pclk); | |
643 | clk_disable(thermal->clk); | |
644 | ||
645 | return 0; | |
646 | } | |
647 | ||
648 | static int __maybe_unused rockchip_thermal_resume(struct device *dev) | |
649 | { | |
650 | struct platform_device *pdev = to_platform_device(dev); | |
651 | struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); | |
652 | int i; | |
653 | int error; | |
654 | ||
655 | error = clk_enable(thermal->clk); | |
656 | if (error) | |
657 | return error; | |
658 | ||
659 | error = clk_enable(thermal->pclk); | |
660 | if (error) | |
661 | return error; | |
662 | ||
663 | rockchip_thermal_reset_controller(thermal->reset); | |
664 | ||
665 | thermal->chip->initialize(thermal->regs, thermal->tshut_polarity); | |
666 | ||
667 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) { | |
668 | enum sensor_id id = thermal->sensors[i].id; | |
669 | ||
670 | thermal->chip->set_tshut_mode(id, thermal->regs, | |
671 | thermal->tshut_mode); | |
672 | thermal->chip->set_tshut_temp(id, thermal->regs, | |
673 | thermal->tshut_temp); | |
674 | } | |
675 | ||
676 | thermal->chip->control(thermal->regs, true); | |
677 | ||
678 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) | |
679 | rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); | |
680 | ||
681 | return 0; | |
682 | } | |
683 | ||
684 | static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops, | |
685 | rockchip_thermal_suspend, rockchip_thermal_resume); | |
686 | ||
687 | static struct platform_driver rockchip_thermal_driver = { | |
688 | .driver = { | |
689 | .name = "rockchip-thermal", | |
cbac8f63 CW |
690 | .pm = &rockchip_thermal_pm_ops, |
691 | .of_match_table = of_rockchip_thermal_match, | |
692 | }, | |
693 | .probe = rockchip_thermal_probe, | |
694 | .remove = rockchip_thermal_remove, | |
695 | }; | |
696 | ||
697 | module_platform_driver(rockchip_thermal_driver); | |
698 | ||
699 | MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver"); | |
700 | MODULE_AUTHOR("Rockchip, Inc."); | |
701 | MODULE_LICENSE("GPL v2"); | |
702 | MODULE_ALIAS("platform:rockchip-thermal"); |